A carrier phase synchronization method, apparatus, device and medium

Abstract

The application provides a carrier phase synchronization method, device, equipment and medium, the method comprises the following steps: a controller acquires the difference value of the optimal carrier phase reference value and the local carrier phase, and generates a normalized phase difference after normalization; the absolute value is calculated by a segmented function, and the carrier period register value is modified accordingly. When the normalized phase difference and the change quantity of the continuous multiple periods are lower than two threshold values respectively, the register restores the rated value; then the three-phase output current of the converter is collected, the zero sequence circulating current is calculated, and the carrier frequency component is extracted. With the component amplitude tending to zero as the target, the phase compensation quantity is calculated through the model reference adaptive control law, the optimal carrier phase reference value is updated, and synchronization is realized. The method first adaptively and gradually adjusts the segmented function of the normalized phase difference, then introduces the model reference adaptive closed-loop fine tuning of the zero sequence circulating current carrier frequency component feedback after meeting the stability condition, and realizes the carrier synchronization with no transient impact, high precision and stability.

Description

Technical Field

[0001] This application belongs to the field of carrier phase control, and particularly relates to a carrier phase synchronization method, apparatus, device and medium. Background Technology

[0002] With the large-scale application of distributed new energy sources such as wind power, photovoltaics, and energy storage, multi-module parallel converter systems using a common DC bus and common AC bus architecture have become the mainstream technical solution for medium- and high-power power conversion scenarios due to their advantages such as flexible capacity expansion, strong redundancy, and convenient operation and maintenance. In this architecture, the carrier asynchrony of each converter module is a core technical pain point. It causes periodic fluctuations in the common-mode voltage between modules, which in turn excites high-frequency zero-sequence circulating current, resulting in output current distortion, increased total harmonic distortion rate, and intensified losses and thermal stress of switching devices, seriously threatening the stability and reliability of system operation.

[0003] To eliminate carrier phase deviation and suppress zero-sequence circulating current, existing carrier synchronization methods are mainly divided into three categories. Centralized carrier synchronization methods use a central controller to send a unified synchronization signal to all parallel modules, offering a simple implementation. Distributed carrier synchronization methods rely on a common communication bus between modules to exchange synchronization information, supporting plug-and-play functionality. Decentralized, communication-free carrier synchronization methods require no communication links between modules, relying solely on locally collected grid voltage and other information for autonomous synchronization, making them a current research hotspot. Specific decentralized implementations include nonlinear control strategies with high algorithmic complexity and difficult engineering implementation, as well as techniques based on phase-locked loops (PLLs) that force the carrier frequency to maintain an integer carrier ratio with the grid frequency. Furthermore, existing solutions generally ignore the grid phase sampling error caused by differences in sampling points between different modules. This error, amplified by the carrier ratio, severely degrades synchronization performance.

[0004] In existing technologies, especially in the implementation of distributed, non-communication synchronization schemes, the "one-step carrier phase adjustment" method is commonly used. This method directly modifies the current value of the digital controller's time base counter after detecting a phase difference. This approach causes instantaneous abrupt changes in the pulse width modulation waveform, leading to jumps in the output voltage and consequently, transient inrush currents with amplitudes several times the rated current. This not only increases the stress on switching devices but may also trigger system overcurrent protection, causing shutdown. Furthermore, because this method cannot handle sampling noise and calculation errors, it easily leads to continuous oscillations in the carrier phase, making it difficult to stabilize synchronization accuracy and reliably suppress high-frequency zero-sequence circulating currents at their source. Summary of the Invention

[0005] The purpose of this application is to overcome the deficiencies in the prior art and provide a carrier phase synchronization method, apparatus, device and medium.

[0006] This application provides a carrier phase synchronization method, including:

[0007] Obtain the difference between the optimal carrier phase reference value and the local carrier phase;

[0008] The difference is normalized to generate a normalized phase difference; the adjustment step size is calculated using a predefined piecewise function based on the absolute value of the normalized phase difference; and the value of the carrier period register is modified according to the adjustment step size.

[0009] When the normalized phase difference is less than the first threshold and the change in the normalized phase difference is less than the second threshold for multiple consecutive control cycles, the value of the carrier cycle register is restored to the rated value.

[0010] The three-phase output current of the converter is collected, and the zero-sequence circulating current is calculated based on the three-phase output current.

[0011] The carrier frequency component is extracted from the zero-sequence circulating current; with the amplitude of the carrier frequency component approaching zero as the target, the phase compensation amount is calculated through the model reference adaptive control law; the optimal carrier phase reference value is updated according to the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

[0012] Optionally, modifying the value of the carrier period register according to the adjustment step size includes:

[0013] The adjustment step size is added to the current value of the carrier period register to obtain a new value for the carrier period register; the new value is then written into the carrier period register.

[0014] Optionally, the adjustment step size is calculated using a predefined piecewise function, including:

[0015] If the absolute value of the normalized phase difference is greater than the first threshold, the calculated adjustment step size is the preset maximum step size.

[0016] When the absolute value of the normalized phase difference is between the first threshold and the second threshold, the calculated adjustment step size is obtained by exponentially decaying the adjustment step size value of the previous control cycle.

[0017] If the absolute value of the normalized phase difference is less than the second threshold, the calculated adjustment step size is zero.

[0018] Optionally, the phase compensation amount is calculated using a model reference adaptive control law, including:

[0019] The model reference adaptive control law adopts the MIT rule;

[0020] In the process of calculating the phase compensation amount, the adaptive gain corresponding to the MIT rule is dynamically adjusted according to the amplitude of the carrier frequency component.

[0021] Optionally, the controller obtains the difference between the optimal carrier phase reference value and the local carrier phase, including:

[0022] The controller acquires a calibrated carrier phase reference value sequence, including:

[0023] Identify the deviation between the actual sampling time and the theoretical sampling time;

[0024] The deviation is converted into a carrier phase error;

[0025] The carrier phase error is used to compensate for the initially predicted carrier phase reference value to obtain the calibrated carrier phase reference value sequence.

[0026] Optionally, the controller obtains the difference between the optimal carrier phase reference value and the local carrier phase, and further includes:

[0027] The controller inputs the calibrated carrier phase reference value sequence into a Kalman filter to filter the calibrated carrier phase reference value sequence and generate the optimal carrier phase reference value.

[0028] Optionally, the difference is normalized to generate a normalized phase difference, including:

[0029] The difference is moduloed and constrained within an interval of a single circle to obtain the normalized phase difference.

[0030] This application also provides a carrier phase synchronization device, comprising:

[0031] The acquisition module obtains the difference between the optimal carrier phase reference value and the local carrier phase.

[0032] The step size module normalizes the difference to generate a normalized phase difference; it calculates and adjusts the step size using a predefined piecewise function based on the absolute value of the normalized phase difference; and it modifies the value of the carrier period register based on the adjusted step size.

[0033] The judgment module restores the value of the carrier period register to the rated value when the normalized phase difference is less than the first threshold and the change in the normalized phase difference is less than the second threshold for multiple consecutive control cycles.

[0034] The calculation module collects the three-phase output current of the converter and calculates the zero-sequence circulating current based on the three-phase output current.

[0035] The optimization module extracts the carrier frequency component from the zero-sequence circulating current; with the amplitude of the carrier frequency component approaching zero as the target, it calculates the phase compensation amount through the model reference adaptive control law; and updates the optimal carrier phase reference value according to the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

[0036] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0037] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the above-described method.

[0038] The beneficial effects of this application are:

[0039] This application provides a carrier phase synchronization method, comprising: obtaining the difference between an optimal carrier phase reference value and a local carrier phase; normalizing the difference to generate a normalized phase difference; calculating an adjustment step size based on the absolute value of the normalized phase difference using a predefined piecewise function; modifying the value of a carrier cycle register based on the adjustment step size; restoring the value of the carrier cycle register to a rated value when the normalized phase difference is less than a first threshold and the change in the normalized phase difference is less than a second threshold for multiple consecutive control cycles; acquiring the three-phase output current of the converter and calculating the zero-sequence circulating current based on the three-phase output current; extracting the carrier frequency component from the zero-sequence circulating current; calculating a phase compensation amount using a model reference adaptive control law with the amplitude of the carrier frequency component approaching zero as the target; and updating the optimal carrier phase reference value based on the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value. This application achieves carrier synchronization with no transient impact, high precision and stability by using a piecewise function based on normalized phase difference for adaptive progressive carrier phase adjustment, and after satisfying the continuous stability condition, introducing a model reference with zero-sequence circulating current carrier frequency component feedback for adaptive closed-loop fine adjustment. Attached Figure Description

[0040] Figure 1 This is a schematic diagram of the carrier phase synchronization process in this application;

[0041] Figure 2 This is a schematic diagram of the topology of the multi-module parallel converter system in this application;

[0042] Figure 3 This is a schematic diagram of the inverter output voltage and output current in this application;

[0043] Figure 4This is a schematic diagram of the PWM waveform and zero-sequence circulating current waveform of the parallel converter in this application;

[0044] Figure 5 This is a schematic diagram of the carrier waveform in this application;

[0045] Figure 6 This is a schematic diagram of the grid-connected active power and reactive power in this application. Detailed Implementation

[0046] Exemplary embodiments of the present disclosure will now be provided in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it is to be understood that various forms of implementation of the present disclosure are intended and should not be limited to the embodiments set forth herein. Rather, the embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0047] This application provides a carrier phase synchronization method, which is applied in the fields of power electronic power conversion and new energy microgrid control technology. It is used to solve the high-frequency zero-sequence circulating current problem caused by carrier asynchrony in parallel converter clusters, thereby improving the system's operational reliability and power quality.

[0048] Please refer to Figure 1 and Figure 2 As shown, the carrier phase synchronization method includes:

[0049] S101. Obtain the difference between the optimal carrier phase reference value and the local carrier phase.

[0050] The optimal carrier phase reference value is the final target phase value obtained through multiple calculations, and the local carrier phase is the real-time phase corresponding to the current count value of the time base counter inside the converter module.

[0051] The controller calculates the optimal carrier phase reference value in each control cycle k. Phase with local actual carrier The difference .

[0052] The formula for calculating the optimal carrier phase reference value is:

[0053]

[0054] in, This is the optimal carrier phase reference value for the k-th control cycle. This represents the local actual carrier phase during the k-th control cycle.

[0055] Local actual carrier phase It is calculated from the current count value of the local time base counter, and the calculation formula is as follows:

[0056]

[0057] in, This is the current count value of the time base counter. This is the maximum count value of the time base counter.

[0058] Before calculating the difference, it is necessary to obtain the optimal carrier phase reference value, which involves multiple steps.

[0059] First, the controller acquires the instantaneous three-phase grid voltage values ​​of the common AC bus in each control cycle, and processes them through a composite phase-locked loop consisting of a sliding window Fourier transform and a second-order generalized integrator to filter out harmonic components, DC offset components, and noise interference in the grid, thereby accurately extracting the real-time phase of the grid fundamental voltage. Real-time frequency With angular frequency Meanwhile, the power grid phase values ​​and corresponding sampling timestamps of N sampling points are uniformly collected within one power grid fundamental frequency cycle.

[0060] This application applies to power conversion systems containing at least two parallel three-phase converter modules. The DC side of all converter modules is connected in parallel to a common DC bus, and the AC side is connected to a common AC bus. Each module adopts a sinusoidal pulse width modulation strategy.

[0061] The specific implementation method of the composite phase-locked loop is as follows:

[0062] For the two-phase stationary coordinate system components of the three-phase grid voltage after Clark transformation and First, a sliding window Fourier transform with a length of one power grid cycle is used for preprocessing to filter out higher harmonic components of the third order and above. Then, the preprocessed signal is input into a second-order generalized integrator to generate two output signals that are in phase with and strictly orthogonal to the fundamental component. Finally, the positive-sequence component of the power grid fundamental is extracted based on the orthogonal signals, and the real-time phase of the power grid fundamental is obtained through phase-locked loop closed-loop control. With real-time frequency .

[0063] The SOGI in-phase component transfer function is:

[0064]

[0065] The SOGI orthogonal component transfer function is:

[0066]

[0067] The formula for extracting the fundamental positive-sequence component based on orthogonal signals is as follows:

[0068]

[0069] in, Let be the Laplace operator, and be the complex frequency variable of the transfer function of the continuous domain control system; The input signal for the SOGI circuit is the two-phase stationary coordinate system voltage component output after the three-phase grid voltage has undergone Clark transformation. or The Laplace transform form; This is the fundamental in-phase component output by the SOGI stage. The fundamental orthogonal component output by the SOGI stage. The damping coefficient of the SOGI element. , for axis, The fundamental in-phase component output by the two independent SOGI links on the axis; , They are respectively axis, The fundamental orthogonal components output by the two independent SOGI links on the axis; , These are the fundamental positive sequence components of the grid voltage in a two-phase stationary coordinate system. axis, Axis output value.

[0070] At the end of a fundamental power grid cycle, the controller uses the power grid phase values ​​collected from N sampling points. Local carrier phase value at the corresponding time A linear mapping model between the grid phase and the local carrier phase was obtained by fitting the least squares method. And solve for the slope. With intercept The optimal estimate is obtained, and the model is used to predict any time within the next power grid cycle. Ideal carrier phase reference value:

[0071]

[0072] in, For random error, and The slopes calculated using the least squares method are respectively With intercept The optimal estimate.

[0073] The slope is obtained by solving using the least squares method. With intercept The formula for the optimal estimate is:

[0074]

[0075]

[0076] in, slope The optimal estimate, Intercept The optimal estimate, For the first The power grid phase at each sampling point For the first Local carrier phase at each sampling point This represents the number of sampling points.

[0077] Based on this model, at any time within the next power grid cycle... The ideal carrier phase prediction value is:

[0078]

[0079] in, slope The optimal estimate, Intercept The optimal estimate, for The power grid phase at any given time, for The ideal carrier phase predicted at any given time.

[0080] Next, the controller performs sampling absolute error calibration and records the actual sampling time for each sampling point. Compared with theoretical sampling time deviation ,in To control the period, this time deviation is then converted into an absolute error in the carrier phase domain. ,in This is the rated carrier frequency of the converter module.

[0081] right The mean absolute error is obtained by averaging the absolute errors of each sampling point. It is then used to calibrate the ideal carrier phase reference value, resulting in the calibrated carrier phase reference value:

[0082]

[0083] in, For the first The actual sampling time for each sampling point For the first The theoretical sampling time for each sampling point To control the cycle, The rated carrier frequency of the converter module. For the first The absolute error of carrier phase at each sampling point for The mean absolute error of each sampling point This is the calibrated carrier phase reference value.

[0084] The controller then uses the calibrated carrier phase reference value as the observation value to construct a Kalman filter for optimal phase reference prediction. The state equation and observation equation of the Kalman filter are as follows:

[0085]

[0086]

[0087] Wherein, the state vector , The optimal carrier phase reference value to be determined is... Carrier angular frequency; state transition matrix ; Observation matrix ; For process noise, For the purpose of observing noise, it is assumed that all noise is zero-mean Gaussian white noise.

[0088] Kalman filtering is used to optimally estimate the calibrated carrier phase reference value, suppressing noise interference and random errors, and finally obtaining the optimal carrier phase reference value. .

[0089] S102. Normalize the difference to generate a normalized phase difference; calculate the adjustment step size using a predefined piecewise function based on the absolute value of the normalized phase difference; modify the value of the carrier period register according to the adjustment step size.

[0090] Because the phase is periodic, the difference needs to be adjusted. Perform normalization and map it to Within this range, avoid incorrect adjustment direction caused by phase values ​​exceeding this range.

[0091] The specific method for normalization is as follows:

[0092]

[0093] This process confines the phase difference to a single circumference, ensuring the correctness of subsequent directional adjustments. This represents the phase difference after normalization.

[0094] The piecewise function is a three-segment exponential decay step-size function, which dynamically adjusts the single phase adjustment amount according to the absolute value of the normalized phase difference to achieve a variable step-size gradual adjustment strategy of "large difference, large step; small difference, small step; no difference, stop". This ensures rapid convergence while avoiding transient shocks caused by phase abrupt changes.

[0095] Adjust step size The calculation formula is:

[0096]

[0097] in, This is a sign function used to determine the adjustment direction, when... When this occurs, it indicates that the local carrier phase lags behind the reference phase. For a positive value, the carrier period needs to be increased to slow down the carrier and catch up with the reference phase; when When this occurs, it indicates that the local carrier phase leads the reference phase. If the value is negative, the carrier period needs to be reduced to make the carrier faster in order to match the reference phase.

[0098] This is the step size decay coefficient, used to control the decay rate in the large step size region. This is the coarse synchronization threshold, used to divide the large step size adjustment region into the linear transition region. This is the precision synchronization threshold, used to divide the linear transition zone and the stop adjustment zone. This is the maximum adjustment step size in a single operation, used to limit the maximum magnitude of a single adjustment and avoid transient shocks. It is the minimum adjustment step size for a single operation and is the basic step size for the linear transition region. The linear transition coefficient is used to control the step size change rate in the linear transition region, and its calculation formula is as follows:

[0099]

[0100] This piecewise function ensures that when the phase difference is large, a large adjustment step size is used to quickly approach the target; when the phase difference enters the medium range, a linearly varying step size is used for a smooth transition; and when the phase difference is very small, the adjustment is stopped to avoid oscillation.

[0101] The calculated adjustment step size Count value corresponding to the rated carrier period Add them together to get the first one. Actual cycle count value of each control cycle .

[0102] Then this new count value Write to the carrier period register to adjust the period of the time base counter cycle by cycle, thereby achieving a gradual cumulative offset of the carrier phase.

[0103] The phase offset generated per carrier cycle is:

[0104]

[0105] go through The total accumulated phase offset after one carrier cycle:

[0106]

[0107] like Figure 2 As shown, through this cycle-by-cycle, gradual adjustment, the carrier phase is smoothly aligned to the target phase, and there are no phase abrupt changes in the whole process, thereby completely eliminating the transient impact of output voltage and current.

[0108] S103. When the normalized phase difference of multiple consecutive control cycles is less than the first threshold and the change in the normalized phase difference is less than the second threshold, the value of the carrier period register is restored to the rated value.

[0109] To avoid misjudgment, a continuous multi-period stability criterion is adopted.

[0110] When continuous Carrier coarse synchronization is considered complete when both of the following conditions are met simultaneously in a control cycle:

[0111] Condition one, That is, the absolute value of the normalized phase difference is less than or equal to the fine synchronization threshold. ;

[0112] Condition 2: Phase difference change between two adjacent control cycles If the change in phase difference is small enough, it indicates that the phase has stabilized.

[0113] After coarse synchronization is completed, the controller restores the value of the carrier period register to the rated value. This means that a significant phase catch-up has been completed, and the system has entered the phase fine synchronization stage, preparing to perform closed-loop compensation for the remaining minor phase deviations.

[0114] S104. Collect the three-phase output current of the converter and calculate the zero-sequence circulating current based on the three-phase output current.

[0115] After coarse synchronization is completed, there is still a small residual phase difference caused by factors such as sampling error, parameter drift, and power grid harmonics. This residual phase difference will generate a high-frequency zero-sequence circulating current with a small amplitude but which persists.

[0116] To eliminate this circulating current, the controller acquires the three-phase output current of the converter in real time. , , And calculate the zero-sequence circulating current according to Kirchhoff's current law:

[0117]

[0118] in, , , The first The output current of phases A, B, and C in each control cycle For the first The zero-sequence circulating current is calculated over each control cycle.

[0119] S105. Extract the carrier frequency component from the zero-sequence circulating current; with the amplitude of the carrier frequency component approaching zero as the target, calculate the phase compensation amount through the model reference adaptive control law; update the optimal carrier phase reference value according to the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

[0120] The calculated zero-sequence circulation The signal contains multiple frequency components, and it is necessary to extract the components related to the carrier frequency for precise synchronization control. A second-order Butterworth bandpass filter is used to filter the zero-sequence circulating current. Filtering is performed to extract the carrier frequency component. This filter is designed as a bandpass filter with a center frequency equal to the carrier frequency, which can effectively filter out the fundamental frequency and other harmonic components, while retaining the carrier frequency circulating signal that reflects the carrier phase synchronization state.

[0121] A model reference adaptive controller is employed, using the carrier frequency component in the zero-sequence circulating current. The control objective is to make the amplitude approach zero, and the output is the phase compensation amount used for fine adjustment of the carrier phase. .

[0122] First, define the performance metric function:

[0123]

[0124] Among them, error , This is the target reference value, and is usually set to 0.

[0125] According to the MIT rule, the parameter adjustment direction is the negative gradient direction of the performance index function with respect to the parameters; therefore, the phase compensation amount... The calculation formula is:

[0126]

[0127] in, For adaptive gain, This is the sensitivity coefficient of the zero-sequence circulation to the phase difference.

[0128] To overcome the trade-off between speed and stability inherent in fixed adaptive gain, an adaptive gain self-adjustment mechanism is designed, enabling the gain to dynamically change according to the zero-sequence circulating current amplitude. The formula is as follows:

[0129]

[0130] in, Based on adaptive gain, This is the gain adjustment coefficient.

[0131] When the zero-sequence circulation amplitude A larger value indicates a larger remaining phase difference and a larger adaptive gain. Automatically increases, thus accelerating the adjustment speed; when the zero-sequence circulating current amplitude is small, the adaptive gain... It automatically reduces, thereby improving control stability and avoiding overshoot and oscillation.

[0132] The controller will calculate the phase compensation amount Superimposed on the current optimal carrier phase reference value Above, generate updated optimal carrier phase reference values. Then, based on this updated reference value, the controller will repeatedly perform the difference calculation, normalization, step size calculation, and phase adjustment process.

[0133] Since this is the precise synchronization phase, the phase difference is typically very small. Based on the piecewise function, the calculated adjustment step size will be extremely small or zero, allowing the controller to perform extremely fine-tuning. This closed-loop process, with zero-sequence circulating current as feedback, will continue, dynamically compensating for the effects of system parameter drift, etc., until the carrier frequency component in the zero-sequence circulating current... When the amplitude is less than a set minimum threshold, it is considered that complete high-precision carrier synchronization has been achieved, thereby suppressing high-frequency zero-sequence circulating current from the source.

[0134] Furthermore, during the process of obtaining the optimal carrier phase reference value, the controller identifies the deviation between the actual sampling time and the theoretical sampling time. This time deviation is then converted into carrier phase error. Then, this carrier phase error is used to compensate for the initially predicted carrier phase reference value, resulting in a calibrated carrier phase reference value sequence. This process can accurately compensate for the cumulative error caused by digital controller sampling clock drift, analog-to-digital conversion delay, and sampling time difference.

[0135] After obtaining the calibrated carrier phase reference value sequence, the controller inputs it into a Kalman filter. By filtering the sequence, the final optimal carrier phase reference value is generated. This step can effectively suppress interference from grid voltage noise, harmonic distortion, and random sampling errors.

[0136] The three-phase converter module can be a three-phase two-level voltage source converter or a three-phase three-level NPC converter. Each module has an independent built-in digital controller and independently executes the carrier synchronization method. There is no communication link between modules. The number N of sampling points uniformly collected within one grid fundamental frequency cycle can be 16, 32, or 64. In a specific embodiment, N is 32.

[0137] Please refer to Figures 3-6 As shown, a simulation model of two parallel three-phase two-level converters was built, and the simulation results are as follows. Figures 3-6 As shown. Figure 4-6 The figures show the inverter output voltage and output current before and after adopting the technical solution of this application; a comparison of the PWM carrier waveform of the parallel converter; a comparison of zero-sequence circulating current; and graphs of grid-connected active and reactive power. Simulation results show that the carrier synchronization method of this invention can effectively achieve carrier synchronization and suppress high-frequency zero-sequence circulating current.

[0138] This application also provides a carrier phase synchronization device, comprising:

[0139] The acquisition module allows the controller to obtain the difference between the optimal carrier phase reference value and the local carrier phase.

[0140] The step size module normalizes the difference to generate a normalized phase difference; it calculates and adjusts the step size using a predefined piecewise function based on the absolute value of the normalized phase difference; and it modifies the value of the carrier period register based on the adjusted step size.

[0141] In the judgment module, when the normalized phase difference is less than a first threshold and the change in the normalized phase difference is less than a second threshold for multiple consecutive control cycles, the controller restores the value of the carrier cycle register to the rated value.

[0142] After the value of the carrier cycle register is restored to the rated value, the controller collects the three-phase output current of the converter and calculates the zero-sequence circulating current based on the three-phase output current.

[0143] The optimization module involves the controller extracting carrier frequency components from the zero-sequence circulating current; calculating phase compensation using a model reference adaptive control law with the goal of making the amplitude of the carrier frequency components approach zero; and updating the optimal carrier phase reference value based on the phase compensation value to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

[0144] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the method described above.

[0145] This application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to perform the above-described method.

[0146] The above embodiments are provided to enable those skilled in the art to understand and apply this application. Those skilled in the art will readily make various modifications to the above embodiments and apply the general principles described herein to other embodiments without inventive effort. Therefore, this application is not limited to the above embodiments, and any improvements and modifications made to this application based on the disclosure thereof should be within the scope of protection of this application.

Claims

1. A carrier phase synchronization method, characterized in that, include: Obtain the difference between the optimal carrier phase reference value and the local carrier phase; The difference is normalized to generate a normalized phase difference; The adjustment step size is calculated using a predefined piecewise function based on the absolute value of the normalized phase difference. Modify the value of the carrier period register according to the adjustment step size; When the normalized phase difference is less than the first threshold and the change in the normalized phase difference is less than the second threshold for multiple consecutive control cycles, the value of the carrier cycle register is restored to the rated value. The three-phase output current of the converter is collected, and the zero-sequence circulating current is calculated based on the three-phase output current. The carrier frequency component is extracted from the zero-sequence circulating current; with the amplitude of the carrier frequency component approaching zero as the target, the phase compensation amount is calculated through the model reference adaptive control law; the optimal carrier phase reference value is updated according to the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

2. The method according to claim 1, characterized in that, Modifying the value of the carrier period register according to the adjustment step size includes: The adjustment step size is added to the current value of the carrier period register to obtain a new value for the carrier period register; the new value is then written into the carrier period register.

3. The method according to claim 1, characterized in that, The adjustment step size is calculated using a predefined piecewise function, including: If the absolute value of the normalized phase difference is greater than the first threshold, the calculated adjustment step size is the preset maximum step size. When the absolute value of the normalized phase difference is between the first threshold and the second threshold, the calculated adjustment step size is obtained by exponentially decaying the adjustment step size value of the previous control cycle. If the absolute value of the normalized phase difference is less than the second threshold, the calculated adjustment step size is zero.

4. The method according to claim 1, characterized in that, The phase compensation amount is calculated using a model reference adaptive control law, including: The model reference adaptive control law adopts the MIT rule; In the process of calculating the phase compensation amount, the adaptive gain corresponding to the MIT rule is dynamically adjusted according to the amplitude of the carrier frequency component.

5. The method according to claim 1, characterized in that, Obtain the difference between the optimal carrier phase reference value and the local carrier phase, including: The controller acquires a calibrated carrier phase reference value sequence, including: Identify the deviation between the actual sampling time and the theoretical sampling time; The deviation is converted into a carrier phase error; The carrier phase error is used to compensate for the initially predicted carrier phase reference value to obtain the calibrated carrier phase reference value sequence.

6. The method according to claim 5, characterized in that, Obtaining the difference between the optimal carrier phase reference value and the local carrier phase also includes: The controller inputs the calibrated carrier phase reference value sequence into a Kalman filter to filter the calibrated carrier phase reference value sequence and generate the optimal carrier phase reference value.

7. The method according to claim 1, characterized in that, The difference is normalized to generate a normalized phase difference, including: The difference is moduloed and constrained within an interval of a single circle to obtain the normalized phase difference.

8. A carrier phase synchronization device, characterized in that, include: The acquisition module obtains the difference between the optimal carrier phase reference value and the local carrier phase. The step size module normalizes the difference to generate a normalized phase difference; The adjustment step size is calculated using a predefined piecewise function based on the absolute value of the normalized phase difference. Modify the value of the carrier period register according to the adjustment step size; The judgment module restores the value of the carrier period register to the rated value when the normalized phase difference is less than the first threshold and the change in the normalized phase difference is less than the second threshold for multiple consecutive control cycles. The calculation module collects the three-phase output current of the converter and calculates the zero-sequence circulating current based on the three-phase output current. The optimization module extracts the carrier frequency component from the zero-sequence circulating current; with the amplitude of the carrier frequency component approaching zero as the target, it calculates the phase compensation amount through the model reference adaptive control law; and updates the optimal carrier phase reference value according to the phase compensation amount to achieve synchronization between the local carrier phase and the updated optimal carrier phase reference value.

9. An electronic device, characterized in that, It includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement any one of the methods described in claims 1 to 7.

10. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed in a computer, causes the computer to perform any one of the methods described in claims 1 to 7.

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