Method and apparatus to provide version control in a process control system graphical user interface development environment

Abstract

Systems, devices, articles of manufacture, and methods to provide version control in a process control system development environment are disclosed. Exemplary instructions cause at least one processor to at least: cause a first graphical user interface to be presented to enable editing of a second graphical user interface of a process control system, the second graphical user interface based on information stored in a database; access user instructions to modify the second graphical user interface from a first version to a second version; access user submission information associated with the second version; export the second version of the second graphical user interface from the database to a local file repository; and synchronize the second version from the local file repository to a remote repository, the synchronization to include the user submission information.

Description

Related applications

[0001] This application claims the benefit of U.S. Patent Application No. 18 / 592,112, filed February 29, 2024, which is incorporated herein by reference in its entirety. Priority of U.S. Patent Application No. 18 / 592,112 is claimed therein. Technical Field

[0002] This disclosure generally relates to version control, and more specifically, to methods and apparatus for providing version control in a process control system graphical user interface (GUI) development environment. Background Technology

[0003] Process control systems are designed for end-user use and can be used to control many different processes and / or tasks. Developers of such process control systems use various editing tools to design them, including, for example, text editors, integrated development environments (IDEs), and graphical editors. These tools generate various configuration files, executables, and / or user interfaces for deployment to the end-user environment. Designing a robust user interface for the end-user environment is a time-consuming task, typically performed by multiple developers. Attached Figure Description

[0004] Figure 1 This is a block diagram of an exemplary process control development environment that operates to provide version control within a graphical user interface editor for a process control system.

[0005] Figure 2 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 provides flowcharts of exemplary machine-readable instructions and / or exemplary operations for a graphical user interface development environment.

[0006] Figure 3 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 Process control development circuit system 110 to create Figure 1 A flowchart of a new version of exemplary machine-readable instructions and / or exemplary operations at a remote repository.

[0007] Figure 4 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 Process control development circuit system 110 to utilize from Figure 1 Selected version update of remote repository Figure 1A flowchart of exemplary machine-readable instructions and / or exemplary operations for a process control development environment.

[0008] Figure 5 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 is illustrated with flowcharts showing exemplary machine-readable instructions and / or exemplary operations of the version history.

[0009] Figure 6 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 is used to illustrate exemplary machine-readable instructions and / or exemplary operations that demonstrate the differences between versions in the version history.

[0010] Figure 7-9 This is a diagram illustrating an exemplary process of applying edits to the user interface and synchronizing the latest version of the interface to the version control system.

[0011] Figure 10 It can be made by Figure 1 An exemplary user interface is displayed for an exemplary editor circuit system.

[0012] Figure 11 It can be made by Figure 1 An exemplary difference visualizer circuit system is displayed to show an exemplary user interface for illustrating the differences between versions in the version history.

[0013] Figure 12 This is a block diagram of an exemplary processing platform including a programmable circuit system configured to execute, instantiate, and / or perform exemplary machine-readable instructions and / or implement... Figure 2 , 3 Exemplary operations of 4, 5 and / or 6 to achieve Figure 1 Process control development circuit system 110.

[0014] Figure 13 yes Figure 12 A block diagram of an exemplary implementation of a programmable circuit system.

[0015] Figure 14 yes Figure 12 A block diagram of another exemplary embodiment of a programmable circuit system.

[0016] Figure 15 This is a block diagram of an exemplary software / firmware / instruction distribution platform (e.g., one or more servers) used to distribute software, instructions, and / or firmware (e.g., corresponding to...) Figure 2 , 3(Exemplary machine-readable instructions 4, 5 and / or 6) are distributed to client devices associated with end users and / or consumers (e.g. for licensing, sale and / or use), retailers (e.g. for sale, resale, licensing and / or sublicensing), and / or original equipment manufacturers (OEMs) (e.g. for inclusion in products to be distributed to, for example, retailers and / or other end users such as direct purchase customers).

[0017] Generally, the same reference numerals will be used throughout the accompanying drawings and written description to refer to the same or similar parts. The drawings are not necessarily drawn to scale. Detailed Implementation

[0018] User interfaces for process control systems are typically designed and / or developed using graphical user interface editors. The development of these user interfaces is often a time-consuming process, and in some examples, it may be performed by multiple developers using multiple computer systems. Ensuring collaborative work among developers is crucial. To this end, the exemplary methods disclosed herein implement version control within the process control system development environment. Using version control enables multiple developers to collaborate on the same code repository.

[0019] Graphical process control system development environments typically store configuration information in a local database on the process control development circuit system. In other words, the configuration information is stored in a local database and / or other information structure on each computer on which the developers are intended to operate. Alternatively, some exemplary graphical process control system development environments store configuration information in a centralized database accessible to each workstation on which the developers are intended to operate. The exemplary methods disclosed herein enable the data stored in the database to be synchronized with a remote repository. For example, developers can perform various version control operations, including commit, stage, publish, update, etc.

[0020] To achieve this synchronization, the exemplary methods disclosed herein export information from a local database to a local repository (e.g., a file directory, file structure, etc.) and synchronize the information stored in the local repository with a remote repository. Advantageously, version control operations, such as comparing the history of committed versions and / or displaying differences between versions, can be performed without having to import such versions into a local database. In some examples, the local repository may be implemented on a computing device separate from the computing device on which the graphical process control system development environment operates. For example, the local repository may be stored on a network attached storage (NAS) device. In such examples, the local repository may be public to two or more graphical process control system development environments.

[0021] Figure 1This is a block diagram of an exemplary process control development circuit system 110, which operates to provide version control within a graphical user interface editor. Figure 1 The exemplary process control development circuitry 110 shown includes an editor circuitry 120, a display database 125, a process control deployment circuitry 130, an import / export circuitry 135, a local repository 140, a repository management circuitry 145, and a difference visualizer circuitry 150. The exemplary repository management circuitry 145 performs version control operations to synchronize information between the local repository 140 and a remote repository 170 within the version control system 175. The exemplary process control deployment circuitry 130 deploys executable files and / or configurations 180 to process control system endpoints 190.

[0022] exist Figure 1 The example shown illustrates multiple process control development circuit systems 110, 111, and 112. This demonstrates that, for example, multiple developers can operate the corresponding process control development circuit systems to modify the user interface used in the process control system. In such an example, multiple developers can work on a single user interface and merge their changes using a version control system. This approach enables more efficient development of the user interface used in the process control system.

[0023] Figure 1 The process control development circuit system 110 can be instantiated (e.g., created, made exist for any length of time, materialized, implemented, etc.) by a programmable circuit system such as a central processing unit (CPU) that executes the first instructions. Alternatively, Figure 1 The process control development circuit system 110 can be instantiated (e.g., created, made exist for any length of time, materialized, implemented, etc.) by (i) an application-specific integrated circuit (ASIC) and / or (ii) a field-programmable gate array (FPGA), which is constructed and / or configured to perform an operation corresponding to the first instruction in response to the execution of a second instruction. It should be understood that Figure 1 Some or all of the circuit system can therefore be instantiated at the same or different times. Figure 1 Some or all of the circuitry can be instantiated, for example, in one or more threads that execute concurrently and / or serially on the hardware. Furthermore, in some examples, Figure 1 Some or all of the circuitry in the system can be implemented by a microprocessor circuitry that executes instructions and / or an FPGA circuitry that performs operations, to implement one or more virtual machines and / or containers.

[0024] Figure 1The exemplary editor circuitry system 120 shown in the example enables the presentation of a user interface (e.g., an editor UI) that developers can interact with to edit the graphical user interface. The exemplary editor circuitry system 120 accesses such edits as user input and applies the edits to process control system configurations stored in the display database 125. When operating the editor circuitry system 120, developers can provide version control instructions, which cause the editor circuitry system 120 to trigger other components of the process control development circuitry system 110 to execute the requested version control instructions. In some examples, the exemplary editor circuitry system 120 is configured to execute editor instructions and / or perform operations (e.g., Figure 2 Instantiation of programmable circuit systems (those operations represented by (multiple) flowcharts).

[0025] In some examples, the process control development circuit system 110 includes means for editing a graphical user interface. For example, the means for editing can be implemented by an editor circuit system 120. In some examples, the editor circuit system 120 can be implemented by, for example... Figure 12 The exemplary programmable circuit system 1212 is instantiated as a programmable circuit system. For example, the editor circuit system 120 can be instantiated by... Figure 13 An exemplary microprocessor 1300 is instantiated, the microprocessor executing machine-executable instructions, such as those provided by... Figure 2 , 3 And / or at least blocks 210, 220, 230, 240, 250, 260, 310, 430 implement those machine-executable instructions. In some examples, the editor circuitry system 120 may be instantiated by a hardware logic circuitry system, which may be an ASIC, XPU, or [other device] configured and / or constructed to perform operations corresponding to machine-readable instructions. Figure 14 The FPGA circuit system 1400 is implemented. Alternatively, the editor circuit system 120 may be instantiated by any other combination of hardware, software, and / or firmware. For example, the editor circuit system 120 may be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally suitable.

[0026] Figure 1The exemplary display database 125 shown is implemented using any memory, storage device, and / or storage disk (such as, for example, flash memory, magnetic media, optical media, solid-state memory, (multiple) hard disk drives, (multiple) USB flash drives, etc.) for storing data. Furthermore, the data stored in the exemplary display database 125 can be in any data format, such as, for example, binary data, comma-separated data, tab-separated data, Structured Query Language (SQL) structures, etc. Although in the illustrated example, the display database 125 is shown as a single device, the exemplary display database 125 and / or any other data storage device described herein can be implemented using any number and / or (multiple) types of memory. Figure 1 In the example shown, database 125 is exemplary, storing records for representing graphical user interfaces being developed by editor circuit system 120, which is being developed by process control development circuit system 110. Although in Figure 1 In the example shown, database 125 is depicted as local to process control development circuit system 110, but in some examples, database 125 may be implemented centrally relative to two or more process control development circuit systems. For example, a single database may be accessed by a first process control development circuit system and may also be accessed by a second process control development circuit system.

[0027] Figure 1 The exemplary process control deployment circuitry 130 shown deploys an executable file and / or configuration 180 from a display database 125 to a process control system endpoint 190. In some examples, the process control deployment circuitry 130 may deploy the executable file and / or configuration 180 to multiple process control system endpoints. Alternatively or additionally, the process control deployment circuitry 130 may provide configuration and / or executable files to another computing device and / or system for deployment to (multiple) process control system endpoints.

[0028] In some examples, the process control development circuit system 110 includes means for deployment. For example, the means for deployment may be implemented by the process control deployment circuit system 130. In some examples, the process control deployment circuit system 130 may be implemented by, for example... Figure 12 The exemplary programmable circuit system 1212 is instantiated as a programmable circuit system. For example, the process control deployment circuit system 130 can be executed by a machine-executable circuit. Figure 13 An exemplary microprocessor 1300 is instantiated. In some examples, the process control deployment circuitry system 130 may be instantiated by a hardware logic circuitry system, which may be an ASIC, XPU, or [other device] configured and / or constructed to perform operations corresponding to machine-readable instructions. Figure 14The FPGA circuit system 1400 is implemented. Alternatively, the process control deployment circuit system 130 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the process control deployment circuit system 130 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally suitable.

[0029] Figure 1 The exemplary import / export circuitry 135 shown exports information from display database 125 to local storage 140. Similarly, the exemplary import / export circuitry 135 imports information from local storage 140 to display database 125. The exemplary import / export circuitry 135 transforms the file structure within display database 125 (e.g., one or more records in an SQL database table) to / from local storage 140. For example, tables and / or other objects within display database 125 can be represented as Extensible Markup Language (XML) files when stored in local storage 140. In this way, local storage 140 can include multiple files corresponding to the respective objects within display database 125. Similarly, XML files stored in local storage 140 can be converted into objects within display database 125.

[0030] In some examples, the import / export circuit system 135 is configured to execute import / export instructions and / or perform actions such as those initiated by... Figure 3 The operation of the programmable circuit system instantiated by the operation represented by the flowcharts of 4 and / or 4.

[0031] In some examples, the process control development circuit system 110 includes means for importing and / or exporting. For example, the means for importing and / or exporting may be implemented by an import / export circuit system 135. In some examples, the import / export circuit system 135 may be implemented by, for example... Figure 12 The exemplary programmable circuit system 1212 is instantiated as a programmable circuit system. For example, the import / export circuit system 135 can be instantiated by... Figure 13 An exemplary microprocessor 1300 is instantiated, the microprocessor executing machine-executable instructions, such as those provided by... Figure 3And / or at least blocks 330, 420 of 4 implement those machine-executable instructions. In some examples, import / export circuitry system 135 may be instantiated by a hardware logic circuitry system, which may be an ASIC, XPU, or [other device] configured and / or constructed to perform operations corresponding to machine-readable instructions. Figure 14 The FPGA circuit system 1400 is implemented. Alternatively, the import / export circuit system 135 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the import / export circuit system 135 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.), which are configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally suitable.

[0032] Figure 1 The exemplary local storage 140 shown is implemented by any memory, storage device, and / or storage disk (such as, for example, flash memory, magnetic media, optical media, solid-state memory, (multiple) hard disk drives, (multiple) USB flash drives, etc.) for storing data. Furthermore, the data stored in the exemplary local storage 140 can be in any data format, such as, for example, binary data, comma-separated data, tab-separated data, Structured Query Language (SQL) structures, etc. Although in the illustrated example, local storage 140 is shown as a single device, exemplary local storage 140 and / or any other data storage device described herein can be implemented by any number and / or (multiple) types of memory. Figure 1 In the example shown, exemplary local storage 140 stores file structures monitored by storage management circuitry 145.

[0033] Although Figure 1 In the illustrated example, local repository 140 is shown as being local to process control development circuit system 110, but in some examples, local repository 140 may be implemented centrally relative to two or more process control development circuit systems. For example, local repository 140 may be implemented on a network attached storage (NAS) device and / or other file servers accessible to multiple process control development circuit systems. Therefore, as used herein, the term local repository is intended to indicate that the repository is not stored at version control system 175.

[0034] Figure 1The exemplary repository management circuitry 145 shown performs version control operations within a local repository 140 and / or a remote repository 170. For example, the exemplary repository management circuitry 145 pushes a local commit version with user commit information to the remote repository 170, pulls a selected version from the remote repository 170 to the local repository, etc.

[0035] In some examples, the library management circuitry 145 is configured to execute library management instructions and / or perform actions such as those initiated by... Figure 3 , 4 The programmable circuit system instantiates those operations represented by flowcharts 5 and / or 6.

[0036] In some examples, the process control development circuit system 110 includes means for determining the status of the apparatus. For example, the means for determining this status may be implemented by a storage management circuit system 145. In some examples, the storage management circuit system 145 may be implemented by, for example... Figure 12 The exemplary programmable circuit system 1212 is instantiated as a programmable circuit system. For example, the storage management circuit system 145 can be instantiated by... Figure 13 An exemplary microprocessor 1300 is instantiated, the microprocessor executing machine-executable instructions, such as those provided by... Figure 3 , 4 The machine-executable instructions implemented by at least blocks 320, 340, 410, 420, 510, 520, 530, 540, 550, and 620 of 5 and / or 6. In some examples, the library management circuitry 145 may be instantiated by a hardware logic circuitry system, which may be an ASIC, XPU, or other system configured and / or constructed to perform operations corresponding to machine-readable instructions. Figure 14 The FPGA circuit system 1400 is implemented. Alternatively, the library management circuit system 145 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the library management circuit system 145 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally suitable.

[0037] Figure 1The exemplary difference visualizer circuitry 150 shown in the example enables the presentation of one or more graphical user interfaces (GUIs) that allow visualization of differences between two or more versions. In some examples, the exemplary difference visualizer circuitry 150 enables the presentation of a first representation of the GUI corresponding to a first version, visually adjacent to a second representation of the GUI corresponding to a second version (e.g., within the same dialog box and / or the same window within the GUI). Presenting two graphical representations of the GUI allows developers to quickly understand the differences between the displayed versions.

[0038] In some examples, the difference visualizer circuitry 150 is configured to execute repository management instructions and / or perform actions such as those initiated by... Figure 6 The operation of the programmable circuit system is instantiated by the operation represented by the (multiple) flowcharts.

[0039] In some examples, the process control development circuit system 110 includes means for visualizing differences. For example, the means for visualizing differences may be implemented by a difference visualizer circuit system 150. In some examples, the difference visualizer circuit system 150 may be implemented by, for example, Figure 12 The exemplary programmable circuit system 1212 is instantiated as a programmable circuit system. For example, the difference visualizer circuit system 150 can be instantiated by... Figure 13 An exemplary microprocessor 1300 is instantiated, the microprocessor executing machine-executable instructions, such as those provided by... Figure 6 At least frames 610, 620, 630, 640, 650, 660, and 670 implement those machine-executable instructions. In some examples, the difference visualizer circuitry 150 may be instantiated by a hardware logic circuitry system, which may be an ASIC, XPU, or [other device] configured and / or constructed to perform operations corresponding to machine-readable instructions. Figure 14 The FPGA circuit system 1400 is implemented. Alternatively, the difference visualizer circuit system 150 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the difference visualizer circuit system 150 can be implemented by at least one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, XPUs, comparators, operational amplifiers (op-amps), logic circuits, etc.), which are configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally suitable.

[0040] The exemplary version control system 175 represents a version control system hosted within a cloud environment. However, version control systems that do not depend on a cloud environment can be used alternatively or separately. The exemplary version control system 175 hosts a remote repository 170. In some examples, multiple different remote repositories can be used across different organizations and / or development teams. For example, a first development team working on a first user interface may utilize a first remote repository, while different teams working on different user interfaces may use different remote repositories. Alternatively, these different teams may use entirely different version control systems.

[0041] An exemplary process control system endpoint 190 represents one or more computers, devices, controllers, etc., used within a process control system. Multiple such process control system endpoints 190 may include various sensors, actuators, displays, and / or other input / output devices for use within the process control system. The exemplary process control system endpoint 190 operates according to the deployed executable and / or configuration 180 provided to the exemplary process control system endpoint 190 by the exemplary process control deployment circuit system 130. In this way, a developer operating the process control development circuit system 110 can deploy the executable and / or configuration 180 based on edits made by the editor circuit system 120.

[0042] Although Figure 1 The implementation is shown in the figure. Figure 1 The process control development circuit system 110 is an exemplary method, but Figure 1 One or more of the elements, processes, and / or devices shown may be combined, divided, rearranged, omitted, eliminated, and / or implemented in any other way. Furthermore, exemplary editor circuit system 120, exemplary process control deployment circuit system 130, exemplary import / export circuit system 135, exemplary repository management circuit system 145, example difference visualizer circuit system 150, and / or more generally... Figure 1The exemplary process control development circuit system 110 can be implemented by separate hardware or by a combination of hardware and software and / or firmware. Therefore, for example, any of the exemplary editor circuit system 120, exemplary process control deployment circuit system 130, exemplary import / export circuit system 135, exemplary library management circuit system 145, exemplary difference visualizer circuit system 150, and / or more generally, exemplary process control development circuit system 110 can be implemented by a combination of programmable circuit systems and machine-readable instructions (e.g., firmware or software), processor circuit systems, (multiple) analog circuits, (multiple) digital circuits, (multiple) logic circuits, (multiple) programmable processors, (multiple) programmable microcontrollers, (multiple) graphics processing units (GPUs), (multiple) digital signal processors (DSPs), (multiple) ASICs, (multiple) programmable logic devices (PLDs), and / or (multiple) field-programmable logic devices (FPLDs) such as FPGAs. Furthermore, Figure 1 An exemplary process control development circuit system 110 may include, in addition to Figure 1 One or more elements, processes and / or devices other than or in place of those shown in the figures, and / or may include any or all of the elements, processes and / or devices shown in the figures, or more than one element, process and device.

[0043] Figure 2 , 3 The diagrams in sections 4, 5, and / or 6 illustrate representations that can be implemented and / or instantiated by a programmable circuit system. Figure 1 Exemplary machine-readable instructions and / or representations of the process control development circuit system 110 can be executed by a programmable circuit system to implement and / or instantiate Figure 1 The flowchart(s) illustrate exemplary operation of the process control development circuit system 110. Machine-readable instructions may be one or more executable programs or portions thereof executed by a programmable circuit system, such as those described below. Figure 12 The programmable circuit system 1212 shown in the exemplary processor platform 1200 discussed herein, and / or may be the one to be combined below. Figure 13 And / or 14. Exemplary programmable circuit systems (e.g., FPGAs) perform one or more functions or portions of functions. In some examples, machine-readable instructions enable operations, tasks, etc., to be performed and / or carried out in a real-world automated manner. As used herein, “automation” means without human intervention.

[0044] The program may be embodied in instructions (e.g., software and / or firmware) stored on one or more non-transitory computer-readable and / or machine-readable storage media, such as cache memory, magnetic storage devices or disks (e.g., floppy disks, hard disk drives (HDDs), etc.), optical storage devices or optical discs (e.g., Blu-ray discs, compact discs (CDs), digital versatile discs (DVDs), etc.), redundant arrays of independent disks (RAID), registers, ROM, solid-state drives (SSDs), SSD memory, non-volatile memory (e.g., electrically erasable programmable read-only memory (EEPROM), flash memory, etc.), volatile memory (e.g., random access memory (RAM) of any type), and / or any other storage device or disk. The instructions on the non-transitory computer-readable and / or machine-readable media may program and / or be executed by a programmable circuit system located in one or more hardware devices, but the entire program and / or portions thereof may alternatively be executed and / or instantiated by one or more hardware devices other than the programmable circuit system and / or embodied in dedicated hardware. Machine-readable instructions can be distributed across multiple hardware devices and / or executed by two or more hardware devices (e.g., server and client hardware devices). For example, client hardware devices can be implemented by endpoint client hardware devices (e.g., hardware devices associated with human and / or machine users) or intermediate client hardware device gateways (e.g., radio access networks (RAN)) that facilitate communication between the server and endpoint client hardware devices. Similarly, non-transitory computer-readable storage media can include one or more media. Furthermore, although references... Figure 2 , 3The flowcharts(s) shown in 4, 5, and / or 6 describe exemplary programs, but many other methods for implementing the exemplary process control development circuit system 110 may be used instead. For example, the execution order of the blocks in the flowchart(s)(s) may be changed, and / or some of the blocks in the described flowchart(s) may be changed, eliminated, or combined. Additionally or alternatively, any or all blocks in the flowcharts may be implemented by one or more hardware circuits (e.g., processor circuit systems, discrete and / or integrated analog and / or digital circuit systems, FPGAs, ASICs, comparators, operational amplifiers (op-amps), logic circuits, etc.) configured to perform the corresponding operations without executing software or firmware. The programmable circuit system may be distributed across different network locations and / or may be local to one or more hardware devices (e.g., single-core processors (e.g., single-core CPUs), multi-core processors (e.g., multi-core CPUs, XPUs, etc.)). For example, a programmable circuit system can be a CPU and / or FPGA located in the same package (e.g., the same integrated circuit (IC) package or two or more separate housings), one or more processors in a single machine, multiple processors distributed across multiple servers in a server rack, multiple processors distributed across one or more server racks, and / or any combination thereof.

[0045] Machine-readable instructions described herein may be stored in one or more of the following formats: compressed format, encrypted format, fragmented format, compiled format, executable format, packaged format, etc. Machine-readable instructions as described herein may be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), bit streams (e.g., computer-readable bit streams, machine-readable bit streams, etc.)) or data structures (e.g., as parts of instructions, code, code representations, etc.). For example, machine-readable instructions may be segmented and stored on one or more storage devices, disks, and / or computing devices (e.g., servers) located in the same or different locations (e.g., in the cloud, edge devices, etc.) within a network or network set. Machine-readable instructions may require one or more of the following to be installed, modified, adapted, updated, combined, supplemented, configured, decrypted, decompressed, unpacked, distributed, redistributed, compiled, etc., so that they can be directly read, interpreted, and / or executed by computing devices and / or other machines. For example, machine-readable instructions may be stored in multiple parts, which are individually compressed, encrypted, and / or stored on separate computing devices, wherein the parts, when decrypted, decompressed, and / or combined, form a set of computer-executable and / or machine-executable instructions, the implementation of which may together form one or more functions and / or operations of a program such as those described herein.

[0046] In another example, machine-readable instructions may be stored in a state where they can be read by a programmable circuit system, but require the addition of libraries (e.g., dynamic link libraries (DLLs)), software development kits (SDKs), application programming interfaces (APIs), etc., to execute the machine-readable instructions on a specific computing device or other device. In another example, machine-readable instructions may need to be configured (e.g., storage settings, input data, recording network addresses, etc.) before the machine-readable instructions and / or their corresponding programs(s) can be executed in whole or in part. Therefore, as used herein, machine-readable, computer-readable, and / or machine-readable media may include instructions and / or programs(s), regardless of the specific format or state of the machine-readable instructions and / or programs(s).

[0047] The machine-readable instructions described in this article can be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, any of the following languages ​​can be used to represent machine-readable instructions: C, C++, Java, C#, Perl, Python, JavaScript, Hypertext Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0048] As mentioned above, Figure 2 , 3 The exemplary operations of 4, 5, and / or 6 can be implemented using executable instructions (e.g., computer-readable and / or machine-readable instructions) stored on one or more non-transitory computer-readable and / or machine-readable media. As used herein, the terms non-transitory computer-readable medium, non-transitory computer-readable storage medium, non-transitory machine-readable medium, and / or non-transitory machine-readable storage medium are expressly defined to include any type of computer-readable storage device and / or storage disk, but exclude propagation signals and transmission media. Examples of such non-transitory computer-readable medium, non-transitory computer-readable storage medium, non-transitory machine-readable medium, and / or non-transitory machine-readable storage medium include optical storage devices, magnetic storage devices, HDDs, flash memory, read-only memory (ROM), CDs, DVDs, caches, any type of RAM, registers, and / or any other storage device or storage disk in which information is stored for any duration (e.g., extended time period, permanent, brief moment, temporary cache, and / or cache of information). As used herein, the terms "non-transitory computer-readable storage device" and "non-transitory machine-readable storage device" are defined as any physical (mechanical, magnetic, and / or electrical) hardware used to retain information for a period of time, but excluding propagating signals and transmission media. Examples of non-transitory computer-readable storage devices and / or non-transitory machine-readable storage devices include any type of random access memory, any type of read-only memory, solid-state memory, flash memory, optical disk, magnetic disk, disk drive, and / or redundant array of independent disks (RAID) system. As used herein, the term "device" refers to a physical structure, such as mechanical and / or electrical equipment, hardware, and / or circuitry that can be configured with or may not be configured with computer-readable instructions, machine-readable instructions, etc., and / or is manufactured to execute computer-readable instructions, machine-readable instructions, etc.

[0049] Figure 2 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 provides a flowchart of exemplary machine-readable instructions and / or exemplary operations 200 for a graphical user interface development environment. Figure 2 The exemplary process 200 shown in the example begins with the presentation of a user interface by an exemplary editor circuit system 120, through which developers and / or users can interact to edit the graphical user interface. The exemplary editor circuit system 120 accesses such edits as user input and applies the edits to process control system configurations stored in a display database 125 (Box 210).

[0050] When operating the editor circuit system 120, developers can provide version control instructions to the process control development circuit system 110. The exemplary editor circuit system 120 accesses version control instructions (box 220). Figure 2 In the example shown, version control instructions can guide the process control development circuit system 110 to create new versions, update to selected versions, display version history, or display differences between two or more selected versions. Although in Figure 2 The examples shown provide four such examples of version control directives, but developers can also access many other types of version control directives.

[0051] In response to the detection of a version control instruction to create a new version, the exemplary editor circuit system 120 initiates the creation of a new version. (Box 230). The following is in conjunction with... Figure 3 Describes an exemplary method for creating a new version.

[0052] In response to detecting a version control instruction to update to the selected version, the exemplary editor circuit system 120 initiates an update to the selected version. (Box 240). The following is in conjunction with... Figure 4 Describe an exemplary method for updating to a selected version.

[0053] In response to detecting a version control instruction for displaying version history, the exemplary editor circuit system 120 initiates the display of version history (box 250). The following is in conjunction with... Figure 5 Describes an exemplary method for displaying version history.

[0054] In response to detecting a version control instruction to display differences between two or more versions, an exemplary editor circuit system 120 initiates the display of differences between two or more versions. (Box 260). The following is in conjunction with... Figure 6 This describes an exemplary method for displaying differences between two or more versions.

[0055] Figure 3 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 Process control development circuit system 110 to create Figure 1 A flowchart of a new version of exemplary machine-readable instructions and / or exemplary operations at a remote repository. Figure 3 The exemplary process 230 shown in the example begins in response to developer instructions provided to the editor circuit system 120 for creating a new version.

[0056] In some examples, developer instructions can be provided by the developer clicking a button within the user interface of editor circuitry system 120. Exemplary editor circuitry system 120 presents a dialog box to the user requesting user-submitted information (Box 310). In the examples disclosed herein, user-submitted information may include developer comments about the new version being created and / or any other information related to the new version. Such information may include, for example, the username of the developer requesting the new version, a timestamp of receiving the request, etc. In some examples, the developer's username may be a username provided within process control development circuitry system 110 (e.g., the username of a local instance of an application running on a desktop computer, rather than the computer's login username, such as a Microsoft Windows user identifier, or an operating system (OS) user). Exemplary repository management circuitry system 145 accesses the user-submitted information (Box 320). The user-submitted information will later be used when creating a new version using remote repository 170.

[0057] An exemplary import / export circuit system 135 exports information from a display database 125 to a local storage 140 (box 330). In some examples, information is converted from records within the display database 125 (e.g., one or more records in an SQL database table) into a file structure within the local storage 140. For example, tables and / or other objects within the display database 125 may be represented as Extensible Markup Language (XML) files when stored in the local storage 140. In this way, the local storage 140 may include multiple files corresponding to the respective objects within the display database 125.

[0058] Then, the exemplary repository management circuitry 145 commits the exported files within the local repository 140 (box 340). The exemplary repository management circuitry 145 pushes the local commit version with user commit information to the remote repository 170 (box 350). Figure 3 The exemplary process 230 shown in the example then terminates, but can be executed again when a subsequent instruction from the developer is given to create a new version.

[0059] Figure 4 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 Process control development circuit system 110 to utilize from Figure 1 Selected version update of remote repository Figure 1 A flowchart of exemplary machine-readable instructions and / or exemplary operations for a process control development environment. Figure 4 The exemplary process 240 shown in the example begins in response to a developer (e.g., a user) requesting an update to a selected version from a remote repository 170.

[0060] In some examples, a request to update to a selected version may occur after the version history and / or differences between versions have been presented to the developer. However, in other examples, the developer may only request an update to the latest version stored in remote repository 170.

[0061] An exemplary repository management circuitry 145 pulls a selected version from a remote repository 170 to a local repository 140 (box 410). In this manner, files are copied from the remote repository 170 to their corresponding file structures within the local repository 140. In some examples, files are copied one by one from the remote repository 170 to the local repository 140. However, in other examples, files associated with a selected version can be copied in bulk from the remote repository 170 to the local repository 140 (e.g., via ZIP files and / or other methods used for bulk transfer of multiple files).

[0062] The exemplary library management circuitry 145 causes the import / export circuitry 135 to import files corresponding to selected versions from local library 140 to display database 125 (box 420). To do this, the exemplary import / export circuitry 135 reads each file associated with the selected version from local library 140 and creates (and / or updates) corresponding data within display database 125. In some examples, data is first removed from display database 125 to ensure the imported data enables the operation to occur as intended.

[0063] Using the newly imported data stored in display database 125, the exemplary editor circuit system 120 enables the display user interface (box 430). The user interface displayed by the editor circuit system 120 can then be edited by a developer. In some examples, the process control deployment circuit system 130 can be used to deploy executable files and / or configurations 180 from display database 125 to process control system endpoint 190. Thus, process control system endpoint 190 is updated to the selected version.

[0064] Figure 5 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 is illustrated with flowcharts showing exemplary machine-readable instructions and / or exemplary operations of the version history. Figure 5The exemplary process 250 shown in the example begins in response to a developer's request to display the version history. The exemplary repository management circuitry 145 obtains version history information from a remote repository 170 (Box 510). The version history information includes information such as version numbers, dates, user commit information, etc., identifying versions committed to the remote repository 170. The exemplary repository management circuitry 145 causes the version history information to be displayed (Box 520). In some examples, the version history information is displayed in a timeline format, which allows developers to identify chronological updates and / or other corresponding information. However, any other methods for visualizing the version history may be used alternatively or separately.

[0065] Within the visualization of version history, the exemplary repository management circuitry 145 enables the selection of two or more version histories to display the differences between the selected version histories. To this end, the exemplary repository management circuitry 145 identifies the selected version histories (box 530). The exemplary repository management circuitry 145 causes the difference visualizer circuitry 150 to display a dialog box and other user interface showing the differences between the selected version histories (box 540). Combined with... Figure 11 An exemplary dialog box is shown that displays the differences between two selected versions. In some examples disclosed herein, the difference visualizer circuitry 150 causes a first representation of the user interface corresponding to the first version to be presented, visually adjacent to a second representation of the user interface corresponding to the second version (e.g., within the same dialog box and / or the same window within a graphical user interface). Presenting two graphical representations of the user interface allows developers to quickly understand the differences between the displayed versions.

[0066] The exemplary remote management circuitry 145 enables the selection of a version to be pulled from a remote repository (box 550). This selection can be made as part of a display of the version history in box 520, or alternatively as part of a display of the differences between two or more selected version histories in box 540. Regardless of how such a selection is made, the exemplary repository management circuitry 145 enables the selection of a version such that the selected version can be imported into the display database 125 by the exemplary import / export circuitry 135. This can then be combined with the foregoing... Figure 4 The update process 240 uses this type of selection.

[0067] Figure 6 This indicates that it can be implemented, instantiated, and / or executed by an exemplary programmable circuit system. Figure 1 The process control development circuit system 110 is used to illustrate exemplary machine-readable instructions and / or exemplary operations that demonstrate the differences between versions in the version history. Figure 6The exemplary process 260 shown in the example begins upon receiving an instruction to display the differences between two or more versions within the version history. Figure 6 The example shown illustrates the differences between two versions. However, it is also possible to show the differences between more than two versions.

[0068] Exemplary difference visualizer circuitry 150 identifies a first version and a second version to be compared. (Box 610). Exemplary difference visualizer circuitry 150 causes repository management circuitry 145 to pull the first and second versions from remote repository 170 to local repository 140. (Box 620). Exemplary difference visualizer circuitry 150 identifies files with the same filename in both versions but different content. (Box 630). Files with different content can be identified based on, for example, analysis of their content, analysis of the file size of the corresponding file(s), analysis of the calculated identifier (e.g., hash) of the corresponding file(s). Exemplary difference visualizer circuitry 150 identifies a first file from the first version and a corresponding second file from the second version to display the differences. (Box 640).

[0069] An exemplary difference visualizer circuit system 150 enables the display of textual differences between a first document and a second document. (Box 650). The following is in conjunction with... Figure 11 Exemplary methods for displaying textual differences between two documents are shown. For example, the text content of each document may be displayed visually adjacent to each other, while highlighting the different parts between each document. In the examples disclosed herein, highlighting is used to draw attention to the differences. However, any other visual techniques for identifying content may be used alternatively or separately, including, for example, coloring, outlining, overlaying, annotation, and so on.

[0070] Exemplary difference visualizer circuitry 150 causes a first graphical representation of a first version to be displayed (box 660). Difference visualizer circuitry 150 causes a second graphical representation of a second version to be displayed (box 670). In some examples, the first or second graphical representation may be enhanced with annotations to draw the observer's attention to the differences between the first and second versions. Displaying a graphical representation of the version history allows developers to quickly identify multiple user interfaces represented by corresponding versions(s). In some examples, the user can select different files corresponding to each version history to display the differences between the two selected files. In such an example, control returns to box 640, where additional files are identified and displayed according to boxes 640 and 650.

[0071] Figure 7-9This is a diagram illustrating an exemplary process of applying edits to the user interface and synchronizing the latest version of the interface to the version control system 175. Figure 7 In the example shown, a first version 710 of a graphical user interface is being developed in a process control development environment 110. The developers determine that the first graphical user interface 710 will be used to create a new version in the version control system 175. Information corresponding to the first graphical user interface 710 is exported 720 to a local repository 140 and then synchronized 750 to a remote repository 170.

[0072] exist Figure 8 In the example shown, changes are made to create a second version 810 of the graphical user interface. Exemplary changes include adding a button 820 to the second version 810 of the graphical user interface. The second version 810 of the graphical user interface is exported 830 to local storage 140. Figure 8 In the example shown, the addition of button 820 causes file 835 to change within local repository 140. Although file 835 is updated in local repository 140, the new version of file 835 has not yet been committed (e.g., synchronized) to version control system 175 and / or remote repository 170.

[0073] exist Figure 9 In the example shown, the updated file 835 is synchronized 950 to the version control system 175. In this way, the corresponding updated file 935 is stored in a remote repository 170. Developers can then pull this latest version from the version control system 175 for development on their local process control development environment 110.

[0074] Figure 10 It can be made by Figure 1 An exemplary user interface 1000 is displayed in the exemplary editor circuit system. Figure 10 The exemplary interface 1000 includes a ribbon 1002, a sidebar 1004, and a main editing window 1008. Within the sidebar 1004, the user can click on one or more objects, causing a version control menu 1010 to appear.

[0075] exist Figure 10 In the example shown, ribbon 1002 includes one or more user interface objects that developers can use to apply edits to a graphical user interface presented in the main window 1008. Figure 10 In the example shown, the ribbon is used to arrange one or more user interface objects. However, any other methods for visually arranging user interface objects, such as menus, panels, etc., may be used alternatively or in addition to these methods.

[0076] exist Figure 10In the example shown, sidebar 1004 enables the identification of design elements of the designed user interface. Figure 10 In this configuration, sidebar 1004 is shown docked at the far left of the user interface. However, sidebar 1004 can be presented in any other configuration, and / or may not be displayed as a sidebar. Within sidebar 1004, the user can access version control menu 1010. However, in some examples, version control menu 1010 can be accessed elsewhere (e.g., via ribbon 1002, by right-clicking in main window 1008, etc.).

[0077] Figure 11 It can be made by Figure 1 An exemplary difference visualizer circuit system 150 displays an exemplary user interface 1100 to illustrate the differences between versions in the version history. Figure 11 In the illustrated example, the user interface 1100 includes four panels 1110, 1120, 1130, and 1140 arranged in four quadrants. However, these panels may be arranged in any other configuration, either alternatively or otherwise. The first panel 1110 and the second panel 1120 correspond to a first version compared by the exemplary difference visualizer circuitry 150. The third panel 1130 and the fourth panel 1140 correspond to a second version compared by the exemplary difference visualizer circuitry 150.

[0078] The first panel 1110 displays the text version of the file within the first version, and the third panel 1130 displays the text version of the file within the second version. Figure 11 In the example shown, differences 1115 and 1135 are highlighted between the first panel 1110 and the third panel 1130. For example, the first difference 1115 in the first panel 1110 shows strikethrough lines, which represent lines of code that do not appear in the file within the first version presented in the first panel but do appear in the file within the second version presented in the second panel 1130. Similarly, the second difference 1135 shows those lines of code added to the file within the second version, as presented in the second panel 1130.

[0079] The second panel 1120 displays the first graphic corresponding to the first version, while the fourth panel 1140 displays the second graphic corresponding to the second version. Figure 11 The example shown illustrates a graphic object 1145 added in the second version. In some examples, additional annotations and / or visual markers may be added to the second panel 1120 and / or the fourth panel 1140 to draw the developer's attention to the differences between the first and second graphics.

[0080] Figure 12 It is constructed to execute and / or instantiate Figure 2 ,3 Exemplary machine-readable instructions and / or exemplary operations of 4, 5 and / or 6 to implement Figure 1 A block diagram of an exemplary programmable circuit system platform 1200 for process control development circuit system 110. Programmable circuit system platform 1200 can be, for example, a server, personal computer, workstation, self-learning machine (e.g., neural network), mobile device (e.g., mobile phone, smartphone, such as iPad). TM Tablet computers, personal digital assistants (PDAs), Internet-connected appliances, DVD players, CD players, digital video recorders, Blu-ray players, game consoles, personal video recorders, set-top boxes, headsets (e.g., augmented reality (AR) headsets, virtual reality (VR) headsets, etc.) or other wearable devices, or any other type of computing and / or electronic device.

[0081] The illustrated programmable circuit system platform 1200 includes a programmable circuit system 1212. The illustrated programmable circuit system 1212 is hardware. For example, the programmable circuit system 1212 can be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and / or microcontrollers from any desired family or manufacturer. The programmable circuit system 1212 can be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, the programmable circuit system 1212 implements an exemplary editor circuit system 120, an exemplary process control deployment circuit system 130, an exemplary import / export circuit system 135, an exemplary library management circuit system 145, and an exemplary difference visualizer circuit system 150.

[0082] The programmable circuit system 1212 of the illustrated example includes local memory 1213 (e.g., cache, registers, etc.). The programmable circuit system 1212 of the illustrated example communicates with main memories 1214 and 1216 via bus 1218, the main memories including volatile memory 1214 and non-volatile memory 1216. Volatile memory 1214 may be implemented using synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), RAMBUS® dynamic random access memory (RDRAM®), and / or any other type of RAM device. Non-volatile memory 1216 may be implemented using flash memory and / or any other desired type of memory device. Access to the main memories 1214 and 1216 of the illustrated example is controlled by a memory controller 1217. In some examples, the memory controller 1217 may be implemented by one or more integrated circuits, logic circuits, microcontrollers, or any other type of circuit system from any desired family or manufacturer to manage the flow of data into and out of the main memories 1214 and 1216.

[0083] The programmable circuit system platform 1200 shown in the example also includes an interface circuit system 1220. The interface circuit system 1220 can be implemented in hardware according to any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, a Bluetooth® interface, a Near Field Communication (NFC) interface, a Peripheral Component Interconnect (PCI) interface, and / or a Peripheral Component Interconnect Fast (PCIe) interface.

[0084] In the illustrated example, one or more input devices 1222 are connected to the interface circuitry 1220. The input devices 1222 allow users (e.g., human users, machine users, etc.) to input data and / or commands into the programmable circuitry 1212. The input devices 1222 may be implemented using, for example, audio sensors, microphones, cameras (still or video), keyboards, buttons, mice, touchscreens, touchpads, trackballs, dot devices, and / or voice recognition systems.

[0085] One or more output devices 1224 are also connected to the interface circuitry 1220 of the illustrated example. The output devices 1224 may be implemented, for example, by display devices (e.g., light-emitting diode (LED), organic light-emitting diode (OLED), liquid crystal display (LCD), cathode ray tube (CRT) display, in-plane conversion (IPS) display, touchscreen, etc.), haptic output devices, printers, and / or speakers. Therefore, the interface circuitry 1220 of the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or a graphics processor circuitry such as a GPU.

[0086] The interface circuit system 1220 of the example shown also includes communication devices, such as a transmitter, receiver, transceiver, modem, residential gateway, wireless access point, and / or network interface, to facilitate the exchange of data between the network 1226 and external machines (e.g., any kind of computing device). Communication can be carried out via, for example, Ethernet connections, digital subscriber line (DSL) connections, telephone line connections, coaxial cable systems, satellite systems, beyond-line-of-sight wireless systems, line-of-sight wireless systems, cellular telephone systems, optical connections, etc.

[0087] The programmable circuit system platform 1200 illustrated also includes one or more mass storage disks or devices 1228 for storing firmware, software, and / or data. Examples of such mass storage disks or devices 1228 include magnetic storage devices (e.g., floppy disks, drives, HDDs, etc.), optical storage devices (e.g., Blu-ray discs, CDs, DVDs, etc.), RAID systems, and / or solid-state storage disks or devices, such as flash memory devices and / or SSDs.

[0088] It can be by Figure 2 ,3 The machine-readable instruction 1232, implemented by machine-readable instructions 4, 5 and / or 6, may be stored in a mass storage device 1228, a volatile memory 1214, a non-volatile memory 1216 and / or at least one non-transitory computer-readable storage medium (such as a removable CD or DVD).

[0089] Figure 13 yes Figure 12 A block diagram of an exemplary embodiment of the programmable circuit system 1212. In this example, Figure 12 The programmable circuit system 1212 is implemented by the microprocessor 1300. For example, the microprocessor 1300 may be a general-purpose microprocessor (e.g., a general-purpose microprocessor circuit system). The microprocessor 1300 executes... Figure 2 , 3 Some or all of the machine-readable instructions in flowcharts 4, 5, and / or 6 are used to... Figure 2 The circuit system is effectively instantiated as a logic circuit to perform operations corresponding to those machine-readable instructions. In some such examples, Figure 1 The circuit system is instantiated by the hardware circuitry of microprocessor 1300 in conjunction with machine-readable instructions. For example, microprocessor 1300 may be implemented by a multi-core hardware circuitry system (such as a CPU, DSP, GPU, XPU, etc.). Although it may include any number of exemplary cores 1302 (e.g., one core), the microprocessor 1300 in this example is a multi-core semiconductor device including N cores. The cores 1302 of microprocessor 1300 may operate independently or may cooperate to execute machine-readable instructions. For example, machine code corresponding to firmware, embedded software programs, or software programs may be executed by one core of core 1302, or may be executed by multiple cores of core 1302 at the same or different times. In some examples, the machine code corresponding to firmware, embedded software programs, or software programs is divided into threads and executed in parallel by two or more cores of core 1302. The software program may correspond to... Figure 2 , 3 The flowcharts 4, 5, and / or 6 represent part or all of the machine-readable instructions and / or operations.

[0090] Core 1302 can communicate via a first exemplary bus 1304. In some examples, the first bus 1304 can be implemented by a communication bus to implement communication associated with one or more cores of core 1302. For example, the first bus 1304 can be implemented by at least one of an inter-integrated circuit (I2C) bus, a serial peripheral interface (SPI) bus, a PCI bus, or a PCIe bus. Alternatively, the first bus 1304 can be implemented by any other type of computing or electrical bus. Core 1302 can obtain data, instructions, and / or signals from one or more external devices via exemplary interface circuitry 1306. Core 1302 can output data, instructions, and / or signals to one or more external devices via interface circuitry 1306. Although the core 1302 in this example includes an exemplary local memory 1320 (e.g., a Level 1 (L1) cache, which may be divided into an L1 data cache and an L1 instruction cache), the microprocessor 1300 also includes an exemplary shared memory 1310 (e.g., a Level 2 (L2) cache) that can be shared by the cores for high-speed access to data and / or instructions. Data and / or instructions can be transferred (e.g., shared) by writing to and / or reading from the shared memory 1310. The local memory 1320 and the shared memory 1310 of each of the cores 1302 can be part of a hierarchy of storage devices that include multiple levels of cache memory and main memory (e.g., ...). Figure 12 (Main memories 1214, 1216). Generally, higher-level memories in a cache hierarchy exhibit lower access times and have smaller storage capacities than lower-level memories. Variations at each level of the cache hierarchy are managed by cache coherence policies (e.g., coordination).

[0091] Each core 1302 may be referred to as a CPU, DSP, GPU, or any other type of hardware circuit system. Each core 1302 includes a control unit circuit system 1314, an arithmetic and logic (AL) circuit system (sometimes called an ALU) 1316, multiple registers 1318, local memory 1320, and a second exemplary bus 1322. Other structures may be present. For example, each core 1302 may include a vector unit circuit system, a single instruction multiple data (SIMD) unit circuit system, a load / store unit (LSU) circuit system, a branch / jump unit circuit system, a floating-point unit (FPU) circuit system, etc. The control unit circuit system 1314 includes semiconductor-based circuitry configured to control (e.g., coordinate) the movement of data within the corresponding core 1302. The AL circuit system 1316 includes semiconductor-based circuitry configured to perform one or more mathematical and / or logical operations on the data within the corresponding core 1302. Some examples of the AL circuit system 1316 perform integer-based operations. In other examples, the AL circuit system 1316 also performs floating-point operations. In other examples, the AL circuit system 1316 may include a first AL circuit system that performs integer-based operations and a second AL circuit system that performs floating-point operations. In some examples, the AL circuit system 1316 may be referred to as an arithmetic logic unit (ALU).

[0092] Register 1318 is a semiconductor-based structure used to store data and / or instructions (e.g., the result of one or more operations performed by the AL circuit system 1316 corresponding to core 1302). For example, register 1318 may include multiple vector registers, multiple SIMD registers, multiple general-purpose registers, multiple flag registers, multiple segment registers, multiple machine-specific registers, multiple instruction pointer registers, multiple control registers, multiple debug registers, multiple memory management registers, multiple machine check registers, etc. Register 1318 may be arranged in groups, such as... Figure 13 As shown in the diagram. Alternatively, register 1318 can be organized in any other arrangement, format, or structure, for example, by distributing it throughout core 1302 to reduce access time. The second bus 1322 can be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[0093] Each core 1302 and / or more generally, the microprocessor 1300 may include additional and / or alternative structures to the structures shown and described above. For example, one or more clock circuits, one or more power supplies, one or more power gating systems, one or more cache home agents (CHAs), one or more aggregation / common grid stations (CMS), one or more shifters (e.g., multiple barrel shifters), and / or other circuitry may be present. The microprocessor 1300 is a semiconductor device fabricated to include a plurality of transistors interconnected to implement the structures described above in one or more integrated circuits (ICs) contained in one or more packages.

[0094] Microprocessor 1300 may include one or more accelerators (e.g., acceleration circuitry, hardware accelerators, etc.) and / or cooperate with such accelerators. In some examples, accelerators are implemented by logic circuitry to perform certain tasks faster and / or more efficiently than could be implemented by a general-purpose processor. Examples of accelerators include ASICs and FPGAs, such as those discussed herein. GPUs, DSPs, and / or other programmable devices may also be accelerators. Accelerators may be on microprocessor 1300, in the same chip package as microprocessor 1300, and / or in one or more separate packages from microprocessor 1300.

[0095] Figure 14 yes Figure 12 A block diagram of another exemplary embodiment of the programmable circuit system 1212. In this example, the programmable circuit system 1212 is implemented by an FPGA circuit system 1400. For example, the FPGA circuit system 1400 can be implemented by an FPGA. The FPGA circuit system 1400 can be used, for example, to execute instructions that would otherwise be executed by a machine-readable instruction. Figure 13 The exemplary microprocessor 1300 performs the operations. However, once configured, the FPGA circuit system 1400 instantiates operations and / or functions corresponding to machine-readable instructions in the hardware, and therefore can typically perform operations / functions faster than a general-purpose microprocessor that executes corresponding software.

[0096] More specifically, with the above Figure 13 The microprocessor 1300 (a general-purpose device that can be programmed to execute commands) is a microprocessor that is a general-purpose device that is a microprocessor ... Figure 2 , 3 Flowcharts 4, 5, and / or 6 represent some or all of the machine-readable instructions, but whose interconnections and logic circuitry are fixed once manufactured. Figure 14 The example FPGA circuit system 1400 includes those that can be configured, constructed, programmed, and / or interconnected in different ways after manufacturing to instantiate, for example, those corresponding to those made by Figure 2 ,3 The flowcharts (multiple) 1400 represent some or all of the interconnects and logic circuitry systems of machine-readable instructions for operation / function. Specifically, the FPGA circuitry system 1400 can be considered as an array of logic gates, interconnects, and switches. Switches can be programmed to change the way logic gates are interconnected via interconnects, thereby effectively forming one or more dedicated logic circuits (unless and until the FPGA circuitry system 1400 is reprogrammed). The configured logic circuitry enables logic gates to cooperate in different ways to perform different operations on data received by the input circuitry system. These operations can correspond to... Figure 2 , 3 Some or all of the instructions (e.g., software and / or firmware) represented by flowcharts 1, 4, 5, and / or 6. Therefore, the FPGA circuit system 1400 can be configured and / or constructed to correspond to... Figure 2 , 3 Some or all of the machine-readable instructions of flowcharts 1, 4, 5, and / or 6 are effectively instantiated into special-purpose logic circuits, thereby performing the operations / functions corresponding to these software instructions in a specialized manner similar to that of an ASIC. Therefore, the FPGA circuit system 1400 can perform operations / functions corresponding to these software instructions in a manner more specialized than a general-purpose microprocessor. Figure 2 , 3 Some or all of the machine-readable instructions 4, 5 and / or 6 may be used to execute the operations / functions more quickly.

[0097] exist Figure 14 In some examples, the FPGA circuit system 1400 is configured and / or constructed in response to being programmed (and / or reprogrammed once or multiple times) based on a binary file. In some examples, the binary file may be compiled and / or generated based on instructions in a hardware description language (HDL), such as Lucid, VHSIC Hardware Description Language (VHDL), or Verilog. For example, a user (e.g., a human user, a machine user, etc.) may write code or programs in the HDL corresponding to one or more operations / functions; the code / program may be converted to a low-level language as needed; and the code / program (e.g., code / program in a low-level language) may be converted to a binary file (e.g., by a compiler, software application, etc.). In some examples, Figure 14 The FPGA circuit system 1400 can access and / or load binary files to enable Figure 14 The FPGA circuit system 1400 is configured and / or constructed to perform one or more operations / functions. For example, a binary file may consist of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and / or may be generated by... Figure 14 The FPGA circuit system 1400 is implemented with machine-readable instructions to enable configuration and / or construction. Figure 14 The FPGA circuit system 1400 or its (multiple) parts.

[0098] In some examples, the binary file is compiled, generated, transformed, and / or otherwise output from a unified software platform used to program the FPGA. For instance, the unified software platform can translate first instructions (e.g., code or program) in a high-level language (e.g., C, C++, Python, etc.) corresponding to one or more operations / functions into second instructions in HDL corresponding to one or more operations / functions. In some such examples, the binary file is compiled, generated, and / or otherwise output from the unified software platform based on the second instructions. In some examples, Figure 14 The FPGA circuit system 1400 can access and / or load binary files to enable Figure 14 The FPGA circuit system 1400 is configured and / or constructed to perform one or more operations / functions. For example, a binary file may consist of a bit stream (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.), and / or may be generated by... Figure 14 The FPGA circuit system 1400 is implemented with machine-readable instructions to enable configuration and / or construction. Figure 14 The FPGA circuit system 1400 or its (multiple) parts.

[0099] Figure 14 The FPGA circuit system 1400 includes an exemplary input / output (I / O) circuit system 1402 for obtaining and / or outputting data from / to an exemplary configuration circuit system 1404 and / or external hardware 1406. For example, the configuration circuit system 1404 may be implemented by an interface circuit system that can obtain a binary file, which may be implemented by bitstreams, data, and / or machine-readable instructions to configure the FPGA circuit system 1400 or portions thereof. In some such examples, the configuration circuit system 1404 may obtain the binary file from a user, a machine (e.g., a hardware circuit system (e.g., a programmable or dedicated circuit system) that can implement an artificial intelligence / machine learning (AI / ML) model to generate the binary file), and / or any combination thereof. In some examples, the external hardware 1406 may be implemented by an external hardware circuit system. For example, the external hardware 1406 may be... Figure 13 The microprocessor 1300 is implemented.

[0100] The FPGA circuit system 1400 also includes an array of exemplary logic gate circuit systems 1408, a plurality of exemplary configurable interconnects 1410, and an array of exemplary memory circuit systems 1412. The logic gate circuit systems 1408 and configurable interconnects 1410 are configurable to instantiate corresponding to... Figure 2 , 3 One or more operations / functions of at least some of the machine-readable instructions 4, 5 and / or 6, and / or other desired operations. Figure 14 The logic gate system 1408 shown is manufactured in blocks or groups. Each block includes semiconductor-based electrical structures that can be configured as logic circuits. In some examples, the electrical structures include logic gates (e.g., AND gates, OR gates, XOR gates, etc.) that provide basic building blocks for the logic circuits. Each of the logic gate system 1408 contains electrically controllable switches (e.g., transistors) to implement the configuration of the electrical structures and / or logic gates to form a circuit for performing a desired operation / function. The logic gate system 1408 may include other electrical structures such as lookup tables (LUTs), registers (e.g., flip-flops or latches), multiplexers, etc.

[0101] The configurable interconnect 1410 shown in the example is a conductive path, trace, via, etc., which may include electrically controllable switches (e.g., transistors) whose states can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more of the logic gate circuit system 1408 to program the desired logic circuit.

[0102] The storage circuitry 1412 shown in the example is configured to store the results(s) of one or more operations performed by corresponding logic gates. Storage circuitry 1412 can be implemented using registers, etc. In the example shown, storage circuitry 1412 is distributed among logic gate circuitry 1408 to facilitate access and improve execution speed.

[0103] Figure 14The exemplary FPGA circuit system 1400 also includes an exemplary dedicated operating circuit system 1414. In this example, the dedicated operating circuit system 1414 includes a dedicated circuit system 1416 that can be invoked to implement common functions, thus avoiding the need to program these functions in the field. Examples of such dedicated circuit systems 1416 include memory (e.g., DRAM) controller circuit systems, PCIe controller circuit systems, clock circuit systems, transceiver circuit systems, memory and multiplier-accumulator circuit systems. Other types of dedicated circuit systems may be present. In some examples, the FPGA circuit system 1400 may also include an exemplary general-purpose programmable circuit system 1418, such as an exemplary CPU 1420 and / or an exemplary DSP 1422. Other general-purpose programmable circuit systems 1418, such as GPUs, XPUs, etc., may additionally or alternatively exist, which can be programmed to perform other operations.

[0104] although Figure 13 and 14 It shows Figure 12 These are two exemplary embodiments of the programmable circuit system 1212, but many other embodiments are contemplated. For example, the FPGA circuit system may include an onboard CPU, such as... Figure 13 One or more of the exemplary CPUs 1420. Therefore, Figure 12 The programmable circuit system 1212 can be further combined with at least Figure 13 Exemplary microprocessor 1300 and Figure 14 An exemplary FPGA circuit system 1400 is implemented. In some such hybrid examples, Figure 13 One or more cores of the 1302 can execute commands by Figure 2 , 3 The first part of the flowchart(s) 4, 5, and / or 6 represents the first part of the machine-readable instructions to perform(s) first operations / functions. Figure 14 The FPGA circuit system 1400 can be configured and / or constructed to perform operations corresponding to those performed by... Figure 2 , 3 The flowcharts 4, 5, and / or 6 represent the second part of the machine-readable instructions(s) of a plurality of second operations / functions, and / or the ASIC may be configured and / or constructed to perform operations corresponding to those performed by the second part of the machine-readable instructions(s). Figure 2 , 3 The flowcharts for 4, 5, and / or 6 represent the machine-readable instructions for (multiple) third operations / functions.

[0105] It should be understood that Figure 1 Some or all of the circuit system can therefore be instantiated at the same or different times. For example, Figure 13The same and / or different parts of the microprocessor 1300 can be programmed to execute machine-readable instructions at the same and / or different times. In some examples, Figure 14 The same and / or different parts of the FPGA circuit system 1400 can be configured and / or constructed to perform operations / functions corresponding to the machine-readable instructions at the same and / or different times.

[0106] In some examples, Figure 1 Some or all of the circuit system can be instantiated, for example, in one or more threads that execute simultaneously and / or serially. For example, Figure 13 The microprocessor 1300 can execute machine-readable instructions in one or more threads that execute simultaneously and / or serially. In some examples, Figure 14 The FPGA circuit system 1400 can be configured and / or constructed to perform operations / functions simultaneously and / or serially. Furthermore, in some examples, Figure 1 Some or all of the circuit system can be in Figure 13 One or more virtual machines and / or containers are implemented and executed on the microprocessor 1300.

[0107] In some examples, Figure 12 The programmable circuit system 1212 can be in one or more packages. For example, Figure 13 microprocessor 1300 and / or Figure 14 The FPGA circuitry system 1400 can be housed in one or more packages. In some examples, the XPU can be... Figure 12 The programmable circuit system 1212 is implemented, and the programmable circuit system can be in one or more packages. For example, the XPU may include a CPU in a package (e.g., Figure 13 microprocessor 1300, Figure 14 CPU 1420, etc.), and DSP in another package (e.g., Figure 14 DSP 1422), GPU in another package, and FPGA in yet another package (e.g., Figure 14 FPGA circuit system 1400).

[0108] Figure 15 The diagram shows how to use such as Figure 12This is a block diagram of an exemplary software distribution platform 1505 that distributes software containing exemplary machine-readable instructions 1232 to other hardware devices (e.g., hardware devices owned and / or operated by a third party different from the owner and / or operator of the software distribution platform). The exemplary software distribution platform 1505 can be implemented by any computer server, data facility, cloud service, etc., capable of storing software and sending it to other computing devices. The third party can be a customer of the entity that owns and / or operates the software distribution platform 1505. For example, the entity that owns and / or operates the software distribution platform 1505 can be, for example, a client of, the entity that owns and / or operates the software distribution platform 1505. Figure 12 The exemplary machine-readable instructions 1232 pertain to the software's developer, vendor, and / or licensor. Third parties may be consumers, users, retailers, OEMs, etc., who purchase and / or license the software for use and / or resell and / or sublicense. In the illustrated example, the software distribution platform 1505 includes one or more servers and one or more storage devices. The storage devices store the machine-readable instructions 1232, which may correspond to... Figure 2 , 3 The exemplary machine-readable instructions 1232 are as described above. One or more servers of the exemplary software distribution platform 1505 communicate with an exemplary network 1510, which may correspond to the Internet and / or any of the exemplary networks described above. In some examples, one or more servers respond to a request to send software to a requesting party as part of a commercial transaction. Payment for the delivery, sale, and / or licensing of the software may be processed by one or more servers of the software distribution platform and / or by a third-party payment entity. The servers enable the purchaser and / or licensor to download the machine-readable instructions 1232 from the software distribution platform 1505. For example, this may correspond to... Figure 2 , 3 Software containing exemplary machine-readable instructions 1232 (1232) can be downloaded to an exemplary programmable circuit system platform 1200, which executes the machine-readable instructions 1232 to implement a process control development circuit system 110. In some examples, one or more servers of a software distribution platform 1505 periodically distribute software (e.g., ...) to... Figure 12 The exemplary machine-readable instructions 1232 provide, send, and / or force updates to ensure that improvements, patches, updates, etc., are distributed to and applied to the software at the end-user device. Although referred to as software above, distributed “software” may alternatively be firmware.

[0109] "Including" and "comprising" (and all their forms and tenses) are used herein as open-ended terms. Therefore, whenever a claim uses any form of "include" or "comprise" (e.g., includes, includes, comprising, including, having, etc.) as a preamble or within any kind of claim statement, it should be understood that additional elements, items, etc., may be present without falling outside the scope of the corresponding claim or statement. As used herein, when the phrase "at least" is used as a transitional term, for example, in the preamble of a claim, it is open-ended in the same way that the terms "including" and "comprising" are open-ended. The term "and / or," when used, for example, in the form of A, B, and / or C, refers to any combination or subset of A, B, C, such as (1) A alone, (2) B alone, (3) C alone, (4) A and B, (5) A and C, (6) A and C, or (7) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A and B" is intended to refer to an implementation that includes any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A or B" is intended to refer to an implementation that includes any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the implementation or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A and B" is intended to refer to an implementation that includes any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the implementation or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A or B" is intended to refer to an implementation that includes any one of (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. ‬‬‬‬‬‬‬‬‬‬‬‬‬‬

[0110] As used herein, singular references (e.g., “a(a)”, “a(an)”, “first”, “second”, etc.) do not exclude multiple. As used herein, the term “a(a)” or “a(an)” refers to one or more of those objects. The terms “a(a)” (or “a(an)”), “one or more”, and “at least one” are used interchangeably herein. Furthermore, although listed individually, multiple means, elements, or actions may be implemented by, for example, the same entity or object. Additionally, although individual features may be included in different examples or claims, these features may be combined, and their inclusion in different examples or claims does not imply that the combination of features is not feasible and / or disadvantageous.

[0111] As used herein, unless otherwise stated, the term "above" describes the relationship between two parts relative to the Earth. The first part is above the second part if at least one portion of the second part lies between the Earth and the first part. Similarly, as used herein, the first part is "below" the second part when the first part is closer to the Earth than the second part. As stated above, the first part may be above or below the second part, provided that one or more of the following conditions exist: there are other parts in between, there are no other parts in between, the first and second parts are in contact, or the first and second parts are not in direct contact with each other.

[0112] As used in this patent, stating that any part (e.g., layer, film, region, area, or plate) is on another part in any way (e.g., positioned on, located, disposed on, or formed thereon), indicates that the mentioned part is in contact with the other part, or that the mentioned part is above the other part and that one or more intermediate parts are positioned between them.

[0113] As used herein, connective terms (e.g., attachment, link, connection, and joining) may include intermediate components between elements referenced by the connective term and / or relative movement between these elements, unless otherwise specified. Thus, a connective term does not necessarily imply that two elements are directly connected and / or fixed relative to each other. As used herein, a statement that any part is “in contact” with another part is defined to mean that there is no intermediate portion between the two parts.

[0114] Unless otherwise expressly stated, descriptive terms such as “first,” “second,” “third,” etc., are used herein without in any way assigning or otherwise indicating any meaning of priority, physical order, arrangement in a list, and / or sorting, but are merely used as labels and / or arbitrary names to distinguish elements for ease of understanding of the disclosed examples. In some examples, the descriptive term “first” may be used to refer to an element in a particular embodiment, while the same element may be referred to in the claims by different descriptive terms (e.g., “second” or “third”). In such cases, it should be understood that such descriptive terms are used only to distinguish these elements within the context of a discussion in which elements could otherwise, for example, share the same name (e.g., within the claims).

[0115] As used herein, “approximately” and “about” modify their subject / value to acknowledge the possibility of variation that may occur in real-world applications. For example, “approximately” and “about” may modify dimensions that may be inaccurate due to manufacturing tolerances and / or other real-world defects, as will be understood by one of ordinary skill in the art. For example, unless otherwise specified herein, “approximately” and “about” may indicate that such dimensions are within tolerances of + / - 10%.

[0116] As used in this article, "substantially real-time" means that it occurs in a near-instantaneous manner, thus acknowledging that there may be real-world delays in computation time, transmission, etc. Therefore, unless otherwise stated, "substantially real-time" means real-time plus 1 second.

[0117] As used herein, the phrase “in communication” (including its variations) encompasses direct communication and / or indirect communication through one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or constant communication, but additionally includes selective communication at periodic intervals, scheduled intervals, non-periodic intervals and / or one-off events.

[0118] As used herein, a “programmable circuit system” is defined as including (i) one or more application-specific circuits (e.g., application-specific integrated circuits (ASICs)) configured to perform one or more specific operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors), and / or (ii) one or more general-purpose semiconductor-based circuits programmable with instructions to perform one or more specific functions and / or one or more operations and including one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuit systems include programmable microprocessors, such as central processing units (CPUs) capable of executing first instructions to perform one or more operations and / or functions, field-programmable gate arrays (FPGAs) that can be programmed with second instructions to configure and / or construct an FPGA to instantiate one or more operations and / or functions corresponding to the first instructions, graphics processing units (GPUs) capable of executing first instructions to perform one or more operations and / or functions, digital signal processors (DSPs), XPUs, network processing units (NPUs) capable of executing first instructions to perform one or more operations and / or functions, one or more microcontrollers capable of executing first instructions to perform one or more operations and / or functions, and / or integrated circuits such as application-specific integrated circuits (ASICs). For example, an XPU can be implemented by a heterogeneous computing system that includes multiple types of programmable circuit systems (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and / or any combination thereof) and orchestration techniques (e.g., multiple application programming interfaces (APIs) that can assign multiple computing tasks to one or more of the multiple types of programmable circuit systems that are suitable for and can be used to perform multiple computing tasks.

[0119] As used herein, an integrated circuit / circuit system is defined as one or more semiconductor packages containing one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, FPGA, chip, microchip, programmable circuit system, semiconductor substrate coupling multiple circuit elements, system-on-a-chip (SoC), etc.

[0120] Based on the foregoing, it should be understood that exemplary systems, apparatuses, articles of manufacture, and methods for implementing version control in a process control system development environment have been disclosed. The disclosed systems, apparatuses, articles of manufacture, and methods improve the efficiency of using computing devices by enabling multiple developers operating multiple process control development circuit systems to work on the same graphical user interface within the version control system. Such methods achieve efficient development of graphical user interfaces for process control systems. Therefore, the disclosed systems, apparatuses, articles of manufacture, and methods relate to one or more improvements in the operation of machines such as computers or other electronic and / or mechanical devices.

[0121] This document discloses exemplary methods, apparatus, systems, and articles of manufacture for providing version control in a process control system development environment. Further examples and combinations thereof include the following.

[0122] Example 1 includes at least one non-transitory machine-readable medium comprising machine-readable instructions for causing at least one processor circuitry to at least: render a first graphical user interface (GUI) to enable editing of a second GUI of a process control system, the second GUI being based on information stored in a database; access user instructions to modify the second GUI from a first version to a second version; access user-submitted information associated with the second version; export the second version of the second GUI from the database to a local file repository; and synchronize the second version from the local file repository to a remote repository, the synchronization including the user-submitted information.

[0123] Example 2 includes at least one non-transitory machine-readable medium according to Example 1, wherein the machine-readable instructions are configured to cause one or more of the at least one processor circuitry to: synchronize a third version of the second graphical user interface from the remote storage to the local file storage; import the third version of the second graphical user interface from the local file storage into the database; and cause the third version of the second graphical user interface to be presented for editing within the first graphical user interface.

[0124] Example 3 includes at least one non-transitory machine-readable medium according to Example 1, wherein the machine-readable instructions are used to cause one or more processor circuits of the at least one processor circuit to render a version history of the version of the second graphical user interface stored at the remote repository.

[0125] Example 4 includes at least one non-transitory machine-readable medium according to Example 3, wherein the machine-readable instructions are configured to cause one or more processor circuits of the at least one processor circuit to: identify a difference between a first file of a second version of the second graphical user interface and a second file of a third version of the second graphical user interface; and cause a textual representation of the difference to be displayed within the first graphical user interface.

[0126] Example 5 includes at least one non-transitory machine-readable medium according to Example 4, wherein the machine-readable instructions are used to cause one or more processor circuits in the at least one processor circuit to display a graphical representation of the difference in association with the first graphical user interface.

[0127] Example 6 includes at least one non-transitory machine-readable medium according to Example 5, wherein the graphical representation of the difference includes a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

[0128] Example 7 includes at least one non-transitory machine-readable medium according to Example 1, wherein the user-submitted information includes the username of a user logged into the first graphical user interface.

[0129] Example 8 includes an apparatus comprising: an interface circuitry; machine-readable instructions; and at least one processor circuitry programmable by the machine-readable instructions to: render a first graphical user interface (GUI) to enable editing of a second GUI of a process control system, the second GUI being based on information stored in a database; accessing user instructions to modify the second GUI from a first version to a second version; accessing user-submitted information associated with the second version; exporting the second version of the second GUI from the database to a local file repository; and synchronizing the second version from the local file repository to a remote repository, the synchronization including the user-submitted information.

[0130] Example 9 includes the device according to Example 8, wherein one or more of the processor circuits in the at least one processor circuit are configured to: synchronize a third version of the second graphical user interface from the remote storage to the local file storage; import the third version of the second graphical user interface from the local file storage into the database; and cause the third version of the second graphical user interface to be presented for editing within the first graphical user interface.

[0131] Example 10 includes the device according to Example 8, wherein one or more processor circuits in the at least one processor circuit are configured to render a version history of the version of the second graphical user interface stored at the remote repository.

[0132] Example 11 includes the device according to Example 10, wherein one or more of the processor circuits in the at least one processor circuit are configured to: identify differences between a first file of a second version of the second graphical user interface and a second file of a third version of the second graphical user interface; and cause a textual representation of the differences to be displayed within the first graphical user interface.

[0133] Example 12 includes the device according to Example 11, wherein one or more of the at least one processor circuitry are configured to cause one or more of the at least one processor circuitry to display a graphical representation of the difference in association with the first graphical user interface.

[0134] Example 13 includes the device according to Example 12, wherein the graphical representation of the difference includes a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

[0135] Example 14 includes the device according to Example 8, wherein the user-submitted information includes the username of the user who logged into the first graphical user interface.

[0136] Example 15 includes a method comprising: at least one processor circuitry programmed by at least one instruction to render a first graphical user interface (GUI) to enable editing of a second GUI of a process control system, the second GUI being based on information stored in a database; the at least one processor circuitry accessing user instructions to modify the second GUI from a first version to a second version; one or more of the at least one processor circuitry accessing user submission information associated with the second version; one or more of the at least one processor circuitry exporting the second version of the second GUI from the database to a local file repository; and synchronizing the second version from the local file repository to a remote repository, the synchronization including the user submission information.

[0137] Example 16 includes the method according to Example 15, further comprising: synchronizing a third version of the second graphical user interface from the remote repository to the local file repository; importing the third version of the second graphical user interface from the local file repository into the database; and causing the third version of the second graphical user interface to be presented for editing within the first graphical user interface.

[0138] Example 17 includes the method according to Example 15, and further includes causing a version history of the version of the second graphical user interface stored at the remote repository to be presented.

[0139] Example 18 includes the method according to Example 17, further comprising: identifying a difference between a first file of a second version of the second graphical user interface and a second file of a third version of the second graphical user interface; and causing a textual representation of the difference to be displayed within the first graphical user interface.

[0140] Example 19 includes the method according to Example 18, and further includes a graphical representation of the difference that is displayed in association with the first graphical user interface.

[0141] Example 20 includes the method according to Example 19, wherein the graphical representation of the difference includes a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

[0142] Example 21 includes the method according to Example 15, wherein the user-submitted information includes the username of the user who is logged into the first graphical user interface.

[0143] The following claims are hereby incorporated by reference in this specific embodiment. Although certain exemplary systems, devices, articles of manufacture, and methods have been disclosed herein, the scope of this patent is not limited thereto. Rather, this patent covers all systems, devices, articles of manufacture, and methods that reasonably fall within the scope of the claims of this patent.

Claims

1. At least one non-transitory machine-readable medium, said at least one non-transitory machine-readable medium comprising machine-readable instructions, said machine-readable instructions being configured to cause at least one processor circuitry to at least: This enables the presentation of a first graphical user interface, which in turn enables the editing of a second graphical user interface of the process control system, the second graphical user interface being based on information stored in a database; Access user instructions to modify the second graphical user interface from the first version to the second version; Access user submissions associated with the second version; Export the second version of the second graphical user interface from the database to a local file storage library; and The second version is synchronized from the local file repository to the remote repository, the synchronization including the user submission information.

2. The at least one non-transitory machine-readable medium according to claim 1, wherein the machine-readable instructions are used to cause one or more processor circuits in the at least one processor circuit to: Synchronize the third version of the second graphical user interface from the remote repository to the local file repository; Import the third version of the second graphical user interface from the local file store into the database; and This enables the presentation of a third version of the second graphical user interface for editing within the first graphical user interface.

3. The at least one non-transitory machine-readable medium of claim 1, wherein the machine-readable instructions are used to cause one or more processor circuits of the at least one processor circuit to render a version history of the version of the second graphical user interface stored at the remote repository.

4. The at least one non-transitory machine-readable medium according to claim 3, wherein the machine-readable instructions are used to cause one or more processor circuits in the at least one processor circuit to: Identify the differences between the first file of the second version of the second graphical user interface and the second file of the third version of the second graphical user interface; and This causes the text representation of the differences to be displayed within the first graphical user interface.

5. The at least one non-transitory machine-readable medium of claim 4, wherein the machine-readable instructions are used to cause one or more processor circuits in the at least one processor circuit to display a graphical representation of the difference in association with the first graphical user interface.

6. The at least one non-transitory machine-readable medium according to claim 5, wherein the graphical representation of the difference comprises a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

7. The at least one non-transitory machine-readable medium according to claim 1, wherein the user-submitted information includes the username of the user logged into the first graphical user interface.

8. An apparatus comprising: Interface circuit system; Machine-readable instructions; as well as At least one processor circuit, said at least one processor circuit to be programmed by said machine-readable instructions to: This enables the presentation of a first graphical user interface, which in turn enables the editing of a second graphical user interface of the process control system, the second graphical user interface being based on information stored in a database; Access user instructions to modify the second graphical user interface from the first version to the second version; Access user submissions associated with the second version; Export the second version of the second graphical user interface from the database to a local file storage library; and The second version is synchronized from the local file repository to the remote repository, the synchronization including the user submission information.

9. The device of claim 8, wherein one or more of the processor circuits in the at least one processor circuit are configured to: Synchronize the third version of the second graphical user interface from the remote repository to the local file repository; Import the third version of the second graphical user interface from the local file store into the database; and This enables the presentation of a third version of the second graphical user interface for editing within the first graphical user interface.

10. The device of claim 8, wherein one or more of the processor circuits in the at least one processor circuit are configured to render a version history of the version of the second graphical user interface stored at the remote repository.

11. The device of claim 10, wherein one or more of the processor circuits in the at least one processor circuit are configured to: Identify the differences between the first file of the second version of the second graphical user interface and the second file of the third version of the second graphical user interface; and This causes the text representation of the differences to be displayed within the first graphical user interface.

12. The device of claim 11, wherein one or more of the at least one processor circuitry are configured to cause one or more of the at least one processor circuitry to display a graphical representation of the difference in association with the first graphical user interface.

13. The device of claim 12, wherein the graphical representation of the difference includes a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

14. The device of claim 8, wherein the user-submitted information includes the username of the user who has logged into the first graphical user interface.

15. A method comprising: At least one processor circuit programmed by at least one instruction renders a first graphical user interface to enable editing of a second graphical user interface of the process control system, the second graphical user interface being based on information stored in a database. One or more of the at least one processor circuitry accesses user instructions to modify the second graphical user interface from a first version to a second version. User-submitted information associated with the second version is accessed by one or more processor circuits in the at least one processor circuit; A second version of the second graphical user interface is exported from the database to a local file storage library by one or more of the at least one processor circuit; as well as The second version is synchronized from the local file repository to the remote repository, the synchronization including the user submission information.

16. The method of claim 15, further comprising: Synchronize the third version of the second graphical user interface from the remote repository to the local file repository; Import the third version of the second graphical user interface from the local file storage into the database; as well as This enables the presentation of a third version of the second graphical user interface for editing within the first graphical user interface.

17. The method of claim 15, further comprising causing a version history of the version of the second graphical user interface stored at the remote repository to be presented.

18. The method of claim 17, further comprising: Identify the differences between the first file of the second version of the second graphical user interface and the second file of the third version of the second graphical user interface; as well as This causes the text representation of the differences to be displayed within the first graphical user interface.

19. The method of claim 18, further comprising causing a graphical representation of the difference to be displayed in association with the first graphical user interface.

20. The method of claim 19, wherein the graphical representation of the difference comprises a first portion representing a second version of the second graphical user interface and a second portion representing a third version of the second graphical user interface.

21. The method of claim 15, wherein the user-submitted information includes the username of the user logged into the first graphical user interface.

Images