Image sensor and electronic device

Abstract

The utility model discloses an image sensor and electronic equipment, the image sensor comprises a semiconductor substrate and an interconnection structure layer, an isolation structure is formed in the semiconductor substrate, and the isolation structure divides the semiconductor substrate into a plurality of pixel areas; the interconnection structure layer is arranged on the light emitting side of the semiconductor substrate, the interconnection structure layer comprises at least two conductive circuit layers, the conductive circuit layers are arranged corresponding to the isolation structures, and a plurality of light-transmitting areas which are arranged in one-to-one correspondence with the pixel areas are formed between the projections of the conductive circuit layers on the semiconductor substrate. The image sensor provided by the utility model can avoid the problem of photosensitive crosstalk between the pixel areas, and is beneficial to improving the imaging quality.

Description

Technical Field

[0001] The utility model relates to the technical field of image sensing, in particular to an image sensor and electronic equipment. Background Art

[0002] An image sensor is a device that converts light signals into electrical signals. Existing BSI sensors include a photosensitive device, a light-collecting and color-filtering structure arranged on the light-incident side of the photosensitive device, and an interconnection structure arranged on the backlight side of the photosensitive device. When light passes through the light-collecting and color-filtering structure and the photosensitive device and then shoots toward the interconnection structure, the interconnection structure will reflect the light back to the photosensitive device, causing photosensitive crosstalk between two adjacent photosensitive devices. Utility Model Content

[0003] In view of this, the utility model provides an image sensor, which can avoid the problem of photosensitivity crosstalk between pixel areas and is conducive to improving imaging quality.

[0004] An image sensor comprises a semiconductor substrate and an interconnection structure layer, wherein an isolation structure is formed in the semiconductor substrate, and the isolation structure separates the semiconductor substrate into a plurality of pixel regions; the interconnection structure layer is arranged on the light-emitting side of the semiconductor substrate, and the interconnection structure layer comprises at least two conductive circuit layers, each conductive circuit layer is arranged corresponding to the isolation structure, and each conductive circuit layer forms a plurality of light-transmitting regions arranged corresponding to each pixel region between projections of the semiconductor substrate.

[0005] In an embodiment of the present utility model, at least two layers of the conductive circuit layer include at least one first conductive circuit layer and at least one second conductive circuit layer, the first conductive circuit layer includes a plurality of first circuits extending along a first direction, and the plurality of first circuits are arranged at intervals along a second direction, the second conductive circuit layer includes a plurality of second circuits extending along the second direction, and the plurality of second circuits are arranged at intervals along the first direction, a clamp is provided between the first direction and the second direction, and the projections of the first circuits and the second circuits on the semiconductor substrate correspond to the isolation structure.

[0006] In an embodiment of the utility model, the above-mentioned isolation structure includes a plurality of first isolation parts extending along the first direction and a plurality of second isolation parts extending along the second direction, the plurality of first isolation parts are arranged at intervals along the second direction, the plurality of second isolation parts are arranged at intervals along the first direction, each of the first isolation parts is cross-arranged with each of the second isolation parts, each of the first isolation parts is arranged corresponding to at least one of the first lines, and each of the second isolation parts is arranged corresponding to at least one of the second lines.

[0007] In an embodiment of the present invention, the light-transmitting areas are arranged in a one-to-one correspondence with the pixel areas.

[0008] In an embodiment of the present invention, the center of the light-transmitting area coincides with the center of the photosensitive portion in the pixel area.

[0009] In an embodiment of the present invention, each layer of the conductive circuit layer has a light-transmitting opening corresponding to the light-transmitting area, and the light-transmitting opening corresponding to each layer tends to decrease in a direction away from the semiconductor substrate.

[0010] In an embodiment of the utility model, the above-mentioned image sensor also includes a light absorbing layer, which is arranged on a side of the interconnection structure layer away from the semiconductor substrate, and covers each of the light-transmitting areas. The light absorbing layer is used to absorb light passing through the light-transmitting areas.

[0011] In an embodiment of the present invention, the light absorbing layer comprises a plurality of light absorbing parts made of light absorbing materials, and each of the light absorbing parts is arranged in one-to-one correspondence with each of the light transmitting regions.

[0012] In an embodiment of the present invention, the light absorbing layer comprises a plurality of light absorbing grating structures, and each of the grating structures is arranged in one-to-one correspondence with each of the light-transmitting regions.

[0013] In an embodiment of the utility model, the image sensor includes a first chip and a second chip which are stacked, the first chip includes the semiconductor substrate, the second chip includes a bonding layer, the bonding layer is arranged opposite to the interconnection structure layer, wherein the light absorption layer is arranged in the interconnection structure layer of the first chip and / or the light absorption layer is arranged in the bonding layer of the second chip and is located on a side of the bonding layer close to the first chip.

[0014] In an embodiment of the present invention, when the light absorption layer exists in the interconnection structure layer, a distance exists between a side of the light absorption layer close to the bonding interface between two chips and the bonding interface.

[0015] In an embodiment of the present invention, when the light absorbing layer exists in the bonding layer, there is a distance between a side of the light absorbing layer close to the bonding interface between two chips and the bonding interface.

[0016] In an embodiment of the present invention, the image sensor further comprises a lens array, wherein the lens array is arranged on the light incident side of the semiconductor substrate, and the lens array comprises a plurality of lens units arranged corresponding to each of the pixel regions.

[0017] In an embodiment of the present invention, the above-mentioned image sensor also includes a color filter, which is arranged on the light incident side of the semiconductor substrate, such as between the lens array and the semiconductor substrate, and the color filter includes a plurality of color filter units arranged corresponding to each of the pixel areas.

[0018] In an embodiment of the utility model, each of the pixel areas includes a photosensitive portion, a transfer transistor, a floating diffusion area, a reset transistor and a source follower transistor. The photosensitive portion is used to convert a light signal containing image information into an electrical signal during an exposure process; the transfer transistor connects the photosensitive portion and the floating diffusion area, and is used to transfer the electrical signal of the photosensitive portion to the floating diffusion area; the source follower transistor is used to output the electrical signal of the floating diffusion area; and the reset transistor is used to reset the floating diffusion area.

[0019] In an embodiment of the present invention, each of the pixel regions further includes a selection transistor, and the selection transistor is used to select and output the electrical signal output by the source follower transistor to a column line.

[0020] The utility model also provides an electronic device, comprising any image sensor in the above-mentioned solution.

[0021] When external light passes through the pixel area of ​​the image sensor of the present invention and is emitted to the interconnection structure layer, the light can pass through the interconnection structure layer from the light-transmitting area. Since the light passes through the light-transmitting area, the interconnection structure layer will not reflect the partially penetrated light back to the pixel area of ​​the semiconductor substrate, thereby avoiding the problem of photosensitive crosstalk between pixel areas, reducing the MTF (modulation transfer function) value, and helping to improve imaging quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of a partial cross-sectional structure of an image sensor according to the first embodiment of the present application.

[0023] Figure 2 It is a partial top view structural diagram of the interconnection structure layer of the first embodiment of the present application.

[0024] Figure 3 It is a partial top view structural diagram of the cooperation between the interconnection structure layer and the pixel area of ​​the first embodiment of the present application.

[0025] Figure 4 It is a schematic diagram of the pixel circuit structure of the image sensor of the present application.

[0026] Figure 5 It is a partial top view structural diagram of the cooperation between the interconnection structure layer and the pixel area of ​​the second embodiment of the present application.

[0027] Figure 6 It is a partial top view structural diagram of the cooperation between the interconnection structure layer and the pixel area of ​​the third embodiment of the present application. DETAILED DESCRIPTION

[0028] The following is an explanation of the implementation of the present application by means of specific embodiments. People familiar with the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.

[0029] In the following description, reference is made to the accompanying drawings, which describe several embodiments of the present application. It should be understood that other embodiments may also be used, and mechanical composition, structural, electrical and operational changes may be made without departing from the spirit and scope of the present application. The following detailed description should not be considered restrictive, and the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0030] Although the terms first, second, etc. are used herein to describe various elements in some instances, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0031] Furthermore, as used in this article, the singular forms "one", "an" and "the" are intended to include plural forms as well, unless there is an indication to the contrary in the context. It should be further understood that the terms "comprise", "include" indicate the presence of features, steps, operations, elements, components, projects, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, steps, operations, elements, components, projects, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Therefore, "A, B or C" or "A, B and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B and C". Only when the combination of elements, functions, steps or operations is inherently mutually exclusive in some way, will there be an exception to this definition.

[0032] First embodiment

[0033] Figure 1 is a schematic diagram of a partial cross-sectional structure of an image sensor according to the first embodiment of the present application, Figure 2 is a partial top view of the interconnection structure layer of the first embodiment of the present application, Figure 3 is a schematic diagram of a partial cross-sectional structure of the interconnection structure layer and the pixel area in the first embodiment of the present application. Figure 1 , Figure 2 and Figure 3 As shown, the image sensor includes:

[0034] A semiconductor substrate 11, wherein an isolation structure 112 is formed in the semiconductor substrate 11, and the isolation structure 112 separates the semiconductor substrate 11 into a plurality of pixel regions 101;

[0035] The interconnection structure layer 12 is arranged on the light-emitting side of the semiconductor substrate 11. The interconnection structure layer 12 includes at least two conductive circuit layers 121. Each conductive circuit layer 121 is arranged corresponding to the isolation structure 112. The conductive circuit layer 121 forms a plurality of light-transmitting areas 102 corresponding to each pixel area 101 between the projections of the semiconductor substrate 11. For example, each light-transmitting area 102 formed by the conductive circuit layer 121 is arranged in one-to-one correspondence with each pixel area 101. The image sensor of this embodiment is a BSI sensor.

[0036] When external light passes through the pixel area 101 and is emitted to the interconnection structure layer 12 of the image sensor of the present application, the light can pass through the interconnection structure layer 12 from the light-transmitting area 102. Since the light passes through the light-transmitting area 102, the interconnection structure layer 12 will not reflect this part of the light back to the pixel area 101 of the semiconductor substrate 11, thereby avoiding the problem of photosensitive crosstalk between the pixel areas 101, reducing the MTF value, and helping to improve the imaging quality.

[0037] Optionally, the semiconductor substrate 11 includes a silicon material doped with a p-type dopant such as boron, or includes silicon doped with an n-type dopant such as phosphorus or arsenic, or includes other elemental semiconductors such as germanium. Specifically, the semiconductor substrate 11 can be a structure composed of a single layer of material, including but not limited to a silicon substrate, and its material can be single crystal silicon, single crystal germanium, polycrystalline silicon, amorphous silicon, or a silicon germanium compound, etc. Of course, the semiconductor substrate 10 can also be silicon on insulator SOI, etc. In addition, the semiconductor substrate 10 can also have an N-type doped or P-type doped region to meet actual needs.

[0038] Among them, the semiconductor substrate as the substrate of the image sensor can also be a multi-layer structure, such as including a semiconductor substrate and an epitaxial layer formed on the surface of the semiconductor substrate. In this case, the epitaxial layer is used as a device functional layer to realize the preparation of the image sensor device. In addition, in other embodiments, the semiconductor substrate can be any structure used to prepare the image sensor functional area in the field of image sensors, and the semiconductor substrate can be used to prepare the photosensitive element of the CMOS image sensor, each transistor, and perform interconnection wiring.

[0039] In one example, the device functional layer may be a part of the semiconductor substrate, for example, it may be a P-type epitaxial layer (EPI) formed on a semiconductor substrate (such as a silicon substrate), and the epitaxial layer may be directly formed by an epitaxial process, or may be formed by other methods of existing processes. In this case, the semiconductor substrate and the epitaxial layer constitute the semiconductor substrate 11, and the epitaxial layer serves as the device functional layer. In one implementation, each functional region (including semiconductor devices) in the image sensor is prepared in the device functional layer. In other examples, the semiconductor substrate 11 as a whole may be considered to be a device functional layer of the first doping type, in which case the functional region in the image sensor may be prepared in the semiconductor substrate 11. Of course, if necessary, the structure required for the image sensor may also be prepared in the semiconductor substrate or other material layers. A back-illuminated image sensor may be prepared based on the semiconductor substrate and the device functional layer.

[0040] Optionally, the top of the isolation structure 112 is flush with the upper surface of the semiconductor substrate 11 , and the bottom of the isolation structure 112 extends to the lower surface of the semiconductor substrate 11 .

[0041] Optionally, the isolation structure 112 may be a groove etched on the upper surface and / or lower surface of the semiconductor substrate 11 and the groove is filled with a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, fluorine-doped silicate glass (FSG), a low-k dielectric material (e.g., a material with a k value less than 3.9) and / or a suitable insulating material. The isolation structure 112 may include a corresponding front shallow trench isolation structure 112 (STI) and / or a back deep trench isolation structure 112 (BDTI). In other embodiments, the isolation structure 112 may also be an ion implantation isolation region formed on the front side (e.g., for an N-type doped photosensitive unit, a P-type doped isolation structure 112 is provided). Of course, the isolation structure 112 may also include both an ion implantation isolation region formed on the front side and a front shallow trench isolation structure and / or a back deep trench isolation structure.

[0042] Specifically, the interconnection structure layer 12 includes at least two conductive circuit layers 121, and the light-transmitting region 102 spans at least two conductive circuit layers 121 in a direction perpendicular to the surface of the semiconductor substrate 11. For example, the light-transmitting region 102 spans each conductive circuit layer in a direction perpendicular to the semiconductor substrate. Further, the light-transmitting region 102 runs through the interconnection structure layer, which is conducive to efficiently receiving light passing through the semiconductor substrate 11.

[0043] Optionally, the at least two conductive circuit layers 121 include a first conductive circuit layer 121 a and a second conductive circuit layer 121 b, the first conductive circuit layer 121 a includes a plurality of first circuits 1211 extending along a first direction X, and the plurality of first circuits 1211 are arranged at intervals along a second direction Y, the second conductive circuit layer 121 b includes a plurality of second circuits 1212 extending along a second direction Y, and the plurality of second circuits 1212 are arranged at intervals along the first direction X, and a clamp is provided between the first direction X and the second direction Y, for example, the first direction X and the second direction Y can be arranged vertically, and each first circuit 1211 and each second circuit 1212 are projected on the semiconductor substrate and arranged corresponding to the isolation structure 112, such as being arranged directly opposite to each other.

[0044] It should be noted that the extension along the first direction X here is not limited to the overall extension of the entire conductive line (such as the first line 1211). It can be that a conductive line includes multiple line blocks, and each line block is arranged along the first direction X. It can also be that for a conductive line, multiple line blocks are arranged in multiple columns, and each column of line blocks is arranged along the first direction X. According to the existing image sensor design, the interconnection and electrical lead-out of each pixel circuit transistor can be realized based on the conductive line. Similarly, the extension along the second direction Y is also understood in the same way. In addition, the projections of each first circuit 1211 and each second circuit 1212 on the semiconductor substrate are arranged corresponding to the isolation structure 112. It can be understood that the isolation structure 112 defines a plurality of pixel areas 101, and each first circuit 1211 and each second circuit 1212 define a light-transmitting area 102. The light-transmitting area 102 at least overlaps with the pixel area 101, such as the centers of the two are relative, so as to achieve the effect of the present application, and is not strictly limited to the projections of each first circuit 1211 and each second circuit 1212 on the surface of the semiconductor substrate falling within the projection range of the isolation structure 112 on the surface of the semiconductor substrate.

[0045] Alternatively, if Figure 2 and Figure 3 As shown, at least two conductive circuit layers 121 include a first conductive circuit layer 121a and a second conductive circuit layer 121b. The second conductive circuit layer 121b shown in the figure includes two columns of circuit blocks. Further, it can also include a third conductive circuit layer located between the second conductive circuit layer 121b and the semiconductor substrate 11, wherein the first conductive circuit layer 121a and the third conductive circuit layer are arranged in different layers along the light incident direction of the image sensor, and the second conductive circuit layer 121b is located between the two layers.

[0046] Optionally, two adjacent conductive circuit layers 121 are separated by a dielectric layer. The interconnection structure layer 12 includes at least two conductive circuit layers 121. The dielectric layer includes but is not limited to silicon oxide. Of course, it can be other dielectric layer materials used in the interconnection structure layer of the image sensor.

[0047] Optionally, the material of the conductive circuit layer 121 is titanium, tungsten, aluminum or copper, but not limited thereto. The interconnection structure layer 12 is provided with an interconnection circuit electrically connected to each pixel region 101, and the electrical interconnection and lead-out of the device are realized based on the conductive circuit layer 121; the interconnection structure layer 12 may undergo multiple photolithography, etching, deposition and planarization operations. Of course, the position of the interconnection structure layer 12 may also be set according to actual needs.

[0048] Optionally, the light-transmitting area 102 is arranged corresponding to the pixel area 101, and further, the light-transmitting area 102 is arranged in a one-to-one correspondence with the pixel area 101. In one implementation, the center of the light-transmitting area 102 coincides with the center of the photosensitive portion (such as the N-type doping region of the photodiode) in the pixel area 101. In addition, the light-transmitting area 102 can be automatically formed based on the dielectric layer of the interconnection structure layer 102, simplifying the process. Of course, in other embodiments, the layer of additional material can be further replaced in the light-transmitting area, which can further facilitate the extraction of light entering the light-transmitting area from the light-incident side, and can also absorb this part of the light.

[0049] Optionally, each layer of the conductive circuit layer 121 has a light-transmitting opening corresponding to the light-transmitting area 102. For a light-transmitting area 102, the light-transmitting openings corresponding to each layer of the conductive circuit layer 121 tend to decrease in the direction away from the semiconductor substrate 11, that is, the size of the light-transmitting openings of each layer can be gradually reduced, or the size of the light-transmitting openings in two adjacent layers can be equal. It should be noted that the size of the light-transmitting opening here can be defined by the distance between two points on the edge of the light-transmitting opening. It is conducive to wiring design and crosstalk relief. In the present application, under the condition of satisfying the wiring of the conductive circuit layer 121, the opening size of the light-transmitting area 102 is as large as possible to receive as much light as possible. Further, in the implementation method of this example, under the condition of satisfying the wiring of the conductive circuit layer 121, the size of the light-transmitting openings of each layer tends to decrease. Under the condition of the same wiring requirements, the wiring close to the semiconductor substrate side can be reduced, and the MTF improvement effect can be further improved.

[0050] Optionally, the isolation structure 112 includes a plurality of first isolation parts extending along the first direction X and a plurality of second isolation parts extending along the second direction Y, the plurality of first isolation parts are arranged at intervals along the second direction Y, the plurality of second isolation parts are arranged at intervals along the first direction X, each first isolation part is arranged crosswise with each second isolation part, each first isolation part is arranged corresponding to at least one first line 1211, and each second isolation part is arranged corresponding to at least one second line 1212. In this embodiment, the plurality of first isolation parts are crosswise connected with the plurality of second isolation parts, and the semiconductor substrate is divided into a plurality of pixel regions 101 arranged in a matrix.

[0051] Alternatively, if Figure 1As shown, the image sensor further includes a lens array 14, which is disposed on the light incident side of the semiconductor substrate, and includes a plurality of lens units 141 disposed corresponding to each pixel region 101. In this embodiment, the lens unit 141 is a convex lens for converging light.

[0052] Alternatively, if Figure 1 As shown, the image sensor further includes a color filter 15, which is disposed between the lens array 14 and the semiconductor substrate, and includes a plurality of color filter units 151 disposed corresponding to each pixel region 101. In this embodiment, the color filter 15 includes a plurality of red color filter units R, a plurality of green color filter units G, and a plurality of blue color filter units B, such as a red color filter unit R, two green color filter units G, and one blue color filter unit B disposed adjacent to each other, forming a pixel unit.

[0053] Optionally, the interconnection structure layer 12 is disposed on a side of the semiconductor substrate 11 away from the lens array 14 .

[0054] Optionally, Figure 4 is a schematic diagram of the pixel circuit structure of the image sensor of the present application, such as Figure 4 As shown, each pixel region 101 includes a photosensitive portion PD, a transfer transistor TX, a floating diffusion region FD, a reset transistor RST, and a source follower transistor SF. The photosensitive portion PD is used to convert a light signal containing image information into an electrical signal during exposure; the transfer transistor TX connects the photosensitive portion PD and the floating diffusion region FD, and is used to transfer the electrical signal of the photosensitive portion PD to the floating diffusion region FD; the source follower transistor SF is used to output the electrical signal of the floating diffusion region FD; and the reset transistor RST is used to reset the floating diffusion region FD. The semiconductor substrate 11 is doped, such as plasma implantation, so that the photosensitive portion PD, the floating diffusion region FD, the transfer transistor TX, the source follower transistor SF, the reset transistor RST, and the source and drain of the selection transistor RS are formed in the semiconductor substrate 11.

[0055] Alternatively, if Figure 4 As shown, each pixel region 101 further includes a selection transistor RS, and the selection transistor RS is used to select and output the electrical signal output by the source follower transistor SF to a column line (Pixel out).

[0056] Second embodiment

[0057] Figure 5 is a partial top view of the structure of the interconnection structure layer and the pixel area in the second embodiment of the present application. Figure 5As shown, the image sensor of this embodiment has a substantially similar structure to the image sensor of the first embodiment, except that the image sensor of this embodiment further includes a light absorbing layer 13, which is disposed on the side of the interconnection structure layer 12 away from the semiconductor substrate, and the light absorbing layer 13 overlaps with each light-transmitting area 102, for example, the light absorbing layer 13 covers each light-transmitting area 102, and the light absorbing layer 13 is used to absorb the light passing through the light-transmitting area 102. When the light passes through the interconnection structure layer 12 from the light-transmitting area 102, the light is absorbed by the light absorbing layer 13, which can further reduce the reflected light from affecting each pixel area 101. Among them, the material of the light absorbing layer 13 can achieve the absorption of the corresponding light, and can be selected according to the actual light absorption requirements, including but not limited to light-absorbing metals, for example, W or TiN, etc. In the present application, it is equivalent to arranging the light absorbing layer 13 on the outside of the chip, which can reduce the influence of the interface reflected light of the surrounding structure. For example, based on the light absorbing layer 13, the influence of the interface reflection in the packaging structure on the imaging of the image area can be reduced, that is, the present application can block the influence of other surrounding structures in addition to absorbing the excess light of the light-transmitting area 102.

[0058] Optionally, the image sensor includes a first chip (such as a pixel circuit chip) and a second chip (such as a logic chip) that are stacked. In this implementation, the image sensor is a stack structure, the first chip includes a semiconductor substrate 11 and a corresponding interconnection structure layer 12, and the second chip includes a bonding layer, wherein the bonding layer and the interconnection structure layer 12 are arranged relative to each other, that is, the two are close to each other to achieve the combination of the two chips, and the bonding layer and the interconnection structure layer 12 form a bonding interface, wherein the combination of the two chips can adopt an existing method, and the bonding method and structural material of the bonding layer can adopt existing designs, for example, the bonding layer includes a structure consisting of an electrical connection layer and a dielectric layer corresponding to the second chip.

[0059] Among them, in this implementation, the light absorbing layer 13 is arranged in the interconnection structure layer 12 of the first chip and / or the light absorbing layer 13 is arranged in the bonding layer of the second chip and is located on the side of the bonding layer close to the first chip. In other words, the light absorbing layer 13 can be completed during the preparation of the first chip, or can be completed during the preparation of the second chip. Of course, it can also be arranged in the two chips separately, so that the light absorbing layer 13 in the stacked structure finally formed corresponds to the pixel area arrangement in the first chip to achieve light absorption. The specific arrangement of the light absorbing layer 13 can be designed according to actual needs, and does not affect the bonding and electrical connection of the two chips.

[0060] Optionally, when there is a light absorbing layer 13 in the interconnection structure layer 12, there is a gap between the side of the light absorbing layer 13 close to the bonding interface of the two chips and the bonding interface; for example, there is a last layer of wire circuit connection layer and a penultimate conductive circuit connection layer in the interconnection structure layer 12, and the bonding of the first chip and the second chip is realized based on the last layer of wire circuit connection layer, then the light absorbing layer 13 can be arranged between the last layer of wire circuit connection layer and the penultimate conductive circuit connection layer or arranged in the same layer corresponding to the penultimate conductive circuit connection layer. Similarly, when there is a light absorbing layer 13 in the bonding layer, there is a gap between the side of the light absorbing layer 13 close to the bonding interface of the two chips and the bonding interface, wherein the bonding layer of the second chip contains bonding metal to realize the bonding of the two chips, the bonding surface of the bonding metal is flush with the bonding interface, and there is a gap between the side of the light absorbing layer 13 close to the bonding interface and the bonding interface.

[0061] Optionally, the light absorbing layer 13 includes a plurality of light absorbing portions 131 made of light absorbing material, and each light absorbing portion 131 is disposed in one-to-one correspondence with each light-transmitting region 102 .

[0062] Third embodiment

[0063] Figure 6 is a partial top view of the structure of the interconnection structure layer and the pixel area in the third embodiment of the present application. Figure 6 As shown, the image sensor of this embodiment has a substantially similar structure to the image sensor of the second embodiment, except that the structure of the light absorption layer 13 of this embodiment is different. In this embodiment, the light absorption layer 13 includes a plurality of light absorbing grating structures 132, and each grating structure 132 is arranged in one-to-one correspondence with each light-transmitting region 102. The spacing of the corresponding grating structures can be designed and the materials of the corresponding grating structures can be selected according to the wavelength of light to achieve absorption of light of the corresponding wavelength, such as absorption of red light with a longer wavelength.

[0064] Fourth embodiment

[0065] The utility model also provides an electronic device, including an image sensor as described in any one of the above schemes. The electronic device can be security monitoring, vehicle-mounted electronics, mobile phone cameras, machine vision, etc. The image sensor based on the utility model can obtain high-quality image information and can also be used for infrared utilization equipment.

[0066] The above embodiments are merely illustrative of the principles and effects of the present application and are not intended to limit the present application. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed in the present application shall still be covered by the claims of the present application.

Claims

1. An image sensor, characterized in that: include: A semiconductor substrate, wherein an isolation structure is formed in the semiconductor substrate, and the isolation structure separates the semiconductor substrate into a plurality of pixel regions; The interconnection structure layer is arranged on the light-emitting side of the semiconductor substrate, and includes at least two conductive circuit layers, each of which is arranged corresponding to the isolation structure, and each of which forms a plurality of light-transmitting areas corresponding to each of the pixel areas between the projections of the semiconductor substrate.

2. The image sensor according to claim 1, wherein: At least two layers of the conductive circuit layer include a first conductive circuit layer and a second conductive circuit layer, the first conductive circuit layer includes a plurality of first circuits extending along a first direction, and the plurality of first circuits are arranged at intervals along a second direction, the second conductive circuit layer includes a plurality of second circuits extending along the second direction, and the plurality of second circuits are arranged at intervals along the first direction, a clamp is provided between the first direction and the second direction, and the projections of the first circuits and the second circuits on the semiconductor substrate correspond to the isolation structure.

3. The image sensor according to claim 2, wherein: The isolation structure includes a plurality of first isolation portions extending along the first direction and a plurality of second isolation portions extending along the second direction, the plurality of first isolation portions are arranged at intervals along the second direction, the plurality of second isolation portions are arranged at intervals along the first direction, each of the first isolation portions is arranged crosswise with each of the second isolation portions, each of the first isolation portions is arranged corresponding to at least one of the first lines, and each of the second isolation portions is arranged corresponding to at least one of the second lines.

4. The image sensor according to claim 1, wherein: The light-transmitting areas are arranged in a one-to-one correspondence with the pixel areas; and / or the center of the light-transmitting areas coincides with the center of the photosensitive portion in the pixel areas; and / or each layer of the conductive circuit layer has a light-transmitting opening corresponding to the light-transmitting areas, and the light-transmitting openings corresponding to each layer tend to decrease in a direction away from the semiconductor substrate.

5. The image sensor according to claim 1, wherein: The image sensor further includes a lens array, which is arranged on the light incident side of the semiconductor substrate, and the lens array includes a plurality of lens units arranged corresponding to each of the pixel areas; and / or the image sensor further includes a color filter, which is arranged on the light incident side of the semiconductor substrate, and the color filter includes a plurality of color filter units arranged corresponding to each of the pixel areas.

6. The image sensor according to claim 1, wherein: Each of the pixel areas includes a photosensitive portion, a transfer transistor, a floating diffusion area, a reset transistor and a source follower transistor. The photosensitive portion is used to convert a light signal containing image information into an electrical signal during an exposure process; the transfer transistor connects the photosensitive portion and the floating diffusion area, and is used to transfer the electrical signal of the photosensitive portion to the floating diffusion area; the source follower transistor is used to output the electrical signal of the floating diffusion area; and the reset transistor is used to reset the floating diffusion area.

7. The image sensor according to claim 6, wherein: Each of the pixel regions further includes a selection transistor, and the selection transistor is used to select and output the electrical signal output by the source follower transistor to a column line.

8. The image sensor according to any one of claims 1 to 7, characterized in that: The image sensor further comprises a light absorbing layer, which is arranged on a side of the interconnection structure layer away from the semiconductor substrate, the light absorbing layer covers each of the light-transmitting regions, and is used for absorbing light passing through the light-transmitting regions.

9. The image sensor according to claim 8, wherein: The light absorbing layer comprises a plurality of light absorbing parts made of light absorbing material, and each of the light absorbing parts is arranged in one-to-one correspondence with each of the light transmitting areas.

10. The image sensor according to claim 8, wherein: The light absorbing layer includes a plurality of light absorbing grating structures, and each of the grating structures is arranged in one-to-one correspondence with each of the light-transmitting regions.

11. The image sensor according to claim 8, wherein: The image sensor comprises a first chip and a second chip which are stacked, wherein the first chip comprises the semiconductor substrate, and the second chip comprises a bonding layer, wherein the bonding layer is arranged opposite to the interconnection structure layer, wherein the light absorption layer is arranged in the interconnection structure layer of the first chip and / or the light absorption layer is arranged in the bonding layer of the second chip and is located on a side of the bonding layer close to the first chip.

12. The image sensor according to claim 11, wherein: When the light absorbing layer exists in the interconnect structure layer, there is a distance between the side of the light absorbing layer close to the bonding interface of the two chips and the bonding interface; and / or, when the light absorbing layer exists in the bonding layer, there is a distance between the side of the light absorbing layer close to the bonding interface of the two chips and the bonding interface.

13. An electronic device, characterized in that: The electronic device comprises the image sensor as claimed in any one of claims 1-12.

Images