Display control system and LED display device

Abstract

The utility model discloses a display control system and an LED display device, which are applied to the technical field of LED display. According to the display control system, the input end of an LVDS differential sending circuit is connected with a signal sending end; the input end of the HUB circuit is connected with the output end of the LVDS differential transmission circuit; the input end of the high-voltage power circuit is connected with the power end; and the input end of the LVDS differential receiving circuit is connected with the output end of the HUB circuit. The LVDS differential sending circuit directly converts a signal to be transmitted into a high-bandwidth high-integration LVDS differential signal, then the high-bandwidth high-integration LVDS differential signal is processed by the HUB circuit and then outputs a target differential signal, the high-voltage power supply circuit supplies power to the high-bandwidth high-integration LVDS differential signal, the differential signal and the high voltage can be stably output at a long distance or above, and therefore it is guaranteed that when a display control system is used outdoors, the display control system is not prone to being damaged. The system power supply control box can be installed indoors, so that the safe and reliable operation of the system power supply control box is improved, and the convenience of device maintenance is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of LED display, in particular to a display control system and an LED display device. Background Art

[0002] In recent years, in order to ensure stable communication and normal display of a conventional LED (Light Emitting Diode) display screen, a system power control box usually supplies power and transmits signals to the LED display screen within a range of two meters. The reason is that when the transmission distance between the power control box and the module exceeds 2m, problems such as signal attenuation, phase shift, and mutual crosstalk between signal lines will occur, causing electromagnetic interference and affecting the stability of signal transmission.

[0003] Therefore, due to the transmission distance, the LED display screen and the system power control box can only be used in the same scenario. However, the usage scenarios of LED display screens are relatively extensive, and most of them are outdoors. The outdoor environmental conditions are relatively harsh, and there is an inevitable risk of water ingress in the system power control box. Overall, the reliability is low, faults are likely to occur, and the safety of outdoor maintenance is relatively low.

[0004] In view of the above technology, it is an urgent problem for those skilled in the art to seek a display control system. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a display control system and an electronic device. When using the display control system, the distance of data transmission from the system power control box to the display control system can be increased, so as to ensure that when the display control system is used outdoors, the system power control box can be installed indoors, improve the safe and reliable operation of the system power control box, and improve the convenience of device maintenance.

[0006] To solve the above technical problems, the utility model provides a display control system, including: a system power control box and an LED display module;

[0007] Among them, the system power control box includes: an LVDS differential sending circuit for converting a signal to be transmitted into an LVDS differential signal, the input end of the LVDS differential sending circuit is connected to the signal sending end; a HUB circuit for converting the LVDS differential signal into a target differential signal, the input end of the HUB circuit is connected to the output end of the LVDS differential sending circuit; a high-voltage power supply circuit for supplying power to the LED display module, the input end of the high-voltage power supply circuit is connected to the power supply end;

[0008] The LED display module includes: an LVDS differential receiving circuit for receiving the target differential signal and converting the target differential signal into a control signal, the input end of the LVDS differential receiving circuit is connected to the output end of the HUB circuit.

[0009] Preferably, the LVDS differential transmission circuit includes: a first diode array chip, a second diode array chip, and a first input terminal;

[0010] Among them, the first group of pins of the first diode array chip is connected to the second group of pins of the first diode array chip, the first group of pins of the first input terminal, and the first end of the HUB circuit. The third group of pins of the first diode array chip is connected to the fourth group of pins of the first diode array chip, the second group of pins of the first input terminal, and the second end of the HUB circuit;

[0011] The first group of pins of the second diode array chip is connected to the second group of pins of the second diode array chip, the third group of pins of the first input terminal, and the third end of the HUB circuit;

[0012] Among them, the first group of pins, the second group of pins, the third group of pins, and the fourth group of pins of the first diode array chip, the first group of pins, the second group of pins of the second diode array chip, and the first group of pins, the second group of pins, and the third group of pins of the first input terminal together serve as the output terminals of the LVDS differential transmission circuit; The first end, the second end, and the third end of the HUB circuit together serve as the input terminals of the HUB circuit.

[0013] Preferably, the HUB circuit includes: a differential chip, a second input terminal, a third input terminal, an indicator light circuit, and a test button;

[0014] Among them, the first group of pins of the differential chip serves as the first end of the HUB circuit and is connected to the first group of pins of the first diode array chip, the second group of pins of the first diode array chip, and the first group of pins of the first input terminal; The second group of pins of the differential chip serves as the second end of the HUB circuit and is connected to the third group of pins of the first diode array chip, the fourth group of pins of the first diode array chip, and the second group of pins of the first input terminal; The third group of pins of the differential chip serves as the third end of the HUB circuit and is connected to the first group of pins of the second diode array chip, the second group of pins of the second diode array chip, and the third group of pins of the first input terminal;

[0015] The fourth group of pins of the differential chip is connected to the first group of pins of the second input terminal, and the fifth group of pins of the differential chip is connected to the second group of pins of the second input terminal;

[0016] The sixth group of pins of the differential chip is connected to the first group of pins of the third input terminal, and the seventh group of pins of the differential chip is connected to the second group of pins of the third input terminal;

[0017] The button pin of the differential chip is connected to the first end of the indicator light circuit and the first end of the test button, and the LED pin of the differential chip is connected to the second end of the indicator light circuit; The second end of the test button is grounded;

[0018] The eighth group of pins of the differential chip is connected to the input end of the LVDS differential receiving circuit as the output end of the HUB circuit.

[0019] Preferably, the high-voltage power supply circuit includes: a fourth input terminal and a power supply circuit; wherein, the power supply circuit includes a switching regulator chip and a power supply circuit;

[0020] Wherein, the socket of the fourth input terminal is connected to the power supply end as the input end of the high-voltage power supply circuit, the first group of pins of the fourth input terminal is connected to the input pins of the switching regulator chip, and the second group of pins of the fourth input terminal is grounded;

[0021] The output pin of the switching regulator chip is connected to the input end of the power supply circuit;

[0022] The output end of the power supply circuit is used as the output end of the high-voltage power supply circuit.

[0023] Preferably, the LVDS differential receiving circuit includes: a high-speed interface chip, a first signal enhancement circuit, and a second signal enhancement circuit;

[0024] The first group of pins of the high-speed interface chip is connected to the output end of the HUB circuit as the input end of the LVDS differential receiving circuit; the second group of pins of the high-speed interface chip is connected to the input end of the first signal enhancement circuit; the third group of pins of the high-speed interface chip is connected to the first end of the second signal enhancement circuit.

[0025] Preferably, the LED display module further includes:

[0026] A bus drive circuit for receiving a control signal and performing drive amplification processing on the control signal, and the input end of the bus drive circuit is connected to the output end of the HUB circuit;

[0027] An LED module control circuit for receiving the control signal after drive amplification and displaying the data corresponding to the control signal, and the input end of the LED module control circuit is connected to the output end of the bus drive circuit;

[0028] A first-level step-down circuit for receiving the power supplied by the high-voltage power supply circuit and supplying power to the LVDS differential receiving circuit, the bus drive circuit, and the LED module control circuit. The input end of the first-level step-down circuit is connected to the output end of the high-voltage power supply circuit, and the output end of the first-level step-down circuit is connected to the power supply end of the bus drive circuit and the power supply end of the LED module control circuit;

[0029] A second-level step-down circuit for receiving the power supplied by the first-level step-down circuit and supplying power to the LVDS differential receiving circuit. The input end of the second-level step-down circuit is connected to the output end of the first-level step-down circuit, and the output end of the second-level step-down circuit is connected to the power supply end of the LVDS differential receiving circuit.

[0030] Preferably, the first - stage step - down circuit includes: a step - down chip, a first RC filter circuit, a second RC filter circuit, a third RC filter circuit, and a MOS - transistor circuit;

[0031] The first set of pins of the step - down chip is connected to the first end of the first RC filter circuit; the second set of pins of the step - down chip is connected to the first end of the second RC filter circuit; the third set of pins of the step - down chip is connected to the first end of the MOS - transistor circuit; the fourth set of pins of the step - down chip is connected to the first input end of the third RC filter circuit;

[0032] The second end of the first RC filter circuit serves as the input end of the first - stage step - down circuit and is connected to the output end of the high - voltage power supply circuit;

[0033] The second end of the second RC filter circuit is grounded;

[0034] The second input end of the third RC filter circuit is connected to the output end of the MOS - transistor circuit, and the output end of the third RC filter circuit serves as the output end of the first - stage step - down circuit and is connected to the input end of the second - stage step - down circuit, the power - supply end of the bus driver circuit, and the power - supply end of the LED module control circuit.

[0035] Preferably, the bus driver circuit includes: a first bus transceiver chip and a second bus transceiver chip;

[0036] Among them, the first set of pins of the first bus transceiver chip is connected to the fourth set of pins of the high - speed interface chip; the second set of pins of the first bus transceiver chip is connected to the fifth set of pins of the high - speed interface chip; the third set of pins of the first bus transceiver chip is grounded; the power - supply pin of the first bus transceiver chip serves as the power - supply end of the bus driver circuit and is connected to the output end of the first - stage step - down circuit;

[0037] The first set of pins of the second bus transceiver chip is connected to the sixth set of pins of the high - speed interface chip, and the second set of pins of the second bus transceiver chip serves as the output end of the bus driver circuit and is connected to the input end of the LED module control circuit; the power - supply pin of the second bus transceiver chip serves as the power - supply end of the bus driver circuit and is connected to the output end of the first - stage step - down circuit;

[0038] The first set of pins of the first bus transceiver chip, the second set of pins of the first bus transceiver chip, and the first set of pins of the second bus transceiver chip together serve as the input end of the bus driver circuit.

[0039] Preferably, the second - stage step - down circuit includes: a voltage regulator chip and a voltage - stabilizing circuit;

[0040] Among them, the input pin of the voltage regulator chip is connected to the output end of the high-voltage power supply circuit as the input end of the secondary buck circuit, and the output pin of the voltage regulator chip is connected to the input end of the voltage regulation circuit;

[0041] The output end of the voltage regulation circuit is connected to the power supply end of the LVDS differential receiving circuit as the output end of the secondary buck circuit.

[0042] To solve the above technical problems, the present application also provides an LED display device, including the above display control system.

[0043] A display control system provided by the present utility model includes: a system power control box and an LED display module; among them, the system power control box includes: an LVDS differential transmission circuit for converting a signal to be transmitted into an LVDS differential signal, and the input end of the LVDS differential transmission circuit is connected to the signal transmission end; a HUB circuit for converting the LVDS differential signal into a target differential signal, and the input end of the HUB circuit is connected to the output end of the LVDS differential transmission circuit; a high-voltage power supply circuit for supplying power to the LED display module, and the input end of the high-voltage power supply circuit is connected to the power supply end; the LED display module includes: an LVDS differential receiving circuit for receiving the target differential signal and converting the target differential signal into a control signal, and the input end of the LVDS differential receiving circuit is connected to the output end of the HUB circuit. It can be seen that the display control system provided by the present application is composed of two parts: a system power control box and an LED display module. Among them, the LVDS differential transmission circuit directly converts the signal to be transmitted into a high-bandwidth and high-integration LVDS differential signal, and then outputs the target differential signal after being processed by the HUB circuit. Its differential signal can achieve stable output over a long distance and is sent to the LED display module. The LVDS differential receiving circuit in the LED display module converts the target differential signal into a control signal, and finally the data corresponding to the control signal is displayed on the display screen. Among them, it is powered by the high-voltage power supply circuit, and the signal high voltage can be transmitted over a long distance to the LED display module. In this way, when using the display control system outdoors, the system power control box can be installed indoors, thereby improving the safe and reliable operation of the system power control box and the convenience of device maintenance. Description of the Drawings

[0044] In order to more clearly illustrate the embodiments of the present utility model, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0045] Figure 1 It is a schematic diagram of a display control system provided by an embodiment of the present application;

[0046] Figure 2(a) is the first circuit diagram of the LVDS differential transmission circuit provided by the embodiment of the present application;

[0047] Figure 2(b) is the second circuit diagram of the LVDS differential transmission circuit provided by the embodiment of the present application;

[0048] Figure 2(c) is the third circuit diagram of the LVDS differential transmission circuit provided by the embodiment of the present application;

[0049] Figure 3(a) is the first circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0050] Figure 3(b) is the second circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0051] Figure 3(c) is the third circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0052] Figure 3(d) is the fourth circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0053] Figure 3(e) is the fifth circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0054] Figure 3(f) is the sixth circuit diagram of the HUB circuit provided by the embodiment of the present application;

[0055] Figure 4(a) is the first circuit diagram of the high-voltage power supply circuit provided by the embodiment of the present application;

[0056] Figure 4(b) is the second circuit diagram of the high-voltage power supply circuit provided by the embodiment of the present application;

[0057] Figure 5 is the circuit diagram of the LVDS differential receiving circuit provided by the embodiment of the present application;

[0058] Figure 6 is the complete schematic diagram of a display control system provided by the embodiment of the present application;

[0059] Figure 7 is the circuit diagram of the primary step-down circuit provided by the embodiment of the present application;

[0060] Figure 8(a) is the first circuit diagram of the bus driver circuit provided by the embodiment of the present application;

[0061] Figure 8(b) is the second circuit diagram of the bus driver circuit provided by the embodiment of the present application;

[0062] Figure 9 is the circuit diagram of the secondary step-down circuit provided by the embodiment of the present application;

[0063] Figure 10This is the circuit diagram of the LED module control circuit provided by the embodiments of the present application. Detailed implementation manners

[0064] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0065] The core of the present invention is to provide a display control system and an LED display device.

[0066] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0067] Figure 1 This is a schematic diagram of a display control system provided by the embodiments of the present application. As Figure 1 shown, it includes: a system power control box 1 and an LED display module 2;

[0068] Among them, the system power control box 1 includes: an LVDS differential sending circuit 11 for converting the signal to be transmitted into an LVDS differential signal (Low-Voltage Differential Signaling), the input end of the LVDS differential sending circuit 11 is connected to the signal sending end; a HUB circuit (hub circuit) 12 for converting the LVDS differential signal into a target differential signal, the input end of the HUB circuit 12 is connected to the output end of the LVDS differential sending circuit 11; a high-voltage power supply circuit 13 for supplying power to the LED display module, the input end of the high-voltage power supply circuit 13 is connected to the power supply end;

[0069] The LED display module 2 includes: an LVDS differential receiving circuit 21 for receiving the target differential signal and converting the target differential signal into a control signal, the input end of the LVDS differential receiving circuit 21 is connected to the output end 12 of the HUB circuit.

[0070] In a specific embodiment, the display control system provided by the present application includes two parts: a system power control box 1 and an LED display module 2. Among them, the LVDS differential transmission circuit 11 in the system power control box 1 converts the signal to be transmitted into an output high-bandwidth and high-integration LVDS differential signal under program processing and outputs it. The LVDS differential signal includes: 12 groups of RGB data signals (red, green, and blue data signals of the column scanning circuit), 5 decoding signals (A: address signal of the row scanning circuit; B: serial clock signal; C: data signal; D: enable control signal; E: address signal of the row scanning circuit), and 3 clock instruction signals (data clock signal of the column scanning circuit: DCLK; display clock of the column scanning circuit: GCLK; data and instruction latch signal of the column scanning circuit: LAT). The LVDS differential signal is driven and processed by the HUB circuit 12 to output a target differential signal. Among them, the target differential signal includes three pairs of (TX\RX\GCLK) differential signals, and stable transmission over a length of more than 70 meters can be achieved with these three pairs of differential signals. When the target differential signal is output to the LED display module 2, the interface conversion chip in the LVDS differential receiving circuit 21 converts the three pairs of (TX\RX\GCLK) differential signals into control signals (signals in the form of TTL / COMS. Among them, the signals in the form of TTL / COMS respectively correspond to 12 RGB data signals, 5 decoding signals (ABCDE), and 3 clock instruction signals DCLK, GCLK, LAT, and finally the data corresponding to the display control signal is displayed on the display screen. Among them, the high-voltage power supply circuit 13 of the system power control box 1 generally outputs a DC24-48V voltage, and can transmit the high-voltage power over a long distance to the LED display module to supply power to it.

[0071] Among them, it should be noted that the present application does not limit the specific structures of the LVDS differential transmission circuit, the HUB circuit, the high-voltage power supply circuit, and the LVDS differential receiving circuit. While meeting the above functions, they can be set by the user according to their needs.

[0072] A display control system provided by the utility model includes: a system power control box and an LED display module; wherein, the system power control box includes: an LVDS differential sending circuit for converting a signal to be transmitted into an LVDS differential signal, the input end of the LVDS differential sending circuit is connected to the signal sending end; a HUB circuit for converting the LVDS differential signal into a target differential signal, the input end of the HUB circuit is connected to the output end of the LVDS differential sending circuit; a high-voltage power supply circuit for supplying power to the LED display module, the input end of the high-voltage power supply circuit is connected to the power supply end; the LED display module includes: an LVDS differential receiving circuit for receiving the target differential signal and converting the target differential signal into a control signal, the input end of the LVDS differential receiving circuit is connected to the output end of the HUB circuit. It can be seen that the display control system provided by this application consists of two parts: a system power control box and an LED display module. Among them, the LVDS differential sending circuit directly converts the signal to be transmitted into a high-bandwidth and highly integrated LVDS differential signal, and then outputs the target differential signal after being processed by the HUB circuit. Its differential signal can achieve stable output over a long distance and is sent to the LED display module. The LVDS differential receiving circuit in the LED display module converts the target differential signal into a control signal, and finally the data corresponding to the control signal is displayed on the display screen. Among them, it is powered by the high-voltage power supply circuit, and the signal high voltage can be transmitted over a long distance to the LED display module. In this way, when using the display control system outdoors, the system power control box can be installed indoors, thereby improving the safe and reliable operation of the system power control box and the convenience of device maintenance.

[0073] On the basis of the above embodiment, as a preferred embodiment, as shown in FIGS. 2(a), 2(b) and 2(c), the LVDS differential sending circuit 11 includes: a first diode array chip T1, a second diode array chip T2 and a first input terminal J4;

[0074] Wherein, as shown in the figure, the first group of pins (pins 1 and 2) of the first diode array chip T1 are connected to the second group of pins (pins 10 and 9) of the first diode array chip T1, the first group of pins (pins 1 and 2) of the first input terminal J4, and the first end of the HUB circuit 12. The third group of pins (pins 4 and 5) of the first diode array chip T1 are connected to the fourth group of pins (pins 7 and 6) of the first diode array chip T1, the second group of pins (pins 3 and 4) of the first input terminal J4, and the second end of the HUB circuit. In addition, pins 3 and 8 of the first diode array chip T1 are grounded.

[0075] The first group of pins (pin 1 and pin 2) of the second diode array chip T2 are connected to the second group of pins (pin 10 and pin 9) of the second diode array chip T2, and the third group of pins (pin 5 and pin 6) of the first input terminal J4 are connected to the third terminal of the HUB circuit; in addition, pin 3 and pin 8 of the second diode array chip T2 are grounded, pin 4 - pin 7 of the second diode array chip T2 are empty pins, and pin 7 - pin 10 of the first input terminal J4 are grounded.

[0076] Among them, the first group of pins, the second group of pins, the third group of pins, and the fourth group of pins of the first diode array chip T1, the first group of pins and the second group of pins of the second diode array chip T2, and the first group of pins, the second group of pins, and the third group of pins of the first input terminal together serve as the output terminals of the LVDS differential transmission circuit; the first terminal, the second terminal, and the third terminal of the HUB circuit together serve as the input terminals of the HUB circuit.

[0077] It should be noted that the LVDS differential transmission circuit provided in this application is only a part of the circuit that realizes the output of LVDS differential signals in the circuit, and the specific circuit can be set by the user according to needs.

[0078] As a preference, the models of the first diode array chip T1 and the second diode array chip T2 are RCLAMP0524, the model of the first input terminal J4 is HEAD2X5-DIP-2.0-90, and the main chip of the entire LVDS differential transmission circuit is an FPGA chip.

[0079] This application provides a specific circuit of an LVDS differential transmission circuit. Under this circuit structure, the signal to be transmitted can be converted into an output high-bandwidth and high-integration LVDS differential signal through program processing, realizing the long-distance and stable transmission of the signal.

[0080] On the basis of the above embodiments, as a preferred embodiment, as shown in FIGS. 3(a), 3(b), 3(c), 3(d), 3(e), and 3(f), the HUB circuit 12 includes: a differential chip JH1 (A\B), a second input terminal J2, a third input terminal J3, an indicator circuit J8, and a test button K1;

[0081] Among them, the first group of pins (pin 180 and pin 178) of the differential chip JH1 is used as the first end of the HUB circuit 12 and is connected to the first group of pins (pin 1 and pin 2), the second group of pins (pin 10 and pin 9) of the first diode array chip T1, and the first group of pins (pin 1 and pin 2) of the first input terminal J4; the second group of pins (pin 175 and pin 173) of the differential chip JH1 is used as the second end of the HUB circuit 12 and is connected to the third group of pins (pin 4 and pin 5), the fourth group of pins (pin 7 and pin 6) of the first diode array chip T1, and the second group of pins (pin 3 and pin 4) of the first input terminal J4; the third group of pins (pin 33 and pin 31) of the differential chip JH1 is used as the third end of the HUB circuit 12 and is connected to the first group of pins (pin 1 and pin 2), the second group of pins (pin 10 and pin 9) of the second diode array chip T2, and the third group of pins (pin 5 and pin 6) of the first input terminal J4;

[0082] The fourth group of pins (pin 32, pin 38, pin 44 and pin 50) of the differential chip JH1 is connected to the first group of pins (pin 1, pin 3, pin 5 and pin 7) of the second input terminal J2, and the fifth group of pins (pin 30, pin 36, pin 42 and pin 48) of the differential chip JH1 is connected to the second group of pins (pin 2, pin 4, pin 6 and pin 8) of the second input terminal J2; in addition, pin 9 and pin 10 of the second input terminal J2 are grounded.

[0083] The sixth group of pins (pin 129, pin 135, pin 141 and pin 147) of the differential chip JH1 is connected to the first group of pins (pin 1, pin 3, pin 5 and pin 7) of the third input terminal J3, and the seventh group of pins (pin 131, pin 137, pin 143 and pin 149) of the differential chip JH1 is connected to the second group of pins (pin 2, pin 4, pin 6 and pin 8) of the third input terminal J3; in addition, pin 9 and pin 10 of the third input terminal J3 are grounded.

[0084] The key pin (pin 155) of the differential chip JH1 is connected to the first end (pin 2) of the indicator light circuit J8 and the first end of the test key K1, and the LED pin (pin 156) of the differential chip JH1 is connected to the second end (pin 6) of the indicator light circuit J8; the second end of the test key is grounded;

[0085] The eighth set of pins of differential chip JH1 (pins 27 - 38, pins 41 - 52, pins 55, 57, 60, 62, 64, 66, 70, 72, 74, 76, 78, 80, pins 173 - 184, pins 187 - 198, pins 201 - 208, pins 216, 218, 224, 226) are connected to the input end of the LVDS differential receiving circuit 11 as the output end of the HUB circuit 12.

[0086] Among them, pins 178, 180, 188, 190, 196, 198, 206, 208, 216, 218, 224, 226, 32, 34, 42, 44, 50, 52, 60, 62, 70, 72, 78, 80 in the eighth set of pins of differential chip JH1 are used as pins for RX receiving signals. In addition, it also includes capacitors C1 - C24 and resistors R1 - R12, which are respectively connected to the pins for RX receiving signals. The capacitors play the role of blocking direct current and passing alternating current, and the resistors are impedance - matching resistors.

[0087] Pins 173, 175, 174, 176, 177, 179, 181, 183, 182, 184, 187, 189, 191, 193, 195, 197, 192, 194, 202, 204, 201, 203, 205 and 207 in the eighth set of pins of differential chip JH1 are used as pins for TX sending signals.

[0088] Pins 31, 33, 27, 29, 28, 30, 36, 38, 66, 64, 74, 76, 35, 37, 41, 43, 45, 47, 46, 48, 49, 51, 55 and 57 in the eighth set of pins of differential chip JH1 are used as pins for the clock signal (GCLK).

[0089] In addition, pin 1 of the indicator light circuit J8 is grounded, and pins 3 and 4 are respectively connected to resistors R45 and R46 and then connected to the power supply VCC3.3.

[0090] Among them, as a preference, the models of the second input terminal J2 and the third input terminal J3 are HEAD2X5-DIP-2.0-90; the model of the indicator light circuit J8 is HEAD1X6-DIP-2.0-180; the model of the test button K1 is KEY2X2-SMD-4.

[0091] It should be noted that this application is only one feasible implementation method, but it is not limited to only this implementation method and can be set by users according to their needs.

[0092] This application provides a HUB circuit structure. Under this structure, LVDS differential signals can be processed and then target differential signals can be output to achieve stable transmission of signal data over 70 meters.

[0093] Based on the above embodiments, as a preferred embodiment, as shown in FIGS. 4(a) and 4(b), the high-voltage power supply circuit 13 includes: a fourth input terminal J7 and a power supply circuit; among them, the power supply circuit includes a switching regulator chip UD1 and a power supply circuit.

[0094] Among them, the socket of the fourth input terminal J7 is connected to the power supply terminal as the input end of the high-voltage power supply circuit 13. The first group of pins (pin 4, pin 5, and pin 6) of the fourth input terminal J7 are connected to the input pin (pin 1) of the switching regulator chip UD1, and the second group of pins (pin 1, pin 2, and pin 3) of the fourth input terminal J7 are grounded.

[0095] The output pins (pin 2, pin 3, pin 4, and pin 5) of the switching regulator chip UD1 are connected to the input end of the power supply circuit.

[0096] The output end of the power supply circuit is used as the output end of the high-voltage power supply circuit 13.

[0097] In a specific embodiment, the fourth input terminal J7 further includes a diode D1, where the diode D1 connects the first group of pins and the second group of pins of the fourth input terminal J7.

[0098] As a preference, the power supply circuit includes: resistors: RB3, RB4, RB2, and RB1; capacitors: CE1, CC2, CC1, CE2, CC6, and C33; inductors: LU1 and L1; diodes: D2 and D3. Among them, the first pin of the switching regulator chip UD1, the first end of the capacitor CE1, and the first end of the capacitor CC2 are connected together and are connected to the first set of pins of the fourth input terminal J7; the second pin of the switching regulator chip UD1 is connected to the first end of the inductor LU1 and the first end of the diode D2; the third pin of the switching regulator chip UD1 is connected to the first end of the resistor RB4 and is grounded; the fourth pin of the switching regulator chip UD1 is connected to the first end of the resistor RB2, the first end of the resistor RB3, and the first end of the capacitor CC1; the fifth pin of the switching regulator chip UD1 is connected to the second end of the resistor RB4 and the first end of the resistor RB3; the sixth pin of the switching regulator chip UD1 is grounded; the second end of the capacitor CE1 and the second end of the resistor RB2 are grounded; the second end of the capacitor CC2 is connected to the second end of the resistor RB3; the second end of the inductor LU1 is connected to the second end of the resistor RB1, the second end of the capacitor CC1, the first end of the capacitor CE2, the first end of the capacitor CC6, the first end of the triode D3, and the first end of the inductor L1; the second end of the inductor L1 and the first end of the capacitor CC3 together serve as the output terminal of the high-voltage power supply circuit; the second end of the diode D2 is connected to the second end of the capacitor CE2, the second end of the capacitor CC6, the second end of the triode D3, the second end of the capacitor CC6, and the second end of the capacitor CC3 and is grounded.

[0099] Among them, the fourth input terminal J7 serves as the power supply input interface of the high-voltage power supply circuit 13, and the switching regulator chip UD1 serves as the circuit management chip of the high-voltage power supply circuit 13, stepping down the input 24V / 48V voltage to 4.2V to supply power to the LED display module.

[0100] Among them, as a preference, the model of the switching regulator chip UD1 is LM2596.

[0101] It should be noted that this application is only one implementable way, but it is not limited to only this implementation method and can be set by oneself according to the needs of users.

[0102] This application provides a specific circuit diagram of a high-voltage power supply circuit to supply power to the LED display module. Since the input voltage of the high-voltage power supply circuit is high voltage, the overall power line diameter is thinner and the cost is lower, providing a stable basis for the long-distance transmission of signal output.

[0103] On the basis of the above embodiments, as a preferred embodiment, as Figure 5 shown, the LVDS differential receiving circuit 21 includes: a high-speed interface chip UZ2, a first signal enhancement circuit, and a second signal enhancement circuit;

[0104] The first set of pins (pins 4 - 9) of the high-speed interface chip UZ2 are connected to the output end of the HUB circuit as the input end of the LVDS differential receiving circuit; the second set of pins (pins 31 - 34) of the high-speed interface chip UZ2 are connected to the input end of the first signal enhancement circuit; the third set of pins (pin 24) of the high-speed interface chip UZ2 are connected to the first end of the second signal enhancement circuit.

[0105] Preferably, around the high-speed interface chip UZ2, there are also included: resistors RZ1, RZ2, and RZ3; capacitors CZ1, CZ2, and CZ9; an LED lamp: LED1; and an inductor LZ7. Among them, resistor RZ1 is connected to pin 2 of the high-speed interface chip UZ2 and LED1, and the other end of LED1 is connected to VCC3.3V as the power supply end; resistors RZ2 and RZ3 are respectively connected to pin 10 and pin 11 of the high-speed interface chip UZ2, and then connected to VCC3.3V; capacitors CZ1 and CZ2 are respectively connected to pin 5 and pin 6 of the high-speed interface chip UZ2; the first end of capacitor CZ9 is connected to pin 0 of the high-speed interface chip UZ2 and the first end of inductor LZ7, and is grounded; the second end of capacitor CZ9 is connected to the second end of inductor LZ7, and is grounded. And, preferably, the specification of the high-speed interface chip UZ2 is TBS614.

[0106] Preferably, the first signal enhancement circuit includes: inductors CZ14, CZ3, CZ5, and CZ4; resistors RZ10, RZ11, RZ7, and RZ17. Among them, the first end of capacitor CZ3 is connected to the first end of capacitor CZ14, the first end of resistor RZ7, the first end of capacitor CZ4, pins 34 and 31 of the high-speed interface chip UZ2, and is connected to VCC3.3V; the second end of capacitor CZ3 is connected to the second end of capacitor CZ14, the first end of resistor RZ10, and the first end of resistor RZ11, and is grounded; the second ends of resistors RZ10 and RZ11, and pin 33 of the high-speed interface chip UZ2 are connected; the second end of resistor RZ7 is connected to the first end of resistor RZ17, the first end of capacitor CZ5, and pin 32 of the high-speed interface chip UZ2; the second ends of resistor RZ17 and capacitor CZ5, and the second end of capacitor CZ4 are connected.

[0107] As a preference, the second signal enhancement circuit includes: resistors RZ15, RZ18, RZ14, and RZ16; and triode QA2. Among them, the first end of resistor RZ14 serves as the first end of the second signal enhancement circuit and is connected to pin 24 of high-speed interface chip UZ2. The second end of resistor RZ14 is connected to the first ends of resistor RZ15, resistor RZ18, and the base of triode QA2. The second end of resistor RZ15 is connected to resistor RZ16. The second end of resistor RZ18 is connected to the emitter of triode QA2 and is grounded. The second end of resistor RZ16 is connected to the collector of triode QA2.

[0108] It should be noted that the circuit provided in this application is only one possible implementation, but it is not limited to only this implementation and can be set by users according to their needs.

[0109] This application provides a specific structure of an LVDS differential receiving circuit. Under this structure, the signal bandwidth of the display screen provided in this application is as high as 1 GHz, with higher integration, simpler wiring design, and stable and reliable performance.

[0110] Based on the above embodiments, as a preferred embodiment, as Figure 6 shown, the LED display module 2 further includes:

[0111] A bus driving circuit 22 for receiving a control signal and performing drive amplification processing on the control signal. The input end of the bus driving circuit 22 is connected to the output end of the HUB circuit 21;

[0112] An LED module control circuit 23 for receiving the control signal after drive amplification and displaying the data corresponding to the control signal. The input end of the LED module control circuit 23 is connected to the output end of the bus driving circuit 22;

[0113] A first-level step-down circuit 24 for receiving the power supplied by the high-voltage power supply circuit 13 and supplying power to the LVDS differential receiving circuit 21, the bus driving circuit 22, and the LED module control circuit 23. The input end of the first-level step-down circuit 24 is connected to the output end of the high-voltage power supply circuit 13. The output end of the first-level step-down circuit 24 is connected to the power supply ends of the bus driving circuit 22 and the LED module control circuit 23;

[0114] A second-level step-down circuit 25 for receiving the power supplied by the first-level step-down circuit 24 and supplying power to the LVDS differential receiving circuit 21. The input end of the second-level step-down circuit 25 is connected to the output end of the first-level step-down circuit 24. The output end of the second-level step-down circuit 25 is connected to the power supply end of the LVDS differential receiving circuit 21.

[0115] Among them, as a preference, as Figure 7As shown, the first-level step-down circuit 24 is a DC-DC circuit, which includes: a step-down chip U8, a first RC filter circuit, a second RC filter circuit, a third RC filter circuit, and a MOS transistor circuit;

[0116] The first group of pins (pin 19, pin 8, pin 2, pin 9, pin 1, pin 11, pin 20, and pin 7) of the step-down chip U8 are connected to the first end of the first RC filter circuit; the second group of pins (pin 7, pin 21, pin 14, pin 3, pin 5, pin 4, and pin 10) of the step-down chip U8 are connected to the first end of the second RC filter circuit; the third group of pins (pin 15, pin 16, pin 17, and pin 18) of the step-down chip U8 are connected to the first end of the MOS transistor circuit; the fourth group of pins (pin 6, pin 12, and pin 13) of the step-down chip U8 are connected to the first input end of the third RC filter circuit; the second end of the first RC filter circuit is connected to the output end of the high-voltage power supply circuit 13 as the input end of the first-level step-down circuit; the second end of the second RC filter circuit is grounded; the second input end of the third RC filter circuit is connected to the output end of the MOS transistor circuit, and the output end of the third RC filter circuit is connected to the input end of the second-level step-down circuit, the power supply end of the bus drive circuit, and the power supply end of the LED module control circuit as the output end of the first-level step-down circuit.

[0117] Among them, the first RC filter circuit includes capacitors: CE2, C1B, C2B, C3B, C16B, C4B, and C5B; and resistors: R1B, R3B, R6B, R4B, R5B, and R19B. Among them, the first ends of capacitor CE2, capacitor C1B, capacitor C2B, capacitor C3B, and capacitor C16B are jointly used as the second end of the first RC filter circuit and are connected to the output terminal (VCC24V / 48V) of the high-voltage power supply circuit 13, and are also connected to pin 19 of step-down chip U8; the second end of capacitor CE2 is connected to the second ends of capacitor C1B, capacitor C2B, capacitor C3B, capacitor C16B, and the first end of resistor R1B, and is grounded; the second end of resistor R1B is connected to pin 8 of step-down chip U8; the first end of capacitor C4B is grounded, and the second end of capacitor C4B is connected to the first end of resistor R3B and pin 2 of step-down chip U8; the second end of resistor R3B is connected to pin 9 of step-down chip U8; the first end of resistor R6B is connected to VDD3.8V, the second end of resistor R6B is connected to the first end of capacitor C5B and pin 1 of step-down chip U8; the second end of capacitor C5B is connected to the first end of resistor R4B and is grounded; the second end of resistor R4B is connected to pin 11 of step-down chip U8; the first end of resistor R5B is connected to VCC24V, the first end of resistor R19 is connected to the signal terminal (POWER ON / OFF), and the second end of resistor R5B is connected to the second end of resistor R19 and pin 20 of step-down chip U8.

[0118] Among them, the second RC filter circuit includes: resistors R2B, R9B, R16B, and R20B; and capacitors: C8B, C15B, and C10B. The first end of resistor R2B is connected to pin 7 of step-down chip U8, and the second end of resistor R2B is grounded; the first end of resistor R9B is connected to the first end of capacitor C8B, and the second end of resistor R9B is connected to the first ends of capacitor C15B, capacitor C10B, and resistor R16B and is grounded; the second end of capacitor C8B is connected to the second end of capacitor C15B and pin 5 of step-down chip U8; the second end of capacitor C10B is connected to pin 4 of step-down chip U8; the second end of resistor R16B is connected to the first end of resistor R20B and pin 10 of step-down chip U8; the second end of resistor R21 is connected to pin 2 of step-down chip U8; pins 21, 14, and 3 of step-down chip U8 are connected and grounded.

[0119] Among them, the MOS transistor circuit includes: resistors: R12B, R13B, R14B, and R15B; capacitors: C11B and C6B; diode D3; MOS transistors: Q5, Q6, Q7, Q8, Q9, and Q10. Among them, the first end of resistor R12B is connected to pin 17 of buck chip U8, and the second end of resistor R12B is connected to pin 19 of buck chip U8, the drain and gate of MOS transistor Q5, the drain and gate of MOS transistor Q7, and the drain and gate of MOS transistor Q9; the first end of resistor R13B is connected to pin 18 of buck chip U8, and the second end of resistor R13B is connected to the first end of capacitor C11B and the first end of diode D3; the second end of diode D3 is connected to pin 2 of buck chip U8; the second end of capacitor C11B is connected to pin 16 of buck chip U8, the source of MOS transistor Q5, the source of MOS transistor Q7, the source of MOS transistor Q9, the gate and drain of MOS transistor Q6, the gate and drain of MOS transistor Q8, the gate and drain of MOS transistor Q10, the first end of resistor R14B, and the first end of resistor R15B, and serves as the output end of the MOS transistor circuit to be connected to the second input end of the third RC filter circuit; the second end of resistor R14B is connected to pin 15 of buck chip U8; the second end of resistor R15B is connected to the first end of capacitor C6B; the second end of capacitor C6B is connected to the source of MOS transistor Q6, the source of MOS transistor Q8, and the source of MOS transistor Q10, and is grounded.

[0120] Among them, the third RC filter circuit includes: inductor L1B; resistors: R17B, R21B, R7B, R8B, R18B, R10B and R11B; capacitors: C14B, C7B, CC4, CC5, CC6, CC7, C13B and C9B. Among them, the first end of the inductor L1B is used as the second input end of the third RC filter circuit and is connected to the output end of the MOS transistor circuit, and the second end of the inductor L1B is connected to the first ends of the resistor R17B, the resistor R21B, and the resistor R7B; the second end of the resistor R17B is connected to the first ends of the resistor R21B, the resistor R8B, the resistor R18B, the resistor R11B, the first end of the capacitor CC4, the first end of the capacitor CC5, the first end of the capacitor CC6, the first end of the capacitor CC7, the first end of the capacitor C13B, the first end of the capacitor C12B, and the first end of the capacitor C9B, and is used as the output end of the third RC filter circuit and is connected to the power supply end of the LVDS differential receiving circuit 21, the power supply end of the bus driving circuit 22, and the power supply end of the LED module control circuit 23; the second end of the resistor R7B is connected to the first end of the capacitor C14B and the pin 13 of the step-down chip U8, and the second end of the resistor R8B is connected to the second end of the capacitor C14B and the pin 12 of the step-down chip U8; the second end of the resistor R18B is connected to the first end of the resistor R10B, the pin 6 of the step-down chip U8, and the first end of the capacitor C7B; the second end of the resistor R10B is grounded; the second end of the resistor R11B is connected to the second end of the capacitor C7B; the second ends of the capacitor CC4, the capacitor CC5, the capacitor CC6, the capacitor CC7, the capacitor C13B, the capacitor C12B, and the capacitor C9B are connected and grounded.

[0121] Among them, as a preference, as shown in FIGS. 8(a) and 8(b), the bus driving circuit 22 includes: a first bus transceiver chip UZ3 and a second bus transceiver chip UZ4, and the models of the first bus transceiver chip UZ3 and the second bus transceiver chip UZ4 are 74HC245-0.65. Among them, the first group of pins (pins 18, 16, and 15) of the first bus transceiver chip UZ3 are connected to the fourth group of pins (pins 18, 19, and 20) of the high-speed interface chip UZ2; the second group of pins (pins 13, 12, and 11) of the first bus transceiver chip UZ3 are connected to the fifth group of pins (pins 23, 22, and 21) of the high-speed interface chip UZ2; the third group of pins (pins 2, 4, 5, 7, 8, and 9) of the first bus transceiver chip UZ3 are grounded, and during the process of grounding the third group of pins, each pin is respectively connected to a capacitor, namely: CF1, CF2, CF3, CF4, CF5, and CF6; the power supply pin (pin 20) of the first bus transceiver chip UZ3 is used as the power supply terminal of the bus driving circuit 22 and is connected to the output terminal of the first-stage buck circuit 24; in addition, pins 17, 14, 1, 10, and 19 of the first bus transceiver chip UZ3 are grounded, and among them, capacitors CZ6 are further included during the connection of pins 10, 19, and 20 of the first bus transceiver chip UZ3.

[0122] The first group of pins (pins 2 - 7) of the second bus transceiver chip UZ4 are connected to the sixth group of pins (pins 40 - 35) of the high-speed interface chip UZ2, and the second group of pins (pins 18 - 13) of the second bus transceiver chip UZ4 are used as the output terminal of the bus driving circuit and are connected to the input terminal of the LED module control circuit; the power supply pin (pin 20) of the second bus transceiver chip UZ4 is used as the power supply terminal of the bus driving circuit 22 and is connected to the output terminal of the first-stage buck circuit 247; the first group of pins of the first bus transceiver chip UZ3, the second group of pins of the first bus transceiver chip UZ3, and the first group of pins of the second bus transceiver chip UZ4 together serve as the input terminal of the bus driving circuit 22. In addition, pins 8, 9, and 10 of the second bus transceiver chip UZ4 are grounded; a capacitor CZ7 is included during the connection of pin 19 and pin 20 of the second bus transceiver chip UZ4, and pin 19 is grounded; pin 1 of the second bus transceiver chip UZ4 is connected to pin 20; pins 11 and 12 of the second bus transceiver chip UZ4 are empty pins.

[0123] Among them, as a preference, as Figure 9 shown, the second-stage buck circuit 25 is an LDO circuit, including: a voltage regulator chip UZ1 and a voltage regulation circuit;

[0124] Among them, the input pin (pin 3) of the voltage regulator chip UZ1 is connected to the output end of the high-voltage power supply circuit 13 as the input end of the secondary step-down circuit 25, and the output pins (pin 2 and pin 4) of the voltage regulator chip UZ1 are connected to the input end of the voltage regulation circuit; the output end of the voltage regulation circuit is connected to the power supply end of the LVDS differential receiving circuit 22 as the output end of the secondary step-down circuit 25.

[0125] Among them, the voltage regulation circuit includes capacitors: CZ15, CZ16, and CZ13. Among them, the first ends of the capacitor CZ15, the capacitor CZ16, and the capacitor CZ13 are connected to the pin 2 of the voltage regulator chip UZ1 and the pin 4 of the voltage regulator chip UZ1, and jointly serve as the output end of the secondary step-down circuit 35 and are connected to the power supply end of the LVDS differential receiving circuit 21; the second ends of the capacitor CZ15 and the capacitor CZ16, and the second end of the capacitor CZ13 are connected and grounded. In addition, it also includes a capacitor C12, where the first end of the capacitor C12 is connected to the pin 3 of the voltage regulator chip UZ1, and the second end of the capacitor C12 is connected to the pin 1 of the voltage regulator chip UZ1 and is grounded.

[0126] As a preference, as Figure 10 shown, the LED module control circuit 23 includes a terminal JO1. Among them, the first set of pins (pins 1 - 6) of the terminal JO1 are connected to the second set of pins (pins 18 - 13) of the second bus transceiver chip UZ4; the second set of pins (pins 13 - 16) of the terminal JO1 are connected to the pins (pins 27 - 30) of the high-voltage and high-speed interface chip UZ2.

[0127] Under the structure of the above circuit, a specific embodiment of the display control system provided by this application is as follows: The second input terminal J2 and the third input terminal J3 are network control signals of the system power control box 1, J8 is the indicator light circuit of the system power control box 1, and K1 is the test button of the system power control box 1. The fourth input terminal J7 is a 24V / 48V power supply input interface. The switching regulator chip UD1 steps down the input 24V / 48V voltage to 4.2V to supply power to the system power control box 1 and the HUB circuit 12. The system power control box 1 converts the TTL / COMS signals (including 12 RGB data signals, 5 decoding signals (ABCDE), and 3 control signals (DCLK, GCLK, LAT)) into a group of high-integration triple LVDS differential signals (TX\RX\GCLK) with a bandwidth close to 1GHz. After impedance matching through the HUB circuit 12, they are output to the first input terminal J4 after being processed by the first diode array chip T1 and the second diode array chip T2 devices. The system power control box 1 can output up to 12 groups of high-bandwidth and high-integration LVDS differential signals, and each group of high-bandwidth and high-integration LVDS differential signals can be stably transmitted to the LED display module 2 for more than 70 meters. The high-voltage power supply circuit of the system power control box 1 outputs a DC24-48V voltage, which can be transmitted over a long distance at high voltage to the LED display module 2.

[0128] The LED display module includes a high-speed interface chip UZ2 (TBS614) for processing LVDS differential signals, a bus driver circuit 22, a secondary step-down circuit 25, and a primary step-down circuit 24. Among them, the high-speed interface chip UZ2 (TBS614) has a bandwidth of up to 1GHz. It can convert a group of LVDS differential signals (TX\RX\GCLK) output by the system control power box 1 into TTL / COMS signals (including 12 RGB data signals, 5 decoding signals (ABCDE) + 3 control signals (DCLK, GCLK, LAT)) after a long-distance transmission of more than 60 meters through a long wire, and send them to the LED module control circuit 23 after being driven and amplified by the first bus transceiver chip UZ3 and the second bus transceiver chip UZ4. Among them, TBS614 can effectively reduce the number of interconnection lines, simplify the design and wiring, improve the transmission stability, support the clock spread spectrum adjustment function, and is easy to pass the EMC test. The secondary step-down circuit 25 is an LDO circuit, which outputs 3.3V to supply power to the high-speed interface UZ2, the first bus transceiver chip UZ3, and the second bus transceiver chip UZ4. The primary step-down circuit 24 steps down the DC24-48V voltage output by the high-voltage power supply circuit 13 of the system control power box 1 to 3.8V to supply power to the circuits in the LED display module 2 after a long-distance transmission through a high-voltage long wire.

[0129] It should be noted that the circuit provided in this application is only one implementable way, but it is not limited to only this implementation. It can be set according to the needs of users.

[0130] A display control system provided by the present utility model includes: a system power control box and an LED display module; wherein, the system power control box includes: an LVDS differential sending circuit for converting a signal to be transmitted into an LVDS differential signal, the input end of the LVDS differential sending circuit is connected to the signal sending end; a HUB circuit for converting the LVDS differential signal into a target differential signal, the input end of the HUB circuit is connected to the output end of the LVDS differential sending circuit; a high-voltage power supply circuit for supplying power to the LED display module, the input end of the high-voltage power supply circuit is connected to the power supply end; the LED display module includes: an LVDS differential receiving circuit for receiving the target differential signal and converting the target differential signal into a control signal, the input end of the LVDS differential receiving circuit is connected to the output end of the HUB circuit. It can be seen that the display control system provided in this application is composed of two parts: a system power control box and an LED display module. Among them, the LVDS differential sending circuit directly converts the signal to be transmitted into a high-bandwidth and high-integration LVDS differential signal, and then outputs the target differential signal after being processed by the HUB circuit. Its differential signal can achieve stable output over a long distance and is sent to the LED display module. The LVDS differential receiving circuit in the LED display module converts the target differential signal into a control signal, and finally the data corresponding to the control signal is displayed on the display screen. Among them, it is powered by the high-voltage power supply circuit, and the signal can be transmitted over a long distance to the LED display module. In this way, when using the display control system outdoors, the system power control box can be installed indoors, thereby improving the safe and reliable operation of the system power control box and the convenience of device maintenance.

[0131] To solve the above technical problems, this application also provides an LED display device, which includes the above display control system and has the same beneficial effects. The embodiments of the electronic device in this application are the same as the above embodiments, and will not be elaborated here.

[0132] The above has introduced in detail a display control system and an LED display device provided by the present utility model. The embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same and similar parts among the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the description of the method part. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of the present utility model, several improvements and modifications can be made to the present utility model, and these improvements and modifications also fall within the protection scope of the claims of the present utility model.

[0133] It should also be noted that in this specification, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

Claims

1. A display control system, characterized in that: include: System power control box and LED display module; Wherein, the system power control box includes: an LVDS differential transmission circuit for converting a signal to be transmitted into an LVDS differential signal, the input end of the LVDS differential transmission circuit being connected to a signal transmission end; a HUB circuit for converting the LVDS differential signal into a target differential signal, the input end of the HUB circuit being connected to an output end of the LVDS differential transmission circuit; a high-voltage power supply circuit for supplying power to the LED display module, the input end of the high-voltage power supply circuit being connected to a power supply end; The LED display module comprises: an LVDS differential receiving circuit for receiving the target differential signal and converting the target differential signal into a control signal, wherein the input end of the LVDS differential receiving circuit is connected to the output end of the HUB circuit.

2. The display control system according to claim 1, characterized in that: The LVDS differential transmission circuit comprises: a first diode array chip, a second diode array chip and a first input terminal; The first group of pins of the first diode array chip is connected to the second group of pins of the first diode array chip, the first group of pins of the first input terminal and the first end of the HUB circuit, and the third group of pins of the first diode array chip is connected to the fourth group of pins of the first diode array chip, the second group of pins of the first input terminal and the second end of the HUB circuit; The first group of pins of the second diode array chip is connected to the second group of pins of the second diode array chip, and the third group of pins of the first input terminal is connected to the third end of the HUB circuit; Among them, the first group of pins, the second group of pins, the third group of pins, and the fourth group of pins of the first diode array chip, the first group of pins, the second group of pins of the second diode array chip, and the first group of pins, the second group of pins, and the third group of pins of the first input terminal collectively serve as the output end of the LVDS differential transmitting circuit; the first end, the second end, and the third end of the HUB circuit collectively serve as the input end of the HUB circuit.

3. The display control system according to claim 2, characterized in that: The HUB circuit includes: a differential chip, a second input terminal, a third input terminal, an indicator light circuit and a test button; The first group of pins of the differential chip is connected to the first group of pins of the first diode array chip, the second group of pins of the first diode array chip and the first group of pins of the first input terminal as the first end of the HUB circuit; the second group of pins of the differential chip is connected to the third group of pins of the first diode array chip, the fourth group of pins of the first diode array chip and the second group of pins of the first input terminal as the second end of the HUB circuit; the third group of pins of the differential chip is connected to the first group of pins of the second diode array chip, the second group of pins of the second diode array chip and the third group of pins of the first input terminal as the third end of the HUB circuit; The fourth group of pins of the differential chip is connected to the first group of pins of the second input terminal, and the fifth group of pins of the differential chip is connected to the second group of pins of the second input terminal; The sixth group of pins of the differential chip is connected to the first group of pins of the third input terminal, and the seventh group of pins of the differential chip is connected to the second group of pins of the third input terminal; The button pin of the differential chip is connected to the first end of the indicator light circuit and the first end of the test button, and the LED pin of the differential chip is connected to the second end of the indicator light circuit; the second end of the test button is grounded; The eighth group of pins of the differential chip is connected to the input end of the LVDS differential receiving circuit as the output end of the HUB circuit.

4. The display control system according to claim 1, characterized in that: The high-voltage power supply circuit comprises: a fourth input terminal and a power supply circuit; wherein the power supply circuit comprises a switching regulator chip and a power supply circuit; The socket of the fourth input terminal is connected to the power supply end as the input end of the high-voltage power supply circuit, the first group of pins of the fourth input terminal is connected to the input pins of the switching regulator chip, and the second group of pins of the fourth input terminal is grounded; The output pin of the switch regulator chip is connected to the input end of the power supply circuit; The output end of the power supply circuit serves as the output end of the high-voltage power supply circuit.

5. The display control system according to any one of claims 1 to 4, characterized in that: The LVDS differential receiving circuit comprises: a high-speed interface chip, a first signal enhancement circuit, and a second signal enhancement circuit; The first group of pins of the high-speed interface chip is connected to the output end of the HUB circuit as the input end of the LVDS differential receiving circuit; the second group of pins of the high-speed interface chip is connected to the input end of the first signal enhancement circuit; and the third group of pins of the high-speed interface chip is connected to the first end of the second signal enhancement circuit.

6. The display control system according to claim 5, characterized in that: The LED display module also includes: A bus driving circuit for receiving the control signal and driving and amplifying the control signal, wherein the input end of the bus driving circuit is connected to the output end of the HUB circuit; An LED module control circuit for receiving the control signal after driving and amplification, and displaying data corresponding to the control signal, wherein the input end of the LED module control circuit is connected to the output end of the bus driving circuit; A first-stage buck circuit for receiving the power provided by the high-voltage power supply circuit and supplying power to the LVDS differential receiving circuit, the bus driving circuit and the LED module control circuit, wherein the input end of the first-stage buck circuit is connected to the output end of the high-voltage power supply circuit, and the output end of the first-stage buck circuit is connected to the power supply end of the bus driving circuit and the power supply end of the LED module control circuit; A secondary buck circuit is used to receive the power provided by the primary buck circuit and to power the LVDS differential receiving circuit, wherein the input end of the secondary buck circuit is connected to the output end of the primary buck circuit, and the output end of the secondary buck circuit is connected to the power supply end of the LVDS differential receiving circuit.

7. The display control system according to claim 6, characterized in that: The first-stage buck circuit includes: a buck chip, a first RC filter circuit, a second RC filter circuit, a third RC filter circuit and a MOS tube circuit; The first group of pins of the buck chip is connected to the first end of the first RC filter circuit; the second group of pins of the buck chip is connected to the first end of the second RC filter circuit; the third group of pins of the buck chip is connected to the first end of the MOS tube circuit; the fourth group of pins of the buck chip is connected to the first input end of the third RC filter circuit; The second end of the first RC filter circuit is connected to the output end of the high-voltage power supply circuit as the input end of the first-stage step-down circuit; The second end of the second RC filter circuit is grounded; The second input end of the third RC filter circuit is connected to the output end of the MOS tube circuit, the output end of the third RC filter circuit serves as the output end of the first-level buck circuit and the input end of the second-level buck circuit, and the power supply end of the bus drive circuit is connected to the power supply end of the LED module control circuit.

8. The display control system according to claim 7, characterized in that: The bus driving circuit comprises: a first bus transceiver chip and a second bus transceiver chip; Among them, the first group of pins of the first bus transceiver chip is connected to the fourth group of pins of the high-speed interface chip; the second group of pins of the first bus transceiver chip is connected to the fifth group of pins of the high-speed interface chip; the third group of pins of the first bus transceiver chip is grounded; the power pin of the first bus transceiver chip is connected to the output end of the first-level buck circuit as the power supply end of the bus driving circuit; The first group of pins of the second bus transceiver chip is connected to the sixth group of pins of the high-speed interface chip, and the second group of pins of the second bus transceiver chip is connected to the input end of the LED module control circuit as the output end of the bus driving circuit; the power pin of the second bus transceiver chip is connected to the output end of the primary buck circuit as the power supply end of the bus driving circuit; The first group of pins of the first bus transceiver chip, the second group of pins of the first bus transceiver chip and the first group of pins of the second bus transceiver chip are commonly used as input ends of the bus driving circuit.

9. The display control system according to claim 7 or 8, characterized in that: The secondary step-down circuit comprises: a voltage stabilizer chip and a voltage stabilizing circuit; The input pin of the voltage regulator chip is connected to the output end of the high-voltage power supply circuit as the input end of the secondary step-down circuit, and the output pin of the voltage regulator chip is connected to the input end of the voltage regulator circuit; The output end of the voltage stabilizing circuit is connected to the power supply end of the LVDS differential receiving circuit as the output end of the secondary step-down circuit.

10. An LED display device, characterized in that: Including the display control system described in any one of claims 1-9.

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