Chip test circuit and test device

By setting a control module and a coaxial switch on the substrate to form a differential switch switching circuit, the problem of low testing efficiency of multi-link channel chips is solved, multi-channel coverage testing is realized, and testing efficiency is improved.

CN223926562UActive Publication Date: 2026-02-17SHENZHEN STATE MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202423293048.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2026-02-17
Estimated Expiration
2034-12-27

AI Technical Summary

Technical Problem

Due to limitations in testing equipment, multi-channel chips are difficult to cover in system-level testing, resulting in low testing efficiency.

Method used

Design a chip testing circuit. By setting a control module and multiple coaxial switches on the substrate to form a differential switch switching circuit, and using a signal conversion module to convert the differential signal into a single-ended signal output, the control module controls the switching state of the coaxial switches to form different test links, thereby realizing multi-channel coverage testing of the chip under test.

Benefits of technology

This technology enables multi-channel coverage testing of the chip under test, improving testing efficiency without affecting signal quality.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the technical field of chip testing, and provides a chip testing circuit and a testing device.A control module and a plurality of coaxial switches are arranged on the front face of a substrate, and sockets of the coaxial switches are exposed out of the back face of the substrate through switch through holes in the substrate; the multiple coaxial switches are electrically connected in series or in parallel to form a differential switching circuit, differential signals output by the differential switching circuit are converted into single-end signals to be output, the control module controls the on-off states of the multiple coaxial switches, and therefore different testing links are formed. The differential signal pins in the to-be-tested chip are respectively connected, so that the multi-channel coverage test of the to-be-tested chip is realized, the signal quality is not influenced, and the test efficiency of the chip is improved.
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Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of chip testing, and particularly relates to a chip testing circuit and a testing device. BACKGROUND

[0002] The chip testing link includes automatic test equipment (ATE) testing and system level test (SLT).

[0003] In the related art, the multi-link channel chip is difficult to realize the multi-channel coverage test in the SLT testing link due to the limitation of the test equipment, and the test efficiency is low. UTILITY MODEL CONTENT

[0004] The application aims to provide a chip testing circuit and a testing device, and aims to solve the problem of low test efficiency of the current multi-link channel chip.

[0005] In order to solve the above technical problems, the application provides a chip testing circuit, which comprises:

[0006] a substrate;

[0007] a control module and a plurality of coaxial switches arranged on the front surface of the substrate, the sockets of the coaxial switches are exposed on the back surface of the substrate through switch through holes on the substrate, and the plurality of coaxial switches are electrically connected in series or in parallel to form a differential switch switching circuit;

[0008] a signal conversion module connected with the differential switch switching circuit, used for converting the differential signal output by the differential switch switching circuit into a single-ended signal output;

[0009] The plurality of coaxial switches are connected with the control module, and the switch state of the coaxial switch is controlled by the control module.

[0010] In some embodiments, the chip testing circuit further comprises:

[0011] a plurality of light emitting modules arranged on the front surface of the substrate and corresponding to the plurality of coaxial switches one by one; the light emitting module exposes the light emitting area of the light emitting module through the light source through hole on the substrate.

[0012] In some embodiments, each light emitting module comprises a plurality of light emitting units, and the plurality of light emitting units correspond to the input end of the coaxial switch one by one.

[0013] In some embodiments, the coaxial switch has a circular cross section, and the plurality of light-emitting units in each light-emitting module are arranged in a ring around the coaxial switch.

[0014] In some embodiments, the coaxial switch has a circular cross section, and the plurality of light-emitting units in each light-emitting module are arranged in a ring around the coaxial switch.

[0015] In some embodiments, the plurality of coaxial switches includes M*N first-level coaxial switches and N second-level coaxial switches, and M input terminals of each second-level coaxial switch are respectively connected to output terminals of corresponding M first-level coaxial switches.

[0016] In some embodiments, each coaxial switch includes 6 input terminals and 1 output terminal, and the coaxial switch is controlled by the control module to select one of the input terminals to be connected to the output terminal.

[0017] In some embodiments, the control module is further configured to control two coaxial switches in the differential switch switching circuit to simultaneously connect to a pair of differential pins of the chip under test.

[0018] In some embodiments, the chip testing circuit further includes:

[0019] A power supply module is arranged on the front surface of the substrate and connected to the control module and the coaxial switches, and is configured to supply power to the coaxial switches and the control module.

[0020] The second aspect of the embodiments of the present application further provides a testing device, which includes a testing instrument and a chip testing circuit as described in any of the above embodiments, and the signal conversion module is connected to the testing instrument.

[0021] The embodiments of the present application provide a chip testing circuit and a testing device. The control module and the plurality of coaxial switches are arranged on the front surface of the substrate. The sockets of the coaxial switches are exposed on the back surface of the substrate through the switch through holes on the substrate, and the plurality of coaxial switches are electrically connected in series or in parallel to form a differential switch switching circuit. The differential signal output by the differential switch switching circuit is converted into a single-ended signal output. The control module controls the switch state of the plurality of coaxial switches, thereby forming different test links to connect the differential signal pins in the chip under test, achieving multi-channel coverage testing of the chip under test, and not affecting the signal quality, and improving the testing efficiency of the chip. BRIEF DESCRIPTION OF DRAWINGS

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or prior art description will be briefly introduced as follows. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0023] Figure 1 The schematic diagram of the chip test circuit provided by the embodiment of the present application Figure 1 ;

[0024] Figure 2 The schematic diagram of the chip test circuit provided by the embodiment of the present application Figure 2 ;

[0025] Figure 3 The schematic diagram of the chip test circuit provided by the embodiment of the present application Figure 3 ;

[0026] Figure 4 The schematic diagram of the chip test circuit provided by the embodiment of the present application Figure 4 ;

[0027] Figure 5 The schematic diagram of the control module provided by the embodiment of the present application;

[0028] Figure 6 The schematic diagram of the power supply module provided by the embodiment of the present application is provided with a through hole;

[0029] Figure 7 The schematic diagram of the S[2,1] parameter of the chip test circuit provided by the embodiment of the present application;

[0030] Figure 8 The schematic diagram of the S[1,1] parameter of the chip test circuit provided by the embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solutions and advantages of the present application more clear, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not used to limit the present application.

[0032] In the related art, due to the limitation of test equipment, it is difficult to realize the coverage test of multiple channels of the multi-link channel chip in the SLT test link, and there is the problem of low test efficiency.

[0033] In order to solve the above technical problems, the embodiment of the present application provides a chip test circuit, which is shown in Figure 1As shown, the chip test circuit in the embodiment includes a substrate 100, a control module 200, a signal conversion module 400, and a plurality of coaxial switches. The control module 200 and the plurality of coaxial switches are arranged on the front surface of the substrate 100. The sockets of the coaxial switches are exposed on the back surface of the substrate 100 through switch through holes on the substrate 100. The plurality of coaxial switches are electrically connected in series or in parallel to form a differential switch switching circuit 300. The signal conversion module 400 is connected to the differential switch switching circuit 300 and is configured to convert differential signals output by the differential switch switching circuit 300 into single-end signals. The plurality of coaxial switches are connected to the control module 200, and the switch states of the coaxial switches are controlled by the control module 200.

[0034] In the embodiment, the sockets of the coaxial switches are exposed on the back surface of the substrate 100 through the switch through holes on the substrate 100. The plurality of coaxial switches are electrically connected in series or in parallel to form the differential switch switching circuit 300. The signal conversion module 400 converts the differential signals output by the differential switch switching circuit 300 into single-end signals. The switch states of the plurality of coaxial switches are controlled by the control module 200, thereby forming different test links. The different test links are connected to the differential signal pins in the chip under test 500, respectively, to implement multi-channel coverage test on the chip under test 500 without affecting the signal quality and improving the test efficiency of the chip.

[0035] In some embodiments, the differential switch switching circuit 300 can be connected to the chip under test 500. The control module 200 can be a test instrument. The control module 200 can control the working states of the coaxial switches in the differential switch switching circuit 300, receive the single-end signals output by the signal conversion module 400, and detect the corresponding differential pins in the chip under test 500 according to the single-end signals, thereby implementing the test on all pin functions on the chip under test 500 and improving the test efficiency of the chip.

[0036] In some embodiments, the chip test circuit further includes a plurality of light-emitting modules arranged on the front surface of the substrate 100 and corresponding to the plurality of coaxial switches. The light-emitting modules expose the light-emitting areas of the light-emitting modules through light source through holes on the substrate 100.

[0037] In the embodiment, each coaxial switch is provided with a corresponding light-emitting module. The working state of the coaxial switch is displayed by the light-emitting module. For example, the light-emitting module can display the position of the input end connected to the output end in the coaxial switch. Each input end in the coaxial switch corresponds to a test link. In this way, the user can determine the pin of the chip under test 500 corresponding to the current test link through the light-emitting module.

[0038] In some embodiments, the chip test circuit further includes a plurality of light-emitting modules arranged on the front surface of the substrate 100 and corresponding to the plurality of coaxial switches. The light-emitting modules expose the light-emitting areas of the light-emitting modules through light source through holes on the substrate 100. Figure 2As shown, each light-emitting module includes a plurality of light-emitting units 710, which correspond one-to-one to the input ends 610 of the coaxial switches.

[0039] In the present embodiment, Figure 2 The back of the substrate 100 is provided with coaxial switch sockets, which are exposed on the back of the substrate 100 through switch through-holes on the substrate 100. Each coaxial switch is provided with a wire insertion port 110. The control module 200 can be connected to the coaxial switch corresponding to the wire insertion port 110 through the wire insertion port 110. Each input end 610 of the coaxial switch corresponds to a test link. In this way, the user can determine the pin of the chip 500 to be tested corresponding to the current test link through the light-emitting module.

[0040] In some embodiments, in combination with Figure 2 As shown, the wire insertion ports 110 are provided on the front of the substrate 100. Each wire insertion port 110 provided beside the coaxial switch can extend to the back of the substrate 100 through the wire insertion hole of the substrate 100.

[0041] In some embodiments, in combination with Figure 2 As shown, the cross section of the coaxial switch is circular. The plurality of light-emitting units 710 in each light-emitting module are arranged in a ring shape around the switch through-hole.

[0042] In some embodiments, the light-emitting unit 710 can be a light-emitting diode. Each light-emitting diode corresponds to the coaxial head (i.e., the input end 610 of the coaxial switch) of the adjacent coaxial switch. When the light-emitting diode is lit, it indicates that the channel in the coaxial switch is connected, which is convenient for displaying to the user.

[0043] In some embodiments, in combination with Figure 2 As shown, the output end 620 of the coaxial switch is located in the center region of the cross section, and the input end 610 of the coaxial switch is located in the edge region of the cross section.

[0044] In some embodiments, Figure 3The front surface of the substrate 100 is provided with a plurality of coaxial switches 600, the control module 200 is connected to the coaxial switches corresponding to the wire socket 110 through the wire socket 110, each input end 610 of the coaxial switches corresponds to a test link, so that the plurality of coaxial switches 600 form a differential switch switching circuit 300 through parallel and series combination, the output end of the differential switch switching circuit 300 is connected to the signal switching module 400, the control module 200 can control the connection state between the plurality of input ends 610 and the output end 620 of the coaxial switches 600 in the differential switch switching circuit 300, realize the test of different differential pins of the chip under test 500, and also can receive the single-ended signal output by the signal switching module 400, and detect the corresponding differential pins in the chip under test 500 according to the single-ended signal, realize the test of all pin functions on the chip under test 500, and improve the test efficiency of the chip.

[0045] In some embodiments, the plurality of coaxial switches 600 includes M*N first-level coaxial switches 311 and N second-level coaxial switches 321, and M input ends of each second-level coaxial switch 321 are respectively connected to the output ends of the corresponding M first-level coaxial switches 311.

[0046] In the embodiment, the differential switch switching circuit 300 includes a first-level switching circuit 310 and a second-level switching circuit 320, the first-level switching circuit 310 includes M*N first-level coaxial switches 311, the second-level switching circuit 320 includes N second-level coaxial switches 321, and P is the number of input ends of the coaxial switches 600, so that P*M*N test links can be formed, the control module 200 can control the switch states of the M*N first-level coaxial switches 311 and the N second-level coaxial switches 321, so that P*M*N test links can be formed in sequence, the functions of P*M*N / 2 differential pins of the chip under test 500 can be tested, the single-ended signal output by the signal switching module 400 can also be received, and the corresponding differential pins in the chip under test 500 can be detected according to the single-ended signal, so that the test of all pin functions on the chip under test 500 can be realized, and the test efficiency of the chip is improved.

[0047] In some embodiments, the M*N first-level coaxial switches 311 in the first-level switching circuit 310 can be divided into P-end test switches and N-end test switches, the number of the P-end test switches and the N-end test switches is the same, and the second-level coaxial switches 321 in the second-level switching circuit 320 are also divided into two groups of test switches respectively, corresponding to the P-end test switches and the N-end test switches in the first-level switching circuit 310, so that P*M*N / 2 differential test links are formed.

[0048] In some embodiments, each coaxial switch 600 includes 6 input terminals and 1 output terminal, and the coaxial switch 600 can be controlled by the control module 200 to select one of the input terminals to be connected to the output terminal, thereby forming a corresponding test link, or to select all the input terminals in the coaxial switch 600 to be disconnected from the output terminal.

[0049] In some embodiments, the first-stage switching circuit 310 includes 12 first-stage coaxial switches 311, and the second-stage switching circuit 320 includes 2 second-stage coaxial switches 321, so that M*N test links can be formed, and the M*N test links can test the functions of 32 pairs of differential pins of the chip under test 500. Figure 4 As shown in the figure, the first-stage switching circuit 310 includes 12 first-stage coaxial switches 311, and the second-stage switching circuit 320 includes 2 second-stage coaxial switches 321, so that M*N test links can be formed, and the M*N test links can test the functions of 32 pairs of differential pins of the chip under test 500.

[0050] For example, as shown in the figure, a topology diagram for sequentially selecting 36 differential test links by using two-stage coaxial switches is shown, wherein the upper half is the selection of the P terminal, and the lower half is the selection of the N terminal, and then the differential signals are converted into single-ended signals by the signal conversion module 400 and output to the test instrument. Figure 4

[0051] In some embodiments, the signal conversion module 400 can be a balun, which is an electronic component used for conversion between balanced and unbalanced circuits. The full name of the balun is "balance-unbalance converter", which is used to convert balanced signals (such as differential signals) into unbalanced signals (such as single-ended signals), or to convert unbalanced signals into balanced signals.

[0052] In some embodiments, the number of input terminals of the second-stage coaxial switch 321 is the same as the number of first-stage coaxial switches 311 in the first-stage switching circuit 310, and the plurality of coaxial switches 600 includes M*N first-stage coaxial switches 311 and N second-stage coaxial switches 321, and the M input terminals of each second-stage coaxial switch are respectively connected to the output terminals of the corresponding M first-stage coaxial switches.

[0053] In some embodiments, the coaxial switch 600 can be an L7106B type SP6T coaxial switch with a bidirectional transmission bandwidth of 20 GHz and a lifetime of one million on-off times.

[0054] In some embodiments, the control module 200 is further configured to control two coaxial switches in the differential switch switching circuit 300 to simultaneously connect a pair of differential pins of the chip under test 500.

[0055] ​In the embodiment, the coaxial switches in the differential switch circuit 300 constitute the P-end test link and the N-end test link, the P-end test link and the N-end test link are controlled by the control module 200, and are connected to a pair of differential pins of the chip under test 500 at the same time, then the differential signals output by the pair of differential pins of the chip under test 500 via the P-end test link and the N-end test link are converted into single-end signals by the signal conversion module 400, and the single-end signals are output to the test instrument, so that the function test of the pair of differential pins of the chip under test 500 is realized.

[0056] In some embodiments, in combination with Figure 5 As shown in the figure, the control module 200 includes a bidirectional level converter U2, an expander U3, and a connection terminal U4, the input clock serial pin SCL1 of the bidirectional level converter U2 is connected to the serial clock pin STM_SCL of the host computer, the input data serial pin SDA1 of the bidirectional level converter U2 is connected to the serial data pin STM_SDA of the host computer, the output clock serial pin SCL2 of the bidirectional level converter U2 is connected to the serial clock pin SCL of the expander U3, the output data serial pin SDA2 of the bidirectional level converter U2 is connected to the serial data pin SDA of the expander U3, the bidirectional level converter U2 converts the data signal provided by the host computer into a level signal and outputs the level signal to the expander U3, and the expander U3 outputs a corresponding control level.

[0057] In some embodiments, in combination with Figure 5 As shown in the figure, the connection terminal U4 is connected to the coaxial switch 600, the expander U3 outputs a corresponding control level, and the output end of the coaxial switch 600 can be connected to a corresponding input end via the connection terminal U4, for example, the pin P1, the pin P2, the pin P3, the pin P4, the pin P5, the pin P6, and the pin P7 of the expander U3 correspond to the control of the 7-way switch respectively, wherein the pin P1, the pin P2, the pin P3, the pin P4, the pin P5, and the pin P6 can control the connection state between the 6 input ends and the output end of the coaxial switch 600 respectively, and the pin P7 can control the 6 input ends and the output end of the coaxial switch 600 at the same time.

[0058] In some embodiments, in combination with Figure 5As shown, the pin P8, the pin P9, the pin P10, the pin P11, the pin P12, the pin P13 and the pin P14 of the expander U3 correspond to the pin P1, the pin P2, the pin P3, the pin P4, the pin P5, the pin P6 and the pin P7 of the expander U3 respectively, the pin P8, the pin P9, the pin P10, the pin P11, the pin P12, the pin P13 and the pin P14 of the expander U3 can control the lighting state of the status display lamp LED1, the status display lamp LED2, the status display lamp LED3, the status display lamp LED4, the status display lamp LED5, the status display lamp LED6 and the status display lamp LED7 respectively, the lighting state of the status display lamp LED1, the status display lamp LED2, the status display lamp LED3, the status display lamp LED4, the status display lamp LED5, the status display lamp LED6 and the status display lamp LED7 correspond to the level of the pin P1, the pin P2, the pin P3, the pin P4, the pin P5, the pin P6 and the pin P7 of the expander U3 respectively, in this way, the position of the input end connected with the output end in the coaxial switch 600 can be determined through the lighting state of the status display lamp LED1, the status display lamp LED2, the status display lamp LED3, the status display lamp LED4, the status display lamp LED5, the status display lamp LED6 and the status display lamp LED7, each input end 610 in the coaxial switch corresponds to a test link, in this way, the user can determine the pin of the chip 500 to be tested corresponding to the current test link through the status display lamp LED1, the status display lamp LED2, the status display lamp LED3, the status display lamp LED4, the status display lamp LED5, the status display lamp LED6 and the status display lamp LED7.

[0059] In some embodiments, the voltage of the control level output by the expander U3 is 5V.

[0060] In some embodiments, the chip test circuit further comprises a power supply module, the power supply module is arranged on the front surface of the substrate 100, the power supply module is connected with the control module 200 and the coaxial switch, and the power supply module is used for supplying power for the coaxial switch and the control module 200.

[0061] In some embodiments, the coaxial switch is combined with Figure 6As shown, the power supply module includes a boost chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, a first diode D1, a first inductor L1, a first switch tube Q1, and a indicator lamp LED0. The first resistor R1, the second resistor R2, the first capacitor C1, and the first switch tube Q1 form an enable control circuit for controlling the power output of the second power supply end VCC2 according to the second power supply voltage enable signal VCC2_EN.

[0062] The first power supply end VCC1 is grounded through the second capacitor C2, the seventh capacitor C7, and the third capacitor C3, and is connected to the input pin VIN of the boost chip U1. The enable pin EN of the boost chip U1 is connected to the enable control circuit through the fourth resistor R4, and is connected to the first power supply end VCC1 through the third resistor R3.

[0063] The input pin VIN of the boost chip U1 is connected to the switch pin SW of the boost chip U1 through the first inductor L1. The ground pin GND of the boost chip U1 is grounded. The feedback pin of the boost chip U1 is grounded through the seventh resistor R7 and the eighth resistor R8, and is connected to the cathode of the first diode D1 through the sixth resistor R6 and the fifth resistor R5. The anode of the first diode D1 is connected to the switch pin SW of the boost chip U1. The second power supply end VCC2 is grounded through the fourth capacitor C4, and the fifth capacitor C5 and the sixth capacitor C6 are connected in parallel. The second power supply end VCC2 is also grounded through the ninth resistor and the indicator lamp LED0, and the power supply state of the second power supply end is displayed through the indicator lamp LED0.

[0064] In some embodiments, Figure 7 and Figure 8 As shown in the schematic diagram of the coaxial switch board passive parameter test, 30cm test cables, coaxial switch cables, 30cm test cables, coaxial switches, and 1m test cables are sequentially connected to form a test link, Figure 7 As shown in the schematic diagram of the S[2,1] parameter, Figure 8 As shown in the schematic diagram of the S[1,1] parameter, Figure 7 and Figure 8 As shown, when the frequency is 8.5GHz, the transmission coefficient S[2,1] of the test link is -3.016dB, which has little effect on signal quality.

[0065] The application further provides a test device, comprising a test instrument and the chip test circuit according to any one of the above embodiments, wherein the signal switching module is connected to the test instrument.

[0066] In the embodiment, the control module and the plurality of coaxial switches are arranged on the front surface of the substrate, the sockets of the coaxial switches are exposed on the back surface of the substrate through the switch through holes on the substrate, the plurality of coaxial switches are electrically connected in series or in parallel to form a differential switch switching circuit, the differential signals output by the differential switch switching circuit are converted into single-ended signals for output, the switch states of the plurality of coaxial switches are controlled by the control module, different test links are formed, the differential signal pins in the chip under test are connected respectively, the multi-channel coverage test of the chip under test is realized, the signal quality is not affected, and the test efficiency of the chip is improved.

[0067] In the application, it can be understood that the description of rows and columns is determined based on the relative positions of the pressure sensing points, and is only a way of orientation description. In other embodiments, a row can correspond to a column in the application, and a column can correspond to a row in the application. In the above embodiments, the description of each embodiment has its own emphasis. The parts not described or recorded in a certain embodiment can be referred to the related description of other embodiments.

[0068] The above embodiments are only used to illustrate the technical solutions of the application, rather than limit them. Although the application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features. The modification or replacement does not make the essence of the corresponding technical solution deviate from the spirit and scope of the technical solutions of the embodiments of the application, and should be included in the protection scope of the application.

Claims

1. A chip test circuit, characterized by comprising: The chip test circuit comprises: a substrate; a control module and a differential switch switching circuit arranged on the front surface of the substrate, the differential switch switching circuit comprising a plurality of coaxial switches, the sockets of the coaxial switches being exposed on the back surface of the substrate through switch through holes on the substrate, the plurality of coaxial switches being electrically connected in series or in parallel to form the differential switch switching circuit; a signal conversion module connected with the differential switch switching circuit, for converting differential signals output by the differential switch switching circuit into single-ended signals; the plurality of coaxial switches are connected with the control module, and the switch states of the coaxial switches are controlled by the control module.

2. The chip test circuit according to claim 1, wherein The chip test circuit further comprises: a plurality of light-emitting modules arranged on the front surface of the substrate and corresponding to the plurality of coaxial switches; the light-emitting modules expose light-emitting areas of the light-emitting modules through light source through holes on the substrate.

3. The chip test circuit according to claim 2, wherein Each of the light-emitting modules comprises a plurality of light-emitting units corresponding to input ends of the coaxial switches.

4. The chip test circuit according to claim 3, wherein The cross section of the coaxial switch is circular, and the plurality of light-emitting units in each of the light-emitting modules are arranged in a ring shape at the periphery of the switch through hole.

5. The chip test circuit according to claim 4, wherein The output end of the coaxial switch is located in the center area of the cross section, and the input end of the coaxial switch is located in the edge area of the cross section.

6. The chip test circuit of claim 1, wherein, The plurality of coaxial switches comprise M*N first-level coaxial switches and N second-level coaxial switches, M input ends of each of the second-level coaxial switches being connected to output ends of corresponding M first-level coaxial switches.

7. The chip test circuit according to claim 6, wherein Each of the coaxial switches comprises six input ends and one output end, and the coaxial switch is controlled by the control module to select one of the input ends to be connected with the output end.

8. The chip testing circuit according to any one of claims 1 to 7, wherein The control module is further configured to control two coaxial switches in the differential switch switching circuit to simultaneously connect to a pair of differential pins of a chip to be tested.

9. The chip testing circuit according to any one of claims 1 to 7, wherein The chip test circuit further comprises: a power supply module arranged on the front surface of the substrate and connected with the control module and the coaxial switches, for supplying power to the coaxial switches and the control module.

10. A test device, characterized by The test device comprises a test instrument and the chip test circuit according to any one of claims 1-9, and the signal conversion module is connected with the test instrument.