Wafer oxidation rate testing structure

Abstract

The utility model provides a wafer oxidation rate test structure, which comprises an oxidation furnace, a plurality of bearing parts arranged at different temperature zones of the oxidation furnace, and wafer sample slices to be tested arranged on the bearing parts, the upper surfaces of the bearing parts are sunken to form sinking grooves, and the wafer sample slices to be tested are positioned in the sinking grooves. According to the wafer oxidation rate testing structure disclosed by the utility model, only one wafer can be cut into a plurality of sample slices so as to realize wafer oxidation rate testing at different temperature zones of an oxidation furnace, and the plurality of sample slices can be repeatedly used, so that the testing cost is greatly reduced.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor device manufacturing technology, and in particular to a wafer oxidation rate testing structure. Background Technology

[0002] In the VCSEL (Variable Residual Crystallizer) process of compound semiconductors, a vertical oxidation furnace is used to perform aperture oxidation on the oxide aperture area during wafer fabrication, which determines the size of the light-emitting aperture. Therefore, it is necessary to accurately test the aperture size of the oxide aperture.

[0003] In the existing technology, if three product samples are placed at the top, middle and bottom positions of the vertical furnace tube for oxidation rate testing each time, it will result in a large testing cost. Therefore, a method is needed to reduce the testing cost. Utility Model Content

[0004] To address the shortcomings of existing technologies, the purpose of this utility model is to provide a wafer oxidation rate testing structure, aiming to solve the technical problem that the existing technology would result in high testing costs if three product samples were placed at the top, middle, and bottom positions of a vertical furnace tube for each oxidation rate test.

[0005] To achieve the above objectives, this utility model is implemented through the following technical solution:

[0006] A wafer oxidation rate testing structure includes an oxidation furnace, multiple support components placed at different temperature zones of the oxidation furnace, and a wafer sample slice to be tested disposed on the support components. The upper surface of the support components is recessed to form a sink, and the wafer sample slice to be tested is located in the sink.

[0007] According to one aspect of the above technical solution, the wafer sample slice to be tested is the aperture region of the wafer.

[0008] According to one aspect of the above technical solution, the width of the wafer sample slice to be tested is 10mm to 50mm, and the length of the wafer sample slice to be tested is 10mm to 50mm.

[0009] According to one aspect of the above technical solution, the supporting component is a silicon carrier.

[0010] According to one aspect of the above technical solution, the diameter of the silicon substrate is 150mm ± 0.3mm.

[0011] According to one aspect of the above technical solution, the thickness of the silicon substrate is 670um to 680um.

[0012] According to one aspect of the above technical solution, the width of the settling tank is 120mm to 140mm.

[0013] According to one aspect of the above technical solution, the depth of the settling tank is 250um to 350um.

[0014] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0015] By cutting the wafer into sample slices and setting up a support component and a recessed sink on the support component, the wafer sample slice to be tested is placed on the support component, and multiple support components containing wafer sample slices to be tested are placed in different temperature zones of the oxidation furnace. The oxidation furnace is programmed to perform oxidation operations on the wafer sample slices to be tested. The purpose of placing the wafer sample slice to be tested in the center of the sink is to prevent the airflow inside the oxidation furnace tube from blowing it away.

[0016] This invention allows for the cutting of a single wafer into multiple sample slices to test the wafer oxidation rate at different temperature zones in an oxidation furnace. The multiple sample slices can be reused, significantly reducing testing costs. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of the supporting component in the wafer oxidation rate testing structure in the first embodiment of this utility model;

[0018] Figure 2 This is a flowchart of the wafer oxidation rate testing steps in the first embodiment of this utility model;

[0019] Explanation of key component symbols:

[0020] load-bearing components 10 Settling tank 20 wafer sample slice to be tested 30

[0021] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this utility model. Detailed Implementation

[0022] To facilitate understanding of this utility model, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of this utility model are shown in the drawings. However, this utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this utility model will be more thorough and complete.

[0023] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0025] Please see Figure 1 The first embodiment of this utility model provides a wafer oxidation rate testing structure, including an oxidation furnace, multiple support components 10 placed at different temperature zones of the oxidation furnace, and a wafer sample slice 30 to be tested disposed on the support components 10. The upper surface of the support component 10 is recessed to form a sink 20, and the wafer sample slice 30 to be tested is located at the center of the sink 20.

[0026] Understandably, this utility model cuts a wafer into sample slices, sets up a support component 10, and recesses a sink 20 on the support component 10. The wafer sample slice 30 to be tested is placed on the support component 10, and multiple support components 10 containing wafer sample slices 30 to be tested are placed in different temperature zones of the oxidation furnace. The oxidation furnace is programmed to perform oxidation operations on the wafer sample slices 30 to be tested. The purpose of placing the wafer sample slices 30 to be tested in the center of the sink 20 is to prevent the airflow in the oxidation furnace tube from blowing them away.

[0027] This invention allows for the cutting of a single wafer into multiple sample slices to test the wafer oxidation rate at different temperature zones in an oxidation furnace. The multiple sample slices can be reused, significantly reducing testing costs.

[0028] Furthermore, the wafer sample slice 30 to be tested is the aperture region of the wafer.

[0029] It is understandable that the aperture area of ​​the wafer is used as a wafer sample slice 30 to be tested because the existing technology also performs oxidation testing on the aperture area of ​​the entire wafer.

[0030] Specifically, the width of the wafer sample slice 30 to be tested is 10mm to 50mm, and the length of the wafer sample slice 30 to be tested is 10mm to 50mm.

[0031] In this embodiment, the cross-section of the wafer sample slice 30 to be tested is square. In other embodiments, the wafer sample slice 30 to be tested can also be a small sample of other sizes.

[0032] Furthermore, the supporting component 10 is a silicon substrate; the diameter of the silicon substrate is 150mm ± 0.3mm; and the thickness of the silicon substrate is 670um to 680um.

[0033] Furthermore, the width of the immersion tank 20 is 120mm to 140mm; the depth of the immersion tank 20 is 250um to 350um. The width of the immersion tank 20 needs to be larger than the width of the wafer sample slice 30 to be tested, so that the wafer sample slice 30 to be tested can be prevented from being blown away by the airflow in the furnace tube.

[0034] Please see Figure 2 The steps for testing the wafer oxidation rate are as follows:

[0035] S1. Prepare a 6-inch silicon wafer with a thickness of 675um and a diameter of 150mm, and grind a groove with a diameter of 130mm and a depth of 300um in the central area of ​​the silicon wafer.

[0036] S2, use a diamond cutter to cut the aperture area of ​​the wafer into 10mm*10mm wafer sample slices to be tested;

[0037] S3, use tweezers to take a sample slice of the wafer to be tested and place it in the center area of ​​the sink, and place multiple silicon carriers into different temperature zones of the oxidation furnace;

[0038] S4 sets the program for the oxidation furnace: water bubbling temperature 90°, nitrogen flow rate 5L / M, main oxidation temperature 400°, and time 70 minutes.

[0039] S5, after oxidation is complete, remove the silicon carrier and use tweezers to remove the wafer sample slice to be tested;

[0040] S6. Place the wafer sample slice to be tested under an infrared microscope for measurement. If the oxide pore size on the wafer sample slice deviates significantly from the expected value, adjust the oxidation time according to the test results and repeat the above steps until the oxide pore size corresponds to the expected value. Then, calculate the oxidation rate based on the oxidation depth. If the oxidation rate of the wafer sample slice to be tested is consistent in each temperature zone, the test is complete, and the oxidation rate is recorded.

[0041] In summary, the wafer oxidation rate testing structure in the above embodiments of this utility model cuts the wafer into sample slices, sets up a support component, and sets a recessed groove on the support component. The wafer sample slice to be tested is placed on the support component, and multiple support components containing wafer sample slices to be tested are placed in different temperature zones of the oxidation furnace. The oxidation furnace is programmed to perform oxidation operations on the wafer sample slices to be tested. The purpose of placing the wafer sample slices to be tested in the center of the recessed groove is to prevent the airflow in the oxidation furnace tube from blowing them away.

[0042] This invention allows for the cutting of a single wafer into multiple sample slices to test the wafer oxidation rate at different temperature zones in an oxidation furnace. The multiple sample slices can be reused, significantly reducing testing costs.

[0043] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0044] The embodiments described above are merely illustrative of several implementations of this utility model, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A wafer oxidation rate testing structure, characterized in that, The device includes an oxidation furnace, multiple support components placed at different temperature zones of the oxidation furnace, and wafer sample slices to be tested disposed on the support components. The upper surface of the support components is recessed to form a sink, and the wafer sample slices to be tested are located in the sink.

2. The wafer oxidation rate testing structure according to claim 1, characterized in that, The wafer sample slice to be tested is the aperture region of the wafer.

3. The wafer oxidation rate testing structure according to claim 1, characterized in that, The width of the wafer sample slice to be tested is 10mm to 50mm, and the length of the wafer sample slice to be tested is 10mm to 50mm.

4. The wafer oxidation rate testing structure according to claim 1, characterized in that, The supporting component is a silicon carrier.

5. The wafer oxidation rate testing structure according to claim 4, characterized in that, The diameter of the silicon substrate is 150 mm ± 0.3 mm.

6. The wafer oxidation rate testing structure according to claim 5, characterized in that, The thickness of the silicon substrate is 670um to 680um.

7. The wafer oxidation rate testing structure according to claim 1, characterized in that, The width of the settling tank is 120mm to 140mm.

8. The wafer oxidation rate testing structure according to claim 7, characterized in that, The depth of the settling tank is 250um to 350um.

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