0.5-6GHz frequency conversion assembly
By adopting a dual-frequency conversion channel architecture and integrated design, the complexity and maintenance challenges of frequency conversion components are solved, achieving full-band coverage and improved signal processing capabilities, while simplifying system integration and maintenance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIANGSU SHENGJIA MICROELECTRONICS TECH CO LTD
- Filing Date
- 2025-05-07
- Publication Date
- 2026-05-05
AI Technical Summary
Existing frequency converter components adopt a multi-module independent design, which leads to problems such as complex overall architecture, long signal transmission path, high transmission loss, high hardware cost, large equipment size, and difficult maintenance.
It adopts a dual-frequency conversion channel architecture, combined with a 7-segment filter bank and a two-stage single-pole multi-throw switch, and integrates a temperature-compensated attenuator, a low-noise amplifier and a DLVA detector module. It supports 10MHz/100MHz dual-frequency input, and uses a DDS phase-locked source and a 1-to-4 power divider to achieve fast switching and phase synchronization of the local oscillator signal. It adopts a standardized interface design.
It achieves seamless coverage across the entire 0.5-6GHz frequency band, suppresses in-band interference and out-of-band spurious signals, improves signal resolution, supports multi-band signal processing, simplifies system integration and upgrades, and reduces maintenance costs.
Smart Images
Figure CN224205049U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of microwave communication, and in particular to a 0.5-6GHz frequency conversion component. Background Technology
[0002] Current frequency converters employ a multi-module independent design, with the first and second frequency converters, local oscillator, and clock switching components operating independently. This dual-channel, dual-local oscillator design results in a complex overall architecture. The modules are connected via numerous interfaces, leading to long signal transmission paths, which not only increases transmission losses but also raises hardware costs. Furthermore, this design results in bulky and heavy equipment, hindering miniaturization and portability. In terms of maintenance, troubleshooting requires checking each module individually, making location and repair difficult and costly. Utility Model Content
[0003] The purpose of this invention is to provide a 0.5-6GHz frequency converter with dual frequency conversion channels, controllable input and output power, and an internally provided local oscillator.
[0004] The purpose of this utility model is achieved as follows: a 0.5-6GHz frequency conversion component, comprising a first frequency conversion component, a second frequency conversion component, a local oscillator component, and a clock switching component;
[0005] Both the first and second frequency conversion components consist of a detection channel and a 0.5G-6G output channel. The 0.5-6GHz output channel is composed of a 6G low-pass filter, a first switch group, a first low-noise amplifier, a temperature-compensated attenuator, a first programmable controller, a second low-noise amplifier, a first power divider, a first mixer, a 14±0.25G filter, a third low-noise amplifier, a second mixer, a 6G low-pass filter, an amplifier, a second programmable controller, and an output switch group connected in series. The detection channel is a DLVA module connected in series with one end of the power divider to output the detection frequency.
[0006] The local oscillator assembly consists of two local oscillator channels. Each local oscillator channel is composed of a 14.5-20GHz DDS phase-locked source, an amplifier, and a filter connected in series. The input terminals of the two 14.5-20GHz DDS phase-locked sources are connected to the output terminal of the second power divider. The input terminal of the power divider is connected to one of the output terminals of the one-to-four power divider of the clock switching circuit.
[0007] The clock switching component consists of an input switch, a third power divider, a 100MHz phase-locked crystal oscillator, and a one-to-four power divider connected in series.
[0008] Preferably, the first switch group consists of a two-stage single-pole triple-throw switch, an attenuator, a direct pass, and a low-noise amplifier. The signal is output in three paths after passing through the single-pole triple-throw switch, and then divided into three frequency segments after passing through the attenuator, direct pass, and low-noise amplifier, and finally combined into one signal output after passing through the single-pole triple-throw switch.
[0009] Preferably, the output switch group consists of a two-stage single-pole seven-throw switch, a 0.5-0.9GHz filter, a 0.5-1.5GHz filter, a 1-1.8GHz filter, a 1.3-2.3GHz filter, a 1.8-3GHz filter, a 2.5-4GHz filter, and a 3.5-6GHz filter. The signal is split into seven outputs by the single-pole seven-throw switch, and then further divided into seven frequency segments by the 0.5-0.9GHz filter, 0.5-1.5GHz filter, 1-1.8GHz filter, 1.3-2.3GHz filter, 1.8-3GHz filter, 2.5-4GHz filter, and 3.5-6GHz filter, respectively. Finally, the signals are combined into one output signal by the single-pole seven-throw switch, with an output frequency of 0.5-6GHz.
[0010] Preferably, the input switches of the clock switching component receive 10MHz crystal oscillator and 10MHz signals respectively, and the 10MHz crystal oscillator and 10MHz signals enable switching.
[0011] Preferably, the two local oscillator channels are connected to the first mixer and the second mixer, respectively.
[0012] Preferably, the second power divider outputs a 10MHz frequency, and two of the output terminals of the 1-to-4 power divider output a 100MHz frequency and a matching frequency, respectively.
[0013] Compared with the prior art, the advantages of this utility model are:
[0014] 1. The component adopts a dual-frequency conversion channel architecture, combined with a 7-segment filter bank and a two-stage single-pole multi-throw switch, to achieve seamless coverage of the entire frequency band from 0.5 to 6 GHz, meeting the multi-band signal processing needs in complex electromagnetic environments.
[0015] 2. By integrating a temperature-compensated attenuator, a low-noise amplifier (LNA), and a DLVA detector module, in-band interference and out-of-band spurious signals are effectively suppressed, improving signal resolution.
[0016] 3. The clock switching component supports 10MHz / 100MHz dual-frequency input. Combined with the DDS phase-locked source and the 1-to-4 power divider, it enables fast switching and phase synchronization of the local oscillator signal, meeting the requirements of multi-channel parallel processing.
[0017] 4. The components adopt a standardized interface design, and each functional module (frequency converter, local oscillator, clock) is independently packaged, which facilitates system integration and upgrades. Attached Figure Description
[0018] Figure 1 This is a flowchart illustrating the present invention. Detailed Implementation
[0019] The following specific embodiments illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification.
[0020] It should be noted that in the description of this utility model, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the utility model product is in use. These terms are used only for the convenience of describing this utility model and for simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model. Furthermore, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance. The terms "horizontal," "vertical," and "suspended," etc., do not indicate that the component must be absolutely horizontal or suspended, but rather that it can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0021] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0022] like Figure 1 As shown, a 0.5-6GHz frequency conversion component is composed of a first frequency conversion component, a second frequency conversion component, a local oscillator component, and a clock switching component;
[0023] Both the first and second frequency conversion components consist of a detection channel and a 0.5G-6G output channel. The 0.5-6GHz output channel is composed of a 6G low-pass filter, a first switching group, a first low-noise amplifier, a temperature-compensated attenuator, a first programmable controller, a second low-noise amplifier, a first power divider, a first mixer, a 14±0.25G filter, a third low-noise amplifier, a second mixer, a 6G low-pass filter, an amplifier, a second programmable controller, and an output switching group connected in series. The detection channel is a DLVA module connected in series with one end of the power divider to output the detection frequency.
[0024] The local oscillator assembly consists of two local oscillator channels. Each local oscillator channel is composed of a 14.5-20GHz DDS phase-locked source, an amplifier, and a filter connected in series. The input terminals of the two 14.5-20GHz DDS phase-locked sources are connected to the output terminal of the second power divider. The input terminal of the power divider is connected to one of the output terminals of the 1 to 4 power divider of the clock switching circuit.
[0025] The clock switching component consists of an input switch, a third power divider, a 100MHz phase-locked crystal oscillator, and a 1-to-4 power divider connected in series.
[0026] The first switching group consists of a two-stage single-pole triple-throw switch, an attenuator, a pass-through, and a low-noise amplifier. The signal is split into three outputs after passing through the single-pole triple-throw switch, and then further split into three frequency segments by the attenuator, pass-through, and low-noise amplifier. Finally, the signals are combined into one output signal after passing through the single-pole triple-throw switch. The multi-stage low-noise amplifier setup effectively reduces the noise figure and improves the signal-to-noise ratio while ensuring signal gain, thus ensuring the quality of the signal during transmission and processing.
[0027] The output switch group consists of a two-stage single-pole seven-throw switch, a 0.5-0.9GHz filter, a 0.5-1.5GHz filter, a 1-1.8GHz filter, a 1.3-2.3GHz filter, a 1.8-3GHz filter, a 2.5-4GHz filter, and a 3.5-6GHz filter. The signal is split into seven outputs by the single-pole seven-throw switch, and then further divided into seven frequency segments by the 0.5-0.9GHz, 0.5-1.5GHz, 1-1.8GHz, 1.3-2.3GHz, 1.8-3GHz, 2.5-4GHz, and 3.5-6GHz filters, respectively. Finally, the signals are combined into one output signal by the single-pole seven-throw switch, with an output frequency of 0.5-6GHz.
[0028] The clock switching component's input switches accept 10MHz crystal oscillator and 10MHz signals respectively, enabling switching between the two signals. Different clock sources can be selected according to actual needs, improving the system's flexibility and compatibility.
[0029] The two local oscillator channels are connected to the first mixer and the second mixer, respectively. The local oscillator signal is mixed with the input signal to realize the conversion of the signal frequency. Through two mixing processes, the input signal can be converted to the required frequency range to meet the signal frequency requirements of different systems.
[0030] The second power divider outputs a 10MHz frequency, and the 1 to 4 power divider has two output terminals that output a 100MHz frequency and a matching frequency, respectively; this satisfies the system's requirement for multiplexing clock signals, with the two output terminals outputting a 100MHz frequency and a matching frequency, respectively, to provide clock support for other functional modules of the system.
[0031] The working principle of this invention is explained as follows: The input RF signal first enters the switching group of the first frequency conversion component. After three-stage frequency pre-division, it is up-converted in the first mixer along with the 14.5-20GHz local oscillator signal generated by the local oscillator component. Then, it passes through a 14±0.25GHz filter to suppress spurious signals. The second mixer down-converts the signal to an intermediate frequency (IF). After a 6GHz low-pass filter, it is finely segmented by seven narrowband filters (covering 0.5-6GHz) in the output switching group, and finally synthesized for output. The local oscillator component is independently driven by dual DDS phase-locked sources and distributed to two mixers. Combined with a 10MHz / 100MHz reference clock provided by the clock switching component, frequency stability and phase synchronization are ensured. The modular design supports redundant switching, and the temperature-compensated attenuator and programmable amplifier work together to optimize signal quality, achieving wide-bandwidth, high-linearity frequency conversion processing.
[0032] The actual specifications of this utility model are as follows: Input frequency range: 0.5-6GHz; Bandwidth: 500MHz; Input power range: -50~10dBm; Output frequency range: 0.5-6GHz; Output power range: ≤-20dBm; Output power control: >30dB, step 0.5dB; Harmonic suppression: ≤-60dBc; Clutter suppression: ≤-50dBc; Local oscillator leakage: ≤-60dBm; Local oscillator step: 1Hz; Standing wave ratio: ≤1.6; Supports local and external 10MHz.
[0033] The embodiments described above are merely preferred embodiments of the present invention and are not intended to limit the concept and scope of the present invention. Various modifications and improvements made to the technical solutions of the present invention by those skilled in the art without departing from the design concept of the present invention should fall within the protection scope of the present invention. The technical content for which protection is sought in the present invention has been fully described in the claims.
Claims
1. A 0.5-6GHz frequency converter, characterized in that, It consists of a first frequency converter, a second frequency converter, a local oscillator, and a clock switching component; Both the first and second frequency conversion components consist of a detection channel and a 0.5G-6G output channel. The 0.5-6GHz output channel is composed of a 6G low-pass filter, a first switch group, a first low-noise amplifier, a temperature-compensated attenuator, a first programmable controller, a second low-noise amplifier, a first power divider, a first mixer, a 14±0.25G filter, a third low-noise amplifier, a second mixer, a 6G low-pass filter, an amplifier, a second programmable controller, and an output switch group connected in series. The detection channel is a DLVA module connected in series with one end of the power divider to output the detection frequency. The local oscillator assembly consists of two local oscillator channels. Each local oscillator channel is composed of a 14.5-20GHz DDS phase-locked source, an amplifier, and a filter connected in series. The input terminals of the two 14.5-20GHz DDS phase-locked sources are connected to the output terminal of the second power divider. The input terminal of the power divider is connected to one of the output terminals of the one-to-four power divider of the clock switching circuit. The clock switching component consists of an input switch, a third power divider, a 100MHz phase-locked crystal oscillator, and a one-to-four power divider connected in series.
2. The 0.5-6GHz frequency converter component according to claim 1, characterized in that, The first switch group consists of a two-stage single-pole triple-throw switch, an attenuator, a direct pass, and a low-noise amplifier. The signal is output in three paths after passing through the single-pole triple-throw switch, and then divided into three frequency segments after passing through the attenuator, direct pass, and low-noise amplifier respectively. Finally, the signals are combined into one signal output after passing through the single-pole triple-throw switch.
3. The 0.5-6GHz frequency converter component according to claim 1, characterized in that, The output switch group consists of a two-stage single-pole seven-throw switch, a 0.5-0.9GHz filter, a 0.5-1.5GHz filter, a 1-1.8GHz filter, a 1.3-2.3GHz filter, a 1.8-3GHz filter, a 2.5-4GHz filter, and a 3.5-6GHz filter. The signal is split into seven outputs by the single-pole seven-throw switch, and then further divided into seven frequency segments by the 0.5-0.9GHz, 0.5-1.5GHz, 1-1.8GHz, 1.3-2.3GHz, 1.8-3GHz, 2.5-4GHz, and 3.5-6GHz filters, respectively. Finally, the signals are combined into one output signal by the single-pole seven-throw switch, with an output frequency of 0.5-6GHz.
4. The 0.5-6GHz frequency converter component according to claim 1, characterized in that, The clock switching component has input switches for 10MHz crystal oscillator and 10MHz signals respectively, which enable switching.
5. A 0.5-6GHz frequency converter according to claim 1, characterized in that, The two local oscillator channels are respectively connected to the first mixer and the second mixer.
6. A 0.5-6GHz frequency converter according to claim 1, characterized in that, The second power divider outputs a 10MHz frequency, and two of the output terminals of the 1-to-4 power divider output a 100MHz frequency and a matching frequency, respectively.