A 0.38-18 GHz broadband low harmonic amplifier

By introducing a pre-blocking band-stop filter circuit, a primary amplification circuit, an interstage broadband matching network, and a frequency band harmonic suppression module into the amplifier, combined with dynamic bias control and digital feedback adjustment, the problems of high insertion loss and poor frequency band adaptability of broadband amplifiers are solved, achieving low harmonic output and frequency band stability across the entire frequency band.

CN224319329UActive Publication Date: 2026-06-02CHENGDU JINWU TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CHENGDU JINWU TECH CO LTD
Filing Date
2025-06-09
Publication Date
2026-06-02

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Abstract

The utility model discloses a 0.38GHz-18GHz broadband low harmonic amplifier relates to the amplifier field, the amplifier includes signal input, signal input connects the pre band -stop filter circuit, primary amplification circuit, interstage broadband matching network, final stage amplification circuit and frequency division section harmonic suppression module in proper order, the output of frequency division section harmonic suppression module is connected signal output of the amplifier, the amplifier still includes dynamic bias control circuit, dynamic bias control circuit is connected with the bias node of primary amplification circuit and the bias node of final stage amplification circuit respectively. The utility model discloses through dynamic bias control circuit real -time regulation primary and final stage amplification circuit's bias voltage, combines frequency division section harmonic suppression module adaptive switching filter subunit, accurate suppression full -band harmonic, solved the problem that traditional broadband amplifier harmonic suppression bandwidth is insufficient, the big problem of insertion loss.
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Description

Technical Field

[0001] This utility model relates to the field of amplifiers, specifically to a 0.38GHz-18GHz broadband low harmonic amplifier. Background Technology

[0002] Radio frequency amplifiers are core components in wireless communication, radar systems, satellite transmission and other fields. As modern communication technology develops towards higher frequencies and wider bandwidths, higher requirements are placed on the performance of broadband radio frequency amplifiers.

[0003] Existing amplifiers often use a single broadband filter or a fixed-tuned filter to suppress harmonics. These approaches have the following problems:

[0004] Excessive insertion loss: Broadband filters need to sacrifice passband flatness to cover the entire frequency band, resulting in attenuation of the useful signal;

[0005] Poor frequency band adaptability: Fixed filters cannot dynamically adjust the suppression frequency according to the main frequency of the input signal. Especially in ultra-wideband scenarios, higher-order harmonics may fall into other communication frequency bands, causing interference. Utility Model Content

[0006] The purpose of this invention is to solve the problems of excessive insertion loss and poor frequency band adaptability in 0.38GHz-18GHz broadband low harmonic amplifiers.

[0007] To achieve the above objectives, this utility model provides a 0.38GHz-18GHz broadband low harmonic amplifier. The amplifier includes a signal input terminal, which is sequentially connected to a pre-blocking filter circuit, a primary amplifier circuit, an inter-stage broadband matching network, a final stage amplifier circuit, and a frequency-division harmonic suppression module. The output terminal of the frequency-division harmonic suppression module is connected to the signal output terminal of the amplifier.

[0008] The amplifier also includes a dynamic bias control circuit, which is connected to the bias node of the primary amplifier circuit and the bias node of the final amplifier circuit.

[0009] In this invention, the input signal enters the pre-blocking filter circuit from the signal input terminal. After filtering out interference signals in the preset stopband, it undergoes low-noise amplification in the primary amplifier circuit, followed by full-band impedance matching through an inter-stage broadband matching network, and then is transmitted to the final amplifier circuit for power amplification. The amplified signal enters the frequency-division harmonic suppression module, which automatically switches the corresponding filter subunit according to the signal's main frequency to suppress harmonic components. This ensures low harmonic output across the entire frequency band while reducing signal attenuation in the passband and lowering insertion loss. Finally, the signal is output from the signal output terminal. The dynamic bias control circuit can monitor the current and voltage of the bias nodes in the primary and final amplifier circuits in real time and maintain the linear operating state of the amplifier tube by adjusting the bias voltage value, thereby reducing linear distortion and harmonic generation and improving the full-band harmonic suppression effect.

[0010] Furthermore, the amplifier also includes a digital feedback adjustment module. The input terminal of the digital feedback adjustment module is connected to the signal output terminal through a sampling circuit, and the output terminal of the digital feedback adjustment module is connected to the control ports of the primary amplifier circuit and the final amplifier circuit, respectively.

[0011] The digital feedback adjustment module analyzes the harmonic distortion components of the output signal after acquiring the output signal, and generates a pre-distortion compensation signal which is injected into the control ports of the primary amplifier circuit and the final amplifier circuit to dynamically cancel the nonlinear distortion of the signal and solve the problems of intermodulation distortion and harmonic distortion caused by device aging or temperature drift.

[0012] Furthermore, the amplifier also includes an interstage feedback network, which includes a directional coupler and an adjustable attenuator. The input of the directional coupler is connected to the output of the final stage amplifier circuit, the output of the directional coupler is connected to the input of the adjustable attenuator, and the output of the adjustable attenuator is connected to the input of the primary stage amplifier circuit.

[0013] In this circuit, the output signal of the final stage amplifier circuit extracts a portion of the reflected signal through a directional coupler. After the feedback strength is adjusted by an adjustable attenuator, the signal is injected into the input of the primary amplifier circuit and superimposed on the original input signal to cancel out the interstage reflection components. The interstage feedback network suppresses the reverse transmission signal, thus mitigating the risk of increased VSWR and high-frequency self-oscillation caused by impedance mismatch in multi-stage amplifiers, ensuring stable operation across the entire 0.38-18GHz frequency band.

[0014] Furthermore, the frequency band harmonic suppression module includes multiple filtering sub-units, each of which covers a sub-frequency band. The filtering sub-units are automatically switched between each other by a radio frequency switch driven by a frequency detection circuit. Specifically, the frequency detection circuit analyzes the main frequency of the output signal in real time and drives the radio frequency switch to automatically switch to the filtering sub-unit of the corresponding sub-frequency band, effectively suppressing harmonics for different frequency bands.

[0015] Furthermore, a harmonic-bias linkage control unit is provided between the frequency band harmonic suppression module and the dynamic bias control circuit. The harmonic-bias linkage control unit is used to control the dynamic bias control circuit to adjust the bias voltage value of the final stage amplifier circuit based on the sub-frequency band corresponding to the currently operating filter sub-unit, thereby optimizing the matching between transistor transconductance and harmonic suppression.

[0016] Furthermore, the radio frequency switch is a PIN diode switch array, which shortens the switching time to the microsecond level to meet the requirements of frequency modulation signals.

[0017] Furthermore, the amplifier also includes a temperature sensor for acquiring the temperature of the final stage amplifier circuit, and the temperature sensor is connected to the dynamic bias control circuit.

[0018] The temperature sensor monitors the junction temperature of the final stage amplifier circuit in real time and feeds it back to the dynamic bias control circuit, which adjusts its bias voltage to compensate for temperature drift.

[0019] Furthermore, the adjustable attenuator is a digitally controlled attenuator to precisely adjust the strength of the feedback signal.

[0020] Furthermore, the amplifying transistors in the primary and final amplifying circuits are gallium arsenide HEMT transistors or gallium nitride HEMT transistors, utilizing their high electron mobility characteristics to achieve wideband high gain.

[0021] Furthermore, the stopband center frequency of the pre-block filter circuit is 2.4GHz and 5.8GHz, and the stopband attenuation is greater than 30dB.

[0022] One or more technical solutions provided by this utility model have at least the following technical effects or advantages:

[0023] This invention uses a dynamic bias control circuit to adjust the bias voltage of the primary and final stage amplifier circuits in real time. Combined with a frequency band harmonic suppression module that adaptively switches the filter subunit, it accurately suppresses harmonics across the entire frequency band. This solves the problems of insufficient harmonic suppression bandwidth and large insertion loss in traditional broadband amplifiers caused by fixed bias and a single filter. At the same time, the digital feedback adjustment module samples the output signal through closed loop and injects a pre-distortion compensation signal to cancel the nonlinear distortion of the transistor in real time. Ultimately, it achieves a high harmonic suppression ratio amplification in the range of 0.38-18GHz, taking into account wide bandwidth, low distortion, and high stability. Attached Figure Description

[0024] The accompanying drawings, which are provided to further illustrate the embodiments of the present invention and constitute a part of the present invention, do not constitute a limitation thereof.

[0025] Figure 1 This is one of the schematic diagrams of the connection structure of the 0.38GHz-18GHz broadband low harmonic amplifier in this utility model;

[0026] Figure 2 This is the second schematic diagram of the connection structure of the 0.38GHz-18GHz broadband low harmonic amplifier in this utility model;

[0027] Among them, 1-pre-block filter circuit, 2-primary amplifier circuit, 3-interstage broadband matching network, 4-final stage amplifier circuit, 5-frequency band harmonic suppression module, 6-dynamic bias control circuit, 7-digital feedback adjustment module, 8-interstage feedback network, 9-harmonic-bias linkage control unit, 10-adjustable attenuator. Detailed Implementation

[0028] To better understand the above-mentioned objectives, features, and advantages of this utility model, the present utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, where there is no conflict, the embodiments of this utility model and the features within them can be combined with each other.

[0029] Many specific details are set forth in the following description in order to provide a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.

[0030] Example 1

[0031] Please refer to Figure 1 and Figure 2This utility model embodiment provides a 0.38GHz-18GHz broadband low harmonic amplifier. The amplifier includes a signal input terminal, which is sequentially connected to a pre-blocking filter circuit 1, a primary amplifier circuit 2, an inter-stage broadband matching network 3, a final stage amplifier circuit 4, and a frequency-division harmonic suppression module 5. The output terminal of the frequency-division harmonic suppression module 5 is connected to the signal output terminal of the amplifier.

[0032] The amplifier also includes a dynamic bias control circuit 6, which is connected to the bias node of the primary amplifier circuit 2 and the bias node of the final amplifier circuit 4.

[0033] In this embodiment, the pre-blocking band-stop filter circuit 1 is composed of an LC series resonant network and microstrip stubs, with stopband center frequencies of 2.4 GHz and 5.8 GHz and stopband attenuation greater than 30 dB. The interstage broadband matching network 3 is composed of three λ / 4 impedance transformation transmission lines connected in series, with characteristic impedances of 25 Ω, 35 Ω, and 50 Ω, respectively. The dynamic bias control circuit 6 samples the input signal amplitude in real time using an AD8367 envelope detector and dynamically adjusts the bias voltage of the primary and final stage amplifier circuits using a MAX1968 bias controller.

[0034] The amplifier further includes a digital feedback adjustment module 7. The input terminal of the digital feedback adjustment module 7 is connected to the signal output terminal through a sampling circuit, and the output terminal of the digital feedback adjustment module 7 is connected to the control ports of the primary amplifier circuit 2 and the final amplifier circuit 4, respectively.

[0035] In this embodiment, the digital feedback adjustment module 7 specifically includes a detector, an AD9625 analog-to-digital converter, a field-programmable gate array (FPGA), and an AD9144 digital-to-analog converter. During operation, the output signal is coupled and sampled by the detector, converted into a digital signal by the AD9625, and then input to the FPGA. The FPGA runs a predistortion algorithm to extract harmonic components, generates an inverse distortion compensation signal, and injects it into the control ports (such as the gate of the final stage) of the primary and final stage amplifier circuits through the AD9144.

[0036] The amplifier further includes an interstage feedback network 8, which includes a directional coupler 11 and an adjustable attenuator 10. The input of the directional coupler 11 is connected to the output of the final stage amplifier circuit 4, and the output of the directional coupler 11 is connected to the input of the adjustable attenuator 10. The output of the adjustable attenuator 10 is connected to the input of the primary stage amplifier circuit 2.

[0037] In this embodiment, the reflected signal output from the final stage amplifier circuit 4 is extracted by the directional coupler 11, attenuated to the target intensity by the adjustable attenuator 10, and then fed back to the input terminal of the primary amplifier circuit 2. Specifically, the directional coupler 11 can be an X3C20P1-20S directional coupler.

[0038] The frequency band harmonic suppression module 5 includes multiple filtering sub-units. In this embodiment, eight filtering sub-units are preferred. Each filtering sub-unit covers a sub-frequency band. As a preferred implementation, each filtering sub-unit covers a 2.25 GHz bandwidth. Automatic switching between the filtering sub-units is achieved through a radio frequency switch driven by a frequency detection circuit.

[0039] Among them, a harmonic-bias linkage control unit 9 is provided between the frequency band harmonic suppression module 5 and the dynamic bias control circuit 6. The harmonic-bias linkage control unit 9 is used to control the dynamic bias control circuit 6 to adjust the bias voltage value of the final stage amplifier circuit 4 based on the sub-frequency band corresponding to the currently operating filter sub-unit.

[0040] In this embodiment, the harmonic-bias linkage control unit 9 consists of an FPGA and a DAC module. The FPGA pre-stores a mapping table between sub-frequency bands and bias voltages (e.g., sub-frequency band 12-18GHz corresponds to a final stage Vds=30V). When the frequency band harmonic suppression module 5 switches to a certain sub-frequency band, the FPGA queries the mapping table based on the current sub-frequency band, generates the corresponding bias voltage control command, and outputs an analog voltage signal to the control port of the dynamic bias control circuit 6 via the AD5627. After receiving the command, the dynamic bias control circuit 6 adjusts the bias voltage of the final stage amplifier circuit 4 to the target value.

[0041] The radio frequency switch is a PIN diode switch array, specifically an HSMP-3810 PIN diode array.

[0042] The amplifier further includes a temperature sensor for acquiring the temperature of the final stage amplifier circuit 4, and the temperature sensor is connected to the dynamic bias control circuit 6. In a preferred embodiment, the temperature sensor is a surface-mount NTC thermistor, mounted on the surface of the heat sink substrate of the final stage amplifier circuit. After the temperature signal is acquired, it is input to the dynamic bias control circuit 6, which adjusts the bias voltage according to a preset temperature bias curve.

[0043] The adjustable attenuator 10 is a digitally controlled attenuator. The specific model can be selected by those skilled in the art according to the actual situation, and this utility model does not limit it.

[0044] In this embodiment, the amplifying transistors in the primary amplifier circuit 2 and the final amplifier circuit 4 are gallium arsenide (GaN) HEMT transistors or gallium nitride (GaN) HEMT transistors. In this embodiment, gallium nitride (GaN) HEMT transistors (model CGHV40010) are preferred. The static operating point of the primary amplifier circuit 2 is set to Vds=28V and Idq=120mA, and the static operating point of the final amplifier circuit 4 is set to Vds=30V and Idq=200mA.

[0045] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0046] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A 0.38GHz-18GHz broadband low harmonic amplifier, characterized in that, The amplifier includes a signal input terminal, which is sequentially connected to a pre-blocking filter circuit (1), a primary amplifier circuit (2), an interstage broadband matching network (3), a final stage amplifier circuit (4), and a frequency-division harmonic suppression module (5). The output terminal of the frequency-division harmonic suppression module (5) is connected to the signal output terminal of the amplifier. The amplifier also includes a dynamic bias control circuit (6), which is connected to the bias node of the primary amplifier circuit (2) and the bias node of the final amplifier circuit (4). The frequency band harmonic suppression module (5) includes multiple filter sub-units, each of which covers a sub-frequency band. Automatic switching between the filter sub-units is achieved through a radio frequency switch driven by a frequency detection circuit.

2. The amplifier according to claim 1, characterized in that, The amplifier also includes a digital feedback adjustment module (7). The input terminal of the digital feedback adjustment module (7) is connected to the signal output terminal through a sampling circuit. The output terminal of the digital feedback adjustment module (7) is connected to the control ports of the primary amplifier circuit (2) and the final amplifier circuit (4), respectively.

3. The amplifier according to claim 1, characterized in that, The amplifier also includes an interstage feedback network (8), which includes a directional coupler (11) and an adjustable attenuator (10). The input of the directional coupler (11) is connected to the output of the final stage amplifier circuit (4), the output of the directional coupler (11) is connected to the input of the adjustable attenuator (10), and the output of the adjustable attenuator (10) is connected to the input of the primary amplifier circuit (2).

4. The amplifier according to claim 1, characterized in that, A harmonic-bias linkage control unit (9) is provided between the frequency band harmonic suppression module (5) and the dynamic bias control circuit (6). The harmonic-bias linkage control unit (9) is used to control the dynamic bias control circuit (6) to adjust the bias voltage value of the final stage amplifier circuit (4) based on the sub-frequency band corresponding to the currently operating filter sub-unit.

5. The amplifier according to claim 1, characterized in that, The radio frequency switch is a PIN diode switch array.

6. The amplifier according to claim 1, characterized in that, The amplifier also includes a temperature sensor for acquiring the temperature of the final stage amplifier circuit (4), and the temperature sensor is connected to the dynamic bias control circuit (6).

7. The amplifier according to claim 3, characterized in that, The adjustable attenuator (10) is a digitally controlled attenuator.

8. The amplifier according to claim 1, characterized in that, The amplifying transistors in the primary amplifier circuit (2) and the final amplifier circuit (4) are gallium arsenide HEMT transistors or gallium nitride HEMT transistors.

9. The amplifier according to claim 1, characterized in that, The stopband center frequency of the pre-block filter circuit (1) is 2.4GHz and 5.8GHz, and the stopband attenuation is greater than 30dB.