A circuit for eliminating start-up noise and a sound device

Abstract

The utility model provides an eliminate starting noise circuit and sound, wherein eliminate starting noise circuit includes power supply end, and PNP triode Q2 who is connected with power supply end, and load end C who is connected with the collector of PNP triode Q2, and NPN triode Q1 who is connected with the base of PNP triode Q2, and delay circuit module who is connected with the base of NPN triode, and signal control end STANDBY who is connected with delay circuit module, wherein the emitter of PNP triode Q2 is connected with power supply end, and the collector of NPN triode Q1 is connected with PNP triode Q2, and the emitter of NPN triode Q1 is grounded, and delay circuit module is grounded, and delay circuit module is resistance - capacitance delay circuit module, the utility model discloses beneficial effect lies in: utilize delay circuit module to jump over voltage unstable stage, prevents the noise of voltage unstable generation when starting.

Description

Technical Field

[0001] This utility model relates to the field of audio technology, specifically to a circuit for eliminating startup noise and an audio device. Background Technology

[0002] Generally speaking, in audio circuits of audio equipment, noise (commonly known as popping) is generated at the moment of power-on due to voltage instability. This is caused by a variety of reasons, including sudden changes in power supply timing and bias voltage, input stage impedance mismatch, inconsistencies between filter capacitors and response time, and common-mode interference in the signal path. This problem can give users the impression that the product is of poor quality; repeated transient current surges may shorten the life of speaker diaphragms and even cause premature aging of components such as capacitors and power amplifier chips; popping may be misinterpreted as an audio signal, triggering overload protection or DC Detect function to lock up the power amplifier, causing the equipment to malfunction.

[0003] Therefore, there is an urgent need to develop a startup noise elimination circuit that uses a delay circuit module to skip the voltage instability stage and prevents noise caused by voltage instability during startup. Utility Model Content

[0004] This utility model aims to solve at least one of the above-mentioned technical problems to a certain extent.

[0005] Therefore, the first objective of this utility model is to propose a circuit for eliminating startup noise by using a delay circuit module to skip the voltage instability stage and prevent noise caused by voltage instability during startup.

[0006] The second objective of this invention is to provide an audio device.

[0007] To achieve the above objectives, an embodiment of this utility model discloses a power-on noise elimination circuit, comprising a power supply terminal, a PNP transistor connected to the power supply terminal, a load terminal connected to the collector of the PNP transistor, an NPN transistor connected to the base of the PNP transistor, a delay circuit module connected to the base of the NPN transistor, and a signal control terminal connected to the delay circuit module; wherein, the emitter of the PNP transistor is connected to the power supply terminal; the collector of the NPN transistor is connected to the PNP transistor, and the emitter of the NPN transistor is grounded; the delay circuit module is grounded.

[0008] In addition, the power-on noise elimination circuit according to the above-described technical solution of this utility model may also have the following additional technical features:

[0009] Optionally, the delay circuit module is a resistor-capacitor delay circuit module.

[0010] Optionally, the delay circuit module includes a Zener diode connected to the NPN transistor, and a capacitor and a fourth resistor connected to the Zener diode; the other end of the capacitor is grounded; and the other end of the fourth resistor is connected to the signal control terminal.

[0011] Optionally, a third resistor is connected between the NPN transistor and the Zener diode, with the other end of the third resistor grounded; a fifth resistor is connected between the fourth resistor and the signal control terminal, with the other end of the fifth resistor grounded.

[0012] Optionally, the fifth resistor is connected in series with a diode, the other end of which is connected in parallel with the capacitor.

[0013] Optionally, the capacitor is an electrolytic capacitor.

[0014] Optionally, a sixth resistor is connected between the delay circuit module and the signal control terminal.

[0015] Optionally, a first resistor is connected between the emitter and base of the PNP transistor.

[0016] Optionally, a second resistor is connected between the base of the PNP transistor and the collector of the NPN transistor.

[0017] To achieve the above objectives, a second aspect of this utility model discloses an audio system, including a power-on noise elimination circuit as described in the first aspect.

[0018] The beneficial effect of this utility model is that it uses a delay circuit module to skip the voltage instability stage, preventing noise caused by voltage instability during power-on. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of a circuit structure for eliminating startup noise according to an embodiment of this utility model;

[0020] Figure 2 This is a circuit diagram of a power-on noise elimination circuit provided in one embodiment of this utility model. Detailed Implementation

[0021] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or components / elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model.

[0022] The following describes the power-on noise elimination circuit of an embodiment of the present invention with reference to the accompanying drawings.

[0023] Figure 1 This is a schematic diagram of a circuit structure for eliminating startup noise according to an embodiment of this utility model; Figure 2 This is a circuit diagram of a power-on noise elimination circuit provided in one embodiment of this utility model. (See diagram below.) Figure 1-2 As shown, the power-on noise elimination circuit includes: a power supply terminal, a PNP transistor Q2 connected to the power supply terminal, a load terminal C connected to the collector of the PNP transistor Q2, an NPN transistor Q1 connected to the base of the PNP transistor Q2, a delay circuit module connected to the base of the NPN transistor, and a signal control terminal STANDBY connected to the delay circuit module; wherein, the emitter of the PNP transistor Q2 is connected to the power supply terminal; the collector of the NPN transistor Q1 is connected to the PNP transistor Q2, and the emitter of the NPN transistor Q1 is grounded; the delay circuit module is grounded.

[0024] According to one embodiment of the present invention, the delay circuit module is a resistor-capacitor delay circuit module.

[0025] According to one embodiment of the present invention, the delay circuit module includes a Zener diode Z4 connected to the NPN transistor Q1, a capacitor C6 and a fourth resistor R2 connected to the Zener diode; the other end of the capacitor C6 is grounded; the other end of the fourth resistor R2 is connected to the signal control terminal STANDBY.

[0026] Specifically, the circuit in this application controls the switching of the delay circuit module via the STANDBY signal, thereby controlling the switching of the PNP transistor Q2 and thus realizing the switching of power supply to the load. The delay circuit module can use many types of delay circuits; for example, the one used in this embodiment is a resistor-capacitor delay circuit, commonly known as an RC delay circuit, which is implemented using a capacitor and a resistor. It is simple to design and low in cost.

[0027] More specifically: In standby mode, the STANDBY signal control terminal is low. The base current of transistor Q1 is 0, so Q1 is off. The operating state of transistor Q2 is affected by Q1. When Q1 is off, the base of Q2 remains at a high potential, so Q2 is off. At this time, the 15V power supply is disconnected from the load resistor R5.

[0028] When in operation, the STANDBY signal control terminal is high, and the circuit module begins to work. At this time, capacitor C6 is charged by the bias resistor and the delay circuit resistor R2. Since the capacitor charges slowly from zero, Z4 will not conduct until the voltage reaches the 2.7V regulated voltage of Zener diode Z4. Therefore, the base current of Q1 is 0, and Q1 remains off. The turn-on voltage of transistor Q1 is 0.7V, so a voltage of 3.4V is required for it to conduct fully. When the voltage rises to 3.4V after a period of time, Q1 conducts, thus achieving the circuit's delay function. After Q1 conducts, the base of Q2 is pulled low, and Q2 conducts. The 15V power supply outputs a stable voltage to the load resistor R5 through the emitter and collector of Q2.

[0029] The power-on noise elimination circuit of this utility model utilizes a delay circuit to skip the voltage instability stage, thereby eliminating the popping sound caused by voltage instability during power-on.

[0030] According to one embodiment of the present invention, a third resistor R1 is connected between the NPN transistor and the Zener diode, and the other end of the third resistor is grounded; a fifth resistor R3 is connected between the fourth resistor and the signal control terminal, and the other end of the fifth resistor is grounded.

[0031] According to one embodiment of the present invention, the fifth resistor is connected in series with a diode D1, and the other end of the diode D1 is connected in parallel with the capacitor C6.

[0032] Specifically, the third resistor R1 directs the reverse leakage current of the Zener diode Z4 to the ground terminal, preventing the transistor Q1 from partially conducting during charging. The diode D1 facilitates rapid discharge of capacitor C6. The fifth resistor R3 directs the current from diode D1 to the ground terminal.

[0033] According to one embodiment of the present invention, the capacitor is an electrolytic capacitor.

[0034] Specifically, in order to better control the current flow in the circuit and the stability of the capacitor discharge through diode D1, an electrolytic capacitor with clearly defined positive and negative polarities can be selected.

[0035] According to one embodiment of the present invention, a sixth resistor R32 is connected between the delay circuit module and the signal control terminal.

[0036] Specifically, in order to accurately design the start-up voltage in the delay circuit, a sixth resistor R32 can be connected in series before the delay circuit module as a voltage divider resistor.

[0037] According to one embodiment of the present invention, a first resistor R4 is connected between the emitter and base of the PNP transistor Q2.

[0038] Specifically, in order to accurately control the start and stop of the PNP transistor Q2, the voltage between the emitter and base of Q2 can be determined by setting the first resistor R4 between the emitter and base.

[0039] According to one embodiment of the present invention, a second resistor R11 is connected between the base of the PNP transistor Q2 and the collector of the NPN transistor Q1.

[0040] Specifically, in the two states of circuit start-up and stop, the base of Q2 has two states: high potential and low potential. The second resistor R11 can be used as a voltage divider resistor to ensure stable operation of Q1 and Q2.

[0041] Based on the above embodiments, embodiments of this application also propose an audio system, including a power-on noise cancellation circuit according to the first aspect embodiment.

[0042] According to the present invention, the speaker eliminates the pop noise caused by voltage instability during startup by using a delay circuit to skip the voltage instability stage.

[0043] The above embodiments are preferred implementations of this application. In addition, this application can be implemented in other ways. Any obvious substitutions without departing from the concept of this application are within the protection scope of this application.

Claims

1. A circuit for eliminating startup noise, characterized in that, include: The system includes a power supply terminal, a PNP transistor connected to the power supply terminal, a load terminal connected to the collector of the PNP transistor, an NPN transistor connected to the base of the PNP transistor, a delay circuit module connected to the base of the NPN transistor, and a signal control terminal connected to the delay circuit module. The emitter of the PNP transistor is connected to the power supply terminal. The collector of the NPN transistor is connected to the PNP transistor, and the emitter of the NPN transistor is grounded. The delay circuit module is grounded.

2. The power-on noise elimination circuit according to claim 1, characterized in that: The delay circuit module is a resistor-capacitor delay circuit module.

3. The power-on noise elimination circuit according to claim 2, characterized in that: The delay circuit module includes a Zener diode connected to the NPN transistor, a capacitor connected to the Zener diode, and a fourth resistor; the other end of the capacitor is grounded; the other end of the fourth resistor is connected to the signal control terminal.

4. The power-on noise elimination circuit according to claim 3, characterized in that: A third resistor is connected between the NPN transistor and the Zener diode, with the other end of the third resistor grounded; a fifth resistor is connected between the fourth resistor and the signal control terminal, with the other end of the fifth resistor grounded.

5. The power-on noise elimination circuit according to claim 3, characterized in that: The fifth resistor is connected in series with a diode, and the other end of the diode is connected in parallel with the capacitor.

6. The power-on noise elimination circuit according to claim 3, characterized in that: The capacitor is an electrolytic capacitor.

7. The power-on noise elimination circuit according to claim 1, characterized in that: A sixth resistor is connected between the delay circuit module and the signal control terminal.

8. The power-on noise elimination circuit according to claim 1, characterized in that: A first resistor is connected between the emitter and base of the PNP transistor.

9. The power-on noise elimination circuit according to claim 1, characterized in that: A second resistor is connected between the base of the PNP transistor and the collector of the NPN transistor.

10. A sound system, characterized in that: Includes a power-on noise elimination circuit as described in any one of claims 1-9.

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