Ultra-wideband ultra-low power millimeter wave frequency quadrupler
By employing the complementary effects of passive push-pull and active ILFD structures and adaptive bias circuitry in a millimeter-wave quadruple frequency multiplier, the problems of bandwidth, power consumption, and phase noise are solved, achieving low power consumption, high stability, and low fluctuation output, suitable for vehicle-mounted and portable millimeter-wave radars.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HUOXIN ELECTRONIC TECHNOLOGY (SHANGHAI) CO LTD
- Filing Date
- 2025-06-18
- Publication Date
- 2026-06-19
Smart Images
Figure CN224385464U_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of millimeter-wave integrated circuit technology, and more particularly to an ultra-wideband, ultra-low-power quadrupole circuit based on injection-locking technology. This circuit provides stable output signal power, extremely high locking bandwidth, introduces no additional phase noise, and consumes only one-quarter the total power of a traditional millimeter-wave quadrupole. Background Technology
[0002] In the millimeter-wave band, traditional frequency multipliers have several technical problems, such as: (1) limited bandwidth, unable to achieve stable frequency multiplication in the full frequency band from 76 to 81 GHz, with the risk of loss of lock; (2) extremely high power consumption: traditional push-pull or passive frequency multipliers generate very weak harmonic signals, which must be compensated by high-gain buffers, and their total power consumption is generally higher than 40 mW, which limits the application range; (3) deterioration of phase noise: when two second frequency multipliers are cascaded to form a fourth frequency multiplier, due to the large signal attenuation, the buffer introduces distortion and noise, and the overall phase noise deterioration often exceeds 12 dB, affecting the receiver sensitivity; (4) large output power fluctuation: the power fluctuation in the frequency band exceeds 3 dB, resulting in unstable system signal-to-noise ratio, poor consistency of each channel, and affecting radar beamforming performance and antenna directivity. Summary of the Invention
[0003] To address the aforementioned problems in existing technologies, this utility model provides an ultra-wideband, ultra-low power millimeter-wave quadrupler, such as... Figure 1 As shown, the quadruple frequency multiplier consists of two cascaded second frequency multiplier units. Each second frequency multiplier unit can switch between a passive push-pull frequency multiplier structure and an active ILFD frequency multiplier structure. ILFD stands for Injection Locked Frequency Multiplier. The active ILFD also adopts a passive push-pull cross-coupled oscillator structure, which complements the passive push-pull frequency multiplier structure. Through the nonlinear coupling of the LC resonant cavity and the synergistic effect of the injected signal harmonic components, a positive feedback coupling is formed, which greatly improves the frequency multiplication efficiency.
[0004] The ultra-wideband, ultra-low-power millimeter-wave quadrupler can adaptively switch its operating mode based on the input signal. The quadrupler independently switches its operating mode through two control signals EN_ILFD1 and EN_ILFD2 of the second-stage frequency multiplier. EN_ILFD1 controls the first-stage frequency multiplier, and EN_ILFD2 controls the second-stage frequency multiplier. Each control signal is a logic level "1" or "0". EN_ILFD=1 indicates that the frequency multiplier is operating in active ILFD frequency multiplication mode, and EN_ILFD=0 indicates that the frequency multiplier is operating in passive push-pull frequency multiplication mode. The state of the control signal of each second-stage frequency multiplier can be switched independently to achieve free combination, so there are four operating modes in total.
[0005] Specifically, when EN_ILFD1=1 and EN_ILFD2=1, both stages of the frequency multiplier unit are active ILFD frequency multiplier structures. At this time, the frequency multiplier is in working mode one, and the output power is as high as the maximum value, without the need for an external buffer.
[0006] When EN_ILFD1=0 and EN_ILFD2=0, both stages of the frequency doubling unit enable the passive push-pull frequency doubling structure. This is the second operating mode. At this time, the frequency doubling bandwidth reaches its maximum value, which can support operating frequencies from several kHz to 100 GHz, while the power consumption is reduced to the minimum, making it suitable for millimeter wave applications.
[0007] When EN_ILFD1=1 and EN_ILFD2=0, the first-stage frequency doubler unit enables the active ILFD frequency doubler structure, and the second-stage frequency doubler unit enables the passive push-pull frequency doubler structure. That is, the quadruple frequency doubler is in working mode three. At this time, the output bandwidth is large, and the power consumption and output power are compromised.
[0008] When EN_ILFD1=0 and EN_ILFD2=1, the first-stage frequency doubler unit enables the passive push-pull frequency doubler structure, and the second-stage frequency doubler unit enables the active ILFD frequency doubler structure. That is, the quadrupler is in working mode four. At this time, the output power is high, and the power consumption and output power are compromised.
[0009] The switching between the above four modes can be flexibly configured by an external control circuit according to application requirements to achieve a balance between operating bandwidth and output power.
[0010] This utility model provides an ultra-wideband ultra-low power millimeter-wave quadruple frequency multiplier, which includes a frequency multiplier module with mode switching capability, a wide frequency multiplier module with linkage tuning, an adaptive bias circuit, and an output amplitude equalization module.
[0011] The mode-switching frequency multiplier module can switch between passive push-pull frequency multiplier structure mode and active ILFD frequency multiplier structure mode, and the active ILFD frequency multiplier structure and the passive push-pull frequency multiplier structure share a tunable LC resonant cavity.
[0012] The linked tuning wide frequency multiplier module can ensure that the output power of the quadruple frequency multiplier is stable within a frequency modulation range of at least 10 GHz, and the phase noise reaches the theoretical optimal value. The double frequency multiplier unit itself does not add additional phase noise.
[0013] The output amplitude equalization module includes a cascaded injection-locked buffer, which creates a resonant frequency difference by staggering its natural frequency to suppress output power fluctuations within the frequency band, thereby achieving power fluctuation compensation. It can achieve power fluctuations of less than 0.1 dB within the 10 GHz frequency band.
[0014] The adaptive bias circuit includes an adaptively regulated current source, tunable subthreshold bias technology, and a bias module that adjusts the negative impedance value of the injection-locked oscillator.
[0015] Specifically, the adaptive bias circuit dynamically adjusts the tail current through the temperature compensation circuit to eliminate the influence of temperature and power supply voltage fluctuations on the current. It can achieve a highly stable output in the millimeter wave band of 76 to 81 GHz for use as a local oscillator (LO) signal, making the overall power consumption less than or equal to 10mW, and the output power adjustable in the range of -15dBm to 0dBm. The consistency of each channel of the transceiver is extremely high, ensuring the accuracy of radar frequency sweeping.
[0016] In any first-stage frequency multiplier unit, the passive push-pull module and the active injection-locked core share the same LC frequency selection network, which can tune the LC resonant cavity, reuse dynamic current, and seamlessly couple the two frequency multiplier modules to form a mutually pulling positive feedback structure, saving area and eliminating the need for DC blocking and bias circuit modules. By adjusting the Q value of the LC resonant cavity and optimizing the coupling coefficient between the two stages, the quadruple frequency multiplier can stably output signals within a 10GHz bandwidth with an amplitude fluctuation of approximately 0.1dB.
[0017] For any level of ILFD, its bias point can be configured to prevent oscillations while providing gain for passive push-pull modules, greatly reducing their insertion loss.
[0018] Figure 2 This is a schematic diagram of a wide-locking-range tunable LC resonant cavity design, which includes a synchronous frequency tuning and current multiplexing module. When the input is a voltage-controlled oscillator (VCO), the tunable LC resonant cavity can be linked with the VCO, so that the resonant frequency of the quadrupole increases or decreases synchronously with the input signal of the VCO through the varactor diode. This ensures that the ILFD of the quadrupole is always at the center of the locked bandwidth. At this time, the ILFD operates at the optimal resonance point in the entire frequency band, with maximum output signal power, constant swing, and optimal phase noise.
[0019] Because the output noise of the two-stage secondary frequency multiplier units is incoherently superimposed, the final phase noise of the quadruple frequency multiplier is determined only by the last stage, and thermal noise does not accumulate. Therefore, the overall phase noise is improved by 3 to 6 dB compared with the traditional scheme.
[0020] By employing subthreshold bias technology and dynamic current reuse technology, the overall power consumption of the quadruple frequency multiplier is reduced to 10 mW (only 25% of that of similar circuits). An integrated adaptive amplitude equalization network ensures that the output power fluctuation across the entire frequency band is <1 dB.
[0021] The aforementioned ultrawideband, ultralow-power millimeter-wave quadrupler has universal process applicability. It can be implemented using a single CMOS chip 40 nm process or a more advanced process, or it can be implemented using other processes such as BJT, SiGe, SiC, GaAs, BiCMOS, DMOS, BCD, borene, and graphene. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the structure of an ultrawideband, ultralow power millimeter-wave quadruple frequency multiplier according to the present invention.
[0023] Figure 2 This is a schematic diagram of the design of a wide-locking-range tunable LC resonant cavity, including a synchronous frequency tuning and current multiplexing module;
[0024] Figure 3 It is the CMOS ultra-wideband ultra-low power millimeter-wave quadruple frequency multiplier in Embodiment 1 of this utility model;
[0025] Figure 4 This is a schematic diagram illustrating the output power shaping effect of a three-stage injection-locked oscillator buffer;
[0026] Figure 5 This is a schematic diagram of the phase noise simulation results of the quadruple frequency harmonic generator of this utility model;
[0027] Figure 6 This is a schematic diagram comparing the input signal and the output signal of the frequency quadrupler of this utility model;
[0028] Figure 7 This is a simulation diagram of the amplitude curve of a traditional fourth harmonic signal (the amplitude fluctuation of a traditional fourth harmonic signal is greater than 5 dB within the 77.68 to 82.06 GHz band. Because the gain of the passive frequency multiplier is negative, the amplitude of the fourth harmonic signal is less than 150 mV).
[0029] Figure 8 This is a simulation diagram of the amplitude curve of the fourth harmonic signal of this utility model (the amplitude fluctuation of the fourth harmonic signal of this utility model is less than 0.1 dB in the 77.68 to 82.06 GHz band, and the amplitude is 1.2 V (600 mV single peak). Detailed Implementation
[0030] The following describes a specific embodiment of an ultrawideband, ultralow-power millimeter-wave quadruple frequency multiplier of the present invention to facilitate understanding of the present invention by those skilled in the art. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, any changes that fall within the spirit and scope of the present invention as defined and determined by the appended claims are obvious, and all inventions utilizing the concept of the present invention are protected.
[0031] Example 1 (SMIC 40nm CMOS process)
[0032] like Figure 3 As shown, the core circuit of the quadruple frequency multiplier in this embodiment is composed of two cascaded double frequency multiplier units.
[0033] The transistors M1 to M8 of the quadruple frequency multiplier constitute the first-stage frequency multiplier unit. When the control voltage, i.e. the control signal EN_ILFD1=0, it operates in a passive push-pull low-power mode with a working bandwidth of DC to over 100GHz. When EN_ILFD1=1, it operates in an injection-locked oscillator mode, outputting a high-power frequency multiplier signal with a 3-dB bandwidth greater than 5GHz.
[0034] Furthermore, transistors M9 to M16 of the quadruple frequency multiplier constitute a second-stage frequency multiplier: when the control voltage EN_ILFD2=0, it operates in a low-power push-pull mode with a bandwidth from near DC to over 100GHz; when EN_ILFD2=1, it operates in an injection-locked oscillator mode, outputting a high-power frequency multiplier signal (which is essentially a quadruple frequency multiplier) with a 3-dB bandwidth greater than 10 GHz.
[0035] Furthermore, the control voltages of the two-stage frequency doublers can be freely combined; that is, EN_ILFD1 and EN_ILFD2 can be freely selected as "0" or "1," allowing the quadrupler to operate in four modes. Among them, "11" is the high-performance mode, in which both stages of the frequency doubler operate in an injection-locked oscillation state, maximizing the output signal power. It can provide a 0 dBm millimeter-wave signal without external buffers or added gain, while consuming only one-quarter of the DC power of a traditional quadrupler plus buffer combination. This mode is suitable for scenarios with extremely high performance requirements, such as automotive millimeter-wave radar.
[0036] Furthermore, "00" represents the low-power mode. In this mode, M1, M4, M9, and M12 are turned off, while the remaining transistors are biased in the subthreshold region. The overall power consumption is one-quarter of that in the "11" mode. It can provide a -15dBm signal without external buffers or added gain, supporting signals across the entire frequency band from near DC to over 100 GHz, with a 3-dB bandwidth exceeding 10 GHz. This mode is suitable for scenarios with low-power requirements, such as portable millimeter-wave radar.
[0037] Furthermore, both the "01" and "10" modes are balanced modes, with output power ranging from -15 to 0 dBm and moderate power consumption, making them suitable for low-power scenarios with certain performance requirements, such as consumer-grade and industrial-grade millimeter-wave radars.
[0038] Furthermore, TF2 is used for frequency tuning and impedance matching between the first-stage frequency multiplier and the second-stage frequency multiplier. Similarly, TF3 is used for frequency tuning and impedance matching between the second-stage frequency multiplier and the output buffer. TF2 and TF3 form resonant cavities with CV2 and CV3, respectively, and are tuned to the second and fourth harmonic positions.
[0039] The resonant cavities of the first-stage frequency multiplier unit and the second-stage frequency multiplier unit are designed together with the VCO resonator at the input end. By selecting the size ratio of the three varactor diodes, the three natural frequencies are linked in a proportional manner. That is, the varactor diodes of the three modules are controlled by the same frequency modulation voltage, which increases or decreases synchronously and is located at the center of the resonant cavity at the same time.
[0040] According to injection-locked theory, the Adler equation shows that under the above operation, the amplitude of the VCO's output signal after passing through two frequency doublers does not change with frequency modulation, but is determined solely by the Q value of the resonant cavity. For example, when the radar chirp sweep range is 76 to 81 GHz, the output power fluctuation of a traditional injection-locked frequency doubler is often greater than 6 dB, while this technique reduces it to less than 1 dB. Manually reducing the Q value will further decrease the fluctuation.
[0041] The ultra-wideband, ultra-low-power quadrupole employs an adaptive bias circuit to eliminate the influence of temperature and power supply voltage on the bias current. The output of the quadrupole can be further buffered by adding several stages of injection-locked oscillators (ILOs). By cleverly selecting the frequency difference of their resonant cavities, the fluctuations in the output power of the preceding stage within the band can be further compensated. For example, if the second-stage resonant cavity of the quadrupole is centered at 4f0, and its Q value is too large, the output power at the center frequency of 78.5GHz will be the highest within the 76-81GHz millimeter-wave bandwidth, while signals at the widest edge of the bandwidth, such as the 81GHz signal, will be relatively weak. By selecting the oscillation frequency of the output ILO buffer at 81GHz, a "peak clipping" effect is achieved on the 78.5GHz signal, resulting in a flatter signal power across the entire band. For even flatter output power, multiple ILOs can be cascaded as buffers, such as... Figure 4 As shown, by cascading three injection-locked oscillation buffers and designing their natural frequencies to be evenly distributed throughout the bandwidth, the output power of the quadrupole can be guaranteed to remain almost unchanged with frequency, less than 0.1 dB within a bandwidth of at least 10 GHz.
Claims
1. An ultra-wideband, ultra-low-power millimeter-wave quadrupler, characterized in that, It includes a frequency multiplier module with mode switching capability, a wide frequency multiplier module with linkage tuning, an adaptive bias circuit, and an output amplitude equalization module; The frequency multiplier module capable of switching modes can switch between a passive push-pull frequency multiplier structure mode and an active ILFD frequency multiplier structure mode. The active ILFD frequency multiplier structure mode also adopts the oscillator structure of the passive push-pull frequency multiplier mode and shares the tunable LC resonant cavity with the passive push-pull frequency multiplier mode. The linked tuning wide frequency multiplier module can ensure that the output power of the quadruple frequency multiplier is stable within a frequency modulation range of at least 10 GHz, and the phase noise reaches the theoretical optimal value, that is, the second frequency multiplier unit itself does not add additional phase noise. The adaptive bias circuit includes an adaptively adjustable current source, tunable subthreshold bias technology, and a bias module that adjusts the negative impedance value of the injection-locked oscillator. The output amplitude equalization module includes a cascaded injection-locked buffer, which suppresses output power fluctuations within the frequency band by staggering its natural frequency, achieving power fluctuations of less than 0.1 dB within the 10 GHz frequency band.
2. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The tunable LC resonant cavity is designed so that its resonant frequency is tuned in conjunction with the input voltage-controlled oscillator via a varactor diode, ensuring that the injection-locked frequency multiplier operates at the optimal resonant point across the entire frequency band.
3. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, It consists of two cascaded second harmonic units that can switch modes. Each second harmonic unit includes: a passive push-pull harmonic structure; and an active ILFD harmonic structure, i.e., an active injection-locked harmonic structure. The passive push-pull structure and the active ILFD harmonic structure share the same tunable LC resonant cavity, reuse dynamic current, and form a positive feedback coupling that pulls each other.
4. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, Each second-stage frequency harmonic unit independently switches its operating mode via control signals EN_ILFD1 and EN_ILFD2, where EN_ILFD1 controls the first-stage frequency harmonic unit and EN_ILFD2 controls the second-stage frequency harmonic unit. Mode 1: EN_ILFD1=1 and EN_ILFD2=1, both double-frequency units enable active injection locked frequency multiplication structure, and the output signal power is at its maximum. Mode 2: EN_ILFD1=0 and EN_ILFD2=0, both stages of frequency doubling units enable passive push-pull structure. At this time, the transistor is biased in the subthreshold region, the frequency doubling bandwidth is the largest and the power consumption is the lowest. Mode 3: EN_ILFD1=1 and EN_ILFD2=0, the first-stage doubler unit uses an active injection-locked doubler structure, and the second-stage doubler unit uses a passive push-pull structure. At this time, the output bandwidth is large, and the power consumption and output power are compromised. Mode 4: EN_ILFD1=0 and EN_ILFD2=1, the first-stage doubler unit uses a passive push-pull structure, and the second-stage doubler unit uses an active injection-locked doubler structure. At this time, the output power is high, and the power consumption and output power are compromised.
5. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The adaptive bias circuit dynamically adjusts the tail current through a temperature compensation circuit, so that the overall power consumption is ≤10 mW and the output power is adjustable in the range of -15dBm to 0 dBm.
6. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The active injection-locked frequency multiplier structure provides gain compensation for the passive push-pull module and reduces insertion loss when the oscillation function is turned off at the bias point.
7. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The output amplitude equalization module is cascaded with at least one injection-locked oscillator buffer, and the natural frequencies of each buffer are evenly distributed in the 76-81 GHz frequency band, thereby achieving power fluctuation compensation through the resonant frequency difference.
8. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The output noise between the two double-frequency units is non-coherently superimposed, and the overall phase noise is determined by the final stage, which is 3 to 6 dB better than the traditional cascaded structure.
9. The ultra-wideband, ultra-low power millimeter-wave quadrupler according to claim 1, characterized in that, The quadruple frequency multiplier is a single CMOS chip, implemented using a 40 nm process.