Photoelectric sensor capable of resisting interference of same-frequency light and high-frequency light

Abstract

The utility model provides a kind of photoelectric sensor of anti same frequency light and high frequency light interference, including MCU unit, drive circuit, for producing optical signal's transmitting tube, for receiving the optical signal reflected back by the object to be detected receiving tube and signal receiving circuit;Wherein, the first signal processing circuit for counting the number of interference signals in the transmission cycle and the interference signal cycle and the second signal processing circuit for counting the number of effective signals in the received signal are equipped in the MCU unit and are connected with each other;The beneficial effects of the utility model are that: the first counter in the utility model can count the number of interference signals in a transmission cycle, and the timer can count the period of interference signals, the utility model can determine whether it is on installation, side-by-side installation or high frequency light interference according to the number of interference signals in the transmission cycle and the characteristics of the period, and different processing measures will be taken according to different interference, so as to realize error-free triggering under the interference of on installation, side-by-side installation and high frequency light ambient light.

Description

Technical Field

[0001] This utility model relates to the field of photoelectric sensor technology, and in particular to a photoelectric sensor that resists interference from co-frequency light and high-frequency light. Background Technology

[0002] As industrial automation becomes increasingly integrated, photoelectric sensors are being installed more densely, resulting in numerous instances of paired or side-by-side installations. Furthermore, the superior efficiency of LED light sources has led to their widespread application. Most LEDs are high-frequency driven; if photoelectric sensors are installed facing upwards, they may be directly in front of the LED light source. Without proper handling, this can easily cause false triggering, disrupting industrial production and resulting in unnecessary losses.

[0003] Optoelectronic products have a certain degree of resistance to ambient light interference, but there are no good countermeasures for co-frequency light interference in situations such as side-by-side installation or pairing installation, especially when multiple units are installed side-by-side, which can easily lead to accidental triggering. Utility Model Content

[0004] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a photoelectric sensor that resists interference from co-frequency light and high-frequency light, in order to solve the problem that existing photoelectric products have a certain resistance to ambient light interference, but there is no good countermeasure for co-frequency light interference in situations such as side-by-side installation or pairing, especially when multiple units are installed side-by-side, they are prone to false triggering.

[0005] To achieve the above and other related objectives, this utility model provides the following technical solution:

[0006] A photoelectric sensor resistant to interference from co-frequency and high-frequency light includes an MCU unit, a driving circuit, a transmitting tube for generating light signals, a receiving tube for receiving light signals reflected back from a detected object, and a signal receiving circuit. The MCU unit is connected to the transmitting tube through the driving circuit, and the MCU unit is connected to the receiving tube through the signal receiving circuit. The MCU unit includes a first signal processing circuit for counting the number of interfering signals and the period of the interfering signals within the transmission cycle, and a second signal processing circuit for counting the number of valid signals in the received signal, both interconnected. The input terminals of both the first and second signal processing circuits are connected to the signal receiving circuit. The output terminal of the first signal processing circuit is connected to the driving circuit, and the output terminal of the second signal processing circuit is connected to peripheral circuitry through an output driving circuit.

[0007] In one embodiment of the present invention, the signal receiving circuit includes an amplifier, a filter, and a voltage limiter. The input terminal of the amplifier is connected to the receiving tube, the output terminal of the amplifier is connected to the filter, the other end of the filter is connected to the first signal processing circuit and the second signal processing circuit respectively, and the voltage limiter is connected in parallel with the amplifier.

[0008] In one embodiment of the present invention, the first signal processing circuit includes a comparator, a DAC module, a first counter for counting the number of interference signals within a transmission period, a timer for counting the period of interference signals, and a processor. The non-inverting input of the comparator is connected to the filter, the inverting input of the comparator is connected to the DAC module, the output of the comparator is connected to the first counter, the other end of the first counter is connected to the timer, the other end of the timer is connected to the processor, and the processor is connected to the transmitting tube through the driving circuit.

[0009] In one embodiment of the present invention, the second signal processing circuit includes an ADC sampling module, a threshold module, a second counter for counting the number of valid signals in the received signal, and a processor. The input terminal of the ADC sampling module is connected to the filter, and the output terminal of the ADC sampling module is connected to the threshold module and the second counter respectively. The other end of the second counter is connected to the processor, and the processor is connected to the peripheral circuit through an output driving circuit.

[0010] In one embodiment of the present invention, the processor is further connected to the DAC module, the first counter, the ADC sampling module, and the threshold module, respectively.

[0011] In one embodiment of this utility model, the processor determines whether the interference signal is a pair, a side-by-side installation, or high-frequency optical interference based on the number of interference signals and the period of the interference signal within the transmission cycle. Subsequently, different processing measures will be adopted according to different judgment results.

[0012] As described above, the photoelectric sensor of this invention, which resists interference from both co-frequency and high-frequency light, has the following beneficial effects:

[0013] This invention splits the received signal through an amplifier and filter into two paths. One path is sampled by an ADC, and the other path is detected by a comparator. A first counter counts the number of interfering signals within a transmission cycle, and a timer counts the period of the interfering signals. Based on the number and period of the interfering signals within the transmission cycle, it can be determined whether the interference is from parallel installation, side-by-side installation, or high-frequency light interference. Different processing measures are adopted according to different types of interference, thereby achieving error-free triggering under interference from parallel installation, side-by-side installation, and high-frequency light ambient light. In some extreme cases, such as when multiple interferences affect the received signal, the second counter is turned off until the object being detected blocks the receiving surface of the photoelectric sensor and reflects the light signal back to the receiving tube, at which point the second counter is restarted. This not only avoids false triggering but also avoids missed detection. Attached Figure Description

[0014] Figure 1 The diagram shows the overall structure of the photoelectric sensor that resists interference from both co-frequency and high-frequency light, as disclosed in the embodiments of this utility model.

[0015] Figure 2 The diagram shows the connection block diagram of the processor and various modules in the photoelectric sensor that resists interference from co-frequency light and high-frequency light disclosed in the embodiments of this utility model.

[0016] Figure 3 The diagram shows the received signal of the photoelectric sensor disclosed in this embodiment of the invention when there is no interference.

[0017] Figure 4 The diagram shows a side-by-side installation of various photoelectric sensors in a photoelectric sensor that resists interference from both co-frequency and high-frequency light, as disclosed in an embodiment of this utility model.

[0018] Figure 5 The diagram shows the peak value of the ADC continuously sampling the high-frequency light interference signal in the photoelectric sensor that resists interference from both co-frequency light and high-frequency light disclosed in this embodiment of the present invention.

[0019] Figure 6 The diagram shown is a schematic diagram of high-frequency light interference signal processing in a photoelectric sensor that resists interference from both co-frequency light and high-frequency light disclosed in an embodiment of this utility model.

[0020] Figure 7 The diagram shows an extreme case where the interfering light is blocked in the photoelectric sensor that resists interference from both co-frequency and high-frequency light disclosed in this embodiment of the present invention. Detailed Implementation

[0021] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. It should be noted that, unless otherwise specified, the following embodiments and features described herein can be combined with each other.

[0022] Please see Figure 1 and Figure 2 This invention provides a photoelectric sensor resistant to interference from co-frequency and high-frequency light, comprising an MCU unit, a driving circuit, a transmitting tube for generating light signals, a receiving tube for receiving light signals reflected back from the detected object, and a signal receiving circuit. The MCU unit is connected to the transmitting tube through the driving circuit, and the MCU unit is connected to the receiving tube through the signal receiving circuit. The signal receiving circuit includes an amplifier, a filter, and a voltage limiter. The input terminal of the amplifier is connected to the receiving tube, and the output terminal of the amplifier is connected to the filter. The other end of the filter is connected to the first signal processing circuit and the second signal processing circuit described below. The voltage limiter is connected in parallel with the amplifier. It should be noted that connecting the voltage limiter in parallel with the amplifier can prevent the light signal from being too strong. The voltage limiter can limit the feedback voltage of the amplifier, thereby not only preventing the operational amplifier from entering a deep saturation state, but also preventing it from affecting the signal of the next cycle.

[0023] The MCU unit has a first signal processing circuit for counting the number of interference signals and the period of interference signals in the transmission cycle and a second signal processing circuit for counting the number of valid signals in the received signal. The input terminals of the first signal processing circuit and the second signal processing circuit are both connected to the signal receiving circuit. The output terminal of the first signal processing circuit is connected to the driving circuit, and the output terminal of the second signal processing circuit is connected to the peripheral circuit through the output driving circuit.

[0024] The first signal processing circuit includes a comparator, a DAC module, a first counter for counting the number of interference signals within a transmission cycle, a timer for counting the period of the interference signals, and a processor. The non-inverting input of the comparator is connected to a filter, the inverting input of the comparator is connected to the DAC module, the output of the comparator is connected to the first counter, the other end of the first counter is connected to the timer, the other end of the timer is connected to the processor, and the processor is connected to the transmitting tube through a driver circuit. It should be noted that the comparator outputs interference signals, the first counter counts the number of interference signals, the timer counts the period of the interference signals, and the processor connects to the driver circuit through I / O port 1 on the processor to control the transmitting tube.

[0025] The second signal processing circuit includes an ADC sampling module, a threshold module, a second counter for counting the number of valid signals in the received signal, and a processor. The input terminal of the ADC sampling module is connected to a filter, and the output terminal of the ADC sampling module is connected to the threshold module and the second counter. The other end of the second counter is connected to the processor, and the processor is connected to peripheral circuits through an output drive circuit. It should be noted that the ADC sampling module and the second counter count the valid signals in the received signal. To avoid redundancy, a threshold module is set up. The received signal is compared with the threshold in the threshold module. Only when the received signal is greater than the sum of the reference value and the threshold is it counted, thereby avoiding redundancy.

[0026] The processor is also connected to the DAC module, the first counter, the ADC sampling module, and the threshold module. Based on the number of interference signals and the period of the interference signals during the transmission cycle, the processor determines whether the interference signal is a pair of installed signals, a pair of installed signals, or high-frequency optical interference. Different processing measures will be adopted according to different judgment results.

[0027] Specifically, this invention splits the signal after amplifier and filter into two paths. One path is sampled by an ADC, and the other path is detected by a comparator. The other input of the comparator is connected to a DAC, and the value of the DAC is adjusted according to the type of interference light. The output of the comparator is connected to a first counter. The first counter is turned off before transmission and turned on after transmission. The number and period of interference signals within one transmission cycle are counted. Based on the characteristics of the number and period of interference signals, it distinguishes between parallel installations, side-by-side installations, and high-frequency light interference. Different processing measures are adopted for different types of interference. In some extreme cases, such as when multiple interferences affect the received signal, the second counter is turned off. When the object being detected blocks the photoelectric sensor, it is detected immediately. Ultimately, it achieves error-free triggering under parallel installations, side-by-side installations, and high-frequency light ambient light interference.

[0028] More specifically, under normal circumstances, the processor controls the timer. When the timer period expires, it controls I / O port 1. I / O port 1 is connected to the driver circuit to control the transmitting tube, generating a light signal. ADC sampling begins at a fixed timing point, and at this time, the ADC sampling is in single-sampling mode. The light signal reflected back from the detected object is received by the receiving tube, amplified, and filtered before reaching the comparator and ADC sampling module in the MCU unit. In the absence of interference, the received signal rises from the reference value, then falls, and then returns to the reference value, repeating this cycle. Figure 3 As shown, if the value sampled by the ADC is greater than the sum of the reference value and the threshold, it is a valid signal, and the second counter is incremented by 1 (the maximum value is the system setting); otherwise, it is an invalid signal, and the second counter is decremented by 1 (the minimum value is 0).

[0029] The comparator is triggered by the rising edge, monitors changes in the reference signal, and counts the signal conditions within the transmission cycle. The first counter is turned off before transmission and turned on again after transmission to prevent its own signal from triggering the counter. When an interference signal is present and its value is greater than the DAC value, the comparator output is triggered, the first counter records the number of interference signals, and the timer counts the period of the interference signal. The processor determines whether the interference signal is a parallel installation, a side-by-side installation, or a high-frequency optical interference signal based on the number and period of interference signals over several consecutive cycles. Under normal circumstances, after confirming the type of interference signal, the comparator monitors the reference signal once every few cycles instead of every transmission cycle.

[0030] Furthermore, based on the characteristics of the number and period of the interference signals, it is determined whether it is a counter-installation, a side-by-side installation, or high-frequency optical interference. Then, different processing measures will be adopted according to different types of interference. For example, if there are 1 to 2 interference signals in one transmission cycle, and the period of the interference signals is within a certain range, it is determined to be counter-installation interference, which is generally co-frequency optical interference. The processing measures are as follows: when the interference signal is captured, under the action of the first counter and timer, the processor drives the transmitting tube to transmit the signal through the driving circuit to avoid the transmission overlapping with the counter-installation interference signal. At this time, the ADC sampling is in single-shot mode. The ADC sampling is turned on to collect the received signal. After the signal is collected, the ADC sampling is turned off and the processor waits for the next transmission signal. If no interference signal is captured, the transmission is also performed after a certain period of delay to avoid getting stuck in a state of continuous waiting. Even if there is a very low probability that the transmitted signal overlaps with the interference signal, the signal counting is redundant and will not trigger the IO2 driver erroneously.

[0031] If there are 2 to 5 interfering signals within a single transmission cycle, with varying and significantly different period lengths and amplitudes, it is determined to be interference from side-by-side installations. In densely packed installations, the interference signal strength varies between products due to the distance between installations. Closely adjacent products interfere more strongly with each other, while those further apart interfere less. Under normal use, product 2 is susceptible to interference from two nearby products, product 1 and product 3. Please refer to [link / reference needed] for details. Figure 4 The proposed solution is as follows: Increase the transmission cycle to reduce crosstalk. Upon detecting an interference signal, the processor, driven by the first counter and timer, drives the transmitter to transmit the signal, preventing overlap between the transmitted and received signals. The ADC sampling is in single-shot mode: ADC sampling is enabled to acquire the received signal; once acquisition is complete, ADC sampling is disabled. If no interference signal is detected, transmission is initiated after a certain delay to avoid indefinite waiting. The signal counting has some redundancy, and even occasional signal overlap will not trigger false alarms.

[0032] If there are more than 5 interfering signals within a single transmission cycle, and their periods are not significantly different, there will be multiple cycles of high-frequency optical signals within one transmission cycle, since the period of the high-frequency light source is much shorter than the transmission period of the photoelectric sensor. The solution is to activate the ADC during the transmission shutdown period. In this continuous sampling mode, the ADC is sampled for a period of time, then the ADC is deactivated. During this period, the maximum value sampled is close to the peak value of the interfering signal. For details, please refer to [link to relevant documentation]. Figure 6 The comparator is configured to be rising edge triggered. When the interference signal is on the rising edge and exceeds the DAC value, the comparator output is triggered. At this time, the IO1 port drives the transmitter to make the valid received signal overlap with the interference signal. Since both are rising edges, it is equivalent to superimposing the two signals, and the amplitude will be larger. At this time, the ADC is configured to be single sampling to collect the received signal. The peak value of the interference signal is used as the reference value. The peak value of the superimposed two signals is sampled. If the peak signal is greater than the sum of the reference value and the threshold, it is a valid signal; otherwise, it is an invalid signal.

[0033] In extreme cases such as pairwise or side-by-side installations and combinations of two or more high-frequency optical interferences, the captured interference signals are unpredictable. In these situations, the second counter is shut down to prevent false triggering of the output drive until the object being detected blocks the photoelectric sensor's receiving surface and reflects the light signal back to the receiving tube. Then, following the interference-free signal processing procedure, the second counter is restarted. This avoids false triggering and missed detections. However, in extreme cases, the size of the object being detected is subject to certain constraints, such as... Figure 7 As shown;

[0034] Furthermore, there are other alternative solutions to achieve the same purpose of this utility model. The alternative solutions are: 1. Using a similar architecture but changing the comparator triggering method; 2. Using a similar architecture but with an infinite voltage divider; 3. Using a similar architecture but changing the DAC module to a resistor divider; 4. Using a similar architecture but changing the signal counting to other functional modules.

[0035] In summary, this utility model can distinguish and process paired, side-by-side, and high-frequency light interference signals through a processor, avoiding false triggering of products without significantly reducing the detection speed; even in extreme cases where multiple interferences have an impact, it still ensures no false triggering and no missed detection, but the size of the object being detected is subject to certain constraints.

[0036] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit this utility model. All equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A photoelectric sensor resistant to interference from co-frequency and high-frequency light, characterized in that: It includes an MCU unit, a driving circuit, a transmitting tube for generating light signals, a receiving tube for receiving light signals reflected back from the object being detected, and a signal receiving circuit. The MCU unit is connected to the transmitting tube through the driving circuit, and the MCU unit is connected to the receiving tube through the signal receiving circuit. The MCU unit includes a first signal processing circuit for counting the number of interference signals and the period of interference signals during the transmission cycle, and a second signal processing circuit for counting the number of valid signals in the received signal. The input terminals of the first and second signal processing circuits are both connected to the signal receiving circuit. The output terminal of the first signal processing circuit is connected to the driving circuit, and the output terminal of the second signal processing circuit is connected to the peripheral circuit through the output driving circuit.

2. The photoelectric sensor according to claim 1, characterized in that: The signal receiving circuit includes an amplifier, a filter, and a voltage limiter. The input terminal of the amplifier is connected to the receiving tube, the output terminal of the amplifier is connected to the filter, and the other end of the filter is connected to the first signal processing circuit and the second signal processing circuit respectively. The voltage limiter is connected in parallel with the amplifier.

3. The photoelectric sensor according to claim 2, characterized in that: The first signal processing circuit includes a comparator, a DAC module, a first counter for counting the number of interference signals within a transmission cycle, a timer for counting the period of interference signals, and a processor. The non-inverting input of the comparator is connected to the filter, the inverting input of the comparator is connected to the DAC module, the output of the comparator is connected to the first counter, the other end of the first counter is connected to the timer, the other end of the timer is connected to the processor, and the processor is connected to the transmitting tube through the driving circuit.

4. The photoelectric sensor according to claim 3, characterized in that: The second signal processing circuit includes an ADC sampling module, a threshold module, a second counter for counting the number of valid signals in the received signal, and a processor. The input terminal of the ADC sampling module is connected to the filter, and the output terminal of the ADC sampling module is connected to the threshold module and the second counter respectively. The other end of the second counter is connected to the processor, and the processor is connected to the peripheral circuit through an output driving circuit.

5. A photoelectric sensor resistant to interference from co-frequency and high-frequency light according to claim 4, characterized in that: The processor is also connected to the DAC module, the first counter, the ADC sampling module, and the threshold module, respectively.

6. A photoelectric sensor resistant to interference from co-frequency light and high-frequency light according to claim 4, characterized in that: The processor determines whether the interference signal is a pair of interfering signals, a side-by-side interfering signal, or a high-frequency optical interference based on the number of interfering signals and the period of the interfering signals within the transmission cycle. Different processing measures will be adopted according to different judgment results.

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