Signal hub for a grid screen and grid screen control system

Abstract

This utility model discloses a signal hub board and a grid screen control system for a mesh screen. The signal hub board includes an input interface, multiple output interfaces, and a signal distribution circuit. The input interface receives a drive signal from a receiving card, which includes a master clock signal and multiple parallel data signals. The signal distribution circuit includes a clock buffer module and a data buffer module. The clock buffer module receives the master clock signal and, through buffering and copying, generates multiple output clock signals that are the same number as the number of output interfaces and synchronized with the phase. The data buffer module buffers the multiple parallel data signals one-to-one to generate multiple output data signals. Each output clock signal is paired with its corresponding output data signal and sent to a single mesh screen module through the corresponding output interface. The signal hub board and control system of this application improve signal quality by centrally synchronizing and shaping the drive signals, thereby ensuring that the mesh screen can achieve smooth, clear, and high-quality video playback.

Description

Technical Field

[0001] This utility model relates to the field of display control technology, and in particular to a signal hub board and grid screen control system for a grid screen. Background Technology

[0002] A grid screen, also known as a grille screen or light strip screen, is a display device composed of multiple LED light strips arranged in an array. Unlike traditional monolithic LED displays, its screen structure is mesh or grille-like, offering high transparency. This characteristic allows grid screens to be installed on building exteriors without significantly impacting indoor lighting and ventilation, making them widely used in urban landmarks, large shopping malls, and stage backdrops—anywhere requiring ultra-large-area video displays.

[0003] However, many traditional grid screens, especially those used for landscape lighting or simple pattern loops, employ a simplified control method. The controller needs to assign a unique "address" to each or every group of LEDs and continuously issue commands to each address, such as "Address 1, red," "Address 5, brightness 50%," etc. This control method is only suitable for achieving simple color gradients or flashing effects, not for playing complex dynamic videos. This control method has the following inherent drawbacks: First, its data processing capabilities and transmission bandwidth are limited, resulting in an extremely low screen refresh rate. This leads to severe ghosting, stuttering, and flickering problems when playing videos, resulting in poor image continuity. Second, this method supports a very limited number of grayscale levels, failing to delicately represent color gradations and transitions, resulting in a significant loss of image detail and severely insufficient clarity, making it difficult to meet the current market's demands for video content playback. Utility Model Content

[0004] This invention aims to at least partially solve one of the technical problems in related technologies. Therefore, the purpose of this invention is to provide a signal hub board and a grid screen control system for grid screens.

[0005] To achieve the above objectives, on one hand, the signal hub board for a mesh screen according to an embodiment of the present invention includes:

[0006] An input interface is used to receive drive signals from the output of the receiving card, the drive signals including at least a master clock signal and multiple parallel data signals;

[0007] Multiple output interfaces are used to output signals to multiple mesh screen modules;

[0008] A signal distribution circuit is electrically connected between the input interface and the plurality of output interfaces, the signal distribution circuit comprising:

[0009] A clock buffer module is used to receive the master clock signal, buffer and copy it to generate multiple output clock signals that are the same number as the multiple output interfaces and are phase-synchronized.

[0010] A data buffer module is used to receive the multiple parallel data signals and buffer them one-to-one to generate multiple output data signals.

[0011] Each output clock signal is paired with its corresponding output data signal and output to a grid screen module through the corresponding output interface.

[0012] In addition, the signal hub board for a mesh screen according to the above embodiments of the present invention may also have the following additional technical features:

[0013] According to one embodiment of the present invention, both the clock buffer module and the data buffer module include at least one high-speed bus transceiver.

[0014] According to one embodiment of the present invention, the input interface is further configured to receive an output enable control signal from the receiving card, and the enable terminals of all data buffer modules in the signal distribution circuit receive the output enable control signal to synchronously enable or disable the signal output of the plurality of output interfaces according to the output enable control signal.

[0015] According to one embodiment of the present invention, a pull-down resistor for improving signal stability is connected to each output clock signal path of the clock buffer module.

[0016] According to one embodiment of the present invention, the signal hub further includes a power supply circuit, which includes a DC buck converter for converting a wide range of input DC voltages into a stable operating voltage for use by the signal distribution circuit.

[0017] According to one embodiment of the present invention, the DC buck converter includes:

[0018] Switch controller;

[0019] The energy storage inductor connected to the switch controller;

[0020] A feedback circuit connected between the output terminal of the DC buck converter and the feedback terminal of the switch controller is used to sample and control the output operating voltage.

[0021] According to one embodiment of the present invention, the number of output interfaces is any one of 8, 16, 24, or 32.

[0022] On the other hand, the grid screen control system according to an embodiment of the present invention includes:

[0023] Sending card, used to generate raw video data;

[0024] A receiving card, whose input terminal is connected to the sending card, is used to decode the original video data into a driving signal and output the driving signal from its output terminal.

[0025] The signal hub board described above has its input interface connected to the output terminal of the receiver card, and is used to receive and distribute the drive signal;

[0026] In addition, multiple grid screen modules, whose input terminals are respectively connected to multiple output interfaces of the signal hub board, are driven by the drive signals distributed by the signal hub board.

[0027] According to the signal hub board and grid screen control system provided in this embodiment of the invention, firstly, by setting an independent signal distribution circuit, especially a clock buffer module, the single master clock signal output by the receiving card is buffered, copied, and enhanced to generate multiple phase-synchronized output clock signals. This solves the clock offset and signal attenuation problems that easily occur when signals are distributed over long distances or in a one-to-many manner, ensuring the precise timing consistency of data transmission between various grid screen modules, thus providing a foundation for improving the screen refresh rate and effectively eliminating image ghosting and flickering. Secondly, the data buffer module performs one-to-one buffering and enhancement on multiple parallel data streams, ensuring the integrity and driving capability of the data signal, enabling it to stably transmit complex image information with higher grayscale levels, significantly improving the clarity and color detail of the display. Therefore, the signal hub board and control system of this application, by centrally synchronizing and shaping the driving signals, greatly optimizes the signal quality, enabling the grid screen to achieve smooth, clear, and high-quality video playback.

[0028] Additional aspects and advantages of this invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0030] Figure 1 This is a block diagram of a signal hub board for a mesh screen according to an embodiment of the present invention;

[0031] Figure 2 This is a circuit schematic diagram of the input interface in the signal hub board of the grid screen according to an embodiment of the present invention;

[0032] Figure 3 This is a circuit diagram of the signal distribution circuit in the signal hub board of the grid screen according to an embodiment of the present invention;

[0033] Figure 4 This is a circuit diagram of the output interface in the signal hub board of the grid screen according to an embodiment of the present invention;

[0034] Figure 5 This is a circuit diagram of the power supply circuit in the signal hub of the grid screen according to an embodiment of the present invention;

[0035] Figure 6 This is a schematic diagram of the structure of the grid screen control system according to an embodiment of the present invention.

[0036] Figure label:

[0037] 10. Input interface;

[0038] 20. Output interface;

[0039] 30. Signal distribution circuit;

[0040] 301. Clock buffer module;

[0041] 302. Data buffer module;

[0042] 40. Power supply circuit;

[0043] 50. Receiver card;

[0044] 60. Sending card;

[0045] 70. Mesh screen module.

[0046] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0047] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without inventive effort are within the scope of protection of this utility model.

[0048] In the description of this utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "circumferential", "radial", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model.

[0049] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0050] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0051] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0052] The following describes in detail, with reference to the accompanying drawings, an embodiment of the present invention: a signal hub board for a grid screen and a grid screen control system.

[0053] Reference Figures 1 to 5 As shown, the signal hub board for a grid screen provided according to the embodiment of the present invention includes an input interface 10, multiple output interfaces 20, and a signal distribution circuit 30.

[0054] Specifically, input interface 10 is used to receive drive signals from the output of receiver card 50. The drive signals include at least a master clock signal and multiple parallel data signals. These drive signals are parallel bus signals, with the master clock signal (DCLK) serving as a timing reference, and the multiple parallel data signals (DAT) containing pixel information of the image to be displayed. Multiple output interfaces 20 are used to output signals to multiple grid screen modules 70. Exemplarily, the number of output interfaces 20 can be any one of 8, 16, 24, or 32. Figure 4 The output interfaces shown are 24.

[0055] In one application scenario, a receiver card 50 may need to drive a large-area mesh screen, and its output signal needs to be distributed to multiple independent mesh screen modules 70. The signal hub board in this embodiment can undertake this signal distribution task. Multiple output interfaces 20 are physically connected to multiple mesh screen modules 70, and each output interface 20 is responsible for transmitting processed drive signals to one or a group of mesh screen modules 70.

[0056] The signal distribution circuit 30 is electrically connected between the input interface 10 and the multiple output interfaces 20, and is used to shape, buffer, and synchronize the received drive signals. The signal distribution circuit 30 includes a clock buffer module 301 and a data buffer module 302.

[0057] The clock buffer module 301 receives the master clock signal, buffers and copies it to generate multiple output clock signals that are the same number and phase-synchronized as the plurality of output interfaces 20. That is, the clock buffer module 301 processes the master clock signal, first receiving a single master clock signal from the input interface 10, and then buffering and amplifying the clock signal through an internal high-speed clock buffer or clock driver chip to restore the level amplitude and steep edges. Furthermore, the clock buffer module 301 also copies the buffered clock signal to generate multiple output clock signals in a number matching the number of output interfaces 20. This copying process ensures that all generated output clock signals have a strict phase synchronization relationship with each other, that is, their clock edges (rising or falling edges) are highly aligned in time, keeping clock skew within an extremely low range.

[0058] The data buffer module 302 receives the multiple parallel data signals and buffers them one-to-one to generate multiple output data signals. In other words, the data buffer module 302 processes the multiple parallel data signals. After receiving the multiple parallel data signals from the input interface 10, it performs one-to-one buffering. Here, "one-to-one" means that each input data signal independently passes through a dedicated buffer channel, without data overlap, selection, or multiplexing, thus ensuring the independence and integrity of the data channels. The data buffer module 302 performs level restoration and drive capability enhancement on each data signal, ensuring that the buffered data signal has sufficient energy to stably drive subsequent transmission lines and the input of the mesh screen module 70, effectively resisting noise interference and signal attenuation during transmission. Therefore, the data buffer module 302 generates multiple output data signals that correspond one-to-one with the input multiple parallel data signals.

[0059] Each output clock signal is paired with its corresponding output data signal and output to a grid screen module 70 through the corresponding output interface 20. After signal processing, the signal distribution circuit 30 pairs the multiple output clock signals with the multiple output data signals. Specifically, each output clock signal generated after buffering and duplication is paired with its corresponding buffered output data signal. For example, the first output clock signal is paired with the first output data signal, the second output clock signal is paired with the second output data signal, and so on. Each pair of paired clock and data signals constitutes a complete set of drive signals that can be used by a single grid screen module 70. Subsequently, these sets of drive signals are transmitted to the grid screen module 70 through their corresponding output interfaces 20. Since all output clock signals are highly synchronized, all grid screen modules 70 that receive the drive signals can latch and display data under a completely consistent timing reference, thereby ensuring the synchronization of the entire large screen display.

[0060] According to the signal hub board for a mesh screen provided in this embodiment of the present invention, firstly, by setting an independent signal distribution circuit 30, particularly the clock buffer module 301, the single master clock signal output by the receiving card 50 is buffered, copied, and enhanced to generate multiple phase-synchronized output clock signals. This solves the clock offset and signal attenuation problems that easily occur when signals are distributed over long distances or in a one-to-many manner, ensuring the precise timing consistency of data transmission between each mesh screen module 70, thus providing a foundation for improving the screen refresh rate and effectively eliminating image ghosting and flickering. Secondly, the data buffer module 302 performs one-to-one buffering and enhancement on multiple parallel data streams, ensuring the integrity and driving capability of the data signal, enabling it to stably transmit complex image information with higher grayscale levels, significantly improving the clarity and color detail of the display. Therefore, the signal hub board and control system of this application, by centrally synchronizing and shaping the driving signals, greatly optimizes the signal quality, enabling the mesh screen to achieve smooth, clear, and high-quality video playback.

[0061] Reference Figure 3 As shown, in one embodiment of the present invention, both the clock buffer module 301 and the data buffer module 302 include at least one high-speed bus transceiver. For example, the high-speed bus transceiver is a transceiver of model HC245.

[0062] Specifically, the clock buffer module 301 can utilize one or more channels of the high-speed bus transceiver to process the master clock signal. A single master clock signal received from the input interface 10 is fed into one of the transceiver's receivers. After processing by the transceiver's internal buffer amplification and shaping circuitry, a clock signal with significantly improved electrical characteristics and steeper edges is generated. Subsequently, utilizing the transceiver's multi-output capability, this shaped clock signal is connected in parallel to multiple transmitters of the transceiver, thereby generating output clock signals with extremely low clock skew, strong multi-channel driving capability, and high phase synchronization. Using a high-speed bus transceiver for clock replication and distribution effectively leverages its internal structure optimized for multi-channel synchronous operation, ensuring that the propagation delay difference between each output clock signal is controlled at the picosecond level, providing a more accurate timing reference for all downstream mesh screen modules 70.

[0063] The data buffer module 302 is also implemented through a high-speed bus transceiver. Multiple parallel data signals from input interface 10 are connected one-to-one to multiple parallel receiving terminals of the high-speed bus transceiver. For example, a 16-bit parallel data bus can be fully connected to the 16 receiving channels of a 16-bit or wider bus transceiver. Inside the transceiver, each data signal flows through an independent buffer circuit for signal amplification and shaping, effectively restoring the signal level that may have attenuated due to previous transmission and enhancing its anti-interference capability. Subsequently, these independently buffered and enhanced multiple data signals are output from the corresponding multiple parallel transmitting terminals of the transceiver. This implementation is not only compact in structure, but also ensures high consistency in electrical characteristics and propagation delays between data channels within the same chip, thus guaranteeing the synchronization between data bits within the parallel data bus and avoiding timing errors between data bits.

[0064] Reference Figure 1 As shown, in one embodiment of the present invention, the input interface 10 is further configured to receive an output enable control signal (M_OE_RED) from the receiving card 50, and the enable terminals of all data buffer modules 302 in the signal distribution circuit 30 receive the output enable control signal to synchronously enable or disable the signal output of the plurality of output interfaces 20 according to the output enable control signal.

[0065] When the receiving card 50 needs the grid screen to display the image normally, it outputs a valid output enable control signal. This signal acts on the enable terminals of all data buffer modules 302, enabling their internal output drive circuits to operate. In this state, the clock buffer module 301 normally outputs multiple synchronous output clock signals, and the data buffer module 302 also normally outputs multiple enhanced output data signals. These signals are transmitted to the grid screen module 70 through their respective output interfaces 20, driving the screen to light up and refresh the image. Conversely, when the receiving card 50 needs to momentarily turn off the screen display to prevent screen flickering caused by unstable data, it outputs an invalid output enable control signal. This signal synchronously acts on the enable terminals of all data buffer modules 302, disabling their internal output drive circuits. In the disabled state, the signal output terminals of these data buffer modules 302 enter a high-impedance state. At this time, all output interfaces 20 stop outputting any valid level signals, thereby achieving synchronous and immediate cutoff of signal output from all downstream grid screen modules 70.

[0066] This embodiment introduces an output enable control signal and connects it uniformly to the enable terminals of all data buffer modules 302, thereby achieving global and synchronous display control over the entire screen area driven by this signal hub. This function of synchronously enabling or disabling all signal outputs ensures that all display modules simultaneously enter or exit the black screen state at the moment of large-area screen refresh or image switching, thereby reducing screen tearing or local flickering problems that may be caused by different response times in different areas, and greatly improving the smoothness and viewing quality of video playback.

[0067] Reference Figure 3 As shown, in one embodiment of this utility model, a pull-down resistor R1 to R24 is connected to each output clock signal path of the clock buffer module 301 to improve signal stability.

[0068] For the data buffer module 302 controlled by the output enable signal (M_OE_RED), its output is placed in a high-impedance state when the screen display needs to be turned off. At this time, without a pull-down resistor, all data lines would float, and the grid screen module 70 might receive noise and misinterpret it as random image data, causing screen flickering or distortion. The pull-down resistor forces all data lines to a low level, outputting a definite low level to the downstream grid screen module 70, ensuring the purity and stability of the black screen state. During the instant the entire system powers on or off, the output state of the driver chip may be unstable and will also experience a brief high-impedance state. The pull-down resistor ensures that during such transients, all clock and data lines are clamped to a low level, preventing the generation of any spurious signals or glitches that could cause abnormalities in the downstream grid screen module 70.

[0069] Furthermore, for high-speed clock and data signals, pull-down resistors can help improve signal quality. They provide an additional discharge path for the falling edge of the signal, helping to release parasitic capacitance charges on the signal line more quickly, thus making the falling edge steeper and reducing signal oscillation.

[0070] Reference Figure 5 As shown, in one embodiment of the present invention, the signal hub further includes a power supply circuit 40, which includes a DC buck converter for converting a wide range of input DC voltages into a stable operating voltage for use by the signal distribution circuit 30.

[0071] For example, the DC buck converter includes a switch controller U8, an energy storage inductor LL1 connected to the switch controller U8, and a feedback circuit connected between the output terminal of the DC buck converter and the feedback terminal of the switch controller U8, for sampling and closed-loop control of the output operating voltage.

[0072] During operation, the switch controller U8 generates a high-frequency PWM signal to control the internal power switch transistor to turn on and off at extremely high speeds. When the switch transistor is on, the input voltage supplies power to the load through the inductor, while simultaneously storing electrical energy in the inductor in the form of a magnetic field. When the switch transistor is off, the input power supply is disconnected, and the energy storage inductor LL1 releases its stored magnetic field energy, forming a loop through the freewheeling diode to continue supplying current to the load, thus achieving a smooth voltage reduction. The feedback circuit is a voltage divider circuit, exemplarily including resistors R25 and R26, which samples the 5V output voltage and feeds it back to the switch controller U8. The switch controller U8 compares this feedback voltage with its internal reference voltage and then dynamically adjusts the duty cycle of the switch, thereby achieving precise closed-loop control of the output voltage and ensuring that it is unaffected by input voltage fluctuations or load changes.

[0073] In this embodiment, by employing closed-loop feedback control with DC step-down conversion, a wide range of potentially unstable input DC power can be converted into a highly stable, accurate, and low-noise operating voltage. This enhances the signal hub's adaptability to the external power supply environment and the overall reliability of the system.

[0074] Reference Figure 6 As shown, the grid screen control system according to an embodiment of the present invention includes a transmitting card 60, a receiving card 50, a signal hub as described in the above embodiment, and multiple grid screen modules 70.

[0075] Specifically, the transmitting card 60 is used to generate raw video data. The main function of the transmitting card 60 is to receive raw video or image data from external video sources (such as a computer's DVI / HDMI interface, a video player, or a live streaming media server).

[0076] The input terminal of the receiving card 50 is connected to the transmitting card 60, used to decode the raw video data into drive signals and output the drive signals from its output terminal. The input terminal of the receiving card 50 is electrically connected to the output terminal of the transmitting card 60 through a transmission medium such as a network cable. The function of the receiving card 50 is to receive and decode the high-speed serial data stream transmitted from the transmitting card 60. It parses the received data packets and reconstructs the drive signals that constitute the display image. These drive signals are usually organized in the form of a parallel bus and include at least one master clock signal (DCLK) as a timing reference and multiple parallel data signals (DAT) containing pixel grayscale information.

[0077] The input interface 10 of the signal hub board is connected to the output terminal of the receiver card 50 for receiving and distributing the drive signals. This input interface 10 can be plugged into the output terminal (pins) of the receiver card 50 to receive the raw, unamplified drive signals generated by the receiver card 50. Since a single receiver card 50 needs to drive a large number of mesh screen modules 70, direct driving would lead to severe signal attenuation, clock skew, and noise interference. The signal hub board, through its internally integrated signal distribution circuit 30, centrally buffers, shapes, enhances, and synchronizes the received single master clock signal and multiple parallel data signals, generating multiple highly synchronized phase drive signals. These drive signals are then distributed through its multiple independent output interfaces 20.

[0078] The input terminals of multiple grid screen modules 70 are respectively connected to multiple output interfaces 20 of the signal hub board, and are driven by the drive signals distributed by the signal hub board. Multiple grid screen modules 70 constitute the entire grid display screen. The input terminal of each independent grid screen module 70 is connected one-to-one with one output interface 20 of the signal hub board. Therefore, each grid screen module 70 receives the drive signals distributed by the signal hub board (including one clock signal and one corresponding data signal). Since all clock signals output from the signal hub board maintain strict phase synchronization, the entire large-area grid screen, composed of multiple independent grid screen modules 70, can latch data and refresh pixels under a completely consistent timing reference, thus displaying the image as a unified whole.

[0079] According to the grid screen control system provided in this embodiment of the present invention, by performing centralized clock synchronization and signal shaping on the drive signal, the signal quality is greatly optimized, enabling the grid screen to achieve smooth, clear, and high-quality video playback.

[0080] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0081] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. All equivalent structural transformations made under the inventive concept of the present utility model using the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present utility model.

Claims

1. A signal hub board for a mesh screen, characterized in that, include: An input interface is used to receive drive signals from the output of the receiver card, wherein the drive signals include at least a master clock signal and multiple parallel data signals; Multiple output interfaces are used to output signals to multiple mesh screen modules; A signal distribution circuit is electrically connected between the input interface and the plurality of output interfaces, the signal distribution circuit comprising: A clock buffer module is used to receive the master clock signal, buffer and copy it to generate multiple output clock signals that are the same number as the multiple output interfaces and are phase-synchronized. A data buffer module is used to receive the multiple parallel data signals and buffer them one-to-one to generate multiple output data signals. Each output clock signal is paired with its corresponding output data signal and output to a grid screen module through the corresponding output interface.

2. The signal hub according to claim 1, characterized in that, Both the clock buffer module and the data buffer module contain at least one high-speed bus transceiver.

3. The signal hub according to claim 1 or 2, characterized in that, The input interface is also used to receive an output enable control signal from the receiving card, and the enable terminals of all data buffer modules in the signal distribution circuit receive the output enable control signal to synchronously enable or disable the signal output of the plurality of output interfaces according to the output enable control signal.

4. The signal hub according to claim 1, characterized in that, On each output clock signal path of the clock buffer module, a pull-down resistor is connected to improve signal stability.

5. The signal hub according to claim 1, characterized in that, The signal hub also includes a power supply circuit, which includes a DC buck converter for converting a wide range of input DC voltages into a stable operating voltage for use by the signal distribution circuit.

6. The signal hub according to claim 5, characterized in that, The DC buck converter includes: Switch controller; The energy storage inductor connected to the switch controller; A feedback circuit connected between the output terminal of the DC buck converter and the feedback terminal of the switch controller is used to sample and control the output operating voltage.

7. The signal hub according to claim 1, characterized in that, The number of output interfaces can be any one of 8, 16, 24, or 32.

8. A grid screen control system, characterized in that, include: Sending card, used to generate raw video data; A receiving card, whose input terminal is connected to the sending card, is used to decode the original video data into a driving signal and output the driving signal from its output terminal. The signal hub board as described in any one of claims 1 to 7 has its input interface connected to the output terminal of the receiving card for receiving and distributing the drive signal; In addition, multiple grid screen modules, whose input terminals are respectively connected to multiple output interfaces of the signal hub board, are driven by the drive signals distributed by the signal hub board.

Images