Display device

Abstract

This application provides a display device. The display device includes a display panel and a flexible connector. The display panel has spaced display areas and non-display areas, and includes a data line, a low-level voltage signal line, a first pin, and a second pin. The data line is located in the display area. The non-display area includes a first bonding area. The first pin and the second pin are located in the first bonding area and arranged along a first direction. The first pin is electrically connected to the data line, and the second pin is electrically connected to the low-level voltage signal line. The dimension of the first pin along the first direction is smaller than the dimension of the second pin along the first direction. The flexible connector is bonded to the first pin and the second pin. Thus, the display device can improve the reliability of signal transmission from the second pin to the low-level voltage signal line.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display device. Background Technology

[0002] Currently, display devices typically consist of a display panel and a flexible circuit board. One end of the flexible circuit board is bonded to the display panel, and bending the flexible circuit board causes the other end to bend to the back side of the light-emitting surface of the display panel. Because the other end of the flexible circuit board is located on the back side of the light-emitting surface of the display panel, the space occupied by the flexible circuit board in the non-display area is smaller, enabling the display device to achieve a narrow bezel design.

[0003] However, for the pins on the display panel used to bond flexible circuit boards, especially those transmitting low-level voltage signals, electrocorrosion may occur after the display device has been in operation for a period of time. Electrocorrosion can damage or even short-circuit these pins, thereby reducing the reliability of the electrical signals transmitted by these pins. Utility Model Content

[0004] This application provides a display device that improves the reliability of signal transmission from the second pin to the low-level voltage signal line, thereby at least partially solving the above-mentioned technical problems.

[0005] To achieve the above objectives, according to a first aspect of this application, a display device is provided, including a display panel and a flexible connector. The display panel has spaced display areas and non-display areas, and includes a data line, a low-level voltage signal line, a first pin, and a second pin. The data line is located in the display area. The display area includes a first bonding area. The first pin and the second pin are located in the first bonding area and arranged along a first direction. The first pin is electrically connected to the data line. The second pin is electrically connected to the low-level voltage signal line. The dimension of the first pin along the first direction is smaller than the dimension of the second pin along the first direction. The flexible connector is bonded to the first pin and the second pin.

[0006] Optionally, the display panel further includes a power supply voltage signal line and a third pin. The power supply voltage signal line is located in the display area, and the third pin is located in the first bonding area and is arranged along the first direction with the first pin and the second pin. The flexible connector is also bonded to the third pin, and the third pin is electrically connected to the power supply voltage signal line.

[0007] Wherein, the dimension of the third pin along the first direction is greater than the dimension of the first pin along the first direction.

[0008] Optionally, the plurality of power supply voltage signal lines include a positive power supply voltage signal line and a negative power supply voltage signal line, wherein the positive power supply voltage signal line is electrically connected to at least one of the third pins, and the negative power supply voltage signal line is electrically connected to at least one of the third pins.

[0009] Optionally, the display panel further includes a high-level voltage signal line and a fourth pin, the fourth pin being located in the first bonding area and arranged along the first direction with the first pin and the second pin, the flexible connector being further bonded to the fourth pin, and the fourth pin being electrically connected to the high-level voltage signal line; wherein, the dimension of the fourth pin along the first direction is greater than the dimension of the first pin along the first direction.

[0010] Optionally, the dimension of the fourth pin along the first direction is smaller than the dimension of the third pin along the first direction.

[0011] Optionally, the dimension of the fourth pin along the first direction is smaller than the dimension of the second pin along the first direction.

[0012] Optionally, one of the second pins and one of the fourth pins are arranged adjacent to each other. The display panel also includes a fifth pin, which is located between the second pin and the fourth pin. The flexible connector is also bound to the fifth pin, which is in a floating state.

[0013] Optionally, one of the second pins and one of the fourth pins are arranged adjacent to each other, and the display panel further includes a fifth pin located between the second pin and the fourth pin, and the flexible connector is also bound to the fifth pin;

[0014] The fifth pin is configured to receive a fixed voltage, the second pin is configured to receive a low-level voltage signal, and the fourth pin is configured to receive a high-level voltage signal. The fixed voltage is greater than the voltage corresponding to the low-level voltage signal and less than the voltage corresponding to the high-level voltage signal.

[0015] Optionally, the display panel further has a second bonding area and includes a sixth pin, the second bonding area being located between the first bonding area and the display area along a second direction, the sixth pin being located in the second bonding area and connected to the fifth pin, and the second direction intersecting the first direction;

[0016] The display device further includes a driver chip, which is bonded to the second bonding area and connected to the sixth pin, and the driver chip is configured to apply the fixed voltage to the sixth pin.

[0017] Optionally, the dimension of the fifth pin along the first direction is less than or equal to the dimension of the first pin along the first direction.

[0018] In the display device of this application embodiment, since the dimension of the first pin along the first direction is smaller than the dimension of the second pin along the first direction, the dimension of the second pin along the first direction is increased, which can also be described as increasing the width of the second pin and increasing the cross-section of the second pin. This reduces the current density when the second pin transmits a low-level voltage signal, lowers the risk of electrolytic corrosion of the second pin due to high current density, reduces the risk of damage or even short circuit caused by electrolytic corrosion, and improves the reliability of the second pin transmitting signals to the low-level voltage signal line. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the planar structure of the display panel provided in an exemplary embodiment of this application;

[0020] Figure 2 This is a partially enlarged schematic diagram of a display panel provided in an exemplary embodiment of this application;

[0021] Figure 3 This is another partially enlarged schematic diagram of the display panel provided in an exemplary embodiment of this application;

[0022] Figure 4 This is a schematic diagram of a planar structure of a flexible connector provided in an exemplary embodiment of this application.

[0023] Explanation of reference numerals in the attached figures:

[0024] 100. Display device;

[0025] 10. Display panel; AA, display area; NAA, non-display area; BA1, first binding area; BA2, second binding area;

[0026] 111. Pixel driving circuit; 112. Gate driving circuit;

[0027] 12. Data cable;

[0028] 13. Power supply voltage signal line; 131. Positive power supply voltage signal line; 132. Negative power supply voltage signal line;

[0029] VDD, positive power supply voltage signal; VSS, negative power supply voltage signal;

[0030] 141. Low-level voltage signal line; 142. High-level voltage signal line;

[0031] VGL, low-level voltage signal; VGH, high-level voltage signal;

[0032] 151. Pin 1; 152. Pin 2; 153. Pin 3; 154. Pin 4; 155. Pin 5;

[0033] 161. Pin 6; 162. Pin 7; 163. Pin 8; 164. Pin 9; 165. Pin 10; 166. Pin 11;

[0034] 20. Flexible connector; 201. Flexible circuit board; 202. Twelfth pin; 203. Thirteenth pin; 204. Fourteenth pin; 205. Fifteenth pin; 206. Sixteenth pin;

[0035] 30. Driver chip;

[0036] 40. Printed circuit boards;

[0037] 501. First connecting line; 502. Second connecting line; 503. Third connecting line; 504. Fourth connecting line; 505. Fifth connecting line;

[0038] X, the first direction; Y, the second direction. Detailed Implementation

[0039] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0040] Figure 1 This is a schematic diagram of the planar structure of the display panel provided in an exemplary embodiment of this application.

[0041] Please see Figure 1 The display device 100 includes a display panel 10. The display panel 10 has spaced display areas AA and non-display areas NAA. The non-display areas NAA are located around the display areas AA.

[0042] The display panel 10 includes a light-emitting device (not shown in the figure) and a pixel driving circuit 111. Both the pixel driving circuit 111 and the light-emitting device are located in the display area AA and are connected to drive the light-emitting device to emit light. The light-emitting device may include active light-emitting devices such as organic light-emitting diodes (OLEDs), micro-LEDs, mini-LEDs, or quantum dot LEDs. The light-emitting device may also include a liquid crystal device. The pixel driving circuit 111 may include a driving transistor and a data writing transistor. The pixel driving circuit 111 may also include other transistors such as a light-emitting control transistor.

[0043] The display panel 10 also includes data lines 12 and scan lines (not shown in the figure). Both data lines 12 and scan lines are located in the display area AA and connected to the pixel driving circuit 111 to provide data signals and scan signals to the pixel driving circuit 111. For example, data line 12 can be connected to one of the source and drain of a data write transistor, and the other of the source and drain of the data write transistor can be connected to the gate of a driving transistor. In this way, the data write transistor controls whether a data signal is output to the gate of the driving transistor.

[0044] The display panel 10 also includes a power supply voltage signal line 13, located in the display area AA and connected to the pixel driving circuit 111, to provide a power supply voltage signal to the pixel driving circuit 111. In some embodiments, the power supply voltage signal line 13 may include a positive power supply voltage signal line 131 and a negative power supply voltage signal line 132. The positive power supply voltage signal line 131 is used to transmit a positive power supply voltage signal VDD, which can be 2V to 5V. The negative power supply voltage signal line 132 is used to transmit the positive power supply voltage signal VDD, which can be -5V to -8V. The source and drain of the driving transistor can be connected between the positive power supply voltage signal line 131 and the negative power supply voltage signal line 132. When the driving transistor is turned on, the voltage difference between the positive power supply voltage signal VDD and the negative power supply voltage signal VSS causes the driving transistor to generate a driving current to drive the light-emitting device.

[0045] The display panel 10 may further include a gate driving circuit 112 connected to a scan line to provide a scan signal for at least the scan line. The gate driving circuit 112 may be located in the non-display area NAA and at least on one side of the display area AA in the first direction X. Of course, the gate driving circuit 112 may also be located in the display area AA.

[0046] The display panel 10 may further include a low-level voltage signal line 141 and a high-level voltage signal line 142. The low-level voltage signal line 141 transmits a low-level voltage signal VGL, which can be -14V to -10V. The high-level voltage signal line 142 transmits a high-level voltage signal VGH, which can be 5V to 8V. The low-level voltage signal line 141 is connected to the gate driving circuit 112 to provide the low-level voltage signal VGL to the gate driving circuit 112. The high-level voltage signal line 142 is also connected to the gate driving circuit 112 to provide the high-level voltage signal VGH to the gate driving circuit 112. In some embodiments, both the low-level voltage signal line 141 and the high-level voltage signal line 142 may be located in a non-display area NAA, for example, at least one side of the display area AA in the first direction X. Of course, when the gate driving circuit 112 is located in the display area AA, both the low-level voltage signal line 141 and the high-level voltage signal line 142 may also be located in the display area AA.

[0047] In some embodiments, the non-display area NAA further includes a first bonding area BA1, which may be located on one side of the display area AA in the second direction Y, where the first direction X intersects the second direction Y. The display device 100 also includes a flexible connector 20, one end of which is bonded to the first bonding area BA1, and the flexible connector 20 is bent such that its other end is located on the back side of the light-emitting surface of the display panel 10. In some embodiments, the flexible connector 20 may include a flexible circuit board 201. In other embodiments, the flexible connector 20 may also include a flip-chip film.

[0048] In some embodiments, when the flexible connector 20 is a flexible circuit board 201, the non-display area NAA may further include a second bonding area BA2, which is located between the first bonding area BA1 and the display area AA along the second direction Y. The display device 100 also includes a driver chip 30, which is bonded to the second bonding area BA2. The flexible circuit board 201 can be connected to the driver chip 30 via multiple connecting lines.

[0049] In some embodiments, the display device 100 further includes a printed circuit board 40, which is connected to the other end of the flexible connector 20. The printed circuit board 40 is used to output voltage signals such as data signals, power supply voltage signals, and high / low level voltage signals VGL to the flexible connector 20.

[0050] When the flexible connector 20 is a flexible circuit board 201, for data signals, the printed circuit board 40 can output to the driver chip 30 via the flexible circuit board 201, and then the driver chip 30 outputs to the data line 12.

[0051] In some embodiments, when the flexible connector 20 is a flexible circuit board 201, the printed circuit board 40 can output power supply voltage signals and high and low level voltages (e.g., low level voltage signal VGL and high level voltage signal VGH) to the driver chip 30 via the flexible circuit board 201, and then the driver chip 30 can output them to the corresponding signal lines respectively.

[0052] In other embodiments, when the flexible connector 20 is a flexible circuit board 201, the power supply voltage signal and the high and low level voltage signals VGL can also be directly output to the corresponding signal lines through the flexible circuit board 201. In this case, the flexible circuit board 201 can be directly connected to the signal lines (such as power supply voltage signal line 13) corresponding to the power supply voltage signal and the high and low level voltage signals VGL.

[0053] Figure 2 This is a partially enlarged schematic diagram of a display panel provided in an exemplary embodiment of this application. Figure 3 This is another partially enlarged schematic diagram of the display panel provided in an exemplary embodiment of this application.

[0054] Please see Figure 2 and Figure 3 The display panel 10 also includes a first pin 151 and a second pin 152. The first pin 151 and the second pin 152 are located in the first bonding area BA1 and arranged along the first direction X. A flexible connector 20 is bonded to the first pin 151 and the second pin 152. The data signal output by the flexible connector 20 is first transmitted to the first pin 151, and the low-level voltage signal VGL output by the flexible connector 20 is first transmitted to the second pin 152. The first pin 151 is electrically connected to the data line 12, so that the data signal is output from the first pin 151 through the driver chip 30 to the data line 12. The second pin 152 is electrically connected to the low-level voltage signal line 141, so that the low-level voltage signal VGL is output from the second pin 152 through the driver chip 30 to the low-level voltage signal line 141, or, directly output from the second pin 152 to the low-level voltage signal line 141.

[0055] In some embodiments, the dimension d1 of the first pin 151 along the first direction X is smaller than the dimension d2 of the second pin 152 along the first direction X, thereby increasing the dimension d2 of the second pin 152 along the first direction X, which can also be referred to as increasing the width of the second pin 152 and increasing its cross-section. This reduces the current density when the second pin 152 transmits a low-level voltage signal VGL, lowering the risk of electro-corrosion of the second pin 152 due to high current density, reducing the risk of damage or even short circuit caused by electro-corrosion, and improving the reliability of signal transmission from the second pin 152 to the low-level voltage signal line 141.

[0056] like Figure 2 and Figure 3 As shown, the display panel 10 also includes a third pin 153. The third pin 153 is located in the first bonding area BA1 and is arranged along the first direction X with the first pin 151 and the second pin 152. The flexible connector 20 is also bonded to the third pin 153, and the power supply voltage signal output by the flexible connector 20 is transmitted to the third pin 153. The third pin 153 is electrically connected to the power supply voltage signal line 13, so that the power supply voltage signal is output from the third pin 153 through the driver chip 30 to the power supply voltage signal line 13, or, the power supply voltage signal is directly output from the third pin 153 to the power supply voltage signal line 13.

[0057] In some embodiments, the dimension d3 of the third pin 153 along the first direction X is greater than the dimension d1 of the first pin 151 along the first direction X, making the dimension d3 of the third pin 153 along the first direction X larger, which can also be referred to as increasing the width of the third pin 153. Increasing the cross-section of the third pin 153 can reduce the current density when the third pin 153 transmits the power supply voltage signal, reducing the risk of electro-corrosion of the third pin 153 due to high current density, reducing the risk of damage or even short circuit of the third pin 153 due to electro-corrosion, and improving the reliability of signal transmission from the third pin 153 to the power supply voltage signal line 13. Furthermore, the increased width of the third pin 153 reduces its resistance, which can also reduce the resistance voltage drop of the transmitted power supply voltage signal, improving the problem of uneven display brightness in the display panel 10 caused by a large resistance voltage drop.

[0058] In some embodiments, the positive power supply voltage signal line 131 is electrically connected to at least one third pin 153, and the negative power supply voltage signal line 132 is electrically connected to at least one third pin 153. Since the dimension d3 along the first direction X of both the at least one third pin 153 connected to the positive power supply voltage signal line 131 and the at least one third pin 153 connected to the negative power supply voltage signal line 132 increases, the resistance of both decreases. This reduces the current density when the at least one third pin 153 connected to the positive power supply voltage signal line 131 transmits the positive power supply voltage signal VDD, and also reduces the current density when the at least one third pin 153 connected to the negative power supply voltage signal line 132 transmits the negative power supply voltage signal VSS. This reduces the risk of electrolytic corrosion of the third pin 153 due to high current density, improves the reliability of transmitting the positive power supply voltage signal VDD from the at least one third pin 153 connected to the positive power supply voltage signal line 131, and improves the reliability of transmitting the negative power supply voltage signal VSS from the at least one third pin 153 connected to the negative power supply voltage signal line 132.

[0059] like Figure 2 and Figure 3 As shown, the display panel 10 also includes a fourth pin 154. The fourth pin 154 is located in the first bonding area BA1 and is arranged along the first direction X with the first pin 151 and the second pin 152. The flexible connector 20 is also bonded to the fourth pin 154, and the high-level voltage signal VGH output by the flexible connector 20 is transmitted to the fourth pin 154. The fourth pin 154 is electrically connected to the high-level voltage signal line 142, so that the high-level voltage signal VGH is output from the fourth pin 154 through the driver chip 30 to the high-level voltage signal line 142, or, directly output from the fourth pin 154 to the high-level voltage signal line 142.

[0060] In some embodiments, the dimension d4 of the fourth pin 154 along the first direction X is greater than the dimension d1 of the first pin 151 along the first direction X, making the dimension d4 of the fourth pin 154 along the first direction X larger, which can also be referred to as increasing the width of the fourth pin 154. Increasing the cross-section of the fourth pin 154 can reduce the current density when the fourth pin 154 transmits the high-level voltage signal VGH, reduce the risk of electrical corrosion of the fourth pin 154 due to the large current density, reduce the risk of damage or even short circuit of the fourth pin 154 caused by electrical corrosion, and improve the reliability of the fourth pin 154 transmitting signals to the high-level voltage signal line 142.

[0061] Based on the above, it can be seen that the dimensions of the second pin 152 to the fourth pin 154 along the first direction X are all larger than the dimension d1 of the first pin 151 along the first direction X. To increase the dimension d2 of the second pin 152 along the first direction X, two or more second pins in conventional technology can be merged into one second pin 152 in this application. Similarly, to increase the dimensions of the third pin 153 to the fourth pin 154 along the first direction X, a similar approach can be adopted. By merging two or more narrow pins into one wider pin, the total number of pins in the first bonding area BA1 can be reduced. Of course, the dimensions of the second pin 152 to the fourth pin 154 along the first direction X can also be increased without changing the total number of pins in the first bonding area BA1.

[0062] In some embodiments, the dimensions of the second pin 152 to the fourth pin 154 along the first direction X can be equal to simplify the formation process of the second pin 152 to the fourth pin 154.

[0063] In some embodiments, the dimension d4 of the fourth pin 154 along the first direction X is smaller than the dimension d3 of the third pin 153 along the first direction X, such that the resistance of the third pin 153 is smaller than the resistance of the fourth pin 154, and the resistance of the third pin 153 is smaller. The smaller resistance of the third pin 153 reduces the resistance voltage drop of the power supply voltage signal transmitted through the third pin 153, increases the drive current output by the drive transistor, and thereby improves the brightness of the display panel 10 when displaying, meeting the high brightness requirements of the display device 100.

[0064] In some embodiments, the dimension d4 of the fourth pin 154 along the first direction X is smaller than the dimension d2 of the second pin 152 along the first direction X, such that the width of the second pin 152 is greater than the width of the fourth pin 154, and the resistance of the second pin 152 is smaller. Since the absolute value of the low-level voltage signal VGL output by the second pin 152 is typically larger than the absolute value of the high-level voltage signal VGH transmitted by the fourth pin 154, the lower resistance of the second pin 152 can better reduce the current density of the second pin 152 when transmitting the low-level voltage signal VGL, thus reducing the risk of electrolytic corrosion of the second pin 152.

[0065] In some embodiments, such as Figure 2 and Figure 3 As shown, a second pin 152 and a fourth pin 154 are arranged adjacent to each other. The display panel 10 also includes a fifth pin 155, which is located between the second pin 152 and the fourth pin 154, meaning that the fifth pin 155, the second pin 152, and the fourth pin 154 are also arranged along the first direction X. The flexible connector 20 is also attached to the fifth pin 155. The flexible connector 20 may not output a signal to the fifth pin 155.

[0066] In some embodiments, such as Figure 2 As shown, the fifth pin 155 is in a floating state. In this state, the fifth pin 155 is not connected to any potential, thus eliminating the need for the connection process of the fifth pin 155 and simplifying the manufacturing process of the display panel 10. Furthermore, the fifth pin 155 isolates the second pin 152 from the fourth pin 154, reducing the risk of electrical corrosion of the second pin 152 and the fourth pin 154 due to a large voltage difference in the signals transmitted between them.

[0067] In some embodiments, such as Figure 3As shown, pin 155 is configured to receive a fixed voltage. This fixed voltage is greater than the voltage corresponding to the low-level voltage signal VGL and less than the voltage corresponding to the high-level voltage signal VGH. The potential of pin 155 lies between the voltage corresponding to the low-level voltage signal VGL and the voltage corresponding to the high-level voltage signal VGH, thus mitigating the risk of electrical corrosion of pins 152 and 154 due to the large voltage difference between the signals transmitted by pins 152 and 154.

[0068] In some embodiments, such as Figure 3 As shown, the display panel 10 also includes a sixth pin 161, which is located in the second bonding area BA2 and connected to the fifth pin 155. The display device 100 also includes a driver chip 30, which is bonded to the second bonding area BA2. The driver chip 30 is bonded to the sixth pin 161. The driver chip 30 is configured to apply a fixed voltage to the sixth pin 161. Thus, the fixed voltage connected to the fifth pin 155 is provided by the driver chip 30.

[0069] In some embodiments, the sixth pin 161 can be used as a test pin when the driver chip 30 is bonded to the second bonding area BA2, that is, as a test pin during the manufacturing process of the display panel 10. When the display panel 10 is in use, the sixth pin 161 does not output a signal to the display area AA, but outputs a fixed voltage to the fifth pin 155.

[0070] In some embodiments, the connection line may include a first connection line 501, which is connected between the fifth pin 155 and the sixth pin 161 to connect the fifth pin 155 and the sixth pin 161.

[0071] In some embodiments, such as Figure 2 As shown, the dimension d5 of the fifth pin 155 along the first direction X is less than or equal to the dimension d1 of the first pin 151 along the first direction X, so that the narrower fifth pin 155 can be inserted when the space between the second pin 152 and the fourth pin 154 is small. In some embodiments, the dimension d5 of the fifth pin 155 along the first direction X is less than the dimension d1 of the first pin 151 along the first direction X.

[0072] Please see Figure 2 and Figure 3The first pin 151 to the fifth pin 155 are arranged side by side along a first direction X. The second pin 152 to the fourth pin 154 may be located on at least one side of the first pin 151 along the first direction X. For example, the second pin 152 to the fourth pin 154 may be located on the opposite side of the first pin 151 along the first direction X. The dimensions of the first pin 151 to the fifth pin 155 along the first direction X may be referred to as their respective widths. Along the first direction X, the width of the first pin 151 may be 0.4 mm to 0.6 mm, and the width of the second pin 152 to the fourth pin 154 may be greater than or equal to 0.6 mm. The first pin 151 to the fifth pin 155 all extend along a second direction Y, and their dimensions along the second direction Y may be referred to as their respective lengths. The lengths of the first pin 151 to the fifth pin 155 may be equal.

[0073] In some embodiments, such as Figure 2 and Figure 3 As shown, the display panel 10 also includes a plurality of seventh pins 162 and a plurality of eighth pins 163, which are located in the second bonding area BA2. The driver chip 30 is also bonded to the plurality of seventh pins 162 and the plurality of eighth pins 163.

[0074] Multiple seventh pins 162 are located on the side of multiple eighth pins 163 near the first bonding area BA1, and are connected to multiple first pins 151 in a one-to-one manner. Thus, the data signal output from the first pin 151 is input to the inside of the driver chip 30 through the seventh pins 162. The connection line may also include a second connection line 502, each second connection line 502 connecting one first pin 151 and one seventh pin 162.

[0075] Multiple eighth pins 163 are connected to multiple data lines 12, so that the driver chip 30 outputs data signals to the data lines 12 through the eighth pins 163. The multiple eighth pins 163 can be arranged in multiple rows along the second direction Y, and each row includes at least two eighth pins 163 arranged along the first direction X.

[0076] In some embodiments, such as Figure 2 and Figure 3 As shown, the display panel 10 also includes a plurality of ninth pins 164, a plurality of tenth pins 165, and a plurality of eleventh pins 166. The plurality of ninth pins 164, the plurality of tenth pins 165, and the plurality of eleventh pins 166 are located in the second bonding area BA2. The seventh pin 162 and the ninth pins 164 to the eleventh pins 166 are all arranged along the first direction X.

[0077] The connecting line also includes a third connecting line 503. In some embodiments, such as Figure 2 and Figure 3As shown, a second pin 152 is connected to at least two ninth pins 164 via a third connection line 503. The increased width of the second pin 152 reduces the loss of the low-level voltage signal VGL output to the corresponding at least two ninth pins 164. In some embodiments, the width of the third connection line 503 is greater than the width of the second connection line 502, which further reduces the resistive voltage drop of the low-level voltage signal VGL during transmission.

[0078] The connection line also includes a fourth connection line 504. In some embodiments, a third pin 153 is connected to at least two tenth pins 165 via a fourth connection line 504. Because the width of the third pin 153 is increased, the loss of the power supply voltage signal output to the corresponding tenth pin 165 is reduced. In some embodiments, the width of the fourth connection line 504 is greater than the width of the second connection line 502, which helps to further reduce the resistance voltage drop of the power supply voltage signal during transmission.

[0079] The connection line also includes a fifth connection line 505. In some embodiments, a fourth pin 154 is connected to at least two eleventh pins 166 via a fifth connection line 505. The increased width of the fourth pin 154 reduces the loss of the high-level voltage signal VGH output to the corresponding eleventh pin 166. In some embodiments, the width of the fifth connection line 505 is greater than the width of the second connection line 502, which helps to further reduce the resistance voltage drop during the transmission of the high-level voltage signal VGH.

[0080] Figure 4 This is a schematic diagram of a planar structure of a flexible connector provided in an exemplary embodiment of this application.

[0081] Please see Figure 4 The flexible connector 20 also includes a twelfth pin 202, a thirteenth pin 203, a fourteenth pin 204, a fifteenth pin 205, and a sixteenth pin 206. The twelfth pin 202 is attached to the first pin 151, and is identical to the first pin 151. The thirteenth pin 203 is attached to the second pin 152, and is identical to the second pin 152. The fourteenth pin 204 is attached to the third pin 153, and is identical to the third pin 153. The fifteenth pin 205 is attached to the fourth pin 154, and is identical to the fourth pin 154. The sixteenth pin 206 is attached to the fifth pin 155, and is identical to the fifth pin 155. Therefore, the dimensions of the thirteenth pin 203, fourteenth pin 204, and fifteenth pin 205 along the first direction X are larger than the dimensions of the twelfth pin 202 along the first direction X.

[0082] The above description of the embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application; those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display device, characterized in that, include: A display panel has a spaced display area and a non-display area, and includes a data line, a low-level voltage signal line, a first pin, and a second pin. The data line is located in the display area, and the non-display area includes a first bonding area. The first pin and the second pin are located in the first bonding area and arranged along a first direction. The first pin is electrically connected to the data line, and the second pin is electrically connected to the low-level voltage signal line. The dimension of the first pin along the first direction is smaller than the dimension of the second pin along the first direction. A flexible connector is attached to the first pin and the second pin.

2. The display device according to claim 1, characterized in that, The display panel further includes a power voltage signal line and a third pin. The power voltage signal line is located in the display area, and the third pin is located in the first bonding area and is arranged along the first direction with the first pin and the second pin. The flexible connector is also bonded to the third pin, and the third pin is electrically connected to the power voltage signal line. Wherein, the dimension of the third pin along the first direction is greater than the dimension of the first pin along the first direction.

3. The display device according to claim 2, characterized in that, The plurality of power supply voltage signal lines include a positive power supply voltage signal line and a negative power supply voltage signal line, wherein the positive power supply voltage signal line is electrically connected to at least one of the third pins, and the negative power supply voltage signal line is electrically connected to at least one of the third pins.

4. The display device according to claim 2, characterized in that, The display panel further includes a high-level voltage signal line and a fourth pin. The fourth pin is located in the first bonding area and is arranged along the first direction with the first pin and the second pin. The flexible connector is also bonded to the fourth pin. The fourth pin is electrically connected to the high-level voltage signal line. The dimension of the fourth pin along the first direction is greater than the dimension of the first pin along the first direction.

5. The display device according to claim 4, characterized in that, The dimension of the fourth pin along the first direction is smaller than the dimension of the third pin along the first direction.

6. The display device according to claim 4, characterized in that, The dimension of the fourth pin along the first direction is smaller than the dimension of the second pin along the first direction.

7. The display device according to claim 4, characterized in that, The second pin and the fourth pin are arranged adjacent to each other. The display panel also includes a fifth pin, which is located between the second pin and the fourth pin. The flexible connector is also bound to the fifth pin, which is in a floating state.

8. The display device according to claim 4, characterized in that, The second pin is disposed adjacent to the fourth pin, and the display panel further includes a fifth pin located between the second pin and the fourth pin, and the flexible connector is also bound to the fifth pin; The fifth pin is configured to receive a fixed voltage, the second pin is configured to receive a low-level voltage signal, and the fourth pin is configured to receive a high-level voltage signal. The fixed voltage is greater than the voltage corresponding to the low-level voltage signal and less than the voltage corresponding to the high-level voltage signal.

9. The display device according to claim 8, characterized in that, The display panel also has a second bonding area and includes a sixth pin. The second bonding area is located between the first bonding area and the display area along a second direction. The sixth pin is located in the second bonding area and connected to the fifth pin. The second direction intersects with the first direction. The display device further includes a driver chip, which is bonded to the second bonding area and connected to the sixth pin, and the driver chip is configured to apply the fixed voltage to the sixth pin.

10. The display device according to claim 7 or 8, characterized in that, The dimension of the fifth pin along the first direction is less than or equal to the dimension of the first pin along the first direction.

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