A novel electroencephalogram analog front-end sampling circuit
By introducing communication isolation modules and power isolation modules into the EEG acquisition circuit, interference problems in power supply and communication processes are solved, improving signal acquisition quality and enhancing user experience.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 魏亚
- Filing Date
- 2025-04-02
- Publication Date
- 2026-07-07
AI Technical Summary
The power supply and communication processes of existing EEG acquisition circuits are susceptible to interference, leading to a decrease in signal acquisition quality.
Communication isolation modules and power isolation modules are used to isolate the novel EEG simulation front-end sampling circuit from the host computer, respectively, to avoid interference between PC communication and power frequency power supply.
It effectively improved signal acquisition quality and enhanced the user experience.
Smart Images
Figure CN224461703U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of brain-computer interface technology, specifically to a novel brain-computer interface front-end sampling circuit. Background Technology
[0002] The EEG signal acquisition circuit needs to have the following functions: be able to acquire and process EEG signals, including amplification, filtering, analog-to-digital conversion, etc.; be able to transmit the processed signals to external devices for control and interaction; and be able to process and adjust the signals according to the user's intentions and feedback from external devices to improve control accuracy and user experience.
[0003] In the process of conceiving and implementing this application, the applicant has discovered at least the following problems: the power supply and communication process of the existing EEG acquisition circuit are susceptible to interference, and cannot effectively solve the interference caused by PC-side communication and power frequency power supply during the acquisition process, resulting in a decrease in signal acquisition quality. Utility Model Content
[0004] To alleviate the above problems, the main objective of this application is to propose a novel EEG simulation front-end sampling circuit, comprising a first electrode, a second electrode, an EEG acquisition module, an EEG processing module, a communication isolation module, and a power isolation module, wherein...
[0005] The first input terminal of the EEG acquisition module is connected to the first electrode, and the second input terminal of the EEG acquisition module is connected to the second electrode, so as to acquire EEG signals through the first electrode and the second electrode;
[0006] The first voltage terminal of the EEG acquisition module is input with a first voltage, the second voltage terminal of the EEG acquisition module is input with a second voltage, and the reference voltage terminal of the EEG acquisition module is grounded.
[0007] The first output terminal of the EEG acquisition module is connected to the first terminal of the EEG processing module, the second terminal of the EEG processing module is connected to the first signal terminal of the communication isolation module, and the third terminal of the EEG processing module is connected to the second signal terminal of the communication isolation module; the third and fourth signal terminals of the communication isolation module are connected to the host computer.
[0008] The first voltage is input to the first voltage terminal of the communication isolation module, the third voltage is input to the third voltage terminal of the communication isolation module, the second voltage terminal of the communication isolation module is grounded, and the fourth voltage terminal of the communication isolation module is connected to the isolation ground.
[0009] The third voltage is input at the first terminal of the power isolation module, the second terminal of the power isolation module is connected to the isolation ground, the third terminal of the power isolation module is grounded, and the fourth terminal of the power isolation module outputs the fourth voltage.
[0010] Optionally, the novel EEG simulation front-end sampling circuit further includes a first capacitor bank and a second capacitor bank, wherein the first capacitor bank is connected between the first and second terminals of the power isolation module, and the second capacitor bank is connected between the third and fourth terminals of the power isolation module.
[0011] Optionally, the novel EEG simulation front-end sampling circuit further includes a third capacitor bank and a fourth capacitor bank. The third capacitor bank is connected between the first voltage terminal and the second voltage terminal of the communication isolation module, and the fourth capacitor bank is connected between the third voltage terminal and the fourth voltage terminal of the communication isolation module.
[0012] Optionally, the novel EEG simulation front-end sampling circuit further includes a first transient diode and a second transient diode, wherein the cathode of the first transient diode is connected to the first electrode, the anode of the first transient diode is grounded to the anode of the second transient diode, and the cathode of the second transient diode is connected to the second electrode.
[0013] Optionally, the novel EEG simulation front-end sampling circuit further includes a first resistor, a second resistor, and a third resistor. The first resistor and the second resistor are connected in series between the first electrode and the second electrode, and the common terminal of the first resistor and the second resistor is grounded. The third resistor is connected between the first input terminal and the second input terminal of the EEG acquisition module.
[0014] Optionally, the novel EEG simulation front-end sampling circuit further includes a fourth resistor and a fifth resistor, wherein the fourth resistor is connected between the first input terminal and the first electrode of the EEG acquisition module, and the fifth resistor is connected between the second input terminal and the second electrode of the EEG acquisition module.
[0015] Optionally, the novel EEG simulation front-end sampling circuit further includes a third electrode and a reference voltage module, wherein the reference voltage module further includes a first comparator, a second comparator, and a sixth resistor;
[0016] The positive input terminal of the first comparator is connected to the second output terminal and the third output terminal of the EEG acquisition module, and the negative input terminal of the first comparator is connected to the output terminal of the first comparator; the first voltage terminal of the first comparator is connected to the second voltage, and the second voltage terminal of the first comparator is connected to the first voltage;
[0017] The positive input terminal of the second comparator is grounded, the negative input terminal of the second comparator is connected to the output terminal of the first comparator, the output terminal of the second comparator is connected to the negative output terminal of the second comparator through the sixth resistor, and the output terminal of the second comparator is connected to the third electrode to output a reference voltage signal.
[0018] Optionally, the reference voltage module further includes a seventh resistor, through which the negative input terminal of the second comparator is connected to the output terminal of the first comparator.
[0019] Optionally, the reference voltage module further includes an eighth resistor, a ninth resistor, and a tenth resistor; the second output terminal of the EEG acquisition module is connected to the positive input terminal of the first comparator through the eighth resistor, the third output terminal of the EEG acquisition module is connected to the positive input terminal of the first comparator through the ninth resistor, and the tenth resistor is connected between the second and third output terminals of the EEG acquisition module.
[0020] The novel EEG simulation front-end sampling circuit provided in this application includes a first electrode, a second electrode, an EEG acquisition module, and an EEG processing module. A communication isolation module isolates the novel EEG simulation front-end sampling circuit from the host computer, and a power isolation module isolates the power supply from the novel EEG simulation front-end sampling circuit. This avoids interference from PC-side communication and power frequency power supply during the acquisition process, thereby effectively improving the signal acquisition quality and enhancing the user experience. Attached Figure Description
[0021] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.
[0022] Figure 1 This is a block diagram of a novel EEG simulation front-end sampling circuit according to an embodiment of this application.
[0023] Figure 2 This is a schematic diagram of the EEG acquisition module circuit according to an embodiment of this application.
[0024] Figure 3 This is a schematic diagram of a communication isolation module circuit according to an embodiment of this application.
[0025] Figure 4 This is a schematic diagram of a power isolation module circuit according to an embodiment of this application.
[0026] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation
[0027] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0028] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.
[0029] It should be understood that although the terms first, second, third, etc., may be used herein to describe various information, such information should not be limited to these terms. These terms are used only to distinguish information of the same type from one another. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” and “including” indicate the presence of the stated feature, step, operation, element, component, item, kind, and / or group, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups. The terms “or,” “and / or,” “including at least one of,” etc., as used in this application, may be interpreted as inclusive, or mean any one or any combination thereof. For example, "including at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Similarly, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Exceptions to this definition only occur when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.
[0030] This application proposes a novel front-end sampling circuit for EEG simulation. Figure 1 This is a block diagram of a novel EEG simulation front-end sampling circuit according to an embodiment of this application. Figure 2 This is a schematic diagram of the EEG acquisition module circuit according to an embodiment of this application. Figure 3 This is a schematic diagram of a communication isolation module circuit according to an embodiment of this application. Figure 4 This is a schematic diagram of a power isolation module circuit according to an embodiment of this application.
[0031] like Figure 1-4 As shown, the novel EEG simulation front-end sampling circuit includes a first electrode T1, a second electrode T2, an EEG acquisition module 1, an EEG processing module 2, a communication isolation module 3, and a power isolation module 4.
[0032] The first input terminal of the EEG acquisition module 1 is connected to the first electrode T1, and the second input terminal of the EEG acquisition module 1 is connected to the second electrode T2, so as to acquire EEG signals through the first electrode T1 and the second electrode T2.
[0033] The first voltage terminal of the EEG acquisition module 1 is input with a first voltage V1, the second voltage terminal of the EEG acquisition module 1 is input with a second voltage V2, and the reference voltage terminal of the EEG acquisition module 1 is grounded.
[0034] The first output terminal of the EEG acquisition module 1 is connected to the first terminal of the EEG processing module 2, the second terminal of the EEG processing module 2 is connected to the first signal terminal of the communication isolation module 3, and the third terminal of the EEG processing module 2 is connected to the second signal terminal of the communication isolation module 3; the third and fourth signal terminals of the communication isolation module 3 are connected to the host computer.
[0035] The first voltage terminal of the communication isolation module 3 is input with the first voltage V1, the third voltage terminal of the communication isolation module 3 is input with the third voltage V3, the second voltage terminal of the communication isolation module 3 is grounded, and the fourth voltage terminal of the communication isolation module 3 is connected to the isolation ground.
[0036] For example, the host computer and the communication isolation module are isolated by a communication isolation module to ensure that the host computer communication does not interfere with the acquisition circuit during the communication process.
[0037] The first terminal of the power isolation module 4 receives the third voltage V3, the second terminal of the power isolation module 4 is connected to the isolation ground, the third terminal of the power isolation module 4 is grounded, and the fourth terminal of the power isolation module 4 outputs the fourth voltage V4.
[0038] For example, by isolating the third voltage and the fourth voltage through the voltage isolation module 4, interference from the power frequency power supply during operation can be avoided. For example, the fourth voltage can be obtained by a voltage conversion circuit that provides the third voltage, the second voltage, and the first voltage.
[0039] For example, during use, the first electrode T1 and the second electrode T2 are attached to relevant areas of the brain of the target human body. The EEG acquisition module 1 acquires EEG signals through the first electrode T1 and the second electrode T2, and then sends them to the EEG processing module 2. The EEG processing module 2 converts the acquired EEG signals into communication data of a predetermined format based on a preset communication protocol, and sends it to the host computer through a communication line. In this process, the communication data of the EEG processing module 2 is isolated from interference by the communication isolation module 3, and then the isolated communication data is sent to the host computer, such as a PC, based on the same or different communication protocols. The isolated power supply voltage provided by the power isolation module 4 supplies power to each module.
[0040] This embodiment uses a communication isolation module to isolate the communication between the novel EEG simulation front-end sampling circuit and the host computer, and a power isolation module to isolate the power supply from the power supply and the novel EEG simulation front-end sampling circuit. This avoids interference from communication between the host PC and the power frequency during the acquisition process, thereby effectively improving the signal acquisition quality and enhancing the user experience.
[0041] Optionally, the novel EEG simulation front-end sampling circuit further includes a first capacitor group C1 and a second capacitor group C2, wherein the first capacitor group C1 is connected between the first and second terminals of the power isolation module 4, and the second capacitor group C2 is connected between the third and fourth terminals of the power isolation module 4.
[0042] For example, the power isolation module can be implemented using the B0505MT-1WR4. Through the filtering effect of the capacitor bank, the power supply voltage can be kept stable during the operation of the power isolation module.
[0043] Optionally, the novel EEG simulation front-end sampling circuit further includes a third capacitor bank C3 and a fourth capacitor bank C4. The third capacitor bank C3 is connected between the first voltage terminal and the second voltage terminal of the communication isolation module 3, and the fourth capacitor bank C4 is connected between the third voltage terminal and the fourth voltage terminal of the communication isolation module 3.
[0044] For example, the communication isolation module can be implemented using the ADUM3201BRZ-RL7 chip. Through the filtering effect of the capacitor bank, the power supply voltage during the operation of the communication isolation module can be ensured to be stable.
[0045] Optionally, the novel EEG simulation front-end sampling circuit further includes a first transient diode D1 and a second transient diode D2. The cathode of the first transient diode D1 is connected to the first electrode T1, the anode of the first transient diode D1 is grounded to the anode of the second transient diode D2, and the cathode of the second transient diode D2 is connected to the second electrode T2.
[0046] For example, the first transient diode and the second transient diode can clamp the instantaneous voltage of the first electrode and the second electrode within a safe voltage range, avoiding overvoltage damage to the novel EEG simulation front-end sampling circuit caused by instantaneous high voltage pulses.
[0047] Optionally, the novel EEG simulation front-end sampling circuit further includes a first resistor R1, a second resistor R2, and a third resistor R3. The first resistor R1 and the second resistor R2 are connected in series between the first electrode T1 and the second electrode T2, and the common terminal of the first resistor R1 and the second resistor R2 is grounded. The third resistor R3 is connected between the first input terminal and the second input terminal of the EEG acquisition module 1.
[0048] For example, by dividing the voltage in series with the first and second resistors, the voltages acquired by the first and second electrodes can be distributed within a suitable proportional range. The third resistor can provide a reliable voltage signal to the EEG acquisition module through the voltage difference across it.
[0049] Optionally, the novel EEG simulation front-end sampling circuit further includes a fourth resistor R4 and a fifth resistor R5. The fourth resistor R4 is connected between the first input terminal of the EEG acquisition module 1 and the first electrode T1, and the fifth resistor R5 is connected between the second input terminal of the EEG acquisition module 1 and the second electrode T2.
[0050] For example, the fourth and fifth resistors act as current-limiting resistors, ensuring that the current in the signal path remains within an appropriate range and preventing overcurrent damage to the EEG acquisition module.
[0051] Optionally, the novel EEG simulation front-end sampling circuit further includes a third electrode T3 and a reference voltage module 5, wherein the reference voltage module further includes a first comparator U1, a second comparator U2, and a sixth resistor R.
[0052] The positive input terminal of the first comparator U1 is connected to the second output terminal and the third output terminal of the EEG acquisition module 1, and the negative input terminal of the first comparator U1 is connected to the output terminal of the first comparator U1; the first voltage terminal of the first comparator U1 is connected to the second voltage V2, and the second voltage terminal of the first comparator U1 is connected to the first voltage V1.
[0053] The positive input terminal of the second comparator U2 is grounded, the negative input terminal of the second comparator U2 is connected to the output terminal of the first comparator U1, the output terminal of the second comparator U2 is connected to the negative output terminal of the second comparator U2 through the sixth resistor R6, and the output terminal of the second comparator U2 is connected to the third electrode to output a reference voltage signal.
[0054] For example, the reference voltage output by the reference voltage module is output to the target under test through the third electrode, thereby providing a suitable voltage reference for the signals acquired by the first and second electrodes and ensuring the accuracy of EEG signal acquisition.
[0055] Optionally, the reference voltage module 5 further includes a seventh resistor R7, and the negative input terminal of the second comparator U2 is connected to the output terminal of the first comparator U1 through the seventh resistor R7.
[0056] For example, the seventh resistor, as a current-limiting resistor, can ensure that the current in the signal path is kept within a suitable range, thus avoiding overcurrent damage to the comparator.
[0057] Optionally, the reference voltage module further includes an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10. The second output terminal of the EEG acquisition module 1 is connected to the positive input terminal of the first comparator U1 through the eighth resistor R8, the third output terminal of the EEG acquisition module 1 is connected to the positive input terminal of the first comparator U1 through the ninth resistor R9, and the tenth resistor R10 is connected between the second and third output terminals of the EEG acquisition module 1.
[0058] For example, the eighth and ninth resistors act as current-limiting resistors, ensuring that the current in the signal path remains within a suitable range and preventing overcurrent damage to the novel EEG analog front-end sampling circuit. The tenth resistor provides a reliable output voltage to the EEG acquisition module through the voltage difference across it.
[0059] The novel EEG simulation front-end sampling circuit provided in this application includes a first electrode, a second electrode, an EEG acquisition module, and an EEG processing module. A communication isolation module isolates the novel EEG simulation front-end sampling circuit from the host computer, and a power isolation module isolates the power supply from the novel EEG simulation front-end sampling circuit. This avoids interference from PC-side communication and power frequency power supply during the acquisition process, thereby effectively improving the signal acquisition quality and enhancing the user experience.
[0060] It is understood that the above scenarios are merely examples and do not constitute a limitation on the application scenarios of the technical solutions provided in the embodiments of this application. The technical solutions of this application can also be applied to other scenarios. For example, as those skilled in the art will know, with the evolution of device architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.
[0061] The units in the device of this application embodiment can be merged, divided, and deleted according to actual needs.
[0062] In this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions are generally described in detail only when they appear for the first time. When they appear again, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions that are not described in detail later can be referred to their previous relevant detailed descriptions.
[0063] In this application, the descriptions of the various embodiments have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0064] The technical features of the present application can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.
[0065] The above are merely preferred embodiments of this application and do not limit the scope of this application. Any equivalent structural or procedural transformations made based on the description and drawings of this application, or direct or indirect applications in other related technical fields, are similarly included within the scope of protection of this application.
Claims
1. A novel EEG simulation front-end sampling circuit, characterized in that, It includes a first electrode, a second electrode, an EEG acquisition module, an EEG processing module, a communication isolation module, and a power isolation module, among which, The first input terminal of the EEG acquisition module is connected to the first electrode, and the second input terminal of the EEG acquisition module is connected to the second electrode, so as to acquire EEG signals through the first electrode and the second electrode; The first voltage terminal of the EEG acquisition module is input with a first voltage, the second voltage terminal of the EEG acquisition module is input with a second voltage, and the reference voltage terminal of the EEG acquisition module is grounded. The first output terminal of the EEG acquisition module is connected to the first terminal of the EEG processing module, the second terminal of the EEG processing module is connected to the first signal terminal of the communication isolation module, and the third terminal of the EEG processing module is connected to the second signal terminal of the communication isolation module; the third and fourth signal terminals of the communication isolation module are connected to the host computer. The first voltage is input to the first voltage terminal of the communication isolation module, the third voltage is input to the third voltage terminal of the communication isolation module, the second voltage terminal of the communication isolation module is grounded, and the fourth voltage terminal of the communication isolation module is connected to the isolation ground. The third voltage is input at the first terminal of the power isolation module, the second terminal of the power isolation module is connected to the isolation ground, the third terminal of the power isolation module is grounded, and the fourth terminal of the power isolation module outputs the fourth voltage.
2. The novel EEG simulation front-end sampling circuit according to claim 1, characterized in that, The novel EEG simulation front-end sampling circuit also includes a first capacitor bank and a second capacitor bank. The first capacitor bank is connected between the first and second terminals of the power isolation module, and the second capacitor bank is connected between the third and fourth terminals of the power isolation module.
3. The novel EEG simulation front-end sampling circuit according to claim 2, characterized in that, The novel EEG simulation front-end sampling circuit also includes a third capacitor bank and a fourth capacitor bank. The third capacitor bank is connected between the first voltage terminal and the second voltage terminal of the communication isolation module, and the fourth capacitor bank is connected between the third voltage terminal and the fourth voltage terminal of the communication isolation module.
4. The novel EEG simulation front-end sampling circuit according to claim 3, characterized in that, The novel EEG simulation front-end sampling circuit further includes a first transient diode and a second transient diode. The cathode of the first transient diode is connected to the first electrode, the anode of the first transient diode is grounded to the anode of the second transient diode, and the cathode of the second transient diode is connected to the second electrode.
5. The novel EEG simulation front-end sampling circuit according to claim 4, characterized in that, The novel EEG simulation front-end sampling circuit further includes a first resistor, a second resistor, and a third resistor. The first resistor and the second resistor are connected in series between the first electrode and the second electrode, and the common terminal of the first resistor and the second resistor is grounded. The third resistor is connected between the first input terminal and the second input terminal of the EEG acquisition module.
6. The novel EEG simulation front-end sampling circuit according to claim 5, characterized in that, The novel EEG simulation front-end sampling circuit further includes a fourth resistor and a fifth resistor. The fourth resistor is connected between the first input terminal and the first electrode of the EEG acquisition module, and the fifth resistor is connected between the second input terminal and the second electrode of the EEG acquisition module.
7. A novel EEG simulation front-end sampling circuit according to any one of claims 1-6, characterized in that, The novel EEG simulation front-end sampling circuit also includes a third electrode and a reference voltage module, and the reference voltage module further includes a first comparator, a second comparator, and a sixth resistor. The positive input terminal of the first comparator is connected to the second output terminal and the third output terminal of the EEG acquisition module, and the negative input terminal of the first comparator is connected to the output terminal of the first comparator; the first voltage terminal of the first comparator is connected to the second voltage, and the second voltage terminal of the first comparator is connected to the first voltage; The positive input terminal of the second comparator is grounded, the negative input terminal of the second comparator is connected to the output terminal of the first comparator, the output terminal of the second comparator is connected to the negative output terminal of the second comparator through the sixth resistor, and the output terminal of the second comparator is connected to the third electrode to output a reference voltage signal.
8. The novel EEG simulation front-end sampling circuit according to claim 7, characterized in that, The reference voltage module also includes a seventh resistor, through which the negative input terminal of the second comparator is connected to the output terminal of the first comparator.
9. A novel EEG simulation front-end sampling circuit according to claim 7, characterized in that, The reference voltage module further includes an eighth resistor, a ninth resistor, and a tenth resistor; the second output terminal of the EEG acquisition module is connected to the positive input terminal of the first comparator through the eighth resistor, the third output terminal of the EEG acquisition module is connected to the positive input terminal of the first comparator through the ninth resistor, and the tenth resistor is connected between the second and third output terminals of the EEG acquisition module.