Electronic devices and display devices

Abstract

This application relates to display devices and electronic devices. The display device includes: a display panel including a first region, a second region, and a curved region between the first and second regions; a driver integrated circuit (IC) disposed on the second region; and an IC cover layer disposed on the driver IC, wherein the IC cover layer includes: a first insulating strip; a second insulating strip disposed on the first insulating strip; and a conductive strip disposed between the first and second insulating strips, and defines an identification pattern in one of the first and second insulating strips.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to and all benefits derived therefrom of Korean Patent Application No. 10-2024-0068648, filed on May 27, 2024, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The embodiments of this disclosure described herein relate to display devices and methods of manufacturing the same. Background Technology

[0004] Electronic devices that provide images to users, such as smartphones, digital cameras, laptops, navigation systems, and smart TVs, may include display devices for displaying images. The display device generates images and provides them to the user through a screen.

[0005] Recently, with the development of display device technology, various types of display devices are being developed. For example, various flexible display devices are being developed, which can be transformed into curved shapes, folded, or rolled up. Flexible display devices that can be transformed into various shapes are easy to carry and improve user convenience.

[0006] Display devices typically include a display panel for displaying images and a driver disposed on the display panel. The display panel may include a first region, a second region, and a curved region between the first and second regions. The first region may include multiple pixels driven by the driver and displaying images. The first region may be folded based on a folding axis. The driver may be mounted on the second region, and the curved region may be curved in such a way that the second region is disposed below the first region. Therefore, the driver may be disposed below the first region and may be invisible from the outside. Utility Model Content

[0007] Embodiments of this disclosure provide a display device including a stacked structure capable of easily identifying patterns and a method for manufacturing the same.

[0008] According to an embodiment of the present disclosure, a display device includes: a display panel including a first region, a second region, and a curved region between the first region and the second region; a driver integrated circuit (IC) disposed on the second region; and an IC cover layer disposed on the driver IC, wherein the IC cover layer includes: a first insulating strip; a second insulating strip disposed on the first insulating strip; and a conductive strip disposed between the first insulating strip and the second insulating strip, and defines an identification pattern in one of the first insulating strip and the second insulating strip.

[0009] In an implementation, the identification pattern may include a quick response (QR) pattern.

[0010] In one embodiment, the first insulating tape may include a first base layer and a first coating layer disposed on the first base layer, and the identification pattern may be defined in the first coating layer.

[0011] In one implementation, the first opening that overlaps with the identification pattern may be defined within a conductive strip.

[0012] In one embodiment, the second opening that overlaps with the identification pattern may be defined within the second insulating strip.

[0013] In one implementation, when viewed on a plane, each of the first and second openings may have an area larger than the identification pattern.

[0014] In this embodiment, each of the first and second coatings may be black.

[0015] In one embodiment, the conductive strip may include a conductive layer disposed on the first insulating strip and a first coating disposed on the conductive layer, and the second insulating strip may include a base layer and a second coating disposed on the base layer, wherein the identification pattern is defined in the second coating.

[0016] A method for manufacturing a display device according to an embodiment of the present disclosure includes: preparing a display panel, the display panel including a first region, a second region on which a driver IC is disposed, and a curved region between the first region and the second region; and disposing an IC cover layer on the driver IC, wherein disposing the IC cover layer includes: disposing a first base layer on the second region; disposing a first coating layer on the first base layer; disposing a conductive strip on the first coating layer wherein a first opening is defined therein; disposing a second insulating strip on the conductive strip wherein a second opening is defined therein overlapping the first opening; and forming an identification pattern in the first coating layer that overlaps the first opening and the second opening.

[0017] According to an embodiment of the present disclosure, an electronic device includes: a display panel including a first region, a second region, and a curved region between the first region and the second region; a driver integrated circuit (IC) disposed on the second region; and an IC cover layer disposed on the driver IC, wherein the IC cover layer includes: a first insulating strip; a second insulating strip disposed on the first insulating strip; and a conductive strip disposed between the first insulating strip and the second insulating strip, and defines an identification pattern in one of the first insulating strip and the second insulating strip. Attached Figure Description

[0018] The above and other features of the embodiments of this disclosure will become apparent from the detailed description of the embodiments with reference to the accompanying drawings.

[0019] Figure 1This is a perspective view of a display device according to an embodiment of the present disclosure.

[0020] Figure 2 and Figure 3 It is shown Figure 1 The image shows a view of the folded state of the display device.

[0021] Figure 4 This is a floor plan of the display panel.

[0022] Figure 5 It is along Figure 4 The sectional view shown is taken by line I-I'.

[0023] Figure 6 yes Figure 5 A schematic cross-sectional view of the electronic panel shown.

[0024] Figure 7 It is shown that... Figure 4 The image shows a view of a cross-section of a display device corresponding to one pixel.

[0025] Figure 8 yes Figure 5 The three-dimensional view of the support plate shown.

[0026] Figure 9 yes Figure 8 An enlarged view of the first region A1 shown.

[0027] Figure 10 It is along Figure 4 The sectional view shown is taken from line II-II'.

[0028] Figure 11 It is shown that Figure 10 The view shows the state of the curved area.

[0029] Figure 12 yes Figure 4 An enlarged view of the IC overlay shown.

[0030] Figure 13 yes Figure 12 The exploded perspective view of the IC cover layer is shown.

[0031] Figure 14 It is along Figure 12 The sectional view shown is taken from line III-III'.

[0032] Figure 15 It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0033] Figure 16It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0034] Figure 17 It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0035] Figures 18A to 18F This is a view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure. Detailed Implementation

[0036] This disclosure will now be described more fully below with reference to the accompanying drawings, in which various embodiments are illustrated. However, this disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0037] It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element, or there can be an intermediary element between them. Conversely, when an element is referred to as being "directly" on another element, there is no intermediary element.

[0038] In this specification, when a first component (or region, layer, section, etc.) is referred to as "connected to" or "linked to" a second component, it means that the first component can be directly set / connected / linked to the second component, or that a third component can be set between them.

[0039] The same reference numerals denote the same elements. Furthermore, in order to effectively depict the technical content, the thickness, scale, and dimensions of the components are exaggerated in the accompanying drawings.

[0040] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, “a,” “an,” “the,” and “at least one” do not indicate a limitation of quantity and are intended to include both the singular and the plural unless the context clearly indicates otherwise. Thus, reference to “a” element following “the” element in a claim includes one element and multiple elements. For example, “a single element” has the same meaning as “at least one element” unless the context clearly indicates otherwise. “At least one” should not be construed as limiting “a” or “an.” “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It will also be understood that, when used in this specification, the terms “comprises” and / or “comprising” or “includes” and / or “including” specify the presence of the stated feature, region, integral, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, regions, integrals, steps, operations, elements, components, and / or groups thereof.

[0041] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or section from another. Therefore, without departing from the teachings herein, “first element,” “first component,” “first region,” “first layer,” or “first section” discussed below may be referred to as a second element, second component, second region, second layer, or second section.

[0042] Furthermore, relative terms such as “down” or “bottom” and “up” or “top” may be used herein to describe the relationship between one element and another as shown in the figures. It will be understood that, in addition to the orientations depicted in the figures, the relative terms are intended to encompass different orientations of the devices. For example, if a device in one of the figures is flipped, an element described as being “down” to the other element will subsequently be oriented “up” to the other element. Thus, depending on the specific orientation of the figure, the term “down” can include both “down” and “up” orientations. Similarly, if a device in one of the figures is flipped, an element described as being “below” or “under” the other element will subsequently be oriented “above” the other element. Thus, the term “below” or “under” can include both “up” and “down” orientations.

[0043] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms (such as those defined in common dictionaries) should be interpreted as having meanings consistent with their meanings in the relevant field and in the context of this disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0044] Embodiments are described herein with reference to cross-sectional views as schematic representations of idealized embodiments. Thus, variations in the shapes shown in the figures should be anticipated, for example, due to manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as being limited to the specific shapes of the regions shown herein, but should include, for example, deviations in shape due to manufacturing processes. For example, regions shown or described as flat may generally have rough and / or non-linear characteristics. Furthermore, sharp corners shown may be rounded. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to represent the precise shapes of the regions, nor are they intended to limit the scope of the claims.

[0045] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0046] Figure 1 This is a perspective view of a display device according to an embodiment of the present disclosure. Figure 2 and Figure 3 It is shown Figure 1 The image shows a view of the folded state of the display device.

[0047] refer to Figure 1 When viewed in a plan view, the display device DD according to an embodiment of the present disclosure may have a rectangular shape, having a long side extending in a first direction DR1 and a short side extending in a second direction DR2 intersecting the first direction DR1. However, the display device DD is not limited to this, but may have various shapes, such as circular and polygonal shapes. The display device DD may be a flexible display device.

[0048] In this document, the direction that intersects substantially perpendicularly with the plane defined by the first direction DR1 and the second direction DR2 is defined as the third direction DR3. In this document, the third direction DR3 may be the thickness direction of the display device DD. Furthermore, in this disclosure, "when viewed in a plane" or "when viewed in a plan view" may be defined as the state of observation in the third direction DR3.

[0049] The display device DD may include a folded region FA and a plurality of non-folded regions NFA1 and NFA2 adjacent to the folded region FA. The non-folded regions NFA1 and NFA2 may include a first non-folded region NFA1 and a second non-folded region NFA2. The folded region FA may be disposed between the first non-folded region NFA1 and the second non-folded region NFA2. The first non-folded region NFA1, the folded region FA, and the second non-folded region NFA2 may be arranged on a second direction DR2.

[0050] In implementation methods, for example, such as Figure 1 As shown, the display device DD may include a single folded region FA and two non-folded regions NFA1 and NFA2, but the number of folded regions FA and non-folded regions NFA1 and NFA2 is not limited thereto. In an embodiment, for example, the display device DD may include more than two non-folded regions and multiple folded regions disposed between the non-folded regions.

[0051] The upper surface of the display device DD can be defined as a display surface DS, and the display surface DS can lie on a plane defined by a first direction DR1 and a second direction DR2. The image IM generated by the display device DD can be provided to the user through the display surface DS.

[0052] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may display an image IM, and the non-display area NDA may not display an image IM. The non-display area NDA may surround the display area DA and may define an edge area of ​​the display device DD printed in a predetermined color.

[0053] refer to Figure 2 and Figure 3 The display device DD can be a foldable display device DD that can be folded or unfolded. In an embodiment, for example, the folding region FA is bent based on a folding axis FX parallel to the first direction DR1, so the display device DD can be folded. The folding axis FX can be defined as a major axis parallel to the long side of the display device DD. The folding region FA can be bent to have a radius of curvature R.

[0054] When the display device DD is folded, the first non-folded region NFA1 and the second non-folded region NFA2 face each other, and the display device DD can be folded inward so that the display surface DS is not exposed to the outside. However, embodiments of this disclosure are not limited to this. In embodiments, for example, the display device DD can be folded outward so that the display surface DS is exposed to the outside around the folding axis FX.

[0055] In the implementation method, such as Figure 2As shown, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 can be substantially equal to twice the radius of curvature R of the folded region FA. However, the distance between the first non-folded region NFA1 and the second non-folded region NFA2 is not limited to this, but rather as shown... Figure 3 As shown, it can be less than twice the radius of curvature R.

[0056] Figure 4 Is included Figure 1 The diagram shows a plan view of the display panel in the display device.

[0057] refer to Figure 4 The implementation of the display device DD may include a display panel DP, a scan driver SDV, a data driver DDV, an transmit driver EDV, a printed circuit board PCB, and an integrated circuit (IC) overlay layer C-IC.

[0058] exist Figure 4 In the diagram, dashed lines show portions of the data driver DDV and the printed circuit board (PCB) beneath the IC overlay (C-IC). Additionally, the portion of the data driver DDV that overlaps with the PCB is also shown with dashed lines.

[0059] The display panel DP may include a first region AA1, a second region AA2, and a curved region BA between the first region AA1 and the second region AA2. The curved region BA may extend in a first direction DR1, and the first region AA1, the curved region BA, and the second region AA2 may be arranged in a second direction DR2.

[0060] The first region AA1 may include a display region DA and a non-display region NDA surrounding the display region DA. The non-display region NDA may surround the display region DA. The display region DA may be the region where the image IM is displayed, and the non-display region NDA may be the region where the image IM is not displayed. The second region AA2 and the curved region BA may be regions where the image IM is not displayed.

[0061] In the implementation method, such as Figure 4 As shown, the first region AA1 may include a first non-folded region NFA1, a second non-folded region NFA2, and a folded region FA between the first non-folded region NFA1 and the second non-folded region NFA2.

[0062] The first non-folded region NFA1, the second non-folded region NFA2, and the folded region FA can correspond to Figure 1 The display device DD shown has a first non-folding region NFA1, a second non-folding region NFA2, and a folding region FA.

[0063] The first region AA1 can be bent and folded based on the aforementioned folding axis FX. In an embodiment, for example, when the folding area FA of the first region AA1 is folded based on the aforementioned folding axis FX, the display panel DP can be folded.

[0064] The display panel (DP) may include multiple pixels (PX), multiple scan lines (SL1 to SLm), multiple data lines (DL1 to DLn), multiple emission lines (EL1 to ELm), a first control line (CSL1), a second control line (CSL2), a power line (PL), multiple connection lines (CNL), and multiple pads (PD). Here, 'm' and 'n' are natural numbers greater than 1. Pixels (PX) can be located in the display area (DA) and can be connected to scan lines (SL1 to SLm), data lines (DL1 to DLn), and emission lines (EL1 to ELm).

[0065] The scan driver SDV and transmit driver EDV can be disposed in the non-display area NDA. The scan driver SDV and transmit driver EDV can be disposed in each adjacent non-display area NDA on opposite sides of the first area AA1 in the first direction DR1. The data driver DDV can be disposed in the second area AA2. The data driver DDV can be manufactured as an IC chip and can be mounted on the second area AA2. The data driver DDV can be defined as a driver IC.

[0066] Although not shown, the curved region BA can be curved in such a way that the second region AA2 is positioned below the first region AA1. Therefore, the data driver DDV can be positioned below the second region AA2.

[0067] Scan lines SL1 to SLm can extend in the first direction DR1 and connect to the scan driver SDV. Data lines DL1 to DLn can extend in the second direction DR2 and connect to the data driver DDV via the bend area BA. Transmit lines EL1 to ELm can extend in the first direction DR1 and connect to the transmit driver EDV.

[0068] The power line PL can extend along the second direction DR2 and can be positioned within the non-display area NDA. In an implementation, as... Figure 4 As shown, the power line PL can be positioned between the display area DA and the transmit driver EDV, but is not limited thereto. In another embodiment, for example, the power line PL can be positioned between the display area DA and the scan driver SDV.

[0069] The electric field line PL can extend from the bend region BA to the second region AA2. When viewed in a plane, the electric field line PL can extend towards the lower end of the second region AA2. The electric field line PL can receive a driving voltage.

[0070] The connecting line CNL can extend along the first direction DR1 and can also be arranged along the second direction DR2. The connecting line CNL can be connected to the power line PL and the pixel PX. The driving voltage can be applied to the pixel PX through the power line PL and the connecting line CNL connected to each other.

[0071] The first control line CSL1 can be connected to the scan driver SDV and can extend through the bend region BA toward the lower end of the second region AA2. The second control line CSL2 can be connected to the transmit driver EDV and can extend through the bend region BA toward the lower end of the second region AA2. The data driver DDV can be positioned between the first control line CSL1 and the second control line CSL2.

[0072] When viewed in a plane, pad PD can be positioned adjacent to the lower end of the second region AA2. Data driver DDV, power line PL, first control line CSL1, and second control line CSL2 can be connected to pad PD.

[0073] Data lines DL1 to DLn can be connected to corresponding pads PD via data driver DDV. In an implementation, for example, data lines DL1 to DLn can be connected to data driver DDV, and data driver DDV can be connected to pads PD corresponding to data lines DL1 to DLn respectively.

[0074] The printed circuit board (PCB) can be connected to the pads (PD) located in the second area AA2. The PCB can then be connected to the display panel (DP) via the pads (PD).

[0075] Although not shown, the display device DD may also include a timing controller for controlling the operation of the scan driver SDV, the data driver DDV, and the transmit driver EDV, as well as a voltage generator for generating drive voltages. The timing controller and voltage generator can be connected to pad PD via a printed circuit board PCB.

[0076] The IC cover layer C-IC can be placed on the data driver DDV and the printed circuit board PCB. The IC cover layer C-IC can also be placed on the second area AA2. Figure 13 The diagram illustrates the stacked structure of the IC cover layer (C-IC), the data driver (DDV), and the printed circuit board (PCB), which will be described in more detail later. The identification pattern QR can be defined within the IC cover layer (C-IC). References will follow below. Figure 13 and Figure 14 Describe the specific configuration for recognizing QR patterns.

[0077] The scan driver SDV generates multiple scan signals, which can be applied to pixel PX through scan lines SL1 to SLm. The data driver DDV generates multiple data voltages, which can be applied to pixel PX through data lines DL1 to DLn. The transmit driver EDV generates multiple transmit signals, which can be applied to pixel PX through transmit lines EL1 to ELm.

[0078] Pixel PX can receive data voltage in response to a scan signal. Pixel PX can display image IM by emitting light with a brightness corresponding to the data voltage in response to a transmit signal.

[0079] Figure 5 It is along Figure 4 The sectional view shown is taken by line I-I'.

[0080] Specifically, Figure 5 A cross section of the display device DD corresponding to line I-I' is shown.

[0081] In this embodiment, the display device DD may be a flexible display device. The display device DD may include a first non-folding region NFA1, a folding region FA, and a second non-folding region NFA2.

[0082] In an embodiment, the display device DD may include a window WIN, a window protective layer WP, a hard coating HC, a printed layer PIT, an electronic panel EP, an impact-absorbing layer ISL, a panel protective layer PPL, a barrier layer BRL, first adhesive surfaces AS1 to sixth adhesive surfaces AS6, and a support plate PLT. The impact-absorbing layer ISL may be disposed on the electronic panel EP. The impact-absorbing layer ISL protects the electronic panel EP by absorbing external impacts applied from above the display device DD toward the electronic panel EP. The impact-absorbing layer ISL may be manufactured in the form of a stretched film.

[0083] The impact-absorbing layer (ISL) may include a flexible plastic material. The flexible plastic material may be defined as a synthetic resin film. In embodiments, for example, the impact-absorbing layer (ISL) may include a flexible plastic material such as polyimide (PI) or polyethylene terephthalate (PET).

[0084] The window (WIN) can be disposed on the shock-absorbing layer (ISL). The window (WIN) can protect the electronic panel (EP) from external scratches. The window (WIN) can have optically transparent properties. In some embodiments, the window (WIN) may include glass. However, the window (WIN) is not limited to this and may include a synthetic resin film.

[0085] The window WIN can have a multilayer or single-layer structure. In embodiments, for example, the window WIN can include multiple synthetic resin films bonded together by an adhesive, or it can include a glass substrate and synthetic resin films bonded together by an adhesive.

[0086] A window protective layer WP can be applied to the window WIN. The window protective layer WP may include flexible plastic materials, such as polyimide or polyethylene terephthalate. A hard coating HC can be applied to the upper surface of the window protective layer WP.

[0087] The printed layer PIT can be applied to the lower surface of the window protector WP. The printed layer PIT can be black, but its color is not limited to this. The printed layer PIT can be adjacent to the edge of the window protector WP.

[0088] A panel protective layer (PPL) can be disposed beneath the electronic panel (EP). The PPL protects the lower portion of the electronic panel (EP). The PPL may comprise a flexible plastic material. In one embodiment, for example, the PPL may comprise polyethylene terephthalate (PET).

[0089] A barrier layer (BRL) can be placed beneath the panel protective layer (PPL). The BRL increases resistance to compressive forces caused by external pressure. The BRL can also prevent deformation of the electronic panel (EP). The BRL can comprise flexible plastic materials such as polyimide or polyethylene terephthalate (PET).

[0090] The barrier layer BRL can have a color that absorbs light. In one embodiment, for example, the barrier layer BRL can be black. In such an embodiment, the components disposed under the barrier layer BRL can be invisible when the display device DD is viewed from above.

[0091] The first adhesive surface AS1 can be disposed between the window protective layer WP and the window WIN. The window protective layer WP and the window WIN can be bonded to each other through the first adhesive surface AS1. The first adhesive surface AS1 can cover the printed layer PIT.

[0092] The second adhesive surface AS2 can be disposed between the window WIN and the shock-absorbing layer ISL. The window WIN and the shock-absorbing layer ISL can be bonded to each other through the second adhesive surface AS2.

[0093] The third adhesive surface AS3 can be disposed between the shock-absorbing layer ISL and the electronic panel EP. The shock-absorbing layer ISL and the electronic panel EP can be bonded to each other through the third adhesive surface AS3.

[0094] The fourth adhesive surface AS4 can be disposed between the electronic panel EP and the panel protective layer PPL. The electronic panel EP and the panel protective layer PPL can be bonded to each other through the fourth adhesive surface AS4.

[0095] The fifth adhesive surface AS5 can be disposed between the panel protective layer PPL and the barrier layer BRL. The panel protective layer PPL and the barrier layer BRL can be bonded to each other through the fifth adhesive surface AS5.

[0096] The sixth adhesive surface AS6 can be disposed between the barrier layer BRL and the support plate PLT. The barrier layer BRL and the support plate PLT are bonded to each other through the sixth adhesive surface AS6.

[0097] In the following, in this disclosure, “thickness” may refer to a value measured on a third direction DR3, and “width” may refer to a value measured on a first direction DR1 or a second direction DR2, which is a horizontal direction.

[0098] The sixth adhesive surface AS6 may overlap with the first non-folded region NFA1 and the second non-folded region NFA2, but may not overlap with the folded region FA. That is, the sixth adhesive surface AS6 may have an opening in the folded region FA.

[0099] The first adhesive surfaces AS1 to the sixth adhesive surfaces AS6 may include transparent adhesives, such as pressure-sensitive adhesives (PSA) or optically transparent adhesives (OCA), but the type of adhesive is not limited to these.

[0100] The thickness of the panel protective layer PPL can be less than the thickness of the window protective layer WP, and the thickness of the barrier layer BRL can be less than the thickness of the panel protective layer PPL. The thickness of the electronic panel EP can be less than the thickness of the barrier layer BRL, but can be equal to the thickness of the window WIN. The thickness of the impact absorbing layer ISL can be less than the thickness of the electronic panel EP.

[0101] The thickness of the first adhesive surface AS1 can be equal to the thickness of the barrier layer BRL, and the thickness of each of the second adhesive surface AS2 and the third adhesive surface AS3 can be equal to the thickness of the panel protective layer PPL. The thickness of the fourth adhesive surface AS4 can be equal to the thickness of the fifth adhesive surface AS5.

[0102] The thickness of each of the fourth adhesive surface AS4 and the fifth adhesive surface AS5 can be less than the thickness of the electronic panel EP, but greater than the thickness of the shock absorbing layer ISL. The thickness of the sixth adhesive surface AS6 can be less than the thickness of the shock absorbing layer ISL. The thickness of the hard coating HC can be less than the thickness of the sixth adhesive surface AS6.

[0103] The electronic panel EP, the shock-absorbing layer ISL, the panel protective layer PPL, and the third adhesive surface AS3 and the fourth adhesive surface AS4 can have the same width. The window protective layer WP and the first adhesive surface AS1 can have the same width. The barrier layer BRL and the fifth adhesive surface AS5 and the sixth adhesive surface AS6 can have the same width.

[0104] The widths of the electronic panel EP, the shock-absorbing layer ISL, the panel protective layer PPL, and the third adhesive surface AS3 and the fourth adhesive surface AS4 can be greater than the widths of the window protective layer WP and the first adhesive surface AS1. The edges of the electronic panel EP, the shock-absorbing layer ISL, the panel protective layer PPL, and the third adhesive surface AS3 and the fourth adhesive surface AS4 can be located outside the edges of the window protective layer WP and the first adhesive surface AS1.

[0105] The width of the window WIN and the second adhesive surface AS2 can be smaller than the width of the window protective layer WP and the first adhesive surface AS1. The width of the second adhesive surface AS2 can be smaller than the width of the window WIN. The edge of the window WIN can be located inside the edges of the window protective layer WP and the first adhesive surface AS1. The edge of the second adhesive surface AS2 can be located inside the edge of the window WIN.

[0106] The widths of the barrier layer BRL and the fifth adhesive surface AS5 and the sixth adhesive surface AS6 can be smaller than the widths of the window protective layer WP and the first adhesive surface AS1. The edges of the barrier layer BRL and the fifth adhesive surface AS5 and the sixth adhesive surface AS6 can be placed inside the edges of the window protective layer WP and the first adhesive surface AS1.

[0107] The support plate PLT can be placed below the electronic panel EP and support the electronic panel EP. The support plate PLT can be placed below the barrier layer BRL.

[0108] The support plate (PLT) can be more rigid than the display portion. The support plate (PLT) can include non-metallic materials. In one embodiment, for example, the support plate (PLT) can include a fiber-reinforced composite material. The fiber-reinforced composite material can be carbon fiber reinforced plastic (CFRP) or glass fiber reinforced plastic (GFRP).

[0109] The support plate PLT can be made lighter by including a reinforcing fiber composite material. In one embodiment, the support plate PLT includes a reinforcing fiber composite material, such that the support plate PLT has a lighter weight than a metal support plate that includes or is made of metal material, and has a modulus and strength level similar to that of a metal support plate.

[0110] Because the support plate PLT comprises reinforcing fiber composite material, its shape can be shaped more easily than that of a metal support plate. In embodiments, for example, the support plate PLT comprising reinforcing fiber composite material can be more easily shaped using laser processing or micro-blasting processes.

[0111] Multiple openings (OPs) can be defined in the portion of the support plate PLT that overlaps with the folded area FA. The openings (OPs) can be formed by removing a portion of the support plate PLT from the third-direction DR3. The openings (OPs) can be formed using the aforementioned laser process or micro-spraying process.

[0112] The opening OP is defined in the portion of the support plate PLT that overlaps with the folding area FA, thus increasing the flexibility of this overlapping portion. Therefore, the support plate PLT can be easily folded based on the folding area FA. The shape of the opening OP will be described in detail below.

[0113] The width of the support plate PLT can be basically the same as the width of the electronic panel EP.

[0114] Figure 6 yes Figure 5 A schematic cross-sectional view of the electronic panel shown.

[0115] exist Figure 6 In the image, the panel protective layer PPL, which is disposed beneath the electronic panel EP, is shown together with the electronic panel EP.

[0116] refer to Figure 6 In one embodiment, the electronic panel EP may include a display panel DP, an input sensing portion ISP disposed on the display panel DP, and an anti-reflective layer RPL disposed on the input sensing portion ISP. The display panel DP may be a flexible display panel. In another embodiment, for example, the display panel DP may include a flexible substrate and a plurality of elements disposed on the flexible substrate.

[0117] The display panel DP according to embodiments of this disclosure can be a light-emitting display panel, but is not particularly limited thereto. In embodiments, for example, the display panel DP can be an organic light-emitting display panel or an inorganic light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may include organic light-emitting materials. The light-emitting layer of an inorganic light-emitting display panel may include quantum dots and quantum rods, etc. Hereinafter, for ease of description, embodiments of the display panel DP being an organic light-emitting display panel will be described in detail, but are not limited thereto.

[0118] The input sensing section (ISP) may include multiple sensor sections (not shown) to capacitively sense external inputs. In an embodiment, when manufacturing the display module, the input sensing section (ISP) may be directly formed on the display panel (DP).

[0119] An anti-reflective layer (RPL) can be applied to the input sensing section (ISP). When manufacturing the display module, the RPL can be formed directly on the ISP. The RPL can be defined as an external light reflection prevention film. The RPL reduces the reflectivity of external light incident from above the display device (DD) towards the display panel (DP).

[0120] In one embodiment, for example, the input sensing portion ISP can be directly formed on the display panel DP, and the anti-reflective layer RPL can be directly formed on the input sensing portion ISP; however, the embodiments disclosed herein are not limited thereto. In another embodiment, for example, the input sensing portion ISP can be manufactured separately and attached to the display panel DP via an adhesive layer, and the anti-reflective layer RPL can be manufactured separately and attached to the input sensing portion ISP via an adhesive layer.

[0121] Figure 7 It is shown that... Figure 4 The image shows a view of a cross-section of a display device corresponding to one pixel.

[0122] refer to Figure 7 In this embodiment, the pixel PX may include a transistor TR and a light-emitting element OLED. The light-emitting element OLED may include a first electrode AE ​​(or anode), a second electrode CE (or cathode), a hole control layer HCL, an electron control layer ECL, and an emitter layer EML.

[0123] Transistors (TRs) and light-emitting elements (OLEDs) can be mounted on a substrate (SUB). Although in Figure 7 Only one transistor TR is shown as an example, but a pixel PX can include multiple transistors for driving the light-emitting element OLED and at least one capacitor.

[0124] The display area DA may include an emitting area LA corresponding to each pixel PX and a non-emitting area NLA surrounding the emitting area LA. The light-emitting element OLED may be disposed in the emitting area LA.

[0125] The buffer layer (BFL) can be disposed on the substrate (SUB) and can be an inorganic layer. Semiconductor patterns can be disposed on the buffer layer (BFL). The semiconductor patterns can include polycrystalline silicon, amorphous silicon, or metal oxides.

[0126] Semiconductor patterns can be doped with N-type or P-type dopants. Semiconductor patterns can include highly doped and lightly doped regions. The conductivity of the highly doped regions is greater than that of the lightly doped regions, and they can substantially serve as the source and drain electrodes of a transistor TR. The lightly doped regions can substantially correspond to the active portion (or channel) of the transistor TR.

[0127] The source S, active portion A, and drain D of transistor TR can be formed by a semiconductor pattern (or partially defined by a semiconductor pattern). A first insulating layer INS1 can be disposed on the semiconductor pattern. The gate G of transistor TR can be disposed on the first insulating layer INS1. A second insulating layer INS2 can be disposed on the gate G. A third insulating layer INS3 can be disposed on the second insulating layer INS2.

[0128] The connecting electrode CNE may include a first connecting electrode CNE1 and a second connecting electrode CNE2 to connect the transistor TR and the light-emitting element OLED to each other. The first connecting electrode CNE1 may be disposed on the third insulating layer INS3 and may be connected to the drain electrode D through a first contact hole CH1 defined in the first insulating layer INS1 to the third insulating layer INS3.

[0129] A fourth insulating layer INS4 may be disposed on the first connecting electrode CNE1. A fifth insulating layer INS5 may be disposed on the fourth insulating layer INS4. A second connecting electrode CNE2 may be disposed on the fifth insulating layer INS5. The second connecting electrode CNE2 may be connected to the first connecting electrode CNE1 through a second contact hole CH2 defined in the fourth insulating layer INS4 and the fifth insulating layer INS5.

[0130] The sixth insulating layer INS6 can be disposed on the second connecting electrode CNE2. The layer between the buffer layer BFL and the sixth insulating layer INS6 can be defined as the circuit element layer DP-CL. The first insulating layer INS1 to the sixth insulating layer INS6 can be inorganic or organic layers.

[0131] A first electrode AE ​​can be disposed on a sixth insulating layer INS6. The first electrode AE ​​can be connected to a second connecting electrode CNE2 through a third contact hole CH3 defined in the sixth insulating layer INS6. A pixel defining film PDL having an opening PX_OP defined to expose a predetermined portion of the first electrode AE ​​can be disposed on the first electrode AE ​​and the sixth insulating layer INS6.

[0132] The hole control layer (HCL) can be disposed on the first electrode (AE) and the pixel defining film (PDL). The hole control layer (HCL) may include a hole transport layer and a hole injection layer.

[0133] The emission layer EML can be disposed on the hole control layer HCL. The emission layer EML can be disposed in the region corresponding to the opening PX_OP. The emission layer EML can include organic and / or inorganic materials. In an embodiment, for example, the emission layer EML can generate one of red, green, and blue light.

[0134] The electronic control layer (ECL) can be disposed on the emitter layer (EML) and the hole control layer (HCL). The ECL may include an electron transport layer and an electron injection layer. The hole control layer (HCL) and the ECL can be commonly disposed in the emitter region (LA) and the non-emitter region (NLA).

[0135] The second electrode CE can be disposed on the electronic control layer ECL. The second electrode CE can also be commonly disposed in the pixel PX. The layer containing the light-emitting element OLED can be defined as the display element layer DP-OLED.

[0136] The thin-film encapsulation layer TFE can be disposed on the second electrode CE and cover the pixel PX. The thin-film encapsulation layer TFE may include a first encapsulation layer EN1 disposed on the second electrode CE, a second encapsulation layer EN2 disposed on the first encapsulation layer EN1, and a third encapsulation layer EN3 disposed on the second encapsulation layer EN2.

[0137] The first encapsulation layer EN1 and the third encapsulation layer EN3 may include inorganic insulating layers and can protect the pixel PX from moisture / oxygen. The second encapsulation layer EN2 may include organic insulating layers and can protect the pixel PX from impurities such as dust particles.

[0138] A first voltage can be applied to the first electrode AE ​​via transistor TR, and a second voltage with a level lower than the first voltage can be applied to the second electrode CE. Holes and electrons injected into the emitter layer EML recombine to form excitons, and when the excitons transition to the ground state, the light-emitting element OLED can emit light.

[0139] The input sensing component (ISP) can be disposed on the thin-film encapsulation layer (TFE). In one embodiment, for example, the input sensing component (ISP) can be directly fabricated on the upper surface of the thin-film encapsulation layer (TFE).

[0140] The base layer (BSL) can be disposed on the thin-film encapsulation layer (TFE). The base layer (BSL) may include an inorganic insulating layer. At least one inorganic insulating layer, serving as the base layer (BSL), can be disposed on the thin-film encapsulation layer (TFE).

[0141] The input sensing section (ISP) may include a first conductive pattern CTL1 and a second conductive pattern CTL2 disposed on the first conductive pattern CTL1. The first conductive pattern CTL1 may be disposed on a base layer (BSL). An insulating layer (TINS) may be disposed on the base layer (BSL) to cover the first conductive pattern CTL1. The insulating layer (TINS) may include an inorganic insulating layer or an organic insulating layer. The second conductive pattern CTL2 may be disposed on the insulating layer (TINS).

[0142] The first conductive pattern CTL1 and the second conductive pattern CTL2 may overlap with the non-emitting region NLA. Although not shown, the first conductive pattern CTL1 and the second conductive pattern CTL2 may be disposed in the non-emitting region NLA between the emitting regions LA, and may have a grid shape.

[0143] The first conductive pattern CTL1 and the second conductive pattern CTL2 can form the sensor of the aforementioned input sensing portion ISP. In an embodiment, for example, the first conductive pattern CTL1 and the second conductive pattern CTL2, which are in a grid shape, can be separated from each other in a predetermined area to form the sensor. A portion of the second conductive pattern CTL2 can be connected to the first conductive pattern CTL1.

[0144] An anti-reflective layer RPL can be disposed on a second conductive pattern CTL2. The anti-reflective layer RPL may include a black matrix BM and multiple color filters CFT. The black matrix BM may overlap with the non-emissive region NLA, and the color filters CFT may overlap with the emissive region LA, respectively.

[0145] A black matrix BM can be disposed on the insulating layer TINS ​​to cover the second conductive pattern CTL2. An opening B_OP, overlapping the emitting region LA and the opening PX_OP, can be defined within the black matrix BM. The black matrix BM can absorb and block light. The width of the opening B_OP can be greater than the width of the opening PX_OP.

[0146] The color filter CFT can be set on the insulating layer TINS ​​and the black matrix BM. The color filter CFT can also be set in the opening B_OP. The planarized insulating layer PINS can be set on the color filter CFT. The planarized insulating layer PINS can provide a flat top surface.

[0147] When external light traveling towards the display panel DP is reflected from the display panel DP and returned to the external user, the user can perceive the external light (like a mirror). To prevent this phenomenon, for example, the anti-reflective layer RPL can include multiple color filters CFTs that display the same color as the pixels PX of the display panel DP. The color filters CFTs can filter the external light to the same color as the pixels PX. In this case, the external light is invisible to the user.

[0148] However, embodiments of this disclosure are not limited thereto, and the anti-reflective layer RPL may include a polarizing film to reduce the reflectivity of external light. In embodiments, the polarizing film may be manufactured separately and attached to the input sensing portion ISP via an adhesive layer. The polarizing film may include a retarder and / or a polarizer.

[0149] Figure 8 yes Figure 5 The three-dimensional view of the support plate shown. Figure 9 yes Figure 8 An enlarged view of the first region A1 shown.

[0150] refer to Figure 8 and Figure 9 In one embodiment, multiple openings OP can be defined as a grid pattern within the folded region FA of the support plate PLT. The openings OP can be arranged according to a predetermined rule. Since the openings OP are defined within the folded region FA, the area of ​​the folded region FA can be reduced, and the rigidity of the folded region FA can be reduced. In this embodiment where the openings OP are defined within the folded region FA, the flexibility of the folded region FA can be increased compared to the case where the openings OP are not defined within the folded region FA. Therefore, in such an embodiment, the folded region FA can be bent more easily.

[0151] refer to Figure 9 The opening OP can be arranged in the first direction DR1 and the second direction DR2. The opening OP can extend longer in the second direction DR2 than in the first direction DR1. In an embodiment, for example, the opening OP arranged in the h-th column and the opening OP arranged in the (h+1)-th column can be arranged to be staggered. Here, 'h' is a positive integer, and the column can correspond to the second direction DR2.

[0152] Figure 10 It is along Figure 4 The sectional view shown is taken from line II-II'. Figure 11 It is shown that Figure 10 The view shows the state of the curved area.

[0153] refer to Figure 10 In this embodiment, the panel protective layer PPL and the fourth adhesive surface AS4 may not be disposed below the bending region BA. The panel protective layer PPL and the fourth adhesive surface AS4 may be disposed below the electronic panel EP in the second region AA2. The data driver DDV may be disposed on the electronic panel EP in the second region AA2.

[0154] The display device DD may also include a bend protection layer BAP. The bend protection layer BAP may be disposed on the bend region BA, a portion of the first region AA1 adjacent to the bend region BA, and a portion of the second region AA2 adjacent to the bend region BA. The bend protection layer BAP may extend continuously from the portion of the first region AA1 adjacent to the bend region BA through the bend region BA to the portion of the second region AA2 adjacent to the bend region BA.

[0155] The bend protectant layer BAP may be spaced apart from the third adhesive surface AS3. The bend protectant layer BAP may be spaced apart from the data driver DDV in the second region AA2. The bend protectant layer BAP may comprise an acrylic-based resin or a urethane-based resin.

[0156] The IC cover layer C-IC can be disposed on the second region AA2. The IC cover layer C-IC can be disposed on the data driver DDV to cover the data driver DDV. The IC cover layer C-IC may include multiple insulating strips and conductive strips disposed between the insulating strips, and this configuration will be described in detail below.

[0157] The printed circuit board (PCB) can be disposed on a portion of the second area AA2. The IC cover layer (C-IC) can be disposed on the PCB. The PCB can be spaced apart from the data driver (DDV) in the second area AA2. The IC cover layer (C-IC) can be disposed on a portion of the PCB and the bend protection layer (BAP).

[0158] refer to Figure 11 The curved region BA can be bent to have a predetermined curvature. The curved region BA can be bent in such a way that the second region AA2 can be positioned below the first region AA1. Therefore, the data driver DDV can be positioned below the first region AA1.

[0159] The display device DD may also include spacers SPC disposed beneath the support plate PLT. The spacers SPC may be double-sided adhesive tape. In embodiments, for example, the spacers SPC may include a base layer such as flexible polyethylene terephthalate and an adhesive disposed on each of the upper and lower surfaces of the base layer.

[0160] The panel protective layer PPL located on the second region AA2 can be positioned below the spacer SPC. The panel protective layer PPL located on the second region AA2 can be attached to the spacer SPC.

[0161] The IC cover layer C-IC can be placed under the second area AA2 to cover the data driver DDV. The IC cover layer C-IC can be placed under a portion of the bend protection layer BAP located under the second area AA2 and under the printed circuit board PCB.

[0162] Figure 12 yes Figure 4 The view of the IC overlay shown.

[0163] exist Figure 12 In the diagram, the data driver DDV under the IC cover layer C-IC is shown with dashed lines, and for ease of explanation, the pads PD and wiring under the IC cover layer C-IC are omitted.

[0164] refer to Figure 12 In this embodiment, the IC overlay layer C-IC can be disposed on the second region AA2 and the printed circuit board PCB. The IC overlay layer C-IC may include a first portion PT1 and a second portion PT2. The second portion PT2 can be disposed on the second region AA2. The second portion PT2 can cover the data driver DDV. The first portion PT1 can extend from the second portion PT2 toward the printed circuit board PCB and can be disposed on the portion of the printed circuit board PCB adjacent to the second region AA2. The second portion PT2 may have a wider width than the first portion PT1 in the second direction DR2.

[0165] The identification pattern QR can be limited to the second part PT2. The identification pattern QR may include product information and customer information, etc. In an embodiment, for example, the identification pattern QR may include a quick response (QR) pattern.

[0166] When viewed on a plane, the identification pattern QR may not overlap with the data drive DDV. In an implementation, for example, the identification pattern QR is defined as being adjacent to one side of the data drive DDV, but the position of the identification pattern QR is not limited to this.

[0167] The QR identification pattern can be defined using a laser beam. Alternatively, the QR identification pattern can be formed by irradiating the IC cover layer (C-IC) with a laser. Another method is to remove a portion of the IC cover layer (C-IC).

[0168] Figure 13 yes Figure 12 The exploded perspective view of the IC cover layer is shown.

[0169] refer to Figure 13 The implementation of the IC cover layer C-IC may include a first insulating tape TAP1, a conductive tape CTP, and a second insulating tape TAP2.

[0170] The first insulating tape TAP1 can be disposed on the aforementioned data driver DDV. The conductive tape CTP can be disposed on the first insulating tape TAP1, and the second insulating tape TAP2 can be disposed on the conductive tape CTP. Therefore, the second insulating tape TAP2 can be disposed on the first insulating tape TAP1, and the conductive tape CTP can be disposed between the first insulating tape TAP1 and the second insulating tape TAP2.

[0171] The first insulating tape TAP1 may include a first portion PT1-1 and a second portion PT2-1. The first portion PT1-1 may extend from the second portion PT2-1. The first portion PT1-1 may have a smaller width in the second direction DR2 than the second portion PT2-1.

[0172] The conductive strip CTP may include a first portion PT1-2 and a second portion PT2-2. The first portion PT1-2 may extend from the second portion PT2-2. The first portion PT1-2 may have a smaller width in the second direction DR2 than the second portion PT2-2.

[0173] When viewed in a plane, the first portions PT1-1 and PT1-2 can overlap each other to define the first portion PT1. When viewed in a plane, the second portions PT2-1, PT2-2, and the second insulating tape TAP2 can overlap each other to define the second portion PT2.

[0174] The identification pattern QR may be defined within the first insulating tape TAP1. In one embodiment, for example, the identification pattern QR is defined within the first insulating tape TAP1, but is not limited thereto. In another embodiment, the identification pattern QR may be defined within the second insulating tape TAP2, and will be referred to below. Figures 14 to 17 To describe this configuration.

[0175] The first opening OP1 can be confined within the conductive strip CTP. When viewed in a plane, the first opening OP1 can overlap with the identification pattern QR.

[0176] The second opening OP2 may be defined within the second insulating tape TAP2. When viewed in a plane, the second opening OP2 may overlap with the first opening OP1 and the identification pattern QR. When viewed in a plane, each of the first opening OP1 and the second opening OP2 may have an area larger than the area of ​​the identification pattern QR.

[0177] Figure 14 It is along Figure 12 The sectional view shown is taken from line III-III'.

[0178] For ease of explanation and description, for example, in Figure 14The printed circuit board (PCB) is omitted, and a cross-section of each of the display panel (DP) and the IC overlay layer (C-IC) on the display panel (DP) is shown.

[0179] refer to Figure 12 and Figure 14 The first insulating tape TAP1 and the conductive tape CTP can extend outwards more than the second insulating tape TAP2. Therefore, the portion extending outwards beyond the second insulating tape TAP2 can be... Figure 13 The first part PT1-1 of the first insulating tape TAP1 and the first part PT1-2 of the conductive tape CTP are shown in the figure.

[0180] The first insulating tape TAP1 can be disposed on the display panel DP. The first insulating tape TAP1 may include a first adhesive layer AL1, a first base layer PET1, and a first coating CT1. The first base layer PET1 can be disposed on the display panel DP. The first base layer PET1 may include an organic insulating layer. The first coating CT1 can be disposed on the first base layer PET1.

[0181] The identification pattern QR can be defined within the first coating CT1. The first coating CT1 can be black. The first coating CT1 can be matte (or have a matte surface) to minimize light reflection.

[0182] The first adhesive layer AL1 can be disposed between the display panel DP and the first base layer PET1. The first base layer PET1 can be attached to the display panel DP through the first adhesive layer AL1.

[0183] A conductive strip CTP can be disposed on a first insulating strip TAP1. The edges of the first insulating strip TAP1 and the conductive strip CTP can overlap each other. A first opening OP1 defined in the conductive strip CTP can overlap with the identification pattern QR. Therefore, the identification pattern QR can be exposed to the outside through the first opening OP1. Since the first opening OP1 has a larger area than the identification pattern QR, the identification pattern QR can be fully exposed to the outside through the first opening OP1.

[0184] The conductive strip CTP may include a second adhesive layer AL2, a conductive layer CTL, and a second coating CT2. A first opening OP1 may be defined by the second adhesive layer AL2, the conductive layer CTL, and the second coating CT2. The conductive layer CTL may be disposed on the first coating CT1. The second adhesive layer AL2 may be disposed between the first coating CT1 and the conductive layer CTL. The conductive layer CTL may be attached to the first coating CT1 via the second adhesive layer AL2. The conductive layer CTL may include a conductive material. The conductive layer CTL can protect the data drive DDV by blocking external static electricity that can be applied to the data drive DDV. Although not shown, the conductive layer CTL may be connected to a grounding terminal.

[0185] A second coating CT2 can be applied to the conductive layer CTL. The second coating CT2 can protect the conductive layer CTL. In an embodiment, for example, the second coating CT2 can protect the conductive layer CTL from physical corrosion (damage caused by the external environment) or chemical corrosion (caused by oxygen, alkalis, strong alkalis, and acids, etc.). The second coating CT2 can absorb and block light. The second coating CT2 can have a light-absorbing color. In an embodiment, for example, the second coating CT2 can be black.

[0186] A second insulating tape TAP2 can be disposed on the conductive tape CTP. One side of the second insulating tape TAP2 can be disposed inside one side of the first insulating tape TAP1 and one side of the conductive tape CTP. When viewed in the second direction DR2, the second insulating tape TAP2 can be formed as a step with the first insulating tape TAP1 and the conductive tape CTP. A second opening OP2 defined in the second insulating tape TAP2 can overlap with the identification pattern QR and the first opening OP1. The area of ​​the second opening OP2 can be defined to be larger than the area of ​​the identification pattern QR. Therefore, the identification pattern QR can be exposed to the outside through the first opening OP1 and the second opening OP2.

[0187] Since the QR code is exposed through the first opening OP1 and the second opening OP2, it can be easily identified by a device that recognizes the QR code. Therefore, it is easier to provide product information of the display device DD to the user.

[0188] The second insulating tape TAP2 may include a third adhesive layer AL3 and a second base layer PET2. A second opening OP2 may be defined within the third adhesive layer AL3 and the second base layer PET2. The second base layer PET2 may be disposed on the second coating CT2. The second base layer PET2 may include an organic insulating layer.

[0189] The third adhesive layer AL3 can be disposed between the second base layer PET2 and the second coating CT2. The second base layer PET2 can be attached to the second coating CT2 through the third adhesive layer AL3.

[0190] In one embodiment, the first adhesive layer AL1 to the third adhesive layer AL3 may comprise a pressure-sensitive adhesive (PSA), but the type of adhesive is not limited thereto. In another embodiment, for example, the first adhesive layer AL1 to the third adhesive layer AL3 may comprise an optically clear adhesive (OCA).

[0191] When a black coating is applied to the identification pattern QR, the identification pattern QR may be unidentifiable. In the embodiments of this disclosure, since a second opening OP2 overlapping the identification pattern QR is defined in the second black coating CT2, the identification pattern QR can be identified more easily. Furthermore, in the embodiments of this disclosure, the portions of the conductive strip CTP and the second insulating strip TAP2 that overlap with the identification pattern QR are removed, and therefore no separate structure is provided on the identification pattern QR, making it even easier to identify the identification pattern QR.

[0192] Figure 15 It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0193] The following text will focus on... Figure 14 The configurations shown are different to describe Figure 15 The configuration shown is omitted or simplified, and any repeated detailed descriptions of elements that are the same as or similar to those described above will be omitted or simplified.

[0194] refer to Figure 15 The implementation of the IC cover layer C-IC-1 may include a first insulating tape TAP1-1, a conductive tape CTP-1, and a second insulating tape TAP2-1.

[0195] The first insulating tape TAP1-1 can be disposed on the display panel DP. The first insulating tape TAP1-1 may include a first adhesive layer AL1-1 and a first base layer PET1-1. The first base layer PET1-1 can be disposed on the display panel DP.

[0196] The first adhesive layer AL1-1 can be disposed between the display panel DP and the first base layer PET1-1. The first base layer PET1-1 and the display panel DP can be attached to each other through the first adhesive layer AL1-1.

[0197] The conductive tape CTP-1 can be disposed on the first insulating tape TAP1-1. The conductive tape CTP-1 may include a second adhesive layer AL2-1, a conductive layer CTL-1, and an insulating layer INS.

[0198] The conductive layer CTL-1 can be disposed on the first base layer PET1-1.

[0199] The insulating layer INS can be disposed on the conductive layer CTL-1. The insulating layer INS can be transparent.

[0200] The second adhesive layer AL2-1 can be disposed between the first base layer PET1-1 and the conductive layer CTL-1. The conductive layer CTL-1 and the first base layer PET1-1 can be attached to each other through the second adhesive layer AL2-1.

[0201] The second insulating tape TAP2-1 can be disposed on the conductive tape CTP-1. The second insulating tape TAP2-1 may include a third adhesive layer AL3-1, a second base layer PET2-1, and a first coating CT1-1. One side of the second insulating tape TAP2-1 may be disposed inside one side of the first insulating tape TAP1-1 and one side of the conductive tape CTP-1. When viewed in the second direction DR2, the second insulating tape TAP2-1 may be formed as a step with the first insulating tape TAP1-1 and the conductive tape CTP-1.

[0202] The second base layer PET2-1 can be disposed on the insulating layer INS. The third adhesive layer AL3-1 can be disposed between the second base layer PET2-1 and the insulating layer INS. The second base layer PET2-1 and the insulating layer INS can be attached to each other through the third adhesive layer AL3-1.

[0203] The first coating CT1-1 can be applied to the second base layer PET2-1. The identification pattern QR can be confined within the first coating CT1-1. The first coating CT1-1 can be black. The first coating CT1-1 can be matte to minimize light reflection.

[0204] An insulating layer INS can be defined on the conductive layer CTL-1 to protect the upper surface of the conductive layer CTL-1. In an embodiment, for example, since the insulating layer INS covers the upper surface of the conductive layer CTL-1, corrosion of the upper surface of the conductive layer CTL-1 can be prevented by the insulating layer INS.

[0205] Because the insulating layer INS is transparent, the black layer does not need to be placed under the identification pattern QR. In the case where the black layer is placed under the identification pattern QR including the QR code, the QR code, formed as a black pattern, may not be effectively identified. In this embodiment, the insulating layer INS is not black, making the identification pattern QR easily identifiable.

[0206] Figure 16 It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0207] refer to Figure 16 The implementation of the IC cover layer C-IC-2 may include a first insulating tape TAP1-2, a conductive tape CTP-2, and a second insulating tape TAP2-2.

[0208] The first insulating tape TAP1-2 can be disposed on the display panel DP. The first insulating tape TAP1-2 may include a first adhesive layer AL1-2 and a first base layer PET1-2. The first base layer PET1-2 can be disposed on the display panel DP. The first adhesive layer AL1-2 can be disposed between the display panel DP and the first base layer PET1-2. The first base layer PET1-2 can be attached to the display panel DP through the first adhesive layer AL1-2.

[0209] The conductive tape CTP-2 can be disposed on the first insulating tape TAP1-2. The conductive tape CTP-2 may include a second adhesive layer AL2-2, a conductive layer CTL-2, and a first coating CT1-2.

[0210] The conductive layer CTL-2 can be disposed on the first base layer PET1-2. The second adhesive layer AL2-2 can be disposed between the first base layer PET1-2 and the conductive layer CTL-2. The conductive layer CTL-2 can be attached to the first base layer PET1-2 through the second adhesive layer AL2-2.

[0211] The first coating CT1-2 can be defined on the conductive layer CTL-2 to protect the upper surface of the conductive layer CTL-2. In an embodiment, for example, since the first coating CT1-2 covers the upper surface of the conductive layer CTL-2, the upper surface of the conductive layer CTL-2 can be protected from corrosion by the first coating CT1-2. The first coating CT1-2 can be black.

[0212] The second insulating tape TAP2-2 can be disposed on the conductive tape CTP-2. The first insulating tape TAP1-2 and the conductive tape CTP-2 can extend outwards than the second insulating tape TAP2-2. The edges of the first insulating tape TAP1-2 and the conductive tape CTP-2 can overlap each other. When viewed in the second direction DR2, the second insulating tape TAP2-2 can be formed as a step with the first insulating tape TAP1-2 and the conductive tape CTP-2.

[0213] The second insulating tape TAP2-2 may include a third adhesive layer AL3-2, a second base layer PET2-2, and a second coating CT2-1. The second base layer PET2-2 may be disposed on the first coating CT1-2. The third adhesive layer AL3-2 may be disposed between the second base layer PET2-2 and the conductive layer CTL-2. The second base layer PET2-2 can be attached to the conductive layer CTL-2 through the third adhesive layer AL3-2.

[0214] The second coating CT2-1 can be applied to the second base layer PET2-2. The identification pattern QR can be defined within the second coating CT2-1. The second coating CT2-1 can be black. The second coating CT2-1 can be matte to minimize light reflection.

[0215] The first opening OP1-1 can be defined within the conductive layer CTL-2 and the first coating CT1-2. The first opening OP1-1 can overlap with the identification pattern QR. The area of ​​the first opening OP1-1 can be defined to be larger than the area of ​​the identification pattern QR.

[0216] In cases where a black layer is disposed beneath an identification pattern QR including a QR code formed as a black pattern, the QR code may be unrecognizable. In embodiments of this disclosure, since the first opening OP1-1, which overlaps with the identification pattern QR, is defined or formed in the first coating CT1-2, the black layer may not be disposed beneath the identification pattern QR. Therefore, the identification pattern QR can be easily identified.

[0217] Figure 17 It is according to the embodiments of this disclosure along Figure 12 The sectional view shown is taken from line III-III'.

[0218] refer to Figure 17 The implementation of the IC cover layer C-IC-3 may include a first insulating tape TAP1-3, a conductive tape CTP-3, and a second insulating tape TAP2-3.

[0219] The first insulating tape TAP1-3 can be disposed on the display panel DP. The first insulating tape TAP1-3 may include a first adhesive layer AL1-3 and a first base layer PET1-3. The first base layer PET1-3 can be disposed on the display panel DP. The first adhesive layer AL1-3 can be disposed between the display panel DP and the first base layer PET1-3. The first base layer PET1-3 and the display panel DP can be attached to each other through the first adhesive layer AL1-3.

[0220] The conductive tape CTP-3 can be disposed on the first insulating tape TAP1-3. The conductive tape CTP-3 may include a second adhesive layer AL2-3, a conductive layer CTL-3, and a first coating CT1-3.

[0221] The conductive layer CTL-3 can be disposed on the first base layer PET1-3. The second adhesive layer AL2-3 can be disposed between the first base layer PET1-3 and the conductive layer CTL-3. The conductive layer CTL-3 and the first base layer PET1-3 can be attached to each other through the second adhesive layer AL2-3.

[0222] The first coating CT1-3 can be disposed on the conductive layer CTL-3. The first coating CT1-3 can protect the conductive layer CTL-3. The first coating CT1-3 can be black. The first opening OP1-2 can be defined in the first coating CT1-3.

[0223] The second insulating tape TAP2-3 can be disposed on the conductive tape CTP-3. In the implementation method, such as Figure 17 As shown, when viewed in a plane, the second insulating tape TAP2-3, the first insulating tape TAP1-3, and the conductive tape CTP-3 can have equal areas.

[0224] The second insulating tape TAP2-3 may include a third adhesive layer AL3-3, a second base layer PET2-3, and a second coating CT2-2. The second base layer PET2-3 may be disposed on the conductive layer CTL-3.

[0225] The second coating CT2-2 can be disposed on the second base layer PET2-3. The identification pattern QR can be confined within the second coating CT2-2. The second coating CT2-2 can be black to improve the recognition rate of the identification pattern QR. The second coating CT2-2 can be matte to minimize light reflection. The identification pattern QR can overlap with the first opening OP1-2. The area of ​​the first opening OP1-2 can be defined as being larger than the area of ​​the identification pattern QR.

[0226] When the first coating CT1-3 is positioned below the identification pattern QR, the identification pattern QR, which is formed as a black pattern, may not be recognizable. In the embodiments of this disclosure, since the portion of the first coating CT1-3 that overlaps with the identification pattern QR is removed, the black layer may not be positioned below the identification pattern QR. Therefore, the identification pattern QR can be identified more easily.

[0227] Figures 18A to 18F This is a view illustrating a method of manufacturing a display device according to an embodiment of the present disclosure.

[0228] For ease of illustration and description, for example, in Figures 18A to 18F In this case, the printed circuit board (PCB) can be omitted.

[0229] In an implementation of the method for manufacturing a display device, such as Figure 11 and Figures 18A to 18F As shown, a display panel DP can be prepared comprising a first region AA1, a second region AA2 on which a data driver DDV is disposed, and a curved region BA between the first region AA1 and the second region AA2. An IC cover layer C-IC can be disposed on the data driver DDV. The IC cover layer C-IC can be disposed on the second region AA2. Reference will be made below. Figures 18B to 18FDescribe in detail the manufacturing process of the IC cover layer C-IC.

[0230] refer to Figure 18B A first adhesive layer AL1 and a first base layer PET1 can be provided (or formed) on the second region AA2 of the display panel DP. In an embodiment, the first adhesive layer AL1 can be disposed on the second region AA2, and the first base layer PET1 can be disposed on the first adhesive layer AL1.

[0231] refer to Figure 18C A first coating CT1 with a black color can be formed on the first base layer PET1. Therefore, a first insulating tape TAP1 comprising a first adhesive layer AL1, a first base layer PET1, and a first coating CT1 can be formed on the second region AA2 of the display panel DP.

[0232] refer to Figure 18D A conductive strip CTP defining the first opening OP1 can be provided on the first coating CT1. In an embodiment, a second adhesive layer AL2 defining the first opening OP1 can be provided on the first coating CT1, and a conductive layer CTL defining the first opening OP1 can be provided on the second adhesive layer AL2. Furthermore, a second coating CT2 having a black color and defining the first opening OP1 can be provided on the conductive layer CTL.

[0233] refer to Figure 18E A second insulating tape TAP2, which defines a second opening OP2 that overlaps with the first opening OP1, can be provided on the conductive tape CTP. In an embodiment, a third adhesive layer AL3, which defines the second opening OP2, can be provided on the second coating CT2, and a second base layer PET2, which defines the second opening OP2, can be provided on the third adhesive layer AL3.

[0234] refer to Figure 18F A laser beam LB can be supplied to the first coating CT1 through the first opening OP1 and the second opening OP2 to form an identification pattern QR. Since the laser beam LB removes a predetermined portion of the first coating CT1, an identification pattern QR with a QR code can be formed or defined in the first coating CT1. Therefore, an identification pattern QR overlapping with the first opening OP1 and the second opening OP2 can be defined in the first coating CT1.

[0235] The first opening OP1 and the second opening OP2 can provide space for providing the laser beam LB. Since each of the first opening OP1 and the second opening OP2 is defined to have an area larger than the identification pattern QR, the laser beam LB can be easily provided to the area used to define the identification pattern QR.

[0236] According to embodiments of this disclosure, the opening is defined on the identification pattern, such that the identification pattern can be exposed to the outside through the opening. Therefore, the identification pattern can be provided without providing any separate structure.

[0237] Furthermore, the identification pattern can be more easily identified by removing the portion of the black coating that is located beneath it.

[0238] Furthermore, by providing a transparent insulating layer between the identification pattern and the conductive layer, the black coating is not positioned beneath the identification pattern, making it easier to identify. Additionally, since the transparent insulating layer is positioned on top of the conductive layer, the upper surface of the conductive layer is not exposed to the outside, effectively preventing corrosion of the conductive layer.

[0239] This disclosure should not be construed as limiting itself to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of this disclosure to those skilled in the art.

[0240] In this disclosure, the display device includes an electronic device having a display screen. That is, embodiments of this disclosure can be applied to any display device or any electronic device including a display screen, such as mobile phones, smartphones, tablet computers, digital televisions (TVs), 3D televisions, personal computers (PCs), home appliances, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, music players, portable game consoles, navigation devices, etc.

[0241] Although this disclosure has been specifically shown and described with reference to embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit or scope of this disclosure as defined by the appended claims.

Claims

1. A display device, characterized in that, The display device includes: The display panel includes a first region, a second region, and a curved region between the first region and the second region; A driver integrated circuit is disposed on the second region; and An integrated circuit overlay layer is disposed on the driver integrated circuit. The integrated circuit overlay layer includes: First insulating tape; A second insulating tape is disposed on the first insulating tape; and A conductive strip is disposed between the first insulating strip and the second insulating strip, and An identification pattern is defined in one of the first insulating strip and the second insulating strip.

2. The display device according to claim 1, characterized in that, The identification pattern includes a fast-response pattern.

3. The display device according to claim 1, characterized in that, The first insulating tape includes: The first basic layer; and The first coating layer is applied to the first base layer. The identification pattern is defined within the first coating.

4. The display device according to claim 3, characterized in that, The first opening, which overlaps with the identification pattern, is defined in the conductive strip.

5. The display device according to claim 4, characterized in that, A second opening that overlaps with the identification pattern is defined in the second insulating strip.

6. The display device according to claim 5, characterized in that, When viewed on a plane, each of the first opening and the second opening has an area larger than the identification pattern.

7. The display device according to claim 3, characterized in that, The conductive strip includes: A conductive layer is disposed on the first insulating strip; and A second coating is applied to the conductive layer. Each of the first coating and the second coating is black.

8. The display device according to claim 1, characterized in that, The conductive strip includes: A conductive layer is disposed on the first insulating strip; and A first coating is disposed on the conductive layer, and The second insulating tape includes: The base layer; and A second coating is disposed on the base layer, wherein the identification pattern is defined in the second coating.

9. An electronic device, characterized in that, The electronic device includes: The display panel includes a first region, a second region, and a curved region between the first region and the second region; A driver integrated circuit is disposed on the second region; and An integrated circuit overlay layer is disposed on the driver integrated circuit. The integrated circuit overlay layer includes: First insulating tape; A second insulating tape is disposed on the first insulating tape; and A conductive strip is disposed between the first insulating strip and the second insulating strip, and An identification pattern is defined in one of the first insulating strip and the second insulating strip.

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