Active visual card with tamper-proof protection

By installing a tamper-proof factor detection circuit in the active visual card, the card's pressure, temperature, and brightness parameters are monitored in real time, triggering an interrupt response and taking safety protection measures. This solves the problem of active visual cards being easily tampered with, cracked, and copied, achieving a higher level of security protection.

CN224501287UActive Publication Date: 2026-07-14

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Filing Date
2025-06-30
Publication Date
2026-07-14

AI Technical Summary

Technical Problem

Existing active visual cards are vulnerable to being easily broken, cracked, and copied, and lack effective security protection measures.

Method used

An anti-tampering factor detection circuit is installed in the active visual card, including a card pressure parameter detection circuit, a temperature parameter detection circuit, and a brightness parameter detection circuit. These parameters are monitored through the IO pins of the MCU chip, triggering an interrupt response and taking corresponding safety protection measures, such as data destruction and circuit function locking.

Benefits of technology

It effectively prevents theft, disassembly, cracking, and copying of active visual cards when they are illegally broken, ensuring data security and protecting the data and firmware inside the card from being stolen or copied to the greatest extent.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses an active visual card with anti-breaking protection, and relates to the technical field of active visual cards. The active visual card comprises a printed surface layer, an FPC flexible circuit board, a printed bottom surface layer and an anti-breaking factor detection circuit used for detecting actual environmental parameters of the active visual card. The anti-breaking factor detection circuit is installed on the FPC flexible circuit board. The FPC flexible circuit board is provided with a power supply, an MCU chip and an SE chip. The MCU chip is internally provided with a card system factor register used for storing default environmental parameter thresholds and system keys. The card system factor register is connected with an internal bus of the MCU chip. The application can avoid risks such as theft prevention, anti-breaking, anti-cracking and anti-copying when the active visual card is illegally broken.
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Description

Technical Field

[0001] This application relates to the field of active video card technology, and more particularly to an active video card with tamper protection. Background Technology

[0002] A visual card is a multifunctional application product developed to expand the auxiliary functions of an IC card by adding an electronic paper screen. In addition to all the functions of a smart IC card, a visual card can also display relevant information and data as needed, such as transaction status, current card balance, QR codes, and image information.

[0003] Based on the above characteristics, visual cards have been widely used in the current digital currency field. Therefore, there are higher requirements for the security of visual cards and their security protection functions such as anti-theft, anti-tampering, anti-cracking, and anti-copying.

[0004] Conventional smart IC cards all possess relevant security protection functions and comply with relevant data security specifications. However, existing visual card products not only contain the SE security chip of a smart IC card, but also an MCU chip for driving the screen display and generating and displaying QR codes for payment and receipt during transactions, as well as power management circuitry. Active visual cards in existing products have built-in batteries, enabling offline payment and receipt transactions, thus requiring corresponding and more secure protection measures, such as anti-theft, anti-tampering, anti-hacking, and anti-copying functions. However, existing security specifications for conventional smart IC cards do not cover specific standards and requirements for visual cards, leaving existing active visual cards vulnerable to various risks such as tampering, hacking, and copying. Utility Model Content

[0005] The purpose of this application is to provide an active video card with anti-tamper protection, which can avoid the risks of theft, tampering, cracking, and copying when the active video card is illegally tampered with.

[0006] To achieve the above objectives, this application provides an active visual card with tamper-proof protection, comprising: a printed surface layer, an FPC flexible circuit board, a printed bottom layer, and a tamper-proof factor detection circuit for detecting the actual environmental parameters of the active visual card. The tamper-proof factor detection circuit is mounted on the FPC flexible circuit board, which has a power supply, an MCU chip, and an SE chip. The MCU chip has a card system factor register for storing default environmental parameter thresholds and a system key, and the card system factor register is connected to the internal bus of the MCU chip. The environmental parameters include pressure parameters, temperature parameters, and brightness parameters.

[0007] The power supply is connected to the MCU chip, the anti-tampering factor detection circuit, and the card system factor register. The MCU chip is electrically connected to the anti-tampering factor detection circuit and the card system factor register.

[0008] The anti-tampering factor detection circuit includes: a card pressure parameter detection circuit for detecting card pressure parameters, a card temperature parameter detection circuit for detecting card temperature parameters, and a card brightness parameter detection circuit for detecting card brightness parameters.

[0009] The card pressure parameter detection circuit is connected to the first interface (S_Test) of the MCU chip.

[0010] The card temperature parameter detection circuit is connected to the second IO pin (V_Test) of the MCU chip;

[0011] The card brightness parameter detection circuit is connected to the third IO pin (P_Test) of the MCU chip;

[0012] When the electrical signals output by the card pressure parameter detection circuit, card temperature parameter detection circuit, and card brightness parameter detection circuit cause a level transition on the corresponding IO pin, the MCU chip is triggered to interrupt the current operation.

[0013] As shown above, the card pressure parameter detection circuit includes: a piezoelectric thin film sensor, an input pair and a voltage divider resistor (Rs) for the input pair, wherein the input pair consists of a first MOSFET (Qs1) and a second MOSFET (Qs2);

[0014] The piezoelectric thin film sensor is coupled between ground and power supply, and the piezoelectric thin film sensor is connected to the first interface (S_Test) of the MCU chip through the input pair;

[0015] The piezoelectric thin film sensor includes: a first voltage divider resistor (Rc), a second voltage divider resistor (Rb), a first piezoelectric resistor (Rd), and a second piezoelectric resistor (Ra). The first voltage divider resistor (Rc), the second voltage divider resistor (Rb), the first piezoelectric resistor (Rd), and the second piezoelectric resistor (Ra) form a bridge circuit. The first piezoelectric resistor (Rd) is a first piezoelectric sheet or a first piezoelectric thin film, and the second piezoelectric resistor (Ra) is a second piezoelectric sheet (Ra) or a second piezoelectric thin film.

[0016] The first voltage divider resistor (Rc) and the first piezoelectric resistor (Rd) are connected in series to form the first voltage divider circuit, the second voltage divider resistor (Rb) and the second piezoelectric resistor (Ra) are connected in series to form the second voltage divider circuit, and the first voltage divider circuit and the second voltage divider circuit are connected in parallel between the power supply (VCC) and ground.

[0017] The first voltage divider circuit is connected to the gate of the first MOSFET (Qs1), and the second voltage divider circuit is connected to the gate of the second MOSFET (Qs2).

[0018] The drain of the first MOSFET (Qs1) and the drain of the second MOSFET (Qs2) are electrically connected to the power supply (VCC) through a voltage divider (Rs). The source of the first MOSFET (Qs1) and the source of the second MOSFET (Qs2) are electrically connected to ground.

[0019] As shown above, the first voltage divider circuit is located on the front side of the FPC flexible circuit board, and the second voltage divider circuit is located on the back side of the FPC flexible circuit board.

[0020] As mentioned above, the piezoelectric thin-film sensor is made of flexible PVDF material.

[0021] As shown above, the card temperature parameter detection circuit includes: a first voltage divider clamping resistor (Rv1) and a thermistor (Rv2);

[0022] One end of the first voltage divider clamping resistor (Rv1) is grounded; the other end of the first voltage divider clamping resistor (Rv1) is connected to one end of the thermistor (Rv2) and the second IO pin (V_Test) of the MCU chip.

[0023] One end of the thermistor (Rv2) is connected to the second IO pin (V_Test) of the MCU chip; the other end of the thermistor (Rv2) is connected to the power supply (VCC).

[0024] As shown above, the resistance value of the thermistor (Rv2) is greater than the resistance value of the first voltage divider clamping resistor (Rv1), and the resistance value of the thermistor (Rv2) is nK, 100K. <nK<110K。

[0025] As shown above, the resistance value of the first voltage divider clamping resistor (Rv1) is mK, 10K. <mK<20K。

[0026] As shown above, the card brightness parameter detection circuit includes: a photodiode (Dp) and a second voltage divider clamping resistor (Rp);

[0027] In this design, the cathode of the photodiode (Dp) is connected to the power supply (VCC);

[0028] The anode of the photodiode (Dp) is connected to one end of the second voltage divider clamping resistor (Rp) and the third IO pin (P_Test) of the MCU chip;

[0029] One end of the second voltage divider clamping resistor (Rp) is connected to the third IO pin (P_Test) of the MCU chip, and the other end of the second voltage divider clamping resistor (Rp) is grounded.

[0030] As shown above, the resistance value of the voltage divider clamping resistor (Rp) is iK, 10K. <iK<20K。

[0031] The active video card with tamper protection proposed in this application can avoid the risks of theft, tampering, cracking, and copying when the active video card is illegally tampered with. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0033] Figure 1 A schematic diagram of the structure of an embodiment of an active visual card with tamper protection;

[0034] Figure 2 This is a block diagram of the anti-tamper protection function of an active visual card. Detailed Implementation

[0035] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0036] like Figure 1As shown, this application provides an active visual card with tamper-proof protection, including: a printed surface layer, an FPC flexible circuit board, a printed bottom layer, and a tamper-proof factor detection circuit mounted on the FPC flexible circuit board. The FPC flexible circuit board has a power supply, an MCU chip, and an SE chip. The MCU chip has a card system factor register, which stores default environmental parameter thresholds and a system key. The environmental parameters include pressure parameters, temperature parameters, and brightness parameters. The power supply supplies power to the MCU chip, the tamper-proof factor detection circuit, and the card system factor register. The MCU chip is electrically connected to the tamper-proof factor detection circuit and the card system factor register. The tamper-proof factor detection circuit detects the actual environmental parameters of the active visual card. The tamper-proof factor detection circuit includes a card pressure parameter detection circuit for detecting card pressure parameters, a card temperature parameter detection circuit for detecting card temperature parameters, and a card brightness parameter detection circuit for detecting card brightness parameters. The card pressure parameter detection circuit is connected to the first IO pin (S_Test) of the MCU chip; the card temperature parameter detection circuit is connected to the second IO pin (V_Test) of the MCU chip; the card brightness parameter detection circuit is connected to the third IO pin (P_Test) of the MCU chip; and the card system factor register is located inside the MCU chip and is connected to the internal bus of the MCU chip.

[0037] Furthermore, the card pressure parameter detection circuit includes: a piezoelectric thin film sensor, an input pair and a voltage divider resistor (Rs) for the input pair, wherein the input pair consists of a first MOSFET (Qs1) and a second MOSFET (Qs2).

[0038] The piezoelectric thin-film sensor includes: a first voltage-dividing resistor (Rc), a second voltage-dividing resistor (Rb), a first piezoelectric resistor (Rd), and a second piezoelectric resistor (Ra). The first voltage-dividing resistor (Rc), the second voltage-dividing resistor (Rb), the first piezoelectric resistor (Rd), and the second piezoelectric resistor (Ra) form a bridge circuit. The first piezoelectric resistor (Rd) is a first piezoelectric element or a first piezoelectric thin film, and the second piezoelectric resistor (Ra) is a second piezoelectric element (Ra) or a second piezoelectric thin film.

[0039] In this circuit, the first voltage divider resistor (Rc) and the first piezoelectric resistor (Rd) are connected in series to form the first voltage divider circuit, and the second voltage divider resistor (Rb) and the second piezoelectric resistor (Ra) are connected in series to form the second voltage divider circuit. The first and second voltage divider circuits are connected in parallel between the power supply (VCC) and ground. The first voltage divider circuit is connected to the gate of the first MOSFET (Qs1), and the second voltage divider circuit is connected to the gate of the second MOSFET (Qs2). The drains of the first MOSFET (Qs1) and the second MOSFET (Qs2) are electrically connected to the power supply (VCC) through the voltage divider voltage (Rs), and the sources of the first MOSFET (Qs1) and the second MOSFET (Qs2) are electrically connected to ground.

[0040] like Figure 1 As shown, the specific connection is described below:

[0041] One end of the first voltage divider resistor (Rc) is connected to one end of the first piezoelectric resistor (Rd) and the gate of the second MOSFET (Qs2); one end of the first piezoelectric resistor (Rd) is connected to the gate of the second MOSFET (Qs2).

[0042] The other end of the first voltage divider resistor (Rc) is connected to one end of the second voltage divider resistor (Rb), the source of the first MOSFET (Qs1), and the source of the second MOSFET (Qs2); the other end of the first voltage divider resistor (Rc), one end of the second voltage divider resistor (Rb), the source of the first MOSFET (Qs1), and the source of the second MOSFET (Qs2) are all grounded.

[0043] The other end of the second voltage divider resistor (Rb) is connected to one end of the second piezoelectric resistor (Ra) and the gate of the first MOSFET (Qs1).

[0044] The other end of the second piezoelectric resistor (Ra) is connected to the other end of the first piezoelectric resistor (Rd), the power supply (VCC), and one end of the voltage divider resistor (Rs) of the input pair transistor.

[0045] The other end of the voltage divider resistor (Rs) of the input pair is connected to the drain of the first MOSFET (Qs1), the drain of the second MOSFET (Qs2), and the first IO pin (S_Test) of the MCU chip; the drains of the first MOSFET (Qs1) and the drains of the second MOSFET (Qs2) are both connected to the first IO pin (S_Test) of the MCU chip.

[0046] Specifically, the card pressure parameter detection circuit consists of piezoelectric thin film sensors (i.e., Ra, Rb, Rc, Rd), Qs1, Qs2, and Rs, used to prevent the active visual card from being disassembled by physical cutting. Among them, the first MOSFET (Qs1) and the second MOSFET (Qs2) form an input pair, used to amplify the current or voltage generated by the piezoelectric thin film sensor.

[0047] When the card is in a normal state, the first IO pin (S_Test) of the MCU chip is in a down-jump interrupt response state by default, meaning that the interrupt response state is triggered whenever the first IO pin is pulled down. When the piezoelectric film sensor is not affected by external cutting pressure, Qs1 and Qs2 are in a high-impedance state, and S_Test is pulled up to a high level by Rs. When the card is subjected to external cutting pressure, Qs1 and Qs2 will conduct, and S_Test will be pulled down to a low level. When S_Test is at a low level, the pressure detection interrupt of the MCU chip is triggered. The interrupt is a default state set when the MCU chip is initialized. As long as there is a change in the level of S_Test, it will be automatically triggered according to the set conditions, waking up the active visual card and detecting the external pressure parameters currently applied to the card. If the current external pressure parameters of the card exceed the pressure parameter threshold (the preset normal pressure parameter value), the MCU chip considers the card to be at risk of being broken and sets a breakage warning sign.

[0048] Specifically, the piezoelectric thin-film sensor is mounted on a card close to the MCU chip and connected to the MCU chip. When the MCU chip or other components are damaged by external force, the piezoelectric thin-film sensor is subjected to pressure. When it deforms under mechanical stress, charge separation occurs in the internal lattice structure of the piezoelectric sheet or film, resulting in a potential difference (i.e., voltage) on the surface. This causes a voltage change (i.e., voltage change signal) in the voltage divider circuits corresponding to Rd / Rc and Ra / Rb, and provides the voltage change to the first MOSFET (Qs1) / second MOSFET (Qs2). The specific values ​​of Rc / Rb are set according to the actual situation. In this application, it is preferred that the values ​​of Rc / Rb are close to the static resistance values ​​of Ra / Rd.

[0049] In this application, as a preferred embodiment, the piezoelectric thin-film sensor can be disassembled and mounted on both sides of the FPC flexible circuit board. Specifically, the first voltage divider circuit (first voltage divider resistor (Rc), first piezoelectric resistor (Rd)) is located on the front side of the FPC flexible circuit board, and the second voltage divider circuit (second voltage divider resistor (Rb), second piezoelectric resistor (Ra)) is located on the back side of the FPC flexible circuit board. Regardless of whether the viewing card is disassembled from the front or the back, the piezoelectric thin-film sensor can be subjected to pressure.

[0050] Further, the material of the piezoelectric thin film sensor is flexible PVDF (polyvinylidene fluoride), but it is not limited to flexible PVDF. This application preferably uses flexible PVDF, which is convenient to be attached to the card.

[0051] Further, the card temperature parameter detection circuit includes: a first voltage-dividing clamping resistor (Rv1) and a thermistor (Rv2).

[0052] Among them, one end of the first voltage-dividing clamping resistor (Rv1) is grounded; the other end of the first voltage-dividing clamping resistor (Rv1) is connected to one end of the thermistor (Rv2) and the second IO pin (V_Test) of the MCU chip.

[0053] One end of the thermistor (Rv2) is connected to the second IO pin (V_Test) of the MCU chip; the other end of the thermistor (Rv2) is connected to the power supply (VCC).

[0054] Specifically, the card temperature parameter detection circuit is mainly composed of a first voltage-dividing clamping resistor (Rv1) and a thermistor (Rv2), which is used to prevent the active visible card from being disassembled by heating and melting.

[0055] Further, the resistance value of the thermistor (Rv2) is greater than the resistance value of the first voltage-dividing clamping resistor (Rv1).

[0056] Further, the specific values of the resistance value of the thermistor (Rv2) and the resistance value of the first voltage-dividing clamping resistor (Rv1) are set according to the actual situation. This application preferably uses: the resistance value of the thermistor (Rv2) is nK, 100K < nK < 110K, and the resistance value of the first voltage-dividing clamping resistor (Rv1) is mK, 10K < mK < 20K. That is, the resistance value of the voltage-dividing clamping resistor (Rv1) is a low resistance value, so that the level logic change can trigger the MCU chip interrupt.

[0057] Specifically, when the card is in a normal state, the IO pin corresponding to the second IO pin (V_Test) of the MCU chip defaults to the upper jump interrupt response state. When the card temperature is in a normal state, the thermistor (Rv2) presents a high resistance state, and the second IO pin (V_Test) is pulled down to a low level by the first voltage-dividing clamping resistor (Rv1). When the card is heated by external high temperature, the resistance value of the thermistor (Rv2) will drop sharply, which will cause the voltage of the second IO pin (V_Test) to rise significantly, trigger the temperature detection interrupt of the MCU chip, wake up the visible card and detect the external temperature parameter where the card is currently located. If the current external temperature parameter of the card exceeds the set normal temperature parameter value, it is considered that the card has the risk of being disassembled and a disassembly warning sign is set.

[0058] Furthermore, the card brightness parameter detection circuit includes a photodiode (Dp) and a second voltage divider clamping resistor (Rp).

[0059] In this design, the cathode of the photodiode (Dp) is connected to the power supply (VCC).

[0060] The anode of the photodiode (Dp) is connected to one end of the second voltage divider clamping resistor (Rp) and the third IO pin (P_Test) of the MCU chip.

[0061] One end of the second voltage divider clamping resistor (Rp) is connected to the third IO pin (P_Test) of the MCU chip, and the other end of the second voltage divider clamping resistor (Rp) is grounded.

[0062] Specifically, the card brightness parameter detection circuit mainly consists of a photodiode (Dp) and a second voltage divider clamping resistor (Rp). This circuit detects the light intensity inside the card to determine if it has been disassembled, and is also suitable for chemical melting / disassembly methods. During brightness parameter detection, the photodiode (Dp) exhibits a high resistance state (equivalent to the cutoff state) in the absence of light. When exposed to light, the resistance of the photodiode (Dp) decreases significantly, and the resistance of the second voltage divider clamping resistor (Rp) becomes low, triggering a level logic transition and initiating an interrupt in the MCU chip.

[0063] Furthermore, the specific value of the second voltage divider clamping resistor (Rp) is set according to the actual situation; in this application, it is preferably 1K or 10K. <iK<20K。

[0064] Specifically, when the card is in a normal state, the IO pin corresponding to the third IO pin (P_Test) of the MCU chip is in an up-jump interrupt response state by default. Since the internal circuit of the card is sealed in plastic material, the internal light is very weak, and the photodiode (Dp) is in the off state at this time. The third IO pin (P_Test) is pulled down to a low level by the second voltage divider clamping resistor (Rp). When the card is broken by chemical melting or by physical or heating methods, the entire internal circuit is exposed to natural light. At this time, the internal resistance of the photodiode (Dp) decreases sharply, causing the voltage of the IO pin corresponding to the third IO pin (P_Test) to increase significantly, triggering the brightness detection interrupt of the MCU chip, waking up the visual card and detecting the external brightness parameters of the card. If the current external brightness parameters of the card exceed the set normal brightness parameter value, it is considered that the card is at risk of being broken and a breakage warning sign is set.

[0065] Furthermore, the card system factor register, located within the MCU chip, is used to store critical system parameter data (environmental parameters and system keys). These system parameter data include, but are not limited to, pressure parameters, temperature parameters, brightness parameters, and the system key.

[0066] This application implements a tamper-proof factor detection circuit on the FPC flexible circuit board of an active visual card to detect the actual environmental parameters of the active visual card. The tamper-proof factor detection circuit is electrically connected to the corresponding IO pin of the MCU. The MCU performs corresponding security protection mechanisms such as sensitive data destruction, application firmware erasure, and circuit function locking based on the state of the IO pin, so as to maximize the data security of the visual card and prevent important and sensitive data from being stolen or copied, thereby achieving the purpose of tamper-proof security protection for the active visual card.

[0067] This application primarily utilizes a non-volatile critical data register, such as RTC_TAMP, within the MCU chip of an active visual card. This register ensures data integrity during MCU chip operations such as program updates, hot resets, hibernation, and wake-ups. However, all data is cleared and lost upon power failure. After the active visual card is properly encapsulated, initialization saves normal pressure, temperature, and brightness parameters, as well as the system key, to a designated card system factor register. When the card is in normal operation, the internal battery continuously provides power, ensuring the data in the system factor register is preserved. However, if the card is damaged, whether intentionally or unintentionally causing a power outage, the data in the system factor register will be lost. Upon power-up, the card will malfunction due to the missing critical data and will automatically retest the card's pressure, temperature, and brightness parameters. If any of these parameters are abnormal, the card is considered at risk of being damaged, and a damage warning flag is set.

[0068] like Figure 2 As shown in the illustration, as an embodiment, the tamper-proof protection function of the active video card with tamper-proof protection in this application includes:

[0069] 1. The visual card APP program has an anti-tampering factor detection function during operation and sleep mode:

[0070] The anti-tampering factor detection function is mainly implemented by a combination of corresponding hardware detection circuits, interrupt response function within the MCU chip, and AD conversion data acquisition program.

[0071] 2. The visual card boot program has a built-in anti-tamper protection function:

[0072] The anti-tamper protection function is mainly achieved by the custom BOOT startup program built into the visual card for power-on and reset.

[0073] Specifically, the tamper protection function of the active visual card with tamper protection in this application is implemented in the following ways:

[0074] (1) The active visual card with anti-tamper protection can respond to tamper factors (e.g., external cutting pressure, external temperature, light intensity, chemical melting tampering) and perform tamper factor parameter detection (e.g., temperature, brightness, pressure) in real time, regardless of whether the card is in working or dormant state. When the card is in an abnormal state, the active visual card is woken up and activated in real time through system interruption to enter the corresponding function program for status identification and processing. If the risk of tampering is confirmed, a tamper warning sign is set.

[0075] (2) When the active visual card is set with a tamper warning sign, the tamper protection function is activated. The relevant protection functions and processes are as follows:

[0076] I. Once the active visual card tamper protection is activated, the MCU chip will interrupt the current data processing and related transaction operations; clear sensitive data such as data and keys in the current transaction; and automatically reset and restart the MCU chip.

[0077] II. After the active visual card is reset and restarted, the MCU chip enters the pre-set visual card boot program (visual card startup program). The visual card boot program will first detect the pressure parameters, temperature parameters, and brightness parameters of the visual card, and verify the anti-tampering factor parameters with the default parameter data in the system factor register: if the current relevant detection parameters (e.g., temperature parameters, brightness parameters, pressure parameters) are within the normal range, it is confirmed as a false alarm, and the MCU chip re-enters the visual card application (APP) program; if the current relevant detection parameters exceed the set normal parameter values ​​or the system factor register data is lost, it is confirmed that the card has been tampered with.

[0078] III. After confirming that the card has been damaged, the visual card boot program will clear the sensitive data, application program and authorization key in the MCU chip application firmware parameter area; at the same time, it will send the agreed protection command to the SE chip. After receiving the command, the SE chip will destroy the sensitive data and self-destruct.

[0079] IV. After the visual card boot program completes the erasure of data in the critical area, the visual card APP program is then erased and the data is destroyed. After verifying that the erasure is completed, the BOOT configuration parameters of the MCU chip are modified to set the default reset boot area to SRAM (Static Random Access Memory). After the visual card boot program erases and self-destructs, the MCU chip is reset.

[0080] Specifically, the BOOT boot mode includes, but is not limited to, three modes: Bootloader, Userflash, and SRAM. The default boot mode is set by the BOOT0 to BOOTn status bits. In this application, the preferred mode is to boot from User flash by default, that is, to boot from the user program.

[0081] (3) After the MCU chip is reset again, since the MCU chip program has been erased and no executable program is loaded in the SRAM area it points to, the MCU chip is essentially locked, thus rendering the entire circuit ineffective.

[0082] This application, based on the characteristics of the active visual card and the possible methods of its dismantling (e.g., physical cutting, heating, or chemical melting, etc., for disassembly, copying, and other illegal operations), uses a constructed circuit (i.e., card pressure parameter detection circuit, card temperature parameter detection circuit, card brightness parameter detection circuit, card system factor register) to detect changes in environmental parameters (e.g., temperature, brightness, pressure parameters) that inevitably occur during the dismantling process. Upon confirmation of dismantling, it takes corresponding protection and self-destruction measures (e.g., destroying sensitive data within the card, erasing application firmware, locking circuit functions, etc.) to maximize the protection of the data and firmware within the active visual card, preventing the theft or copying of important and sensitive data. This achieves the security protection objectives of preventing theft, dismantling, cracking, and copying of the active visual card when it is illegally dismantled.

[0083] The active video card with tamper protection proposed in this application can avoid the risks of theft, tampering, cracking, and copying when the active video card is illegally tampered with.

[0084] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the scope of protection of this application is intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application. Obviously, those skilled in the art can make various alterations and variations to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of protection of this application and its equivalents, this application also intends to include these modifications and variations.

Claims

1. An active video card with tamper-proof protection, characterized in that, include: The card includes a printed surface layer, an FPC flexible circuit board, a printed bottom layer, and an anti-tampering factor detection circuit for detecting the actual environmental parameters of the active visual card. The anti-tampering factor detection circuit is mounted on the FPC flexible circuit board, which has a power supply (VCC), an MCU chip, and an SE chip. The MCU chip has a card system factor register for storing default environmental parameter thresholds and system keys. The card system factor register is connected to the internal bus of the MCU chip. The power supply is connected to the MCU chip, the anti-tampering factor detection circuit, and the card system factor register. The MCU chip is electrically connected to the anti-tampering factor detection circuit and the card system factor register. The anti-tampering factor detection circuit includes: a card pressure parameter detection circuit for detecting card pressure parameters, a card temperature parameter detection circuit for detecting card temperature parameters, and a card brightness parameter detection circuit for detecting card brightness parameters. The card pressure parameter detection circuit is connected to the first interface (S_Test) of the MCU chip. The card temperature parameter detection circuit is connected to the second IO pin (V_Test) of the MCU chip; The card brightness parameter detection circuit is connected to the third IO pin (P_Test) of the MCU chip; When the electrical signals output by the card pressure parameter detection circuit, card temperature parameter detection circuit, and card brightness parameter detection circuit cause a level transition on the corresponding IO pin, the MCU chip is triggered to interrupt the current operation.

2. The active visual card with tamper-proof protection according to claim 1, characterized in that, The card pressure parameter detection circuit includes: a piezoelectric thin film sensor, an input pair and a voltage divider resistor (Rs) for the input pair, wherein the input pair consists of a first MOSFET (Qs1) and a second MOSFET (Qs2); The piezoelectric thin film sensor is coupled between ground and the power supply, and the piezoelectric thin film sensor is connected to the first interface (S_Test) of the MCU chip through an input pair. The piezoelectric thin film sensor includes: a first voltage divider resistor (Rc), a second voltage divider resistor (Rb), a first piezoelectric resistor (Rd), and a second piezoelectric resistor (Ra). The first voltage divider resistor (Rc), the second voltage divider resistor (Rb), the first piezoelectric resistor (Rd), and the second piezoelectric resistor (Ra) form a bridge circuit. The first piezoelectric resistor (Rd) is a first piezoelectric sheet or a first piezoelectric thin film, and the second piezoelectric resistor (Ra) is a second piezoelectric sheet (Ra) or a second piezoelectric thin film. The first voltage divider resistor (Rc) and the first piezoelectric resistor (Rd) are connected in series to form the first voltage divider circuit, the second voltage divider resistor (Rb) and the second piezoelectric resistor (Ra) are connected in series to form the second voltage divider circuit, and the first voltage divider circuit and the second voltage divider circuit are connected in parallel between the power supply (VCC) and ground. The first voltage divider circuit is connected to the gate of the first MOSFET (Qs1), and the second voltage divider circuit is connected to the gate of the second MOSFET (Qs2). The drain of the first MOSFET (Qs1) and the drain of the second MOSFET (Qs2) are electrically connected to the power supply (VCC) through a voltage divider (Rs). The source of the first MOSFET (Qs1) and the source of the second MOSFET (Qs2) are electrically connected to ground.

3. The active visual card with tamper-proof protection according to claim 2, characterized in that, The first voltage divider circuit is located on the front side of the FPC flexible circuit board, and the second voltage divider circuit is located on the back side of the FPC flexible circuit board.

4. The active visual card with tamper-proof protection according to claim 2, characterized in that, The piezoelectric thin film sensor uses flexible PVDF material.

5. The active visual card with tamper-proof protection according to claim 1, characterized in that, The card temperature parameter detection circuit includes: a first voltage divider clamping resistor (Rv1) and a thermistor (Rv2); One end of the first voltage divider clamping resistor (Rv1) is grounded; the other end of the first voltage divider clamping resistor (Rv1) is connected to one end of the thermistor (Rv2) and the second IO pin (V_Test) of the MCU chip. One end of the thermistor (Rv2) is connected to the second IO pin (V_Test) of the MCU chip; the other end of the thermistor (Rv2) is connected to the power supply (VCC).

6. The active visual card with tamper-proof protection according to claim 5, characterized in that, The resistance of the thermistor (Rv2) is greater than the resistance of the first voltage divider clamping resistor (Rv1). The resistance of the thermistor (Rv2) is nK, 100K. <nK<110K。 7. The active video card with tamper-proof protection according to claim 5, characterized in that, The resistance value of the first voltage divider clamping resistor (Rv1) is mK, 10K. <mK<20K。 8. The active visual card with tamper-proof protection according to claim 1, characterized in that, The card brightness parameter detection circuit includes: a photodiode (Dp) and a second voltage divider clamping resistor (Rp); In this design, the cathode of the photodiode (Dp) is connected to the power supply (VCC); The anode of the photodiode (Dp) is connected to one end of the second voltage divider clamping resistor (Rp) and the third IO pin (P_Test) of the MCU chip; One end of the second voltage divider clamping resistor (Rp) is connected to the third IO pin (P_Test) of the MCU chip, and the other end of the second voltage divider clamping resistor (Rp) is grounded.

9. The active video card with tamper-proof protection according to claim 8, characterized in that, The resistance value of the voltage divider clamping resistor (Rp) is iK, 10K. <iK<20K。