Multi-interface automatic switching charge-discharge intelligent test system

Abstract

The utility model discloses a kind of multi-interface automatic switching charge-discharge intelligent test system, comprising: main control circuit, power supply circuit, communication interface circuit, test data acquisition circuit and the test channel matrix consisting of multiple test channels, the battery to be tested is placed in the test channel matrix, the power supply circuit is used to power supply entire system, the main control circuit is connected with the first end of the communication interface circuit, the second end of the communication interface circuit is respectively connected with the test data acquisition circuit and the first end of the test channel matrix, the second end of the test channel matrix is connected with the second end of the test data acquisition circuit through rectifier circuit. The charge-discharge intelligent test system in the utility model embodiment can realize the synchronous test of multiple different types of batteries, and the structure is simple.

Description

Technical Field

[0001] This utility model relates to the field of battery testing, specifically to a multi-interface automatic switching intelligent charging and discharging testing system. Background Technology

[0002] A complete charge / discharge test circuit typically consists of a main charge / discharge circuit, a control unit, a detection unit, a protection unit, and a load / power supply module.

[0003] Taking the lithium battery constant current-constant voltage (CC-CV) charge-discharge test circuit as an example: the power supply module is a programmable DC power supply, which provides energy for charging; the electronic load is a programmable electronic load, which consumes energy during discharge; the control unit uses an STM32F103 MCU to execute the CC-CV charging strategy and the constant current discharging strategy; the detection unit includes a shunt resistor, a voltage divider resistor and an NTC temperature sensor; the main circuit includes two N-channel MOSFETs (IRF3205), which control the on / off state of the charging and discharging circuits respectively.

[0004] However, existing charge and discharge test circuits cannot perform simultaneous testing for multiple battery types. Utility Model Content

[0005] This utility model proposes a multi-interface automatic switching intelligent charging and discharging test system, which aims to solve the problem that existing charging and discharging test circuits cannot perform charging and discharging tests on multiple types and specifications of batteries.

[0006] The technical solution adopted in this utility model is as follows:

[0007] A multi-interface automatic switching charge / discharge intelligent testing system is characterized by comprising: a main control circuit, a power supply circuit, a communication interface circuit, a test data acquisition circuit, and a test channel matrix composed of multiple test channels. The battery to be tested is placed in the test channel matrix. The power supply circuit is used to power the entire system. The main control circuit is connected to the first end of the communication interface circuit. The second end of the communication interface circuit is connected to both the test data acquisition circuit and the first end of the test channel matrix. The second end of the test channel matrix is ​​connected to the second end of the test data acquisition circuit via a rectifier circuit.

[0008] Furthermore, the test channel matrix is ​​a switching network composed of multiple sets of relays, with each set of relays connected to a diode; the rectifier circuit consists of a full-bridge rectifier circuit, a high-voltage capacitor, and an adjustment circuit, with the first terminal of the full-bridge rectifier circuit connected to the first high-voltage capacitor, and the second terminal of the full-bridge rectifier circuit connected to the second high-voltage capacitor and the adjustment circuit, which consists of an adjustable resistor and a fast recovery diode; the test data acquisition circuit consists of two sets of test circuits.

[0009] Furthermore, the input terminal of the test data acquisition circuit is connected to the second terminal of the full-bridge rectifier circuit, and the output terminal of the test data acquisition circuit is connected to the second terminal of the communication interface circuit.

[0010] The first set of test circuits in the test data acquisition circuit consists of a first voltage transformer, a first Zener diode, a first operational amplifier circuit, a first digital-to-analog converter circuit, a first filter circuit, a second operational amplifier circuit, and a first limiting filter circuit. The first terminal of the first voltage transformer is connected to a first AC voltage. The second terminal of the first voltage transformer is connected to the first terminal of the first operational amplifier circuit through the first Zener diode. The second terminal of the first operational amplifier circuit is connected to the first terminal of the first digital-to-analog converter circuit. The second terminal of the first digital-to-analog converter circuit is connected to the first terminal of the second operational amplifier circuit through the first filter circuit. The second terminal of the second operational amplifier circuit is connected to the first limiting filter circuit.

[0011] Furthermore, the second set of test circuits in the test data acquisition circuit consists of a second voltage transformer, a second Zener diode, a third operational amplifier circuit, a second digital-to-analog converter circuit, a second filter circuit, a fourth operational amplifier circuit, and a second limiting filter circuit. The first terminal of the second voltage transformer is connected to the second AC voltage, the second terminal of the second voltage transformer is connected to the first terminal of the third operational amplifier circuit via the second Zener diode, the second terminal of the third operational amplifier circuit is connected to the first terminal of the second digital-to-analog converter circuit, the second terminal of the second digital-to-analog converter circuit is connected to the first terminal of the fourth operational amplifier circuit via the second filter circuit, and the second terminal of the fourth operational amplifier circuit is connected to the second limiting filter circuit.

[0012] Furthermore, the power supply circuit is connected to two sets of indicator circuits, each of which consists of a light-emitting diode and a current-limiting resistor.

[0013] The power supply circuit consists of an external power supply, a third filter circuit, a positive voltage linear regulator, a low dropout linear regulator, and a fourth filter circuit. The external power supply is connected to the positive voltage linear regulator through the third filter circuit. The positive voltage linear regulator is connected to the low dropout linear regulator through a filter capacitor. The low dropout linear regulator is connected to the fourth filter circuit.

[0014] Furthermore, the communication interface circuit comprises a signal transceiver, a transmission control circuit, a bus protection circuit, and a bus interface circuit. The first end of the signal transceiver is connected to the transmission control circuit, the second end of the signal transceiver is connected to the bus protection circuit, and the bus protection circuit is connected to the bus interface circuit.

[0015] Furthermore, the transmission control circuit is composed of a transistor and a protection resistor; the bus protection circuit includes a signal pull-up circuit and a signal pull-down circuit, the signal pull-up circuit is composed of a first transient suppression diode and a first current-limiting resistor, and the signal pull-down circuit is composed of a second transient suppression diode and a second current-limiting resistor; the bus interface circuit is composed of a matching resistor and a connector.

[0016] The technical solution in this embodiment of the utility model constructs multiple test channels into a test channel matrix and establishes a connection with the main control circuit through a communication interface circuit to receive control commands issued by the main control circuit. At the same time, the test channel matrix is ​​connected to the test data acquisition circuit, which is also connected to the main control circuit through a communication interface circuit to send the acquired test data to the main control circuit, thus efficiently completing the synchronous testing task of multi-interface batteries and improving the efficiency of battery testing. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the charging and discharging intelligent testing system provided according to an embodiment of the present utility model;

[0019] Figure 2 This is a circuit diagram of the main control circuit of the intelligent charging and discharging test system provided according to an embodiment of the present utility model;

[0020] Figure 3 This is a circuit diagram of the rectifier circuit of the intelligent charging and discharging test system provided according to an embodiment of the present utility model;

[0021] Figure 4 This is a circuit diagram of the indicator circuit of the intelligent charging and discharging test system provided according to an embodiment of the present utility model;

[0022] Figure 5 This is a circuit diagram of the communication interface circuit of the intelligent charging and discharging test system provided according to an embodiment of the present utility model;

[0023] Figure 6 This is a circuit diagram of the test channel matrix of the intelligent charging and discharging test system provided according to an embodiment of the present invention;

[0024] Figure 7This is a circuit diagram of the test data acquisition circuit of the charging and discharging intelligent testing system provided according to an embodiment of the present utility model;

[0025] Figure 8 This is a circuit diagram of the power supply circuit of the intelligent charging and discharging test system provided according to an embodiment of the present utility model;

[0026] Figure 9 This is a schematic diagram of the test data display interface provided according to an embodiment of the present utility model. Detailed Implementation

[0027] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.

[0028] It should be noted that the terms "first," "second," etc., used in the specification and claims of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0029] The terms "installation," "connection," and "linking" in the specification and claims of this utility model should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of these terms in this utility model in light of the specific circumstances.

[0030] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0031] See Figures 1 to 9 The multi-interface automatic switching charge and discharge intelligent test system in this embodiment includes: a main control circuit, a power supply circuit, a communication interface circuit, a test data acquisition circuit, and a test channel matrix composed of multiple test channels. The battery to be tested is placed in the test channel matrix. The power supply circuit is used to supply power to the entire system. The main control circuit is connected to the first end of the communication interface circuit. The second end of the communication interface circuit is connected to both the test data acquisition circuit and the first end of the test channel matrix. The second end of the test channel matrix is ​​connected to the second end of the test data acquisition circuit through a rectifier circuit.

[0032] The main control circuit is responsible for processing input signals, executing program instructions, and controlling outputs. It includes a power supply, a crystal oscillator circuit, and a reset circuit. The power supply section provides the chip's operating voltage via +VCC and uses a voltage regulator capacitor for filtering, stabilizing the voltage and reducing interference from voltage fluctuations. GND is the power supply ground, providing a reference potential for the circuit. The crystal oscillator circuit consists of a crystal (Y0) and related capacitors, providing the clock signal to the microcontroller. The clock signal acts as a "metronome" for the microcontroller's normal operation and instruction execution, determining its operating speed. The reset circuit restores the microcontroller to its initial state when needed, ensuring stable system startup or resetting in case of abnormalities.

[0033] Furthermore, the test channel matrix is ​​a switching network composed of multiple sets of relays, with each set of relays connected to a diode; the rectifier circuit consists of a full-bridge rectifier circuit, a high-voltage capacitor, and an adjustment circuit. The first terminal of the full-bridge rectifier circuit is connected to the first high-voltage capacitor, and the second terminal of the full-bridge rectifier circuit is connected to the second high-voltage capacitor and the adjustment circuit. The adjustment circuit consists of an adjustable resistor and a fast recovery diode; the test data acquisition circuit consists of two sets of test circuits.

[0034] Relays are used to trigger operations based on system control commands, inputting specific electrical signals (usually low level or level changes) to connected chips (such as microcontrollers, programmable logic devices, etc.) as the system's input signal source. LEDs are used to display the system's feedback button operation results. When the chip outputs the corresponding control signal, the LED is lit or turned off, providing a visual status indication. The relay, LED, and core control chip are connected via pins, and pull-up / pull-down resistors, driver circuits, etc., can also be connected to ensure stable signal input and normal LED driving display.

[0035] Furthermore, the input terminal of the test data acquisition circuit is connected to the second terminal of the full-bridge rectifier circuit, and the output terminal of the test data acquisition circuit is connected to the second terminal of the communication interface circuit.

[0036] The first set of test circuits in the test data acquisition circuit consists of a first voltage transformer, a first Zener diode, a first operational amplifier circuit, a first digital-to-analog converter circuit, a first filter circuit, a second operational amplifier circuit, and a first limiting filter circuit. The first terminal of the first voltage transformer is connected to the first AC voltage. The second terminal of the first voltage transformer is connected to the first terminal of the first operational amplifier circuit through the first Zener diode. The second terminal of the first operational amplifier circuit is connected to the first terminal of the first digital-to-analog converter circuit. The second terminal of the first digital-to-analog converter circuit is connected to the first terminal of the second operational amplifier circuit through the first filter circuit. The second terminal of the second operational amplifier circuit is connected to the first limiting filter circuit.

[0037] Furthermore, the second set of test circuits in the test data acquisition circuit consists of a second voltage transformer, a second Zener diode, a third operational amplifier circuit, a second digital-to-analog converter circuit, a second filter circuit, a fourth operational amplifier circuit, and a second limiting filter circuit. The first terminal of the second voltage transformer is connected to the second AC voltage. The second terminal of the second voltage transformer is connected to the first terminal of the third operational amplifier circuit through the second Zener diode. The second terminal of the third operational amplifier circuit is connected to the first terminal of the second digital-to-analog converter circuit. The second terminal of the second digital-to-analog converter circuit is connected to the first terminal of the fourth operational amplifier circuit through the second filter circuit. The second terminal of the fourth operational amplifier circuit is connected to the second limiting filter circuit.

[0038] The test data acquisition circuit connects to sensors or other signal sources for signal input. Using diodes and other components, it modulates the raw input signal (such as AC signals or signals containing interference) into a form more suitable for subsequent circuit processing. The operational amplifier circuit near the input performs signal amplification, filtering, and comparison functions, adjusting the amplitude of the pre-processed signal, filtering noise, and extracting specific signal features. The digital-to-analog converter (DAC) circuit converts analog signals to digital signals and provides electrical isolation to prevent interference between different circuit modules, ensuring system stability. The operational amplifier circuit near the output amplifies the processed signal to sufficient power to drive subsequent actuators.

[0039] Furthermore, the power supply circuit is connected to two sets of indicator circuits, which consist of light-emitting diodes and current-limiting resistors;

[0040] The power supply circuit consists of an external power supply, a third filter circuit, a positive voltage linear regulator, a low dropout linear regulator, and a fourth filter circuit. The external power supply is connected to the positive voltage linear regulator through the third filter circuit. The positive voltage linear regulator is connected to the low dropout linear regulator through a filter capacitor. The low dropout linear regulator is connected to the fourth filter circuit.

[0041] The external power supply is +12V. Combined with the filter capacitors in the filtering circuit, it provides power protection (overcurrent protection) and filtering (voltage stabilization, ripple reduction), ensuring a stable and safe input power for subsequent circuits. The positive voltage linear regulator uses a 78M05 chip, which converts the input +12V voltage to +5V (through chip parameter configuration and external components), providing different power supply voltages to subsequent circuits to meet the power supply needs of devices with multiple voltage levels. The low dropout linear regulator uses an LM1117 chip, which converts +5V to +3.3V, further powering devices with lower voltage requirements. The circuit also includes a distribution network for the +5V and +3.3V power supplies (such as multiple capacitor filters and pin connections), providing stable power to multiple loads (such as chips and peripherals).

[0042] Furthermore, the communication interface circuit consists of a signal transceiver, a transmission control circuit, a bus protection circuit, and a bus interface circuit. The first end of the signal transceiver is connected to the transmission control circuit, the second end of the signal transceiver is connected to the bus protection circuit, and the bus protection circuit is connected to the bus interface circuit.

[0043] Furthermore, the transmission control circuit consists of a transistor and a protection resistor; the bus protection circuit includes a signal pull-up circuit and a signal pull-down circuit, the signal pull-up circuit consists of a first transient suppression diode and a first current limiting resistor, and the signal pull-down circuit consists of a second transient suppression diode and a second current limiting resistor; the bus interface circuit consists of a matching resistor and a connector.

[0044] The transceiver uses the MAX1487 chip to realize differential signal transmission and reception on the RS485 bus. DE (transmit enable): When high, the chip enters transmit mode, converting the input TTL / CMOS level into an RS485 differential signal. RE (receive enable): When low, the chip enters receive mode, converting the RS485 differential signal into a TTL / CMOS level.

[0045] The transmit control circuit consists of a transistor and resistors to enable transmit control. The TX2 input control signal turns on the transistor, which in turn controls the DE pin of the MAX1487 to go high, putting the chip into transmit mode.

[0046] It should be noted that the system's battery charge / discharge test process is as follows: First, the system initializes and performs a self-test. Then, the battery under test is connected to the test system (the battery pack is woken up via the access wake-up interface, and identification is performed through the internal CAN communication network and identification module to distinguish between the master and slave devices). The initial parameters (voltage, current, and temperature) of the battery under test are read, and then the status of the battery under test is identified based on these initial parameters. If the voltage of the battery under test is too low or idle, the charging control loop is entered (the charging circuit relay is closed), and charging is performed using CC / CV mode. If the voltage of the battery under test is fully charged or needs to be tested, the discharging control loop is entered (the discharging circuit relay is closed), and constant current / constant power discharging is performed. Data is then collected and monitored in real time. In the charging control loop, when the battery under test reaches the charging stop condition, the charging circuit is disconnected, and the charging data is recorded. In the discharging control loop, when the battery under test reaches the discharging stop condition, the discharging circuit is disconnected, and the discharging data is recorded. Finally, if the number of cycles does not reach the preset number of cycles, the charge and discharge test cycles continue; when the number of cycles reaches the preset number of cycles, a complete test report is generated (the battery performance, such as charge and discharge efficiency, battery capacity, internal resistance and other parameters are evaluated based on the test results).

[0047] Through the above steps, the multi-interface automatic switching charge and discharge intelligent testing system can effectively conduct comprehensive performance testing of batteries, providing strong data support for battery research and development, production and quality control.

[0048] The following sections will provide a detailed description of each core module in the system. These core modules include: the main control and communication module, the multi-interface switching matrix module, the high-precision acquisition and monitoring module, the core charging and discharging module, the power supply and distribution module, and the intelligent software platform module.

[0049] In some embodiments, the main control and communication module supports multiple wireless and wired communications with the multi-interface switching matrix module, the high-precision acquisition and monitoring module, and the core charging and discharging module, respectively.

[0050] Main control and communication module: mainly responsible for running the core control logic and intelligent recognition algorithm, able to send control commands to other modules (such as "start charging" and "switch to channel 3"), receive data from the acquisition module, and communicate with the host computer.

[0051] The process of the main controller sending commands is as follows: First, the main controller and communication module are powered on, then the hardware and ports are initialized, and then it waits for control commands from the host computer. When a control command is received from the host computer, the command is parsed (e.g., "Start test channel 1"), and the corresponding command logic is executed; when data is received, the data is processed and analyzed, an intelligent recognition algorithm is run, and new commands are generated based on the algorithm's results. Finally, the main controller sends corresponding control commands to other modules and continues to wait for control commands from the host computer.

[0052] In some embodiments, the multi-interface switching matrix module is a complex switching network composed of relays (electromagnetic or solid-state). It can flexibly connect limited charging and discharging resources (one or several sets of core charging and discharging equipment) to a large number of battery interfaces (such as 32-channel or 64-channel) according to control commands issued by the master controller.

[0053] The process of switching the matrix to allocate charging and discharging resources is as follows: First, the switching matrix waits for control commands from the master controller, and then parses the control commands. If the parsed control command is "connect channel X", the required relay combination is calculated, the circuit is driven to close the target relay, and finally a "connection successful" status is fed back to the master controller; if the parsed control command is "disconnect channel X", the relay to be disconnected is calculated, the circuit is driven to reset, the target relay is disconnected, and finally a "disconnection successful" status is fed back to the master controller.

[0054] In some embodiments, the multi-interface switching matrix module includes: an interface intelligent identification unit, a physical interface identification unit, an electrical parameter identification unit, and a protocol adaptive unit. The interface intelligent identification unit is configured with the physical interface and electrical parameters of the battery under test; the physical interface identification unit is configured with the theoretical spacing and contact pressure of the battery under test; the electrical parameter identification unit is configured with the battery type and voltage level of the battery under test; and the protocol adaptive unit is configured with the BMS communication protocol of the battery under test.

[0055] The interface intelligent identification unit is used to automatically detect the battery's physical interface and electrical parameters (voltage range, communication protocol).

[0056] The physical interface recognition unit is used for mechanical self-adaptation, and the electric clamp adjusts the spacing and contact pressure (such as spring probe) according to the recognition result.

[0057] The electrical parameter identification unit is used to perform impedance spectrum analysis and open-circuit voltage detection. The impedance spectrum analysis includes determining the battery type by using a frequency sweep signal (1Hz-1kHz). The open-circuit voltage detection includes automatically matching the voltage range (0-5V / 0-60V).

[0058] The protocol adaptation unit is used to perform BMS communication protocol handshake and automatic protocol sniffing; BMS communication protocol handshake includes: support for CAN bus (SAE J1939), UART (Modbus), SMBus, etc.; automatic protocol sniffing includes: sending handshake signals and parsing response frames.

[0059] In this embodiment, the entire charge-discharge test process is as follows: First, the battery under test is connected to the multi-interface switching matrix module for interface type detection. If the interface type of the battery under test is a physical interface, the mechanical fixture is adaptively adjusted; if the interface type is an electrical interface, pin voltage / impedance scanning is performed. Then, a protocol handshake is performed. If the battery under test conforms to the BMS protocol, BMS data (SOC / SOH / temperature) is read; if the battery under test does not conform to the BMS protocol, default parameters are loaded. Then, a charge-discharge strategy is generated, the system is switched to the matching channel, and the test is started for real-time monitoring. If an abnormality occurs during monitoring, an emergency shutdown is performed and logs are recorded; if no abnormality occurs during monitoring, parameters are dynamically adjusted, and data is archived and a report is generated after the test is completed; real-time monitoring continues until the test is completed.

[0060] In this embodiment, multi-channel parallel testing can be performed using a matrix switch, enabling synchronous and independent testing of multiple batteries / modules. Safety interlocks are also implemented to prevent risks such as incorrect interface insertion, reverse connection, and overload.

[0061] In some embodiments, the high-precision acquisition and monitoring module is used to monitor the voltage, current, and temperature of each battery channel in real time. The accuracy and speed of its data acquisition determine the quality of control and the accuracy of test results. It is the data source for the system to perform "intelligent identification" and "safety protection".

[0062] In some embodiments, the high-precision acquisition and monitoring module includes a delay protection unit, an over / under voltage protection unit, an overcurrent protection unit, an overcapacity protection unit, an overtemperature protection unit, and a single-unit over / under voltage protection unit.

[0063] The delay protection unit is configured with the delay protection range of the battery under test;

[0064] The over / under voltage protection unit is configured with the voltage protection range of the battery under test;

[0065] The overcurrent protection unit is configured with the current protection range of the battery under test;

[0066] The overcapacity protection unit is configured with the capacitance protection range of the battery under test;

[0067] The over-temperature protection unit is equipped with the temperature protection range of the battery under test;

[0068] The single-cell over / under voltage protection unit is configured with the single-cell overvoltage protection range of the battery under test.

[0069] The data acquisition module performs the following process: First, the acquisition module is powered on and initialized. Then, the sensor parameters and sampling rate are configured. Next, the timed acquisition terminal is started. The terminal is triggered, reads the initial values ​​of voltage, current, and temperature, and performs data calibration and filtering. Finally, the data is packaged and sent to the main controller through the communication interface. At the same time, the data is compared with the safety threshold. If the data exceeds the threshold, an alarm is sent to the host computer and the main controller. If the data does not exceed the threshold, the timed acquisition terminal is kept running.

[0070] In some embodiments, the core charging and discharging module includes at least one charging circuit and at least one discharging circuit. The battery under test, at least one charging circuit, and a high-precision acquisition and monitoring module together constitute a charging test system; the battery under test, at least one discharging circuit, and a high-precision acquisition and monitoring module together constitute a discharging test system.

[0071] Core charging and discharging module: Includes charging mode and discharging mode. In charging mode, the charging and discharging module acts as a power source, delivering energy to the battery under test according to the set mode (constant current, constant voltage, constant power); in discharging mode, the charging and discharging module acts as a load, consuming the energy released by the battery under test (dissipative) or feeding it back to the grid (feedback, energy saving).

[0072] The charging and discharging module operates as follows: First, it waits for control commands from the main controller, then parses the corresponding commands. If the parsed command is "constant current charging," the power supply is set to CC mode, and the current value is set; if the command is "constant voltage charging," the power supply is set to CV mode, and the voltage value is set; if the command is "constant current discharging," the load is set to CR mode, and the current value is set. Next, it enables the output based on the set voltage or current value and monitors its own status (e.g., temperature, operating status). Finally, it waits for new control commands or monitors its own status in real time.

[0073] In some embodiments, the power supply and distribution module supports the low-voltage DC power required by the main control and communication module and the multi-interface switching matrix module; the power supply and distribution module also supports the high-voltage, high-power input power required by the core charging and discharging module.

[0074] Power supply and distribution module: Used to provide power to the entire test system, provide low-voltage DC power to the main control and relay drive circuits, and provide high-voltage, high-power input power to the charging and discharging module.

[0075] The power distribution module supplies power as follows: It connects to an external power source, then activates its internal AC / DC converter to output multiple stable DC voltages and continuously monitors the output voltage / current. When an abnormality is detected (such as overcurrent, overvoltage, or short circuit), a protection mechanism is triggered (such as output cut-off or alarm). When no abnormality is detected, the output voltage / current is continuously monitored.

[0076] In some embodiments, the intelligent software platform module is configured with test process configuration functions for creating, editing, and saving test recipes; the intelligent software platform module is also configured with real-time monitoring functions for displaying data curves and equipment status; the intelligent software platform module is also configured with data management functions for storing, querying, and exporting massive amounts of test data; the intelligent software platform module is also configured with intelligent analysis functions for automatically generating reports, calculating capacity, efficiency, and decay curves; and the intelligent software platform module is also configured with intelligent recognition algorithms for automatically judging and switching statuses.

[0077] Intelligent software platform module: Used for interaction between users and hardware systems. Its core functions include: test process configuration (creating, editing, and saving test recipes), real-time monitoring (displaying data curves and device status), data management (storing, querying, and exporting massive amounts of test data), intelligent analysis (automatically generating reports, calculating capacity, efficiency, and decay curves), and running intelligent recognition algorithms (achieving automatic status judgment and switching).

[0078] The user interaction process of the intelligent platform is as follows: First, the host computer software installed on the intelligent platform is launched to perform user login and permission verification. Users can select a test recipe or create a new test recipe on the main interface. Then, according to the test recipe, test parameter thresholds, processes, number of cycles, etc., are configured. Next, a control command to start the test is issued, and the lower-level machine data is received, parsed, and displayed in real time, and stored in the database. If it is determined that the current charge / discharge test is complete, the test is stopped, the corresponding test data is extracted from the database, an analysis report and charts are generated, and finally the report is exported and the system waits for a new test. If it is determined that the current charge / discharge test is not complete, the system continues to receive, parse, and display lower-level machine data in real time.

[0079] The multi-interface automatic switching charge and discharge intelligent test system in this embodiment can achieve efficient and highly compatible battery testing in the battery charge and discharge test system. It is especially suitable for automated testing scenarios of multiple battery types (such as cylindrical, square, and pouch), multiple specifications (voltage / capacity), and multiple protocols (BMS communication, charging standards).

[0080] The advantages of the multi-interface automatic switching charge / discharge intelligent testing system in this embodiment are mainly reflected in automation and intelligence, high precision and efficiency, and enhanced safety, thereby improving the efficiency and safety of battery testing. It can not only collect and analyze large amounts of test data in real time, but also automatically adjust test parameters, improving the reliability and repeatability of the test. Through precise monitoring and timely data feedback, it effectively reduces safety hazards and enhances product safety. During the test, once the set safety protection conditions are triggered, the multi-interface automatic switching charge / discharge test will be stopped, and the specific event will be recorded in the data file. After the user has eliminated abnormal factors, they can continue using the system for testing.

[0081] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A multi-interface automatic switching charge / discharge intelligent testing system, characterized in that, include: The system includes a main control circuit, a power supply circuit, a communication interface circuit, a test data acquisition circuit, and a test channel matrix consisting of multiple test channels. The battery to be tested is placed in the test channel matrix. The power supply circuit supplies power to the entire system. The main control circuit is connected to the first end of the communication interface circuit. The second end of the communication interface circuit is connected to both the test data acquisition circuit and the first end of the test channel matrix. The second end of the test channel matrix is ​​connected to the second end of the test data acquisition circuit via a rectifier circuit.

2. The testing system according to claim 1, characterized in that, The test channel matrix is ​​a switching network composed of multiple sets of relays, each set of relays being connected to a diode; the rectifier circuit consists of a full-bridge rectifier circuit, a high-voltage capacitor, and an adjustment circuit, with the first terminal of the full-bridge rectifier circuit connected to the first high-voltage capacitor, and the second terminal of the full-bridge rectifier circuit connected to the second high-voltage capacitor and the adjustment circuit, which consists of an adjustable resistor and a fast recovery diode; the test data acquisition circuit consists of two sets of test circuits.

3. The testing system according to claim 2, characterized in that, The input terminal of the test data acquisition circuit is connected to the second terminal of the full-bridge rectifier circuit, and the output terminal of the test data acquisition circuit is connected to the second terminal of the communication interface circuit. The first set of test circuits in the test data acquisition circuit consists of a first voltage transformer, a first Zener diode, a first operational amplifier circuit, a first digital-to-analog converter circuit, a first filter circuit, a second operational amplifier circuit, and a first limiting filter circuit. The first terminal of the first voltage transformer is connected to a first AC voltage. The second terminal of the first voltage transformer is connected to the first terminal of the first operational amplifier circuit through the first Zener diode. The second terminal of the first operational amplifier circuit is connected to the first terminal of the first digital-to-analog converter circuit. The second terminal of the first digital-to-analog converter circuit is connected to the first terminal of the second operational amplifier circuit through the first filter circuit. The second terminal of the second operational amplifier circuit is connected to the first limiting filter circuit.

4. The testing system according to claim 3, characterized in that, The second set of test circuits in the test data acquisition circuit consists of a second voltage transformer, a second Zener diode, a third operational amplifier circuit, a second digital-to-analog converter circuit, a second filter circuit, a fourth operational amplifier circuit, and a second limiting filter circuit. The first terminal of the second voltage transformer is connected to the second AC voltage. The second terminal of the second voltage transformer is connected to the first terminal of the third operational amplifier circuit through the second Zener diode. The second terminal of the third operational amplifier circuit is connected to the first terminal of the second digital-to-analog converter circuit. The second terminal of the second digital-to-analog converter circuit is connected to the first terminal of the fourth operational amplifier circuit through the second filter circuit. The second terminal of the fourth operational amplifier circuit is connected to the second limiting filter circuit.

5. The testing system according to claim 4, characterized in that, The power supply circuit is connected to two sets of indicator circuits, and the indicator circuit is composed of light-emitting diodes and current-limiting resistors. The power supply circuit consists of an external power supply, a third filter circuit, a positive voltage linear regulator, a low dropout linear regulator, and a fourth filter circuit. The external power supply is connected to the positive voltage linear regulator through the third filter circuit. The positive voltage linear regulator is connected to the low dropout linear regulator through a filter capacitor. The low dropout linear regulator is connected to the fourth filter circuit.

6. The testing system according to claim 5, characterized in that, The communication interface circuit consists of a signal transceiver, a transmission control circuit, a bus protection circuit, and a bus interface circuit. The first end of the signal transceiver is connected to the transmission control circuit, the second end of the signal transceiver is connected to the bus protection circuit, and the bus protection circuit is connected to the bus interface circuit.

7. The testing system according to claim 6, characterized in that, The transmission control circuit is composed of a transistor and a protection resistor; the bus protection circuit includes a signal pull-up circuit and a signal pull-down circuit, the signal pull-up circuit is composed of a first transient suppression diode and a first current limiting resistor, and the signal pull-down circuit is composed of a second transient suppression diode and a second current limiting resistor; the bus interface circuit is composed of a matching resistor and a connector.

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