Electroluminescent display device with a through-hole in the display area

Abstract

Electroluminescent display device comprising the following: a substrate (SUB) comprising a display area (AA) and a non-display area (IA) located near the display area (AA); a light-emitting diode (ED) in the display area (AA), wherein the light-emitting diode (ED) comprises a phosphor layer (EL); an encapsulation layer (130) on the light-emitting diode (ED), wherein the encapsulation layer (130) comprises a first inorganic encapsulation layer (PAS1), a second inorganic encapsulation layer (PAS2) and an organic encapsulation layer (PCL) arranged between the first inorganic encapsulation layer (PAS1) and the second inorganic encapsulation layer (PAS2); an upper passivation film (PAS) that is arranged on top of the second inorganic encapsulation layer (PAS2); a through-hole (TH) located within the display area (AA) to penetrate the substrate (SUB); an inner dam (DMI) surrounding the through hole (TH); a trench (TR) arranged between the inner dam (DMI) and the through hole (TH); a buffer film (BUF) on which a thin-film transistor (T) is arranged; wherein the buffer film (BUF) is arranged on an upper surface of the substrate (SUB) and extends below the inner dam (DMI) and trench (TR); a thin film layer comprising the first inorganic encapsulation layer (PAS1) and the second inorganic encapsulation layer (PAS2) and completely covering the inner dam (DMI) and trench (TR) in the display area (AA); wherein the trench (TR) has a recessed section which is recessed in such a way that it reaches an upper surface of the buffer film (BUF) between the through hole (TH) and the inner dam (DMI); and the luminescent layer (EL) is interrupted at the trench (TR).

Description

Background / Area of ​​the invention

[0001] The present invention relates to an electroluminescent display device with a through-hole in a display area and in particular to an electroluminescent display device which is provided with a device such as a camera hole for receiving light by passing through a substrate or with a through-hole into which an additional device passing through a substrate can be inserted and which is arranged in a display area. Discussion of the state of the art

[0002] Among display devices, an electroluminescent display is a self-illuminating device and has the advantage of a better viewing angle and contrast ratio than other display devices. Since the electroluminescent display does not require a separate backlight, it also offers the advantage of being thin and lightweight and having low energy consumption. Furthermore, an organic light-emitting display offers advantages over the electroluminescent display in that it can be operated with a low DC voltage, has a fast response time, and is inexpensive to manufacture.

[0003] The electroluminescent display device comprises several electroluminescent diodes. Each electroluminescent diode includes an anode electrode, a phosphor coating formed on the anode electrode, and a cathode electrode formed on the phosphor coating. When a high potential voltage is applied to the anode electrode and a low potential voltage is applied to the cathode electrode, holes in the anode electrode and electrons in the cathode electrode migrate to the phosphor coating, respectively. When holes and electrons in the phosphor coating combine, an exciton is formed during an excitation process, and light is generated due to the exciton's energy. The electroluminescent display device displays an image by electrically controlling the amount of light emitted by the phosphor coatings of the multiple electroluminescent diodes, which are arranged in banks.

[0004] Electroluminescent (EMI) indicators are used in various products across diverse fields due to their ultra-thin profile and excellent flexibility. However, EMIs are susceptible to water and oxygen. Therefore, a method for shielding against the ingress of water and oxygen is crucial to enable their application in various applications and their development as different types of indicators. In particular, when a through-hole is present within the indicator area, developing a structure that protects against water and oxygen penetration around the perimeter of the through-hole is essential.

[0005] US 2017 / 0031323A1 discloses an electroluminescent indicator device comprising a through-hole and a trench partially covered by one organic and two inorganic encapsulation layers. Summary

[0006] One object of the present invention is to provide an electroluminescent display device that maximizes the area of ​​a display region in which an additional device, such as a camera aperture for receiving light by passing through a substrate or a through-hole for providing components by extending through a substrate, is arranged in the display region for displaying an image. A further object of the present invention is to provide an electroluminescent display device with a structure that can prevent the ingress of water into a light-emitting diode of a display element that is arranged near a through-hole, even though the through-hole is provided within a display region.

[0007] The problem is solved by the features of the independent claims. Preferred embodiments are specified in the dependent claims.

[0008] To solve the above problems, an electroluminescent display device according to one embodiment of the present invention comprises a substrate having a display area and a non-display area located near the display area; a light-emitting diode in the display area; an encapsulation layer on the light-emitting diode; a through-hole arranged within the display area such that it penetrates the substrate; an inner dam surrounding the through-hole; a trench arranged between the inner dam and the through-hole; and an etch stopper arranged between the trench and the through-hole.

[0009] The electroluminescent display device may further comprise an insulating layer on which the etch stopper is arranged.

[0010] For example, the electroluminescent display device may further comprise the insulating layer arranged on the display area and extending under the inner dam and trench, except for the through-hole.

[0011] For example, the display area can include pixels that contain the LED for expressing image information and a driver for controlling the LED. The pixels can be arranged in a matrix. The through-hole can be an area where the substrate, LED, and driver are not provided.

[0012] For example, a luminescent layer can be arranged on the upper surface of the trench.

[0013] For example, a common dummy electrode can be placed on the dummy luminescent layer and come into contact with the side wall of the trench.

[0014] For example, the side wall of the trench may have a sawtooth shape due to a difference in the etch rate of thin film layers exposed on the side wall of the trench.

[0015] For example, the insulating layer can comprise a first insulating film and a second insulating film. An interval between the sidewalls defined by the first insulating film can be larger than an interval between the sidewalls defined by the second insulating film.

[0016] According to the invention, the electroluminescent display device further comprises a thin film layer covering the inner dam and the trench in the display area.

[0017] According to the invention, the encapsulation layer comprises a first inorganic encapsulation layer, a second inorganic encapsulation layer and an organic encapsulation layer arranged between the first and the second inorganic encapsulation layer.

[0018] According to the invention, the thin film layer comprises the first inorganic encapsulation layer and the second inorganic encapsulation layer.

[0019] For example, the thin film layer can also include a phosphor layer of the light-emitting diode.

[0020] For example, one end of the insulating layer can be positioned between one end of the thin film layer and one end of the through-hole.

[0021] For example, the end of the insulating layer can be positioned closer to the through-hole than an end of the etch stop. The end of the etch stop can be positioned closer to the through-hole than an end of the first inorganic encapsulation layer.

[0022] For example, the upper passivation film can cover a side surface of the etch stop next to the through-hole. The upper passivation film can also cover part of the upper surface of the etch stop.

[0023] For example, the upper passivation film can cover stepped sections formed by the thin film layer, the etch stopper, and the insulating layer.

[0024] For example, the upper passivation film can extend to one end of the through-hole.

[0025] For example, the phosphor layer may cover part of the etch stop in the display area and be separated at the trench. The first inorganic encapsulation layer and the second inorganic encapsulation layer may cover part of the etch stop in the display area. The top passivation film may cover the second inorganic encapsulation layer, the first inorganic encapsulation layer, a common electrode, the phosphor layer, and / or the etch stop.

[0026] For example, the thin film layer can cover part of the upper surface of the etch stopper.

[0027] For example, a touch electrode can be arranged on the upper passivation film. The touch electrode and the touch buffer film contained in a touch sensor can be arranged on the encapsulation layer. The touch electrode can be arranged on the touch buffer film in contact with the encapsulation layer. Alternatively, the touch electrode can be arranged on the encapsulation layer without the touch buffer film. In this case, the touch buffer film and the touch electrode are formed sequentially on the encapsulation layer. Then, an organic cover layer can be placed on the touch electrode.

[0028] For example, the etch stopper can be made of organic materials. Additionally, a dielectric contact film and / or the contact buffer film contained in the countercapacitance contact sensor with the first and second contact electrodes can be designed to extend to at least one of the inner dams.

[0029] In the electroluminescent display device according to the present invention, because the through-hole is provided in the display area, the area occupied by the non-display area is minimized and the area of ​​the display area is maximized. In the electroluminescent display device according to the present invention, because the trench is provided near the through-hole, the continuity of the luminescent layer is partially interrupted, thus preventing water from penetrating the LED. Furthermore, an upper passivation film is provided, covering a section of thin films etched in a portion of the through-hole, thereby preventing water or oxygen from penetrating a pixel area.Furthermore, exposed sections of the thin films deposited in the through-hole section are not arranged on the same vertical surface, but rather on several vertical surfaces spaced apart by a certain distance, thus providing a structure to improve the encapsulation and adhesion performance of the upper passivation film. In the electroluminescent display device according to the present invention, the applicability of the display device is high, and the display device can be applied to various products because a hole is provided in the display area that passes through the display panel.In the electroluminescent display device according to the present invention, the penetration and diffusion of external water and particles into the display element is prevented, although the hole passing through the display plate is formed in the display area, thereby ensuring the stability and durability of the product.

[0030] In addition to the effects of the present invention as mentioned above, further tasks and features of the present invention will be clearly apparent to those skilled in the art from the following description of the present invention. Brief description of the drawings

[0031] The accompanying drawings, which are included to facilitate a better understanding of the invention, are incorporated into and form part of this description, illustrate implementations of the invention and, together with the description, serve to explain the principles of embodiments of the invention. Fig. Figure 1 is a planar view showing an electroluminescent display device with a through-hole in a display area according to the present invention; Fig. Figure 2 is an enlarged plan view showing the structure of a through-hole arranged in a display area in an electroluminescent display device according to the present invention; Fig. Figure 3 is a cross-sectional view along line II' of Fig. 1, which represents a structure of a section in which a through-hole is arranged in an electroluminescent display device according to a first embodiment of the present invention; Fig. 4 is a cross-sectional view along line II-II' of Fig. 1, which represents a structure of a boundary section of a display area and a non-display area in the electroluminescent display device according to the first embodiment of the present invention; Fig. Figure 5 is an enlarged cross-sectional view, specifically showing a trench section in the first embodiment of the present invention; Fig. Figure 6 is a cross-sectional view along line II' of Fig. 1, which represents a structure of a section in which a through-hole is arranged in an electroluminescent display device according to a second embodiment of the present invention; and Fig. Figure 7 is a cross-sectional view along line II' of Fig. 1, showing a structure of a section in which a through-hole is arranged in an electroluminescent display device according to a third embodiment of the present invention. Detailed description of the invention

[0032] The advantages and features of the present invention and its implementation methods are illustrated by the following embodiments, which are described with reference to the accompanying drawings. However, the present invention can be implemented in various forms and should not be considered limited to the embodiments presented here. Rather, these embodiments are provided to ensure that this invention is thorough and complete and to fully convey its scope to those skilled in the art. Furthermore, the present invention is defined only by the scope of protection of the claims.

[0033] Shapes, sizes, ratios, angles, and numbers disclosed in the drawings to describe embodiments of the present invention are merely examples, and therefore the present invention is not limited to the details shown. The same reference numerals refer to the same elements throughout the description. If it is determined that a detailed description of the relevant known function or configuration would unnecessarily obscure the essential point of the present invention in the following description, the detailed description will be omitted.

[0034] In a case where the terms "comprise," "have," and "exhibit," as described in the present invention, are used, a further part may be added unless "only" is used. Singular terms may include plural forms unless otherwise specified.

[0035] When designing an element, the element is designed to include an error area, even though there is no explicit description.

[0036] For example, when describing a positional relationship, if the positional relationship is described as "on", "above", "below" and "next to", one or more sections may be placed between two other sections unless "only" or "directly" is used.

[0037] When a positional relationship such as "on", "above", "below", "below" or the like is used, especially when describing the mutual positional relationship of a first element in relation to a second element, such an expression is not to be understood as being limited to an absolute orientation of these first and second elements in space, but only as describing relative orientations of the first and second elements to each other.

[0038] When describing a temporal relationship, for example, if the temporal sequence is described as "after", "subsequently", "next" and "before", a case that is not continuous may be included unless "only" or "directly" is used.

[0039] It is understood that, although the terms "first", "second", etc. may be used herein to describe different elements, these elements are not intended to be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element could be referred to as a second element, and likewise a second element could be referred to as a first element, without altering the scope of the present invention.

[0040] The term "at least one" should be understood to encompass all combinations of one or more of the associated listed elements. For example, the meaning of "at least one of a first element, a second element, and a third element" refers to combinations of all proposed elements consisting of two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0041] Features of different embodiments of the present invention can be partially or completely coupled or combined with one another and can interact and be controlled in various ways, as those skilled in the art can readily understand. The embodiments of the present invention can be implemented independently of one another or can be implemented together in a dependent relationship.

[0042] An example of an electroluminescent display device according to the present invention is described in detail below with reference to the accompanying drawings. Wherever possible, the same reference numerals are used in all drawings to refer to the same or similar parts.

[0043] An electroluminescence indicator device according to the present invention is described in detail below with reference to the accompanying drawings. Fig. Figure 1 is a planar view showing an electroluminescent display device with a through-hole in a display area according to the present invention. All components of the electroluminescent display device according to all embodiments of the present invention are operationally coupled and configured.

[0044] With reference to Fig. 1 The electroluminescence display device according to the present invention comprises a substrate SUB, a pixel P, a common power line CPL, an outer dam DMO, drive sections PP 200 and 300 and a through hole TH.

[0045] The substrate SUB is a base substrate (or base layer) and contains a plastic or glass material. Considering the properties of a display device, it is preferred that the substrate SUB be transparent. However, as may be the case, for example, with an upward-emitting display device, an opaque material can be used as the substrate SUB.

[0046] The substrate SUB, according to an example, can have a rectangular shape in a plane, a rounded rectangular shape whose corner sections are rounded with a specific radius of curvature, or a non-rectangular shape with at least six sides. In this case, the non-rectangular substrate SUB can have at least one projection or at least one notched section.

[0047] The substrate SUB, as in an example, can be divided into a display area AA and a non-display area. The display area AA is provided across most of the central sections of the substrate SUB and can be defined as an area for displaying an image. The display area AA, as in an example, can have a rectangular shape in a plane, a rounded rectangular shape whose corner sections are rounded with a specific radius of curvature, or a non-rectangular shape with at least six sides. In this case, the non-rectangular display area AA can have at least one projection or at least one notch section.

[0048] The non-display area is provided on a boundary region of the substrate SUB such that it surrounds the display area AA, and can be defined as an area where an image is not displayed or as a boundary region. The non-display area IA according to an example can include a first non-display area IA1, provided on a first edge of the substrate SUB; a second non-display area IA2, provided on a second edge of the substrate SUB parallel to the first non-display area IA1; a third non-display area IA3, provided on a third edge of the substrate SUB; and a fourth non-display area IA4, provided on a fourth edge of the substrate SUB parallel to the third non-display area IA3.For example, the first non-display area IA1 can be, but is not limited to, a lower (or upper) edge region of the substrate SUB; the second non-display area IA2 can be, but is not limited to, an upper (or lower) edge region of the substrate SUB; the third non-display area IA3 can be, but is not limited to, a left (or right) edge region of the substrate SUB; and the fourth non-display area IA4 can be, but is not limited to, a right (or left) edge region of the substrate SUB. For the sake of simplicity, the first through fourth non-display areas can be referred to as "non-display areas" without being explicitly designated as non-display areas of a specific region. In this case, the non-display areas can be marked with the reference symbol "IA".

[0049] Pixel P is located on the display area AA of the substrate SUB. Pixel P can consist of multiple pixels arranged in a matrix, as in one example, and can be located within the display area AA of the substrate SUB. Pixel P can be located in any of the areas defined by scan lines SL, data lines DL, and pixel drive power lines PL.

[0050] The scanning line SL extends longitudinally along a first direction X and is arranged at specific intervals along a second direction Y that intersects the first direction X. The display area AA of the substrate SUB has multiple scanning lines SL spaced apart along the second direction Y, parallel to the first direction X. In this case, the first direction X can be defined as the horizontal direction of the substrate SUB, and the second direction Y can be defined as the vertical direction of the substrate SUB, or vice versa.

[0051] The data line DL extends longitudinally along the second direction Y and is arranged at specific intervals along the first direction X. The display area AA of the substrate SUB has several data lines DL spaced apart from each other along the first direction X parallel to the second direction Y.

[0052] The pixel drive power line PL can be arranged on the substrate SUB so that it is parallel to the data line DL. The display area AA of the substrate SUB has several pixel drive power lines PL parallel to the data lines DL. Optionally, the pixel drive power lines PL can be arranged so that they are parallel to the scan lines SL.

[0053] A unit pixel can contain a red subpixel, a green subpixel, and a blue subpixel. Additionally, a unit pixel can also contain a white subpixel. The pixels P can be arranged, as shown in an example on the display area AA, to form a striped pattern. A striped pattern means that subpixels of the same color are arranged continuously in a row or column, and subpixels of different colors are arranged alternately. For example, the red subpixels can be arranged to form a first column, the green subpixels can be arranged to form a second column, the blue subpixels can be arranged to form a third column, and a red column, a green column, and a blue column can be repeated.

[0054] According to another example, the pixels P on the display area AA can be arranged to have a Pentile structure. In this case, a unit pixel can comprise at least one red subpixel, at least two green subpixels, and at least one blue subpixel, arranged two-dimensionally in a polygonal shape. For example, a unit pixel with a Pentile structure can be arranged such that one red subpixel, two green subpixels, and one blue subpixel have an octagonal shape in two dimensions. In this case, the blue subpixel can have an aperture (or light-emitting area) that is relatively the largest, and the green subpixel can have an aperture that is relatively the smallest. In the following description, "pixel" may not be identified as either a unit pixel or a subpixel. For simplicity, a subpixel may be described as a "pixel."

[0055] The pixel P can comprise a pixel circuit PC, which is electrically connected to its adjacent scanning line SL, data line DL and pixel drive power line PL, and a light-emitting diode ED, which is electrically connected to the pixel circuit PC.

[0056] The pixel circuit PC controls a data stream Ied flowing from the pixel drive power line PL to the light-emitting diode ED, based on a data voltage supplied by its adjacent data line DL in response to a sampling signal supplied by at least one adjacent sampling line SL.

[0057] The pixel circuit PC can, according to one example, comprise at least two thin-film transistors and a capacitor. For example, the pixel circuit PC can include a driving thin-film transistor that supplies the data stream Ied to the light-emitting diode ED based on the data voltage, a switching thin-film transistor that supplies the data voltage supplied by the data line DL to the driving thin-film transistor, and a capacitor that stores a gate-source voltage of the driving thin-film transistor.

[0058] The pixel circuit PC according to another example can include at least three thin-film transistors and at least one capacitor. For example, the pixel circuit PC according to another example can include a power supply circuit, a data supply circuit, and a compensation circuit according to an operation (or function) of each of the at least three thin-film transistors. In this case, the power supply circuit can include a driving thin-film transistor that supplies the data current Ied to the LED ED based on the data voltage. The data supply circuit can include at least one switching thin-film transistor that supplies the data voltage supplied by the data line DL to the power supply circuit in response to at least one sampling signal.The compensation circuit can include at least one compensation thin-film transistor that compensates for a change in a characteristic value (threshold voltage and / or mobility) of the driving thin-film transistor in response to at least one sampling signal.

[0059] The LED ED emits light using the data stream Ied supplied by the pixel circuit PC, in order to emit light with a luminance corresponding to the data stream Ied. In this case, the data stream Ied can flow from the pixel drive power line PL through the driving thin-film transistor and the LED ED to the common power line CPL.

[0060] The light-emitting diode ED can, according to one example, comprise an inorganic or an organic light-emitting diode. For example, the light-emitting diode ED can comprise a pixel driver electrode AE ​​(or a first electrode or anode) electrically connected to the pixel circuit PC, a phosphor layer EL formed on the pixel driver electrode, and a common electrode CE (or a second electrode or cathode) electrically connected to the phosphor layer.

[0061] The common power line CPL is located on the non-display area IA of the substrate SUB and electrically connected to the common display electrode CE, which is located on the display area AA. According to one example, the common power line CPL is arranged along the second to fourth non-display areas IA2, IA3, and IA4 adjacent to the display area AA of the substrate SUB, having a defined line width, and surrounds the remaining portion except for a section of the display area AA adjacent to the first non-display area IA1 of the substrate SUB. One end of the common power line CPL may be located on one side of the first non-display area IA1, and the other end of the common power line CPL may be located on the opposite side of the first non-display area IA1.One end and the other end of the common power line CPL can be arranged to surround the second to fourth non-display regions IA2, IA3, and IA4. Therefore, according to one example, the common power line CPL can have a two-dimensional "n" shape, one side of which is open, corresponding to the first non-display region IA1 of the substrate SUB.

[0062] The electroluminescent display device according to the present invention can further comprise an encapsulation layer for protecting the light-emitting diode ED. The encapsulation layer can be formed on the substrate SUB such that it surrounds a top surface and one side of the display area AA and the common power line CPL. Meanwhile, the encapsulation layer can expose one end and the other end of the CPL of the common power line in the first non-display area IA1. The encapsulation layer can prevent oxygen or water from penetrating the light-emitting diode ED provided in the display area AA. The encapsulation layer according to one example can comprise at least one inorganic film. The encapsulation layer according to another example can comprise several inorganic films and an organic film arranged between the several inorganic films.

[0063] The control section according to an embodiment of the present invention can comprise a contact point section PP, a gate control circuit 200 and an integrated control circuit 300.

[0064] The contact point section PP can have multiple contact points provided in the non-display area IA of the substrate SUB. For example, the contact point section can include multiple common power supply contact points, multiple data input contact points, multiple power supply contact points, and multiple control signal input contact points provided in the first non-display area IA1 of the substrate SUB.

[0065] The gate driver circuit 200 is provided in the third non-display area IA3 and / or the fourth non-display area IA4 of the substrate SUB and is connected in a one-to-one relationship to the sampling lines SL provided in the display area AA. The gate driver circuit 200 can be implemented as an integrated circuit in the third non-display area IA3 and / or the fourth non-display area IA4 of the substrate SUB, together with a pixel P fabrication process, i.e., a thin-film transistor fabrication process. The gate driver circuit 200 generates a sampling signal based on a gate control signal supplied by the integrated driver circuit 300 and outputs the sampling signal according to a given sequence, thereby driving each of the multiple sampling lines SL in a given sequence. The gate driver circuit 200 can, as in one example, include a shift register.

[0066] The outer dam DMO can have a closed-curve structure in which it is positioned in the first non-display area IA1, the second non-display area IA2, the third non-display area IA3, and the fourth non-display area IA4 of the substrate SUB such that it surrounds the perimeter of the display area AA. For example, the outer dam DMO can be located outside the common power line CPL and therefore be situated furthest out above the substrate SUB. Preferably, the contact point section PP and the integrated control circuit 300 are arranged in an outer area of ​​the outer dam DMO.

[0067] Although Fig. Figure 1 shows that the outer dam DMO is located furthest outwards; the outer dam DMO is not based on the example of Fig. 1 limited. As a further example, the outer dam DMO can be arranged between the common power line CPL and the gate drive circuit 200. As a further example, the outer dam DMO can be arranged between the display area AA and the gate drive circuit 200.

[0068] The integrated driver circuit 300 is formed in a chip assembly area defined in the first non-display area IA1 of the substrate SUB by a chip assembly process (bonding process). Input terminals of the integrated driver circuit 300 are directly connected to the contact point section PP and are therefore electrically connected to the multiple data lines DL and the multiple pixel drive power lines PL provided in the display area AA.The integrated driver circuit 300 receives various power sources, time synchronization signals and digital image data input from a display driver circuit section (or a host circuit) via the contact point section PP and controls the control of the gate driver circuit 200 by generating a gate control signal according to the time synchronization signals and simultaneously converts the digital image data into an analog pixel data voltage in order to supply the converted data voltage to the corresponding data line DL.

[0069] The through-hole TH physically passes through the display device. For example, the through-hole TH may be configured to pass only through a display panel that forms the display device. In this case, a polarizer or cover glass connected to an upper surface of the display panel may have a structure to cover the through-hole TH without being passed through by the through-hole TH. If a through-hole TH is a light-transmitting hole, such as a camera hole or a light sensor hole, the through-hole TH may pass only through the display panel without passing through the polarizer or cover glass.In another example, if an additional device is to be provided such that it passes completely through the display device, the through-hole TH may be provided such that it opens both the display panel, an optical film connected to an upper section of the display panel, and the cover glass.

[0070] Since the through-hole TH has a structure for opening a partial area of ​​the display panel without arranging a display element therein, it is likely that the through-hole TH is not located in the display panel AA, but rather in the non-display area IA. In this case, a width or a width range of the display area AA corresponding to a width or width range of the through-hole TH, as well as a range of the through-hole TH itself, is reduced, thereby reducing the area of ​​the display area AA occupied by the display panel. The present invention is characterized in that the through-hole TH is located in the display area AA.Therefore, the display element is not located in the area associated with the through-hole TH within the display area AA, but rather near the through-hole TH, thereby maximizing the area of ​​the display area AA that is occupied in the display panel.

[0071] The following is a structural characteristic of the through-hole, which is a key feature of the present invention, with reference to Fig. 1 described in more detail. Fig. Figure 2 is an enlarged planar view showing the structure of a through-hole arranged in a display area in an electroluminescent display device according to the present invention.

[0072] With reference to Fig. 2. The through-hole TH is located within the display area AA. The pixels P are located near the through-hole TH. Among the pixels P, those pixels P that are located close to the through-hole TH can be defined as adjacent pixels P'. A hole boundary section THB can be defined between the adjacent pixels P' and the through-hole TH. The adjacent pixels P' are pixels for displaying image information in the same normal way as the other pixels P. However, because the adjacent pixels P' are located close to the through-hole TH, they are referred to as adjacent pixels P'.

[0073] An inner dam DMI, a trench TR, and an etch stop ES are arranged within the hole boundary section THB. Specifically, the inner dam DMI is located between the through hole TH and the adjacent pixels P'. The inner dam DMI has the form of a closed curve that surrounds the through hole TH and matches the shape of the through hole TH. While the inner dam DMI can have a closed curve shape different from that of the through hole TH, it can also have the same shape as the through hole TH but a closed curve shape that differs in size. For example, the inner dam DMI and the through hole TH can be concentric circles arranged such that they are spaced apart by a certain interval.

[0074] The trench TR can be arranged between the through hole TH and the inner dam DMI. The trench TR can also have a closed-curve shape that surrounds the through hole TH and simultaneously matches the shape of the through hole TH. Although the trench TR can have a closed-curve shape that differs from that of the through hole TH, it can also have the same shape as the through hole TH but a closed-curve shape that differs from that of the through hole TH in size. For example, the trench TR and the through hole TH can be arranged as shown in Fig. 2 shown have a concentric circular shape and can be arranged so that they are spaced apart from each other by a certain interval.

[0075] The etch stop ES is positioned between the through-hole TH and the trench TR. The etch stop ES is designed to ensure that an upper passivation film, preventing water ingress, has a specific thickness, and its structure and function are described in detail with reference to various embodiments, along with the following cross-sectional views. <Erste Ausführungsform>

[0076] A cross-sectional structure of the electroluminescent display device according to the first embodiment of the present invention, comprising a through-hole in a display area, is described below with reference to Fig. 3 to 5 described. Fig. Figure 3 is a cross-sectional view along line II' of Fig. 1, showing a structure of a section in which a through-hole is arranged in the electroluminescence indicator device according to the first embodiment of the present invention. Fig. 4 is a cross-sectional view along line II-II' of Fig. 1, showing a structure of a boundary section of a display area and a non-display area in the electroluminescent display device according to the first embodiment of the present invention.

[0077] With reference to the Fig. 3 and Fig. 4 The electroluminescence display device according to the first embodiment of the present invention can comprise a substrate SUB, a buffer film BUF, a pixel matrix layer 120, a spacer SP, an inner dam DMI, an outer dam DMO, an encapsulation layer 130, an upper passivation film PAS, an etch stopper ES and a through hole TH.

[0078] The substrate SUB can comprise a display area AA and a non-display area IA surrounding the display area AA. The substrate SUB is a base layer and contains a plastic or glass material. For example, the substrate SUB can be an opaque or colored polyimide material. The substrate SUB can be flexible or rigid. For instance, a flexible glass substrate SUB can be a thin glass substrate with a thickness of 100 micrometers or less, or a glass substrate etched to a thickness of 100 micrometers or less using a substrate etching process.

[0079] The buffer film BUF is deposited on the upper surface of the substrate SUB in such a way that it covers the entire surface of the substrate SUB. The buffer film BUF is formed on the upper surface of the substrate SUB to protect the pixel matrix layer from water penetration through the substrate SUB, which is susceptible to water penetration. The buffer film BUF can consist of several alternately deposited inorganic films, as exemplified by this example. For instance, the buffer film BUF can be a multilayer film made up of one or more inorganic films of a silicon dioxide (SiO₂) film. x ), a silicon nitride film (SiN x The buffer film BUF can consist of a layer of organic and inorganic buffer films, deposited alternately. The BUF layer can have a deposited structure of at least two or more organic and inorganic buffer films. If necessary, the BUF layer can also be omitted.

[0080] The pixel matrix layer 120, the inner dam DMI, the outer dam DMO, the encapsulation layer 130, the etch stop ES, and the upper passivation film PAS are sequentially formed on an upper surface of the buffer film BUF. The through-hole TH is located within the display area AA of the substrate SUB. The through-hole TH is surrounded by the inner dam DMI and is an open region in which the substrate SUB, the pixel matrix layer 120, the spacer SP, the encapsulation layer 130, the etch stop ES, and the upper passivation film PAS are all removed or not formed. A polarizer and / or a cover glass may further be arranged on or attached to the upper passivation film PAS. In this case, the through-hole TH may, in one example, be configured to penetrate the polarizer and the cover glass.Alternatively, the through-hole TH may have a structure whose upper section is blocked because the polarizer and the cover glass cover the through-hole TH.

[0081] The pixel matrix layer 120 is deposited on the buffer film BUF or the substrate SUB. The pixel matrix layer 120 can comprise a thin-film transistor layer, a planarization layer PLN, a bank BN, a spacer SP, and a light-emitting diode ED.

[0082] The thin-film transistor layer is provided in several pixels P, which are defined in the display area AA of the substrate SUB, and a gate drive circuit 200, which is defined in a fourth non-display area IA4 of the substrate SUB.

[0083] The thin-film transistor layer, according to one example, comprises a thin-film transistor T, a gate insulating film GI, a first insulating film IL1, and a second insulating film IL2. In this case, the Fig. The thin-film transistor T shown is a driving thin-film transistor that is electrically connected to the light-emitting diode ED.

[0084] The thin-film transistor T comprises a semiconductor layer A, a gate electrode G, a source electrode S and a drain electrode D, which are formed on the substrate SUB or the buffer film BUF. Fig. 3 and Fig. Figure 4 shows, but is not limited to, a gate-top structure of the thin-film transistor T, in which the gate electrode G is located above the semiconductor layer A. In another example, the thin-film transistor T can have a gate-bottom structure, in which the gate electrode G is located below the semiconductor layer A, or a double-gate structure, in which the gate electrode G is located both above and below the semiconductor layer A.

[0085] Semiconductor layer A can be formed on the substrate SUB or the buffer film BUF. Semiconductor layer A can contain a silicon-based, oxide-based, or organic-based semiconductor material and can have a single-layer or multi-layer structure.

[0086] The gate insulating film GI can be formed on the entire substrate SUB to cover the semiconductor layer A. The gate insulating film GI can be made from an inorganic film such as a silicon dioxide film (SiO₂). x -film), a silicon nitride film (SiN x -film) or a multi-layered film made of SiO x and SiN x be trained.

[0087] The gate electrode G can be formed on the gate insulating film GI such that it overlaps with the semiconductor layer A. The gate electrode G can be formed together with the scanning line SL. The gate electrode G according to one example can consist of a single layer or a multiple layer of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu and their alloys.

[0088] The first insulating film IL1 and the second insulating film IL2 can be deposited sequentially on the entire substrate SUB to cover the gate electrode G and the gate insulating film GI, respectively. In the same way as the gate insulating film GI, the first insulating film IL1 and the second insulating film IL2 can be made from an inorganic film such as a silicon dioxide (SiO₂) film. x -film), a silicon nitride film (SiN x -film) or a multi-layered film made of SiO x and SiN xThe first insulating film IL1 and the second insulating film IL2 can be formed from a single insulating film.

[0089] The source electrode S and the drain electrode D can be formed on the second insulating film IL2 such that they overlap the semiconductor layer A by placing the gate electrode G between them. The source electrode S and the drain electrode D can be formed together with the data line DL, the pixel drive power line PL, and the common power line CPL. That is, the source electrode S, the drain electrode D, the data line DL, the pixel drive power lines PL, and the common power line CPL are each formed simultaneously by a structuring process for a source-drain electrode material.

[0090] The source electrode S and the drain electrode D can each be connected to the semiconductor layer A via an electrode contact hole that passes through the first insulating film IL1, the second insulating film IL2, and the gate insulating film GI. The source electrode S and the drain electrode D can consist of a single layer or a multiple layer of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu, and their alloys. In this case, the source electrode S can be... Fig. The thin-film transistor T shown in section 3 is electrically connected to the pixel control power line PL.

[0091] As described above, the thin-film transistor T provided in pixel P of substrate SUB forms a pixel circuit PC. The gate driver circuit 200, located in the fourth non-display area IA4 of substrate SUB, may also include a thin-film transistor that is identical or similar to the thin-film transistor T provided in pixel P.

[0092] The planarization layer (PLN) is formed across the entire substrate (SUB) to cover the thin-film transistor layer. The PLN provides a planar surface on the thin-film transistor layer. The PLN can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, as an example.

[0093] According to another example, the planarization layer PLN can have a pixel contact hole PH to expose the drain electrode D of the driving thin-film transistor provided in the pixel P.

[0094] The bank BN (or bank pattern) is arranged on the planarization layer PLN and defines an aperture area (or light-emitting area) within the pixel P of the display area AA. The bank BN can be referred to as a pixel-defining film.

[0095] The light-emitting diode ED comprises a pixel drive electrode AE, a phosphor layer EL, and a common electrode CE. The pixel drive electrode AE ​​is formed on the planarization layer PLN and is electrically connected to the drain electrode D of the driver thin-film transistor via the pixel contact hole PH provided in the planarization layer PLN. In this case, the other edge portion, except for a central portion of the pixel drive electrode AE ​​that overlaps with the opening area of ​​pixel P, can be covered by the bank BN. The bank BN can define an opening area of ​​pixel P by covering the edge portion of the pixel drive electrode AE.

[0096] The pixel drive electrode AE, according to one example, can contain a metallic material with high reflectivity. For example, the pixel drive electrode AE ​​can be formed from a multilayer structure such as a deposited structure (Ti / Al / Ti) of aluminum (Al) and titanium (Ti), a deposited structure (ITO / Al / ITO) of Al and ITO, an APC alloy (Ag / Pd / Cu), and a deposited structure (ITO / APC / ITO) of APC alloy and ITO, or it can have a single-layer structure made of a material of one element or an alloy material of two or more elements selected from Ag, Al, Mo, Au, Mg, Ca, and Ba.

[0097] The phosphor layer EL is fully formed on the display area AA of the substrate SUB to cover the pixel driver electrode AE ​​and the bank BN. The phosphor layer EL, according to one example, can comprise two or more phosphor sections that are vertically stacked or deposited to emit white light. The phosphor layer EL, according to one example, can include a first phosphor section and a second phosphor section for emitting a first light and a second light, respectively, so that the phosphor layer EL can emit white light by combining the first and second light. In this case, the first phosphor section emits the first light and can include a blue phosphor section, a green phosphor section, a red phosphor section, a yellow phosphor section, and a yellow-green phosphor section.The second luminous section can include one of the blue luminous section, the green luminous section, the red luminous section, the yellow luminous section and the yellow-green luminous section, wherein the second luminous section emits the second light to optically compensate for the first light.

[0098] According to another example, the phosphor layer EL can comprise a blue phosphor section, a green phosphor section, and a red phosphor section to emit colored light corresponding to a color defined in pixel P. For example, the phosphor layer EL can comprise an organic phosphor layer, an inorganic phosphor layer, and a quantum dot phosphor layer, or it can comprise a deposited or combined structure of the organic phosphor layer (or the inorganic phosphor layer) and the quantum dot phosphor layer.

[0099] In addition, the light-emitting diode ED can, according to one example, further include a functional layer to improve the light emission efficiency and / or the lifetime of the luminescent layer EL.

[0100] The common electrode CE is configured to be electrically connected to the phosphor layer EL. The common electrode CE is present across the entire display area AA of the substrate SUB and is therefore connected to the phosphor layers EL provided in the respective pixels P.

[0101] The common electrode CE can, for example, contain a transparent conductive material or a semi-transparent conductive material that allows light to pass through. If the common electrode CE is made of a semi-transparent conductive material, the light emission efficiency of the light emitted by the LED ED can be improved by a microcavity structure. The semi-transparent conductive material can, for example, contain Mg, Ag, or an alloy of Mg and Ag. Furthermore, a coating can be formed on the common electrode CE to improve the light emission efficiency by controlling the refractive index of the light emitted by the LED ED.

[0102] The spacer SP can be positioned so that it is distributed within a non-opening area within the display area AA, i.e., in an area where the light-emitting diode ED is not located. The spacer SP is intended to prevent the screen mask and substrate from coming into contact with each other during the deposition process of the phosphor layer EL. The spacer SP is positioned on the bed BN and can be deposited such that the phosphor layer EL and the common electrode CE can span (or cover, following the profile) the spacer SP located within the display area AA.

[0103] It is possible that the luminescent layer EL and / or the common electrode CE may not span the spacer SP. Since the spacer SP is only located in a portion of bank BN within the display area AA, the common electrode CE has a structure that is connected to and simultaneously covers the display area AA, even though the common electrode CE does not span the spacer SP.

[0104] The encapsulation layer 130 is designed to surround a top surface and one side of the pixel matrix layer 120. The encapsulation layer 130 serves to prevent oxygen or water from penetrating the LED ED.

[0105] The encapsulation layer 130 can, according to one example, comprise a first inorganic encapsulation layer PAS1, an organic encapsulation layer PCL on the first inorganic encapsulation layer PAS1, and a second inorganic encapsulation layer PAS2 on the organic encapsulation layer PCL. The first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 serve to protect the LED ED from the ingress of water or oxygen. The first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 can each be formed from an inorganic material such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide.The first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 can be formed by a chemical vapor deposition (CVD) process or an atomic layer deposition (ALD) process.

[0106] The organic encapsulation layer PCL has a sealed structure formed by the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2. The organic encapsulation layer PCL can be designed to be relatively thicker than the first inorganic encapsulation layer PAS1 and / or the second inorganic encapsulation layer PAS2 in order to adsorb and / or shield particles that may occur during a manufacturing process. The organic encapsulation layer PCL has a sealed structure formed by the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2. The organic encapsulation layer PCL can be made of an organic material such as Si-OCz acrylic or epoxy resin. The organic encapsulation layer PCL can be formed by a coating process such as inkjet coating or slit coating.

[0107] The electroluminescent display device according to the first embodiment of the present invention can further comprise a dam structure. The dam structure includes an outer dam DMO, which is arranged outside the display area AA, and an inner dam DMI, which is arranged inside the display area AA. The outer dam DMO is arranged in the non-display area IA of the substrate SUB to prevent the organic encapsulation layer PCL from overflowing out of the display area AA. The inner dam DMI is arranged to surround the through-hole TH within the display area AA. The outer dam DMO is only in Fig. 4 shown and the inner dam DMI is only in Fig. 3 shown.

[0108] The outer dam DMO can be located outside the display area AA, as illustrated by one example. Specifically, the outer dam DMO can be located outside the gate drive circuit 200, which is located outside the display area, and the common power line CPL can also be located outside the gate drive circuit 200. Depending on the case, the outer dam DMO can be positioned to overlap with one side of the common power line CPL. In this case, the width of the non-display area IA, in which the gate drive circuit 200 and the common power line CPL are located, can be reduced to decrease the border width.

[0109] The dam structure according to the first embodiment of the present invention, comprising the inner dam DMI and the outer dam DMO, can have a three-layer structure, wherein the corresponding layers are configured to be perpendicular to the substrate SUB. For example, the dam structure can comprise a first layer of a planarizing layer PLN, a second layer of a bank BN, and a third layer of a spacer SP.

[0110] The first layer can have a trapezoidal cross-sectional structure of the planarization layer PLN. The second layer can have a trapezoidal cross-sectional structure deposited on the first layer. The third layer can have a trapezoidal cross-sectional structure deposited on the second layer. If the organic encapsulation layer PCL is thin, the dam structure may not need to be high to easily control the spread of the organic encapsulation layer PCL. In this case, the third layer can be omitted.

[0111] The dam structure is completely covered by the first inorganic encapsulation layer PAS1 and / or the second inorganic encapsulation layer PAS2. The dam structure is intended to enclose the organic encapsulation layer PCL within an interior space and is not covered by the organic encapsulation layer PCL. The organic encapsulation layer PCL may be in contact with a section of an interior wall of the dam structure. For example, the height from a boundary region of the organic encapsulation layer PCL to an upper surface may be greater than the first layer of the dam structure and less than the second layer of the dam structure. Alternatively, the height from the boundary region of the organic encapsulation layer PCL to the upper surface may be greater than the second layer of the dam structure and less than the third layer of the dam structure.

[0112] Preferably, the height from the edge region of the organic encapsulation layer PCL to the upper surface can be less than the total height of the dam structure. As a result, the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2 are in surface contact with each other on the upper surface and the outer sidewall of the dam structure.

[0113] A structure of the inner dam DMI according to one embodiment of the present invention is described in more detail. The inner dam DMI according to one embodiment of the present invention is arranged between the through-hole TH and the adjacent pixels P' that surround the through-hole TH within the display area AA. Therefore, in contrast to the outer dam DMO, some elements of the light-emitting diode ED can be deposited on the inner dam DMI. For example, the phosphor layer EL and the common electrode CE can be deposited such that they span the inner dam DMI.

[0114] The inner dam DMI can have a forward-tapering shape. If the inner dam DMI has a forward-tapering shape, the luminescent layer EL, although the loss of the organic encapsulation layer PCL near the through-hole TH can be prevented, may be exposed by the side wall of the through-hole TH and thus be susceptible to water ingress. To avoid this, the inner dam DMI can have an inversely tapered shape. If the inner dam DMI has an inversely tapered shape, the luminescent layer EL can have a discontinuity structure at one end of the inner dam DMI. In this case, water penetrating through the section of the luminescent layer EL exposed by the through-hole TH can be prevented from diffusing into the adjacent pixels P' located near the through-hole TH.

[0115] To ensure that the display area AA reaches its maximum display area, it is preferred that the inner dam DMI be positioned very close to the through-hole TH. Therefore, the ingress of water through the inner dam DMI, with its inversely tapered shape, cannot be completely prevented. In the first embodiment of the present invention, the groove TR is further provided to completely prevent water that has penetrated through the luminescent layer EL exposed at the side of the through-hole TH from diffusing into the adjacent pixels P', regardless of whether the inner dam DMI has a forward-tapering or inversely tapered shape.

[0116] The trench is subsequently described according to the first embodiment of the present invention with reference to Fig. 5 described in more detail. Fig. Figure 5 is an enlarged cross-sectional view, specifically showing a trench section in the first embodiment of the present invention.

[0117] With reference to Fig. 5. The trench TR has the shape of a closed curve corresponding to the shape of the through hole TH. For example, if the through hole TH is circular, the trench TR can also be circular. Alternatively, the trench TR can have an oval shape that surrounds the through hole TH regardless of the shape of the through hole TH. In another example, if the through hole TH is rectangular, hexagonal, or octagonal, the trench TR can have a polygonal, circular, or oval shape that surrounds the through hole TH. For the sake of simplicity, the following description assumes that the through hole TH is circular and that the trench TR is circular and also forms a concentric circle with the through hole TH.

[0118] Preferably, the groove TR is arranged between the inner dam DMI and the through-hole TH. Considering its cross-sectional structure, the groove TR can have a depression or recessed shape from which insulating films contained in the pixel matrix layer 120 deposited on the buffer film BUF are removed to a certain width. More precisely, the groove TR can be formed by etching the inorganic insulating film contained in the pixel matrix layer 120 after the pixel matrix layer 120 has been formed on the substrate SUB, the pixel drive electrode AE ​​has been deposited, and the bank BN has been structured to define the illumination area.

[0119] For example, after the thin-film transistor T has been deposited during the process of forming the pixel matrix layer 120 and the planarization layer PLN, the planarization layer PLN can be structured such that the planarization layer PLN can be removed from a specific area near the through-hole TH. At this point, the area from which the planarization layer PLN has been removed can have the form of a closed curve surrounding the through-hole TH.

[0120] Preferably, the trench TR is formed before the light-emitting diode ED is deposited on the area from which the planarization layer PLN has been removed. For example, the trench TR is formed to expose the top surface of the second insulating film IL2 by removing the first insulating film IL1, the second insulating film IL2, and the gate insulating film GI, which are contained within the thin-film transistor layer.

[0121] The trench TR comprises a lower surface BS, an upper surface US, and a side wall SW connecting the lower surface BS to the upper surface US. The lower surface BS can be defined as a surface of the substrate SUB or the buffer film BUF exposed by penetrating the first insulating film IL1, the second insulating film IL2, and the gate insulating film GI. The upper surface US can be defined as a surface of the second insulating film IL2 near the trench TR. The side wall SW can be defined as an inner side wall of the trench TR connecting the lower surface BS to the upper surface US.

[0122] The side wall SW of the trench TR exhibits a sawtooth surface, which is uneven due to a difference in the etch rate during the etching process of thin-film transistors with differing properties, particularly their respective etch ratios with respect to a specific etching solution. For example, if, as in Fig. As shown in Figure 5, if the gate insulating film GI and the second insulating film IL2 are made of the same inorganic material and the first insulating film IL1 is made of a different inorganic material, in particular a material with a high etch rate with respect to a given etching solution, a side wall of the first insulating film IL1 within the trench TR can be over-etched.

[0123] After the trench TR has been formed with a sawtooth shape, the luminescent layer EL is deposited. The luminescent layer EL is deposited on the lower surface BS of the trench TR and the upper surface US of the trench TR. Since the side wall SW of the trench TR has a sawtooth surface, the luminescent layer EL is not deposited continuously on the side wall SW of the trench TR, but exhibits a discontinuous structure, as seen in Fig. Figure 5 shows that, for example, a blind phosphor layer ELD, obtained by detaching a residue of the phosphor layer from the phosphor layer EL, is deposited on the lower surface BS of the trench TR. Therefore, water can be completely shielded from diffusing into the neighboring pixels P' located near the through-hole TH by the trench TR, even though the water has penetrated the phosphor layer EL, which is exposed at the side of the through-hole TH.

[0124] The common electrode CE is deposited on the luminescent layer EL. The common electrode CE is deposited on the upper surface US and the lower surface BS of trench TR. As is possible, the common electrode CE is partially deposited on the side wall SW of trench TR. However, since the side wall SW of trench TR has a serrated surface, the common electrode CE does not completely cover the side wall SW and has the form of a common blind electrode CED, which covers the blind light-emitting layer ELD, a residue of the luminescent layer in the interior of trench TR.

[0125] The encapsulation layer 130 is deposited on the common electrode CE. Specifically, the first inorganic encapsulation layer PAS1 of the encapsulation layer 130 is deposited first. The first inorganic encapsulation layer PAS1 is deposited on the upper surface US and the lower surface BS of the trench TR. The first inorganic encapsulation layer PAS1 may also be deposited on the side wall SW of the trench TR. Since the blank luminescent layer ELD and the common blank electrode CED are deposited on the lower surface BS of the trench TR to fill the lower surface BS, the first inorganic encapsulation layer PAS1 may have a shape to almost fill the interior of the trench Tr.

[0126] The organic encapsulation layer PCL is deposited on top of the first inorganic encapsulation layer PAS1. Since the organic encapsulation layer PCL is deposited in a space between the inner dam DMI and the outer dam DMO, the organic encapsulation layer PCL is not deposited on the trench TR.

[0127] The second inorganic encapsulation layer, PAS2, is deposited on top of the organic encapsulation layer, PCL. Since the organic encapsulation layer, PCL, is not deposited on the trench TR, the second inorganic encapsulation layer, PAS2, is deposited on top of the first inorganic encapsulation layer, PAS1, on the trench TR, in direct contact with the trench TR. The second inorganic encapsulation layer, PAS2, can be deposited in such a way that it completely covers the trench TR.

[0128] The trench TR according to the present invention can have a cross-sectional shape with a forward-tapering or an inversely tapered shape. Since the side wall of the trench TR has a sawtooth shape, the luminescent layer EL is not deposited continuously on the side wall SW. Therefore, the trench TR does not need to have an inversely tapered cross-sectional shape to interrupt the continuity of the luminescent layer EL. The sawtooth surface of the side wall SW can be provided with different insulating layers deposited thereon by selecting materials with their respective etch rates as the etching solution for each insulating layer.

[0129] With renewed reference to Fig. Section 3 describes the structure of the end HL of the through-hole TH. The end HL of the through-hole TH defines a rim that determines the shape of the through-hole TH. The etch stop ES, an end TL of a first thin-film layer, and an end EPL of a second thin-film layer are positioned between the end HL of the through-hole TH and the trench TR.

[0130] The first thin-film layer consists of inorganic thin-film layers embedded within the thin-film transistor layer. For example, the first thin-film layer can comprise a buffer film BUF, a gate insulating film GI, a first insulating film IL1, and a second insulating film IL2. Therefore, the end TL of the first thin-film layer is a boundary defined to keep the buffer film BUF, the gate insulating film GI, the first insulating film IL1, and the second insulating film IL2 away from, or prevent them from forming within, the through-hole TH. Preferably, the end TL of the first thin-film layer is defined between the end HL of the through-hole TH and the trench TR.

[0131] The etch stop ES is formed between the end TL of the first thin-film layer and the groove TR. The etch stop ES is formed on the thin-film transistor layer, particularly on the upper surface of the second insulating film IL2, and preferably has a ring shape, forming a closed curve that surrounds the through-hole TH. The etch stop ES has a defined width between the end TL of the first thin-film layer and the groove TR. The etch stop ES can be formed in conjunction with the planarization layer PLN, the bank BN, and / or the spacer SP.

[0132] The end EPL of the second thin-film layer is located on the lower surface of the etch stop ES. The second thin-film layer consists of thin-film layers deposited on the planarization layer PLN. For example, the second thin-film layer can include a phosphor layer EL, a common electrode CE, a first inorganic encapsulation layer PAS1, and a second inorganic encapsulation layer PAS2. The first thin-film layer has thin films of inorganic materials, while the second thin-film layer has a phosphor layer EL made of an organic material. When the phosphor layer EL, the common electrode CE, the first inorganic encapsulation layer PAS1, and the second inorganic encapsulation layer PAS2 are deposited on the etch stop ES and then patterned by an etching process, an etch end is defined using the etch stop ES.Therefore, the etch stopper ES can prevent the first thin film layers located beneath the etch stopper ES from being over-etched or damaged.

[0133] Since the first and second thin-film layers are each structured based on the boundary of the etch stop ES, the end TL of the first thin-film layer and the end EPL of the second thin-film layer are positioned at their respective different locations. Therefore, the deposited structure of the second thin-film layer, the etch stop ES, and the first thin-film layer incorporates three step difference sections. When an upper passivation film PAS is deposited in this structure, the upper passivation film PAS, deposited on the three step difference sections, can maintain a uniform thickness without variation across the entire deposited area. The upper passivation film PAS is deposited without any thickness change or loss on a single-layer section of the luminescent layer EL, thus effectively blocking the penetration of water or oxygen.

[0134] Preferably, one end of the upper passivation film PAS is configured to coincide with the end of the through-hole TH in order to completely cover all ends of the thin-film layers formed between the through-hole TH and the trench TR, in particular the exposed end of the luminescent layer EL. Specifically, the upper passivation film PAS covers all ends of the second inorganic encapsulation layer PAS2, the first inorganic encapsulation layer PAS1, the common electrode CE, and the luminescent layer EL, which cover some sections of the upper surface of the etch stop ES, and the other section of the etch stop ES, and extends to the end HL of the through-hole TH. <Zweite Ausführungsform>

[0135] The electroluminescence indicator device according to the second embodiment of the present invention is described below with reference to Fig. 6 described. Fig. Figure 6 is a cross-sectional view along line II' of Fig. 1, which is a structure of a section in which a through-hole is arranged in an electroluminescent display device according to the second embodiment of the present invention.

[0136] With reference to Fig. 6. The electroluminescent display device according to the second embodiment of the present invention has, with the exception of a structure between the etch stop ES and the through-hole TH, almost the same structure as that of the first embodiment. Therefore, a description of the identical elements is omitted, or a description based on main parts is given. Since the structure of a section in which an outer dam DMO is formed is the same as that of the first embodiment, it can also be described without a separate description by reference to the first embodiment. Fig. 4. Be easily understood.

[0137] With reference to Fig. 6 The electroluminescence display device according to the second embodiment of the present invention can comprise a substrate SUB, a buffer film BUF, a pixel matrix layer 120, a spacer SP, an inner dam DMI, an outer dam DMO, an encapsulation layer 130, an upper passivation film PAS, an etch stopper ES and a through hole TH.

[0138] The following description of elements that are identical or similar to those of the electroluminescent indicator device according to the first embodiment of the present invention is omitted in the description of the second embodiment. A description of the second embodiment is given based on an end structure of the through-hole TH, which is a characteristic section that differs from the first embodiment.

[0139] An end HL of the through-hole TH designates a rim that determines the shape of the through-hole TH. The etch stop ES, an end TL1 of a lower thin-film layer and an end TL2 of an upper thin-film layer, forming a first thin-film layer, and an end EPL of a second thin-film layer are arranged between the end HL of the through-hole TH and a trench TR.

[0140] The first thin-film layer consists of inorganic thin-film layers embedded within a thin-film transistor layer. For example, the first thin-film layer can comprise a buffer film BUF, a gate insulating film GI, a first insulating film IL1, and a second insulating film IL2. Specifically, the first thin-film layer can comprise a lower thin-film layer and an upper thin-film layer. For example, the lower thin-film layer can consist of a buffer film BUF and a gate insulating film GI, and the upper thin-film layer can consist of a first insulating film IL1 and a second insulating film IL2. Therefore, the end TL1 of the lower thin-film layer is a boundary line defined to keep the buffer film BUF and the gate insulating film GI away from, or prevent them from forming within, the through-hole TH.Similarly, the end TL2 of the upper thin-film layer is a boundary line defined to remove the first insulating film IL1 and the second insulating film IL2 from the through-hole TH or to prevent them from forming in it.

[0141] The end TL1 of the lower thin-film layer can be defined at a position between the end HL of the through-hole TH and the trench TR that is closest to the through-hole TH. Meanwhile, the end TL2 of the upper thin-film layer can be defined between the end TL1 of the lower thin-film layer and the trench TR. That is, the upper and lower thin-film layers can have a stepped shape at the section of the through-hole TH.

[0142] The etch stop ES is formed between the end TL of the first thin-film layer and the trench TR. The etch stop ES is formed on the upper thin-film layer, in particular on the upper surface of the second insulating film IL2, and preferably has a ring shape, which is a closed curve surrounding the through-hole TH. The etch stop ES has a defined width between the end TL2 of the upper thin-film layer and the trench TR. The etch stop ES can be formed together with the planarization layer PLN, the bed BN, or the spacer SP.

[0143] The end EPL of the second thin-film layer is located on the upper surface of the etch stop ES. The second thin-film layer consists of thin-film layers deposited on the planarization layer PLN. For example, the second thin-film layer can include a phosphor layer EL, a common electrode CE, a first inorganic encapsulation layer PAS1, and a second inorganic encapsulation layer PAS2. The upper and lower thin-film layers have thin films of inorganic materials, while the second thin-film layer has a phosphor layer EL made of an organic material. When the phosphor layer EL, the common electrode CE, the first inorganic encapsulation layer PAS1, and the second inorganic encapsulation layer PAS2 are deposited on the etch stop ES and then patterned by an etching process, an etch end is defined using the etch stop ES.Therefore, the etch stopper ES can prevent the upper thin film layer and / or the lower thin film layer located beneath the etch stopper ES from being over-etched or damaged.

[0144] Since the upper thin-film layer and the second thin-film layer are each structured based on the boundary of the etch stop ES, the end TL2 of the upper thin-film layer and the end EPL of the second thin-film layer are positioned at their respective different locations. Therefore, the deposited structure consisting of the second thin-film layer, the etch stop ES, the upper thin-film layer, and the lower thin-film layer contains four step difference sections. When an upper passivation film PAS is deposited in this structure, the upper passivation film PAS, deposited on the four step difference sections, can maintain a uniform thickness across the entire deposited area without deviation. The upper passivation film PAS is deposited on a single-layer section of the luminescent layer EL without any change or loss of thickness, thus effectively blocking the penetration of water or oxygen.

[0145] The upper passivation film PAS is deposited on the encapsulation layer 130 and preferably extends to the end of the through-hole TH to completely cover sections of the thin-film layers. Specifically, end TL1 of the lower thin-film layer is positioned between end EPL of the second thin-film layer and end HL of the through-hole TH. End TL2 of the upper thin-film layer is positioned between end EPL of the second thin-film layer and end TL1 of the lower thin-film layer. Therefore, the upper passivation film PAS covers end TL2 of the upper thin-film layer.

[0146] Furthermore, in Fig. 6. The end TL1 of the lower thin-film layer is positioned such that it is further inward than the end HL of the through-hole TH. In this case, the upper passivation film PAS covers the end TL1 of the lower thin-film layer and is shaped to fit the end HL of the through-hole TH. However, without limiting itself to this example, the end TL1 of the lower thin-film layer can be shaped to fit the end HL of the through-hole TH. In this case, the upper passivation film PAS can be shaped so that the end TL1 of the lower thin-film layer can fit the end HL of the through-hole TH.

[0147] As described above, if the thin films at the boundary section of the through-hole TH have a stepped shape consisting of several layers, the cohesion of the thin films is increased, thus preventing layer separation. Therefore, in the electroluminescent display device according to the first and second embodiments of the present invention, the through-hole TH has a structure to prevent damage and to shield against the ingress of water and oxygen. <Dritte Ausführungsform>

[0148] The electroluminescence indicator device according to the third embodiment of the present invention is described below with reference to Fig. 7 described. Fig. Figure 7 is a cross-sectional view along line II' of Fig. Figure 1 shows the structure of a section in which a through-hole is arranged in an electroluminescent display device according to the third embodiment of the present invention. In the structure of the electroluminescent display device according to the third embodiment of the present invention, most elements are the same as those of the first and second embodiments, with the exception of a structure between the trench TR and the through-hole TH. Therefore, a description is given based on a different part.

[0149] With reference to Fig.7 denotes an end HL of the through-hole TH, a rim that defines the shape of the through-hole TH. An end TL of a thin-film layer is located between the end HL of the through-hole TH and the trench TR. In this case, the thin-film layer consists of thin films deposited on a thin-film transistor layer and a bank BN. For example, the thin-film layer comprises a buffer film BUF, a gate insulating film GI, and an interlayer dielectric film (ILD film), and includes a phosphor layer EL, a common electrode CE, a first inorganic encapsulation layer PAS1, and a second inorganic encapsulation layer PAS2, all deposited on the planarization layer PLN.

[0150] The end TL of the thin-film layer is a boundary line defined to remove the buffer film BUF and the gate insulating film GI from the through-hole TH or to prevent their formation within it. The end TL of the thin-film layer can be defined between the end HL of the through-hole TH and the trench TR.

[0151] A single-layer section of the thin-film layers is exposed at end TL of the thin-film layer. In particular, the section of the phosphor layer EL is exposed. An upper passivation film PAS is deposited to prevent water and / or oxygen from penetrating the section of the phosphor layer EL. Preferably, the upper passivation film PAS is an inorganic material film deposited on the encapsulation layer 130. For example, end TL of the thin-film layer, which comprises a gate insulating film GI, an interlayer dielectric film (ILD film), a phosphor layer EL, a first inorganic encapsulation layer PAS1, and a second inorganic encapsulation layer PAS2, can be configured to be located at a certain distance from end HL of the through-hole TH.It is preferred that the upper passivation film PAS on the encapsulation layer 130 is configured to cover a single-layer area forming the end TL of the thin-film layer. Preferably, the end of the upper passivation film PAS aligns with the end of the through-hole TH.

[0152] In the electroluminescent display device according to the third embodiment of the present invention, the through-hole TH is provided within the display area AA. In particular, an inner dam DMI is provided near the through-hole TH such that the ends of the inorganic luminescent layers and the luminescent layer are exposed at the end of the through-hole TH. To prevent water that has penetrated to the end of the luminescent layer from diffusing into the pixel P, the trench TR is arranged between the through-hole TH and the inner dam DMI to interrupt the luminescent layer EL. Furthermore, the portion of the luminescent layer EL that is exposed at the end TL of the thin-film layer comprising the luminescent layer EL, which is defined as being further inward than the end HL of the through-hole TH, is covered by the upper passivation film PAS to prevent and shield water ingress.

[0153] The single-layer section formed at end TL of the thin-film layer is, however, a section in which several thin-film layers are continuously deposited and which exhibits a very steep gradient. In this state, when the upper passivation film PAS is deposited, it may be deposited very thinly on an inclined surface, or a partial defect may occur. Since water or oxygen can penetrate into the defect section, it is preferred that the upper passivation film PAS be deposited thickly or have a deposited structure with a double or triple layer.

[0154] In the electroluminescent display device according to the third embodiment of the present invention, there is no etch stop ES, since the end TL of the thin-film layer is fixed in a position. Therefore, it is more advantageous than the first and second embodiments in that a boundary section of the through-hole TH can be minimized. Meanwhile, in the electroluminescent display device according to the first and second embodiments of the present invention, the ends of the thin-film layers are arranged, due to the etch stop ES, such that they are spaced apart from each other at a specific distance without overlapping, thereby maintaining a uniform thickness of the upper passivation film PAS.

[0155] The electroluminescence display device according to the preferred embodiments of the present invention can be applied to various products such as a television, a notebook computer, a monitor, a refrigerator, a microwave oven, a washing machine and a camera, as well as portable electronic devices such as an electronic diary, an electronic book, a PMP (portable multimedia player), a navigator, a UMPC (ultra-mobile PC), a smartphone, a mobile communication terminal, a mobile phone, a tablet PC, a smartwatch, a watch phone and a body-worn device.

Claims

[1] Electroluminescent display device comprising: a substrate (SUB) having a display area (AA) and a non-display area (IA) located near the display area (AA); a light-emitting diode (ED) in the display area (AA), wherein the light-emitting diode (ED) comprises a phosphor layer (EL); an encapsulation layer (130) on the light-emitting diode (ED), wherein the encapsulation layer (130) comprises a first inorganic encapsulation layer (PAS1), a second inorganic encapsulation layer (PAS2) and an organic encapsulation layer (PCL) arranged between the first inorganic encapsulation layer (PAS1) and the second inorganic encapsulation layer (PAS2); an upper passivation film (PAS) that is arranged on top of the second inorganic encapsulation layer (PAS2); a through-hole (TH) located within the display area (AA) to penetrate the substrate (SUB); an inner dam (DMI) surrounding the through hole (TH); a trench (TR) arranged between the inner dam (DMI) and the through hole (TH); a buffer film (BUF) on which a thin-film transistor (T) is arranged; wherein the buffer film (BUF) is arranged on an upper surface of the substrate (SUB) and extends below the inner dam (DMI) and trench (TR); a thin film layer comprising the first inorganic encapsulation layer (PAS1) and the second inorganic encapsulation layer (PAS2) and completely covering the inner dam (DMI) and trench (TR) in the display area (AA); wherein the trench (TR) has a recessed section which is recessed in such a way that it reaches an upper surface of the buffer film (BUF) between the through hole (TH) and the inner dam (DMI); and the luminescent layer (EL) is interrupted at the trench (TR). [2] Electroluminescence display device according to claim 1, in which a contact electrode is arranged on the upper passivation film (PAS). [3] Electroluminescence display device according to one of claims 1 or 2, in which an etch stopper (ES) is arranged between the trench (TR) and the through hole (TH). [4] Electroluminescent display device according to any one of claims 1 to 3, wherein the display area (AA) comprises pixels (P) which have the light-emitting diode (ED) for expressing image information and the thin-film transistor (T) for driving the light-emitting diode (ED), wherein the pixels (P) are arranged in a matrix arrangement, and wherein the through-hole (TH) is an area in which the substrate (SUB), the light-emitting diode (ED) and the thin-film transistor (T) are not provided. [5] Electroluminescent display device according to claim 4, wherein the trench (TR) comprises: a lower surface (BS) defined by the upper surface of the buffer film (BUF) exposed by the recessed section of the trench (TR); an upper surface (US) defined on the uppermost surface near the recessed section of the trench (TR); and a side wall (SW) that connects the lower surface (BS) of the trench (TR) with the upper surface (US) of the trench (TR), and wherein the luminescent layer (EL) is arranged on the lower surface (BS) of the trench (TR). [6] Electroluminescent display device according to claim 5, wherein a common electrode (CE) of the light-emitting diode (ED) is deposited on the luminescent layer (EL) on the lower surface (BS) of the trench (TR). [7] Electroluminescence display device according to claim 3, wherein the upper passivation film (PAS) covers a side surface of the etch stop (ES) next to the through hole (TH) and a part of the upper surface of the etch stop (ES). [8] Electroluminescence display device according to claim 1, wherein the upper passivation film (PAS) extends to one end of the through hole (TH). [9] Electroluminescence display device according to claim 3, wherein the etch stopper (ES) consists of organic materials.

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