ELECTRONIC CIRCUIT AND COMPUTER-IMPLEMENTED METHOD FOR SECURING ELECTRONIC COMMUNICATION

Abstract

An electronic circuit comprising a data storage element, a quantum random number generator, and a communication interface is provided. The electronic circuit is configured to: a) provide at least one true random number using the quantum random number generator; b) generate a cryptographic key based on the provided random number and make it available for adapting an encryption method for encrypted communication with a communication partner; c) provide the communication partner with information about the adaptation of the encryption method via the communication interface; and d) generate a block to confirm the adaptation of the encryption method for a blockchain and store the blockchain with the block in the data storage element.

Description

[0001] The provided components are an electronic circuit, a computer-readable medium, a method for manufacturing an electronic circuit, a computer-readable interface, the use of an electronic circuit for providing a cryptographic key and / or for securely adapting an encryption method for communication between an IoT device and a communication partner, the use of an electronic circuit for providing a cryptographic key and / or for securely adapting an encryption method for communication between a first military unit and a second military unit, a trusted platform module, a motor vehicle control device, a motor vehicle, and a computer network. The embodiments are thus primarily in the field of cryptography and encrypted electronic communication.

[0002] It is known in the prior art to generate cryptographic keys based on pseudo-random numbers and to use these keys to encrypt electronic communication between multiple communication partners. Both symmetric and asymmetric encryption methods can be used. Random number generators based on thermal generation of random numbers can be employed. However, this often offers only a low degree of entropy and can also be susceptible to manipulation.

[0003] Providing truly random numbers presents a technical challenge, as deterministic computers cannot readily generate genuine randomness and, consequently, truly random numbers. Using pseudo-random numbers represents a compromise, allowing the provision of numbers that appear random at first glance but ultimately do not constitute true randomness. Pseudo-random number generators often pose a security risk if manipulation of the generator makes its generation at least partially predictable.

[0004] Furthermore, optical quantum random number generators are known in the prior art, but these cannot be integrated into a semiconductor component.

[0005] Furthermore, quantum random number generators are known in the prior art in which a photon emitter and a photon detector are arranged side by side. These can only provide quantum random numbers at a low bit rate.

[0006] Furthermore, the current state of the art has the disadvantage that, with increasing computing power available for cracking encryption, the requirements for cryptographic keys and encryption methods become ever higher in order to effectively prevent unauthorized decryption of the encrypted data by third parties or to keep the effort at a high level. Accordingly, the requirements for cryptographic keys and the underlying random numbers for effective encryption are constantly increasing.

[0007] Furthermore, the current state of the art has the disadvantage that even when using cryptographic keys that generally meet high standards, some types of attacks or decryption attempts by unauthorized individuals, such as man-in-the-middle attacks, cannot be effectively prevented. This is because existing interactions between third parties during the exchange of cryptographic keys for encrypting communication often cannot be effectively detected. Techniques that can reliably enable such detection, on the other hand, often require large amounts of data that cannot easily be stored on the internal data storage elements of integrated circuits.

[0008] These limitations prevalent in the state of the art make it difficult to widely use effective encryption of electronic communication and make it vulnerable to attacks, eavesdropping and / or manipulation by third parties.

[0009] Particularly in the field of security technology, as well as in the military sector, the conventional methods cannot always achieve the desired level of security for encrypting electronic communication due to the disadvantages described above.

[0010] The present patent application cites the prior art mentioned below: - The presentation “Auth. Key Exchange” by Dan Boneh from the online cryptography course at Stanford University describes methods for the secure exchange of information for encrypting communication; - R. Muth et al. “SmartDHX: Diffie-Hellman Key Exchange with Smart Contracts” describes a Diffie-Hellman key exchange; - EP 3 529 694 relates to a (quantum) random number generator comprising a photon source, one or more photon detectors configured to detect at least one photon belonging to a stream of detected photons generated by the photon source, and electronic scanning means functionally connected to the photon detectors and configured to implement a logical procedure for extracting a binary sequence based on the arrival time of each of the detected photons. In the random number generator, the photon source and the photon detectors are arranged side by side and integrated into a single semiconductor substrate. - WO 2016 / 016741 A1 concerns a (quantum) random number generator comprising a photon source and one or more SPAD-type photon detectors configured to detect a photon flux equal to λ, with the photons being generated by the photon source. The random number generator also includes electronic scanning means. These electronic scanning means are configured to record the arrival time t of a photon incident on each SPAD photon detector for each of the observation windows Tw, and they are also configured to convert the arrival time t into a binary sequence. The photon source and the electronic scanning means are configured such that the product λ*Tw is less than or equal to 0.01. - KANDI, M. A. [et al.]: A Blockchain-based Key Management Protocol for Secure Device-to-Device Communication in the Internet of Things. In: 2020 IEEE I9th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom), Guangzhou, China, 2020, S. 1868-1873. DOI: 10.1109 / TrustCom50675.2020.00255; - Random number generation. In: Wikipedia, the free encyclopedia. Bearbeitungsstand: 08.09.2024. URL: https: / / en.wikipedia.org / w / index.php?title=Random_number_generation& oldid=1244727281 [abgerufen am 29.04.2025] - DENNIS, R. [et al.]: A Temporal Blockchain: A Formal Analysis. In: 2016 International Conference on Collaboration Technologies and Systems (CTS), Orlando, FL, USA, 2016, 5.430-437. DOI: 10.11 09 / CTS.201 6.0082 - US 2019 / 0 212 985 A1

[0011] The technical task is to provide an electronic circuit and a method suitable for advancing the state of the art. Optionally, the task may include providing an electronic circuit and a method suitable for increasing the security of encrypted electronic communication, simplifying the use of secure encryption, and / or simplifying or even enabling the integration of encrypted communication into electronic circuits.

[0012] The problem is solved by the subject matter of the respective independent claims. Optional embodiments are specified in the dependent claims and in the description.

[0013] An electronic circuit is provided, comprising a data storage element, a quantum random number generator, and a communication interface. The electronic circuit is configured to: a) provide at least one true random number using the quantum random number generator; b) generate a cryptographic key based on the provided random number and make it available for adapting an encryption method for encrypted communication with a communication partner; d) provide the communication partner with information about the adaptation of the encryption method via the communication interface; and e) generate a block to confirm the adaptation of the encryption method for a blockchain and store the blockchain containing the block in the data storage element.

[0014] Furthermore, a computer-readable medium is provided which includes data defining an operating instruction adapted for controlling a semiconductor manufacturing device, such that the electronic circuit according to the disclosure is manufactured by means of the semiconductor manufacturing device when the data is output to the semiconductor manufacturing device.

[0015] Furthermore, a method for manufacturing an electronic circuit according to the disclosure is provided, wherein the method comprises manufacturing the electronic circuit using a semiconductor manufacturing device, optionally using a computer-readable medium according to the disclosure.

[0016] Furthermore, a computer-readable interface is provided, comprising an electronic circuit as disclosed, wherein the computer-readable interface is configured to be connected to a computer and, in a state connected to the computer, to provide a cryptographic key and / or to enable a secure adaptation of an encryption method for communication between the computer and a communication partner and / or to enable a secure communication link with the communication partner.

[0017] Furthermore, the use of an electronic circuit as disclosed is provided for the provision of a cryptographic key and / or for the secure adaptation of an encryption method for communication between an IoT device and a communication partner.

[0018] Furthermore, the use of an electronic circuit as disclosed is provided for the provision of a cryptographic key and / or for the secure adaptation of an encryption method for communication between a first military unit and a second military unit.

[0019] Furthermore, a Trusted Platform Module comprehensively provides an electronic circuit as disclosed.

[0020] Furthermore, a control device for a motor vehicle is provided comprising an electronic circuit as disclosed.

[0021] Furthermore, a motor vehicle equipped with a control device as disclosed is provided. The control device may be configured to ensure communication between the control device and another component of the motor vehicle and / or an external communication partner by means of an electronic circuit.

[0022] Furthermore, a computer network comprising several network nodes is provided, wherein each of the several network nodes has at least one electronic circuit as disclosed, and wherein the computer network is configured to enable encrypted communication between the network nodes using the electronic circuits of the respective network nodes.

[0023] Furthermore, a computer-implemented method for securing electronic communication with a communication partner is provided. This method includes providing at least one true random number using a quantum random number generator, and generating a cryptographic key based on this random number. The method further includes adapting an encryption method for encrypted communication with the communication partner using the generated random number, providing the communication partner with information about the encryption method adaptation via a communication interface, and generating a block to confirm the encryption method adaptation for a blockchain, as well as storing the blockchain containing the block in a data storage element.

[0024] An electronic circuit can be implemented as an electronic circuit. Optionally, the electronic circuit can be in integrated form. Optionally, the electronic circuit can be designed as an integrated circuit. The electronic circuit can include all the aforementioned components and optionally additional components. Optionally, all components of the electronic circuit can be integrated into a single package. Optionally, the electronic circuit can include a processing unit designed to execute the process steps. Optionally, the electronic circuit can be implemented as a microcontroller or nanocontroller. Optionally, the electronic circuit can be implemented monolithically as a semiconductor component.

[0025] A data storage element is a component and / or an element integrated into an electronic circuit, designed to store electronic data. The data storage element can be rewritable and optionally configured as RAM. It can be flash memory or incorporate flash memory. Optionally, the data storage element can be designed to store a data volume of 10 kB or more. Optionally, it can be designed to store a data volume of 2 MB or less. The data storage element can optionally be designed to store additional data besides one or more blockchains, although this is not mandatory. Optionally, the data storage element can be designed to have sufficient storage capacity for one or more blockchains.However, the data storage element can be designed to have a storage capacity that is no larger than necessary, in order to have the smallest possible installation space requirement and to be integrated into the electronic circuit as easily as possible.

[0026] A communication interface is an interface that allows an electronic circuit to exchange electronic data with a communication partner. The communication interface can optionally conform to a conventional standard for electronic data communication. It can be designed to enable wireless and / or wired communication. Optionally, the communication interface can conform to one of the following standards: Ethernet, Wi-Fi, Bluetooth, or USB.

[0027] Providing a true random number can involve generating and outputting the true random number. Providing a true random number can be done repeatedly and / or continuously, so that multiple random numbers and / or a stream of random numbers are provided sequentially over time. The true random number can consist of a bit sequence or be implemented as such.

[0028] A cryptographic key can represent a cryptographic key. The cryptographic key can consist of a string of characters or be structured as such. The cryptographic key is generated based on the provided random number. Optionally, the cryptographic key can correspond to the provided random number. The cryptographic key can be used by the encryption process to modify data that is to be securely transmitted to the communication partner in such a way that it is encrypted and third parties cannot decrypt the data without knowledge of the corresponding cryptographic key.

[0029] Adapting the encryption method can involve or consist of changing, switching, or renewing the cryptographic key used for encryption. This adaptation can occur regularly or irregularly. Adapting the encryption method can offer the advantage of replacing a previously used, potentially compromised cryptographic key with a different one, thus preventing unauthorized third parties who may have obtained the previous cryptographic key and decrypted the transmitted data from decrypting the data in the future.

[0030] Providing the generated cryptographic key for adapting the encryption method means that the elements responsible for carrying out the encryption process, which may be integrated into the electronic circuit, can use it for this purpose. This provision can optionally occur exclusively internally within the electronic circuit or for other components that are in close communication or physical contact with the electronic circuit. This can offer the advantage that no transmission of the generated cryptographic key to external recipients is necessary, thus reducing the risk of interception by third parties.

[0031] The information provided to the communication partner regarding the adjustment of the encryption method via the communication interface can be such that it enables the communication partner to adjust their own encryption method in order to receive and decrypt encrypted messages after the adjustment. A conventional symmetric or asymmetric encryption method can be used. The information provided to the communication partner optionally does not include the generated cryptographic key. The communication interface can be the same interface used for communication with the communication partner, although this is not mandatory and a different communication interface can optionally be used.

[0032] The fact that the blockchain is stored within the data storage element of the electronic circuit means that computer-readable data, which comprises a copy of the blockchain, is stored within the data storage element itself. The blockchain can document a history of changes to the encryption method. The blockchain can contain multiple blocks. Optionally, each change to the encryption method can be confirmed or documented in a separate block of the blockchain. A block can be added to the blockchain for each change to the encryption method. Optionally, further events related to the encryption method can be confirmed or documented in the blockchain.The blockchain can serve to enable the authenticity of the blockchain and / or the encryption method and / or an adaptation of the encryption method by synchronizing and / or comparing the blockchain with copies of the blockchain from other participants in the blockchain.

[0033] A computer-readable medium is a technical object. This can be any computer-readable storage medium, such as a digital data storage device like a USB flash drive, hard drive, CD-ROM, SD card, or SSD. The computer-readable medium can also be a data signal. This means the data does not necessarily have to be stored on a computer-readable storage medium but can, for example, be accessed via the internet. The data can comprise a computer program, either designed as a control program or capable of being designed as one, containing instructions that, when executed by the semiconductor manufacturing device, cause it to manufacture the entropy source and / or the quantum random number generator and / or the integrated electronic circuit.

[0034] A computer-readable interface (CLI) is a technical device. A CLI can be an external component that can be connected to a computer, enabling the computer to use its functions. Optionally, the CLI can be designed to allow the computer, when connected, to establish a communication link with an external communication partner. The CLI can optionally be configured as a USB device to enable a connection to the computer via a USB interface.

[0035] An IoT device is a device that, within the framework of the "Internet of Things," has an internet connection or a connection to a local network and can optionally establish a communication link with one or more external third parties via the internet. Optionally, the electronic circuitry can be used to encrypt communication over such a connection and / or to provide a cryptographic key for such encryption.

[0036] A military unit can be any unit deployable for military purposes and equipped to communicate with other military units. A military unit can consist of one or more persons or be unmanned. A military unit can be a soldier, a motor vehicle, a weapon system, an aircraft, a watercraft, an underwater vehicle, an explosive device, a measuring probe, or similar. Optionally, a military unit can comprise a combination of several such elements.

[0037] A motor vehicle can take the form of a land vehicle, a watercraft, an aircraft, and / or a spacecraft, such as a car, truck, train, motorcycle, bus, agricultural machine, tactical vehicle, land-based weapon system, ship, submarine, torpedo, airplane, helicopter, missile, guided missile, cruise missile, drone, satellite, space station, or similar device. The motor vehicle can be designed for manned and / or unmanned and / or remotely controlled operation.

[0038] A control device for a motor vehicle can be a control device designed for use in a motor vehicle. Optionally, the control device can be designed to perform functions for controlling components of the motor vehicle, such as engine control and / or the control of safety systems. Optionally, the control device can be connected to a CAN bus and / or LIN bus. Optionally, the control device can be configured to establish an encrypted communication link with other components of the motor vehicle, optionally via a CAN bus and / or LIN bus.

[0039] The features and embodiments mentioned above and explained below are not only to be regarded as disclosed in the combinations explicitly mentioned, but are also covered by the disclosure content in other technically meaningful combinations and embodiments.

[0040] The fact that the process is computer-implemented means that at least one process step, optionally several process steps, and optionally all process steps can be executed by a computing unit or are executed by one. The computing unit can include a processor and a storage medium. Optionally, the computing unit can be a computer, a smartphone, a pager, a tablet computer, an embedded system, a microcontroller, a nanocontroller, an integrated circuit, a control unit, or similar device.

[0041] A Trusted Platform Module (TPM) is a cryptographic processor implemented as a chip or integrated circuit, designed for cryptographic operations. The Trusted Platform Module can also be referred to as a Trusted Platform Module or TPM. The TPM can be configured to provide hardware-based, security-related functions. The TPM can incorporate several physical security mechanisms to enhance its tamper resistance. The TPM can be designed to make it difficult or impossible for malware to manipulate the TPM. The TPM can be configured to provide or perform one or more of the following functions: - Generating and storing cryptographic keys and optionally restricting their use; - Storing and / or providing unique RSA keys, which may be permanently stored in the TPM, to uniquely identify a device in which the TPM is installed; - Performing and storing safety measurements of a startup process of an electronic device in which the TPMA is installed; - Performing measurements to assess system integrity.

[0042] The TPM can be integrated into an electronic device to provide the device with security functions, in particular the functions mentioned above. Optionally, a disclosed electronic circuit can be combined with a conventional Trusted Platform Module chip.

[0043] The disclosure offers the advantage of providing secure and effective encryption for electronic communication. In particular, by combining the use of true random numbers instead of pseudo-random numbers (which are not based on true randomness), the ability to regularly adapt the encryption method, and securing these adaptations with a blockchain, a very wide range of attacks and attempts to circumvent the encryption method without authorization can be thwarted. Furthermore, the disclosure offers the advantage that unauthorized circumvention of the encryption can optionally be completely prevented, or that if a circumvention attempt is successful, it can be detected immediately, and the encryption, the communication link, and / or the communication partner can be identified as untrustworthy.

[0044] By providing truly random numbers through a quantum random number generator, it is possible to anticipate, through technical means and optionally through artificial intelligence, numbers used for a future planned adaptation of the encryption method that are not based on true randomness, and to prevent unauthorized third parties from guessing or otherwise determining a cryptographic key based on them.

[0045] By adapting the encryption method, repeated changes of the cryptographic key can be implemented. This offers the advantage that if an unauthorized third party manages to break the encryption and decrypt the transmitted communication, the encryption is renewed, and the unauthorized third party no longer has a suitable key to decrypt the communication. Thus, by adapting the encryption method, an unauthorized third party is forced to expend the effort required to break the encryption again if they attempt to do so. In particular, regular adjustments to the encryption, and optionally regular changes of the cryptographic key, can make it impossible for an unauthorized third party to break the encryption method in such short intervals as to be able to decrypt the communication promptly.

[0046] Using a blockchain with blocks to confirm changes to the encryption method also offers the advantage that man-in-the-middle attacks can be successfully thwarted, or the effort required for a man-in-the-middle attack can be significantly increased. Because changes to the encryption method and, optionally, changes to the cryptographic key are confirmed and documented in the blockchain by a corresponding block, and because a comparison and / or synchronization of the blockchains of multiple participants can take place, an attacker would need to modify the blockchain copies of all participants to prevent the detection of a man-in-the-middle attack.However, since the number of participants in the blockchain, and thus the number of blockchain copies, can be very large, an attacker would need to manipulate all copies of the blockchain, which may reside on devices unknown to the attacker. Due to the sheer number of copies and the unknown storage locations, this could be impossible or extremely difficult. Furthermore, using a blockchain offers the advantage that manipulating the blockchain would require manipulating not just a single block, but the entire blockchain, as the complete history of the blockchain is optionally included in every block.Blockchain can therefore offer the advantage that, through decentralized storage of copies of the blockchains and their regular comparison and / or synchronization, possible attacks and manipulation attempts, such as man-in-the-middle attacks, can be detected promptly, and the encryption and / or the communication and / or one or more communication partners can be classified as compromised.

[0047] The disclosure also offers the advantage that the provision of genuine random numbers, the means for providing the cryptographic key, and the means for generating and storing the blockchain can be provided by the electronic circuit itself. This, in turn, offers the advantage that an effective adaptation of encryption methods can be integrated into electronic devices capable of establishing communication links with communication partners through an electronic circuit as disclosed. In particular, the disclosure offers the advantage that, especially when the electronic circuit is provided as an integrated circuit, the electronic circuit can be integrated into other electronic devices and / or electronic circuits, such as another microcontroller, computer, smartphone, vehicle, etc. This allows the respective devices or...electronic circuits are extended to provide effective and secure encryption of communication.

[0048] Furthermore, the disclosure offers the advantage that the electronic circuit can be retrofitted into existing devices and / or electronic circuits. Optionally, this can be achieved by connecting the electronic device and / or electronic circuit to a separate, disclosed electronic circuit, so that the connection extends the functionality of the existing electronic device and / or electronic circuit to include encryption adjustments, thereby significantly improving the security of communication against eavesdropping.

[0049] Furthermore, the disclosure offers the advantage that the disclosed provision of the encryption adaptation capability can optionally be fully integrated monolithically into a semiconductor component. This minimizes the required installation space and makes it possible to integrate a disclosed electronic circuit into small electronic devices and existing electronic circuits.

[0050] Furthermore, the disclosure offers the advantage that the disclosed method enables the adaptation of encryption with low technical complexity and / or low manufacturing costs. This allows a large number of electronic devices and / or electronic circuits to be upgraded with a secure encryption method, either at the factory or retrofitted at low cost. The low costs can promote widespread adoption, thereby significantly improving the security of electronic communication in general.

[0051] Furthermore, the invention offers the advantage that by combining several aspects of encryption and communication security, a very high level of security can be provided, enabling the secure transmission of even highly classified information. This can offer the benefit of using disclosed functionality to adapt the encryption in the military sector or in other areas where highly sensitive information must be transmitted.

[0052] Furthermore, the disclosure offers the advantage that a zero-trust network can be created by generating the random numbers locally, since it is not necessary to generate the random numbers at a central location and then transmit them to the clients.

[0053] The electronic circuit can be designed as an integrated electronic circuit. This can offer the advantage that the electronic circuit can be provided in a compact design and / or as a single, optionally self-contained component. Optionally, this offers the advantage of easily integrating the integrated electronic circuit into another electronic device and / or another electronic circuit. Optionally, a circuit board of another electronic circuit can be populated with an electronic circuit as disclosed, and / or a semiconductor component can be designed such that an electronic circuit as disclosed is integrated into the semiconductor component.

[0054] The data storage element can be integrated into the integrated electronic circuit as an internal data storage element. Alternatively, the data storage element can be integrated into the electronic circuit as a monolithic data storage element. This can facilitate a compact design and / or cost-effective manufacturing of the electronic circuit.

[0055] Optionally, the quantum random number generator and / or the communication interface can be integrated into the integrated electronic circuit. This can facilitate a compact design and / or cost-effective manufacturing of the electronic circuit. The quantum random number generator can include a monolithically integrated entropy source, which can be designed to utilize randomly occurring events to generate the random number.

[0056] The data storage element can be designed to provide a minimum storage capacity of 10 kB and optionally a maximum of 2 MB for storing at least one blockchain. The chosen size of the data storage element can represent a compromise between sufficient storage capacity and the smallest possible footprint. Smaller storage capacities are also possible if space is extremely limited. Conversely, larger storage capacities are also possible if ample space is available for the data storage element.

[0057] The quantum random number generator can be configured to provide random numbers with a data stream of at least 10 kbit / s, optionally at least 50 kbit / s, optionally at least 100 kbit / s, and optionally at least 500 kbit / s. This can offer the advantage of providing a sufficient quantity and / or length of random numbers to generate a new cryptographic key at short intervals and / or to generate the cryptographic key using long random numbers.

[0058] Steps c) and d), and optionally steps a) to d), can be executed repeatedly. This allows for repeated generation of the cryptographic key and, optionally, adjustments to the encryption method. This reduces or minimizes the duration for which the same cryptographic key is used, thereby reducing the risk of unauthorized compromise of the encryption method and keeping the amount of potentially unauthorized decryption of data to a minimum. The repeated generation of the cryptographic key can be based on one or more existing random numbers and / or one or more newly generated random numbers.The electronic circuit can thus be configured to repeatedly adapt the encryption method by repeatedly executing steps c) and d), or optionally, repeatedly executing steps a) to d). The electronic circuit can be configured to adapt the encryption method at regular and / or irregular intervals. These intervals can be 48 hours or less, optionally 24 hours or less, optionally 12 hours or less, optionally 6 hours or less, optionally 3 hours or less, optionally 1 hour or less, optionally 30 minutes or less, optionally 10 minutes or less, optionally 5 minutes or less, optionally 2 minutes or less, and optionally 1 minute or less. This can significantly increase the effort required for an unauthorized third party to decrypt the encrypted transmitted information.

[0059] The encryption method can be designed as a symmetric and / or asymmetric encryption method. Optionally, conventional encryption methods known in the prior art can be used. This can offer the advantage that the disclosed functionality for adapting the encryption method can be combined with conventional methods and systems, thereby enhancing the security of these methods and systems.

[0060] Optionally, the information about the adaptation of the encryption method can be provided according to a Diffie-Hellman key exchange procedure.

[0061] The electronic circuit can be configured to perform a key selection and / or key exchange, optionally a Diffie-Hellman-Merkle key exchange, with the communication partner using the information provided to the communication partner regarding the adaptation of the encryption method via the communication interface. This offers the advantage that it is not necessary to transmit the cryptographic key itself, but only information that prevents a third party, who might intercept the communication without authorization, from intercepting and / or using the cryptographic keys.

[0062] The electronic circuit can also be configured to generate the cryptographic key based on at least one random number such that the cryptographic key has a length of at least 128 characters, optionally at least 256 characters, optionally at least 512 characters, optionally at least 1,024 characters, and optionally at least 2,048 characters. This can significantly increase the technical effort required to crack the cryptographic key and thus offer a high level of security.

[0063] The electronic circuit can further be configured to generate the cryptographic key based on at least one random number such that the random number provided by the quantum random number generator has a length of at least 16 bits, optionally at least 32 bits, optionally at least 64 bits, optionally at least 128 bits, optionally at least 256 bits, and optionally at least 512 bits. This can significantly increase the technical effort required to anticipate the random number and / or crack the cryptographic key, thereby offering a high level of security.

[0064] Generating the block to confirm the change in the encryption method for at least one blockchain can include generating a hash value to confirm the change. The block can optionally consist of the hash value. A block can represent an entry or a segment of the blockchain.

[0065] The electronic circuit can further be configured to e) partially or completely synchronize the blockchain with a copy of another participant's blockchain and / or compare it with a copy of another participant's blockchain and, based on the synchronization and / or comparison, assess the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner. This can offer the advantage of verifying and ensuring the reliability and / or integrity of the encryption method, the communication, and / or the communication partner in a decentralized manner. This can significantly hinder manipulation of the encryption method, as it may be necessary for an attacker to manipulate a large number of blockchains, if possible, in order to remain undetected.This can be further complicated by the fact that the attacker may not know all the storage locations of the blockchain copies used for comparison and / or synchronization.

[0066] The communication partner can be another participant in the blockchain. The electronic circuit can be configured to partially or fully synchronize and / or compare the blockchain with the communication partner's copy, as described in feature e). This can simplify synchronization and / or comparison and integrate it into the communication with the communication partner.

[0067] The electronic circuit can further be configured to (f) block communication with the communication partner and / or provide information about an anomaly in the encryption method if the assessment of the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner concludes that the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner may be compromised. In other words, an anomaly in the synchronization and / or reconciliation of the blockchain with a copy from another participant in the blockchain can be considered an indication of a compromise of the encryption method and / or trigger the initiation of predetermined security measures. This can increase security.

[0068] The electronic circuit can further be configured to generate the block and / or the hash value for the blockchain in such a way that the block and / or the hash value, and optionally the entire blockchain, are encrypted and / or stored in encrypted form in the internal data storage element. The electronic circuit can also be configured to encrypt and / or store the block and / or the hash value and / or the blockchain using at least one of the random numbers provided by the random number generator. This can further hinder manipulation of the blockchain and increase security.

[0069] The electronic circuit is further configured to delete the blockchain containing the blocks confirming the encryption method adjustment from the data storage element upon the occurrence of a predetermined event and to replace it with a new blockchain of shorter length and / or smaller data volume. This can offer the advantage of limiting the blockchain's data volume and thus the storage space required for the blockchain within the data storage element. This, in turn, allows a blockchain to be stored on a data storage element with very limited storage capacity.This can enable or simplify the storage of the blockchain in an integrated data storage element, particularly when the data storage element is integrated into an electronic circuit and, due to limited available space, can only be provided with a very limited storage capacity. This can therefore be particularly advantageous in that mobile electronic devices with a disclosed electronic circuit, which must be small in size, can also be enabled to store the blockchain on the integrated data storage element.

[0070] The predetermined event can optionally occur when the blockchain reaches a predetermined length and / or a predetermined data volume. Alternatively or additionally, other events can be defined that trigger the predetermined event, such as the expiration of a predetermined time period and / or a predetermined number of blockchain blocks and / or a predetermined number of encryption method adjustments.

[0071] The electronic circuit can be configured to partially or completely release the storage space occupied by the blockchain when it is deleted from the data storage element, optionally for storing the new blockchain. This limits or prevents the blockchain's data volume from growing and avoids the data storage element becoming overfilled. This allows the blockchain to be used even when storage capacity is limited.

[0072] The electronic circuit is further configured to generate a block for a higher-level blockchain to confirm the replacement of the blockchain with the new blockchain of shorter length and / or smaller size, and to store the higher-level blockchain with the generated block in the internal data storage element. The higher-level blockchain can thus serve to secure, document, and confirm the replacement of those blockchains that document, confirm, and secure the adjustments to the encryption methods. Optionally, a block is added to the higher-level blockchain for each blockchain replacement.This allows the history of blockchain changes to be tracked, while keeping the total storage space required for the blockchains low, and in particular significantly lower than would be required for the continuous reuse of a single blockchain for encryption adjustments over the lifetime of the electronic circuit.

[0073] The electronic circuit can further be configured to generate the block confirming the encryption method adaptation as a block for a first blockchain and as a block for a second blockchain, and to store the first and second blockchains, each containing the generated block, in the internal data storage element. In other words, the electronic circuit can be configured to generate and / or store two or more blockchains in parallel to document, secure, and / or confirm the encryption method adaptations.

[0074] Furthermore, the electronic circuit can be configured to use the first and second blockchains in parallel, with staggered start and end times. In other words, the two blockchains can differ in their start and end times, so that the blockchains optionally differ at least in their first and / or last block. This means that a block that optionally documents a specific modification of the encryption method is not necessarily the first block of all blockchains, nor is it necessarily the last block of all blockchains.

[0075] The electronic circuit can be configured to use the first blockchain and the second blockchain up to a predetermined length and / or data volume, with the respective end of use occurring upon reaching the predetermined length and / or data volume of the first or second blockchain, respectively. The electronic circuit can be configured to delete the first blockchain upon reaching the end of its usage and replace it with a new first blockchain of shorter length and / or smaller size, and to delete the second blockchain upon reaching the end of its usage and replace it with a new second blockchain of shorter length and / or smaller size.

[0076] The electronic circuit can further be configured to continue using the second blockchain when the first blockchain is deleted and replaced upon reaching the end of its useful life, and conversely, to continue using the first blockchain when the second blockchain is deleted and replaced upon reaching the end of its useful life. This can offer the advantage that all blockchains can be limited in terms of storage space required, while still ensuring that at least one other blockchain remains available even when one of the blockchains is switched, documenting at least part of the history of encryption adjustments.

[0077] The electronic circuit can also be configured to release the storage space occupied by the first and / or second blockchain in the data storage element, optionally for a new first or second blockchain, when the first and / or second blockchain is deleted. This can enable efficient use of the available storage space. Furthermore, this can allow the use of blockchains to secure encryption even when the storage capacity of the data storage element is limited. Additionally, this can offer the advantage that the blockchains can be stored internally within the electronic circuit and do not need to be outsourced to external data storage. This allows for a high level of security.

[0078] The computer-readable medium can further be designed such that the data includes a digital representation of the electronic circuit, so that the integrated electronic circuit is manufactured using the digital representation when the data is output to the semiconductor fabrication device, in accordance with the operating instructions. Manufacturing the electronic circuit using the semiconductor fabrication device according to the operating instructions can include fabricating the electronic circuit on a wafer in a semiconductor process, optionally in a CMOS semiconductor process, a BiCMOS semiconductor process, a semiconductor process for bipolar devices, optionally using bipolar CMOS technology.

[0079] Furthermore, the disclosure includes a method for manufacturing an electronic circuit according to the disclosure, wherein the method includes manufacturing the electronic circuit using a semiconductor manufacturing device, optionally using a computer-readable medium according to the disclosure.

[0080] The use of a disclosed electronic circuit for providing a cryptographic key and / or for securely adapting an encryption method for communication between a first military unit and a second military unit may be designed such that the first and / or second military unit includes or is configured as one of the following: a soldier; a military vehicle; an unmanned military vehicle; a weapon system; a missile; an explosive device; a mine; an element of a military swarm; an agent of a multi-agent system; a measuring probe and / or reconnaissance probe; a command center; a control device; and a satellite.

[0081] By using the disclosed adaptation of the encryption to encrypt communications between military units, interception and / or manipulation of the transmitted information can be made more difficult. This can offer the advantage of making it harder for adversaries to disrupt the operations of military units and / or repel them, thereby increasing the effectiveness and / or survivability of military units on a battlefield.

[0082] The quantum random number generator used by the method for adapting an encryption to secure electronic communication with a communication partner and / or by the electronic circuit can comprise a monolithically integrated entropy source, wherein the entropy source comprises a photon source configured to emit photons, the photon source comprising a first outer shell, the first outer shell being formed by a first base, a first top, and at least one first side connecting the first base and the first top. Furthermore, the monolithic entropy source can comprise a photon detector configured to detect the photons emitted by the photon source, the first base of the photon source facing the photon detector.Furthermore, the quantum random number generator can include an electronic circuit designed to generate a random bit depending on an output signal of the entropy source, and optionally output the generated random bit, wherein a value of the output signal of the entropy source depends on a temporal frequency of the photons detected by the photon detector.

[0083] Furthermore, the disclosure includes an electronic circuit comprising a data storage element and a communication interface, wherein the electronic circuit is configured to provide information to the communication partner about the adaptation of the encryption method via the communication interface and to generate a block to confirm the adaptation of the encryption method for a blockchain and to store the blockchain with the block in the data storage element.

[0084] Optionally, the electronic circuit is configured to delete the blockchain containing the blocks confirming the encryption method adjustment from the data storage element upon the occurrence of a predetermined event and replace it with a new blockchain of shorter length and / or smaller data volume. The predetermined event can occur when the blockchain reaches a predetermined length and / or data volume. The electronic circuit can also be configured to partially or completely release the storage space occupied by the blockchain upon its deletion from the data storage element, optionally for storing the new blockchain.The electronic circuit can be configured to generate a block for a parent blockchain to confirm the replacement of the blockchain by the new blockchain with a shorter length and / or smaller size, and to store the parent blockchain with the generated block in the internal data storage element.

[0085] Alternatively or additionally, the electronic circuit can also be configured to generate the block confirming the encryption method adjustment as a block for a first blockchain and as a block for a second blockchain, and to store the first and second blockchains, along with their respective generated blocks, in the internal data storage element. The first and second blockchains can be used in parallel, with staggered start and end times. The electronic circuit can be configured to use the first and second blockchains up to a predetermined length and / or data volume, with the respective end of use occurring upon reaching the predetermined length and / or data volume of the first or second blockchain, respectively.The electronic circuit can be configured to delete the first blockchain and replace it with a new first blockchain of shorter length and / or smaller size when the first blockchain reaches its end of life, and to delete the second blockchain and replace it with a new second blockchain of shorter length and / or smaller size when the second blockchain reaches its end of life. The electronic circuit can further be configured to continue using the second blockchain when the first blockchain is deleted and replaced upon reaching its end of life, and to continue using the first blockchain when the second blockchain is deleted and replaced upon reaching its end of life. When deleting the first and / or second blockchain, the process can optionally allocate the storage space occupied by the first or second blockchain in the data storage element to a new first or second blockchain.Release the second blockchain. Analogous to the electronic circuit set up according to the above explanations, the disclosure includes procedures for adapting an encryption with the respective steps.

[0086] All disclosures provided shall be deemed equally disclosed with respect to the electronic circuit, the computer-readable medium, the method for manufacturing an electronic circuit, the computer-readable interface, the use of an electronic circuit to provide a cryptographic key and / or to securely adapt an encryption method for communication between an IoT device and a communication partner, the use of an electronic circuit to provide a cryptographic key and / or to securely adapt an encryption method for communication between a first military unit and a second military unit, the Trusted Platform Module, the motor vehicle control device, the motor vehicle, and the computer network.

[0087] Further details and advantages will now be explained in more detail using the following examples and optional embodiments with reference to the figures.

[0088] They show: Fig. 1A a computer-implemented method for adapting an encryption to secure electronic communication with a communication partner according to an optional embodiment; Fig. 1B an illustration of a blockchain switch according to an optional embodiment; Fig. 1C an illustration of a switch of blockchains according to a further optional embodiment; Fig. 2 an electronic circuit according to an optional embodiment; Fig. 3 a computer-readable storage medium according to an optional embodiment; Fig. 4 a computer-readable interface according to an optional embodiment; Fig. 5 a motor vehicle according to an optional embodiment; Fig. 6 a Trusted Platform Module according to an optional embodiment; Fig. 7 a computer network according to an optional embodiment; Fig. 8 a military unit according to an optional embodiment; Fig. 9 a manufacturing process according to an optional embodiment; Fig. 10 a schematic representation of a BCD substrate provided by a method for providing low-lying pn junctions in a BCD process and a TCAD representation of the resulting dopant distribution; Fig. 11 a schematic representation of an exemplary first embodiment of an entropy source in a cross-sectional view; Fig. 12 a schematic representation of an exemplary second embodiment of the entropy source in a cross-sectional view; Fig. 13 a schematic representation of an exemplary third embodiment of the entropy source in a cross-sectional view; Fig. 14 A graphical representation of the dependence of a) the SPAD current and b) the ratio between SPAD current and Zener current as a function of the Zener reverse voltage at different SPAD reverse voltages (less than, equal to, greater than the breakdown voltage) within the entropy source from the Fig. 11 to 13; Fig. 15 a schematic representation of a quantum random number generator with the entropy source from the Fig. 11 to 13; Fig. 16 A schematic representation of an exemplary layout of an integrated electronic circuit with the entropy source from the Fig. 11 to 13 and / or the quantum random number generator Fig. 15 in a top view; and Fig. 17 a schematic representation of a system with the entropy source from the Fig. 11 to 13 and / or the quantum random number generator Fig. 15 and a crypto engine, optionally at least partially implemented in the form of the microelectronic integrated circuit 500. Fig. 16.

[0089] For the sake of simplicity, identical or similar elements in the various embodiments are designated with the same reference numerals in the following figures.

[0090] Fig. Figure 1A schematically illustrates a computer-implemented method 100 for securing electronic communication with a communication partner according to an optional embodiment.

[0091] The procedure 100 includes providing 102 at least one true random number using the quantum random number generator.

[0092] The procedure 100 also includes generating 104 a cryptographic key based on the provided random number.

[0093] Furthermore, the procedure 100 includes an adaptation 106 of an encryption method to provide encrypted communication with the communication partner using the generated random number.

[0094] Furthermore, the procedure 100 includes providing 108 information to the communication partner about the adaptation of the encryption method via a communication interface.

[0095] Furthermore, the procedure 100 includes generating 110 a block 150a to confirm the adaptation of the encryption method for a blockchain and storing 112 the blockchain 150 with the block 150a in a data storage element 202. The generation 110 of the block to confirm the adaptation of the encryption method for the at least one blockchain 150 may include generating a hash value to confirm the adaptation of the encryption method.

[0096] Furthermore, the procedure may include synchronizing and / or comparing 114 the blockchain 150 partially or completely with a copy of the blockchain of another participant in the blockchain, as well as assessing 116 the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner based on the synchronization and / or comparison.

[0097] The communication partner can be another participant in Blockchain 150, and step 114 can include partially or fully synchronizing and / or comparing the blockchain with the communication partner's copy of the blockchain.

[0098] Furthermore, the procedure 100 may include preventing 118 communication with the communication partner and / or providing 120 information about an anomaly in the encryption procedure, provided that the assessment 116 of the trustworthiness of the encryption procedure and / or the adaptation of the encryption procedure and / or the communication partner concludes that the trustworthiness of the encryption procedure and / or the adaptation of the encryption procedure and / or the communication partner may be compromised.

[0099] The electronic circuit 200 can further be configured to generate the block and / or the hash value for the blockchain in step 110 such that block 150a and / or the hash value and optionally the entire blockchain 150 are encrypted and / or stored in encrypted form in the internal data storage element 202. The electronic circuit can further be configured to encrypt block 150a and / or the hash value and / or the blockchain 150 using at least one of the random numbers provided by the random number generator and / or to store it in encrypted form.

[0100] Procedure 100 can further include, in step 120, deleting blockchain 150 containing blocks 150a from the data storage element to confirm the adaptation of the encryption method upon the occurrence of a predetermined event, and replacing it with a new blockchain of shorter length and / or smaller data volume. The predetermined event can occur when the blockchain reaches a predetermined length and / or a predetermined data volume. When deleting the blockchain from the data storage element, the storage space occupied by the blockchain can optionally be partially or completely released for storing the new blockchain.

[0101] Optionally, the procedure 100 includes a step 122 in which a block is generated for a higher-level blockchain to confirm the replacement of the blockchain by the new blockchain with a shorter length and / or smaller size, and the higher-level blockchain is stored with the generated block in the internal data storage element.

[0102] Steps 120 and 122 are shown schematically in Fig. Figure 1B illustrates this. Arrow 160 indicates the progress of the encryption adjustments and can be viewed as a timeline. A first blockchain 150 with blocks 150a and a second blockchain 152 with blocks 152a are used sequentially. When the first blockchain 150 reaches the end of its lifespan, it is deleted, and the second blockchain 152 is used. The switch between blockchains 150 and 152, and optionally the deletion of blockchain 150, is documented or confirmed in a block 154a of the parent blockchain 154.

[0103] Alternatively or additionally, in step 110, the procedure 100 can generate block 150a, 152a to confirm the adaptation of the encryption method as block 150a for a first blockchain 150 and as block 152a for a second blockchain 152, and in step 112 store the first blockchain 150 and the second blockchain 152 with the respective generated block 150a, 152a in the internal data storage element 202. The procedure 100 can use the first blockchain 150 and the second blockchain 152 in parallel with staggered start and end times (see Fig. 1C). The first blockchain 150 and the second blockchain 152 can optionally each be used up to a predetermined length and / or up to a predetermined data volume, whereby the respective end of use occurs when the predetermined length and / or the predetermined data volume of the first blockchain 150 or the second blockchain 152 is reached.

[0104] Upon reaching the end of its lifespan, the procedure 100 in step 124 can delete the first blockchain 150 and replace it with a new first blockchain (or a third blockchain) of shorter length and / or smaller size. Similarly, upon reaching the end of its lifespan, the procedure 100 can delete the second blockchain 152 and replace it with a new second blockchain (or a fourth blockchain) of shorter length and / or smaller size. Replacing the blockchains with new ones does not necessarily have to occur immediately upon or after the deletion of the respective blockchain, but can take place at a later time, as long as the new blockchain is available at the end of the lifespan of the other blockchain or, optionally, before the start of the overlap area 170.

[0105] When the first blockchain 150 is deleted and replaced upon reaching the end of its useful life, the process can continue using the second blockchain 152. Conversely, when the second blockchain 152 is deleted and replaced upon reaching its end of use, the process can continue using the new first blockchain 150 or a third blockchain. Upon deletion of the first and / or second blockchain 150, 152, the storage space occupied by the first or second blockchain 150, 152 in the data storage element 202 is optionally released for a new first or second blockchain, or a third or fourth blockchain.

[0106] Step 124 is in Fig. Figure 1C is schematically illustrated. Arrow 160 indicates the progress of the encryption adjustments and can be viewed as a timeline. A first blockchain 150 with blocks 150a and a second blockchain 152 with blocks 152a are used in parallel within an overlap area 170. When the first blockchain 150 reaches the end of its lifespan, it is deleted, and only the second blockchain 152 continues to be used. A third blockchain (not shown) can then be created, which can be used when the second blockchain 152 reaches its end of life and is deleted. This process can be repeated indefinitely, ensuring that at least one blockchain is always available and that a new blockchain is ready to replace the first one towards the end of its lifespan. The overlap area can optionally consist of only one block or be omitted entirely.

[0107] Fig. Figure 2 shows a schematic representation of an electronic circuit 200 according to an optional embodiment. The electronic circuit 200 comprises a data storage element 202, a quantum random number generator 204, and a communication interface 206.

[0108] The electronic circuit 200 is designed to a) provide at least one true random number by means of the quantum random number generator 204.

[0109] Furthermore, the electronic circuit 200 is designed to b) generate a cryptographic key based on the provided random number and to make it available for adapting an encryption method for encrypted communication with a communication partner.

[0110] Furthermore, the electronic circuit 200 is configured to: c) provide information to the communication partner about the adaptation of the encryption method via the communication interface 206; and d) generate a block to confirm the adaptation of the encryption method for a blockchain and store the blockchain with the block in the data storage element 202.

[0111] The electronic circuit 200 can be designed as an integrated electronic circuit.

[0112] The data storage element 202 can be integrated as an internal data storage element into the integrated electronic circuit 200.

[0113] The quantum random number generator 204 and the communication interface 206 can be integrated into the integrated electronic circuit 200. The quantum random number generator 204 can include a monolithically integrated entropy source 208. The quantum random number generator 204 can be configured to provide random numbers with a data stream of at least 10 kbit / s, optionally at least 50 kbit / s, optionally at least 100 kbit / s, and optionally at least 500 kbit / s.

[0114] The data storage element 202 can be integrated into the electronic circuit 200 as a monolithically integrated data storage element 202. The data storage element 202 can be configured to provide a storage capacity of at least 10 kB and optionally a maximum of 2 MB for storing at least one blockchain.

[0115] The electronic circuit 200 can be configured to repeatedly execute steps c) and d), optionally steps a) to d). The electronic circuit 200 can be configured to repeatedly adapt the encryption method by repeatedly executing steps c) and d), optionally by repeatedly executing steps a) to d). The electronic circuit 200 can be configured to adapt the encryption method at regular and / or irregular intervals. The intervals can be 48 hours or less, optionally 24 hours or less, optionally 12 hours or less, optionally 6 hours or less, optionally 3 hours or less, optionally 1 hour or less, optionally 30 minutes or less, optionally 10 minutes or less, optionally 5 minutes or less, optionally 2 minutes or less, and optionally 1 minute or less.The encryption method can be designed as a symmetric and / or asymmetric encryption method.

[0116] The electronic circuit 200 can be configured to perform a key selection and / or key exchange, optionally a Diffie-Hellman-Merkle key exchange, with the communication partner using the information provided to the communication partner about the adaptation of the encryption method via the communication interface 206, on the generated cryptographic key.

[0117] The electronic circuit 200 can also be configured to generate the cryptographic key based on at least one random number such that the cryptographic key has a length of at least 128 characters, optionally at least 256 characters, optionally at least 512 characters, optionally at least 1,024 characters and optionally at least 2,048 characters.

[0118] The electronic circuit 200 is further configured to generate the cryptographic key based on at least one random number such that the random number used for this purpose, provided by the quantum random number generator 204, has a length of at least 16 bits, optionally at least 32 bits, optionally at least 64 bits, optionally at least 128 bits, optionally at least 256 bits and optionally at least 512 bits.

[0119] The electronic circuit may also be configured to e) partially or completely synchronize the blockchain 150 with a copy of the blockchain 150 of another participant in the blockchain and / or to compare it with a copy of the blockchain of another participant in the blockchain 150 and, based on the synchronization and / or comparison, to assess the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner.

[0120] Fig. Figure 3 shows a schematic representation of a computer-readable medium 300 comprising data 302 that defines an operating instruction adapted for controlling a semiconductor manufacturing device, such that the electronic circuit 200 is manufactured by means of the semiconductor manufacturing device when the data is output to the semiconductor manufacturing device.

[0121] The data 302 can include a digital representation of the electronic circuit 200, so that, with the operating instructions, the integrated electronic circuit 200 is manufactured using the digital representation when the data 302 is output to the semiconductor manufacturing device.

[0122] The fabrication of the electronic circuit 200 using the semiconductor fabrication device according to the operating instructions can include fabricating the electronic circuit 200 on a wafer in a semiconductor process, optionally in a CMOS semiconductor process, a BiCMOS semiconductor process, a semiconductor process for bipolar devices, optionally using bipolar CMOS technology.

[0123] Fig. Figure 4 schematically illustrates a computer-readable interface comprising an electronic circuit 200 according to an optional embodiment, wherein the computer-readable interface is configured to be connected to a computer 402 and, in a state connected to the computer 402, to provide a cryptographic key and / or to enable the secure adaptation of an encryption method for communication between the computer and a communication partner 404 and / or to enable a secure communication link with the communication partner 404. The communication partner 404 can be configured as a computer and may optionally have a similar computer-readable interface 400.

[0124] Fig. Figure 5 shows a schematic representation of a motor vehicle 500 according to an optional embodiment, wherein the motor vehicle 500 has a control device 502 according to an optional embodiment. The control device 502 has an electronic circuit 200 according to the one shown in Figure 5. Fig. 2 shown embodiment. The control device 502 can be configured to ensure communication between the control device 502 and another component of the motor vehicle 500 and / or with an external communication partner by means of the electronic circuit 200.

[0125] Fig. Figure 6 shows a Trusted Platform Module 600 according to an optional embodiment, wherein the Trusted Platform Module 600 comprises an electronic circuit 200 according to the one shown in Figure 6. Fig. 2 shows the optional embodiment.

[0126] Fig. Figure 7 shows a schematic representation of a computer network 700 according to an optional embodiment comprising several network nodes 702, wherein each of the several network nodes 702 has at least one electronic circuit 200 according to the one shown in Fig. 2 shown embodiment and wherein the computer network 700 is configured to enable encrypted communication between the network nodes 702 using the electronic circuits 200 of the respective network nodes 702. The network nodes can optionally be configured as computers.

[0127] Fig. Figure 8 shows a military unit 800 according to an optional embodiment with an electronic circuit 200 according to the one in Fig. 2 embodiment shown.

[0128] Fig. Figure 9 schematically illustrates a manufacturing process 900 according to an optional embodiment for manufacturing an electronic circuit 200, characterized in that the process 900 involves manufacturing 902 the electronic circuit 200 using a semiconductor fabrication device, optionally using a computer-readable medium according to the one described in Figure 900. Fig. 3 embodiment shown.

[0129] The following description with reference to the Fig. References 10 to 16 describe a quantum random number generator according to optional embodiments, as well as an entropy source according to optional embodiments, which may be included by the quantum random number generator. Such a quantum random number generator may be used in the disclosed and claimed items, although this is not mandatory and the claimed items are not limited to the described embodiments.

[0130] Fig. Figure 10 shows a schematic representation of a (BCD) substrate 110* provided by a method for providing low-lying pn junctions 50* and 52* in a BCD process and a TCAD representation of the resulting dopant distribution.

[0131] The method for generating low-lying pn junctions 50* and 52* in a BCD process can include providing a support substrate 49*.

[0132] The process can include introducing a first dopant to form a first region 22* (e.g. NBL) of the first conduction type (negative for NBL) into a surface S of the support substrate 49*.

[0133] The method can include introducing a second dopant to form a second region 32* (e.g. PBL) of the second conduction type (positive for PBL) into the surface S of the support substrate 49*, wherein the first region 22* (NBL) and the second region 32* (PBL) overlap at least partially.

[0134] The method can include growing an epitaxial layer 48* onto the surface S of the support substrate 49*, wherein the first region 22* (NBL) and the second region 32* (PBL) spread through diffusion of the first dopant and the second dopant in the epitaxial layer 48* and thereby form a (first) pn junction 50* located in the epitaxial layer 48*.

[0135] In the diagram, the first area 22* is a deep-lying NBL layer and the second area 32* is a deep-lying PBL layer. However, the order is interchangeable, so the first area 22* could also be a deep-lying PBL layer and the second area 32* a deep-lying NBL layer.

[0136] By appropriately adjusting the diffusion lengths of the individual dopants, the layer sequence of the pn transitions 50* and 52* can also be reversed, e.g., in Fig. 10* the NBL and PBL layers at the pn junction 50* and 52* are also swapped.

[0137] The method offers the advantage that the first region 22* (NBL) and the second region 32* (PBL) at least partially overlap. Optionally, immediately after the introduction of the second dopant, in a top view of the surface S of the support substrate 49*, either the first region 22* or the second region 32* can completely overlap the other region 32*, 22*. Therefore, in the illustrated embodiment, immediately after the introduction of the second dopant to form the second region 32* (PBL), this region lies completely within the first region 22* (NBL) in a top view of the surface S of the support substrate 49*. To form a pn junction 50* located in the epitaxial layer, the first and second dopants can exhibit different diffusion properties in the support substrate 49* and / or in the epitaxial layer 48*.Optionally, the second dopant in the second region 32* (PBL) can, as shown, exhibit a higher diffusion mobility (and thus diffusion length) in the support substrate 49* and in the epitaxial layer 48* than the first dopant in the first region 22* (NBL).

[0138] To enhance diffusion, the carrier substrate 49* can be heated after the introduction of the first dopant and / or the second dopant. Heating of the carrier substrate 49* can also be performed after the growth of the epitaxial layer 48* to enhance dopant diffusion.

[0139] The introduction of the first and / or second dopant can be performed either maskless or using a masking method in the presented process. In the BCD wafer shown, a complete overlap of the first region 22* (NBL) with a single second region 32* (PBL) can be assumed. However, conventionally, the first and second regions 22* and 32* are formed spatially separated from each other. In particular, their separation is generally chosen to be at least large enough to ensure that no overlapping regions are created even after the individual dopants have diffused out.

[0140] The TCAD diagram (Technology Computer-Aided Design, TCAD) shown below the schematic illustrates an example of a dopant distribution within the contacted substrate 110* for simulating a corresponding integrated diode structure. Due to the dual structure shown in this embodiment, with an upper pn junction 50* in the epitaxial layer 48* and a lower (second) pn junction 52* in the support substrate 49*, the side view shows an effective constriction of the n-region (NBL) enclosed in the area of ​​the pn junctions 50* and 52* by the two p-regions (PBL) surrounding this n-region (NBL). Both pn junctions 50* and 52* can be configured to provide independent SPADs with a doping density and field strength distribution suitable for generating an avalanche effect.

[0141] Using suitable (semiconductor) substrates 110*, which are suitable for use in BCD technologies, particularly deep SPADs (“deepSPADs”) can be generated. Sufficient space remains above the SPADs for the integration of further optoelectronic components. Therefore, a Zener-avLED positioned above the deep SPAD can be used to realize a particularly compact, vertically structured entropy source 401*, in which individual photons 58* are emitted vertically downwards by the Zener-avLED as photon sources 55* towards the upper pn junction 50* and are thus provided as a single-photon detector for detection by a SPAD positioned directly below the Zener-avLED as a photon detector 54* at the upper pn junction 50* (see Fig. 11 to 13 with accompanying character descriptions).

[0142] Fig. Figure 11 shows a schematic representation of an exemplary first embodiment of a (vertical) monolithically integrated entropy source 401*.

[0143] The entropy source 401* can comprise a substrate 110* with a support substrate 49* and an epitaxial layer 48*. The epitaxial layer 48* can have or comprise a first pn junction 50* and / or a third pn junction 554*. The support substrate 49* can have or comprise a second pn junction 52*.

[0144] The entropy source 401* comprises a photon source 55* configured to emit photons 58*. For this purpose, the photon source 55* includes a third pn junction 554* formed from a third p-layer 46* and a third n-layer 45*, wherein the third p-layer 46* and the third n-layer 45* are in contact with each other. The photon source 55*, more precisely its pn junction 554*, comprises a first outer shell, wherein the first outer shell is formed by a first base surface 551*, a first top surface 552*, and at least one first side surface 553* connecting the first base surface 551* and the first top surface 552*. The first base surface 551* can have the same area as the first top surface 552*. The first base surface 551* can have a larger or smaller area than the first top surface 552*.A normal vector perpendicular to the first base surface 551* can be parallel to a normal vector perpendicular to the first top surface 552*. The third pn transition 554* can have a cylindrical shape. The height of the cylinder can be parallel to the normal vectors. The height of the cylinder can be, optionally by a multiple, smaller than a radius of the first base surface 551* and / or the first top surface 552*. The third pn transition 554* can be a thin layer.

[0145] The entropy source 401* comprises a photon detector 54* configured to detect the photons 58* emitted by the photon source 55*. For this purpose, the photon detector 54* includes a first pn junction 50* formed from a first p-layer 32* and a first n-layer 22*, wherein the first p-layer 32* and the first n-layer 22* are in contact with each other. The photon detector 54*, more precisely its first pn junction 50*, comprises a second outer shell, the second outer shell being formed by a second base 541*, a second top surface 542*, and at least one second side surface 543* connecting the second base 541* and the second top surface 542*. The second base 541* can have the same area as the second top surface 542*. The second base surface 541* can have a larger or smaller area than the first top surface 542*.A normal vector perpendicular to the second base surface 541* can be parallel to a normal vector perpendicular to the second top surface 542*. The first pn transition 50* can have a cylindrical shape. The height of the cylinder can be parallel to the normal vectors. The height of the cylinder can be, optionally by a multiple, smaller than a radius of the second base surface 541* and / or the second top surface 542*. The first pn transition 50* can be a thin layer.

[0146] The first base 541* of the third pn junction 554* of the photon source 55* is oriented towards the second base 541* of the first pn junction of the photon detector 55*. That is, the normal vector perpendicular to the second base 541* is parallel to the normal vector perpendicular to the first base 551*. The distance between the first base 551* and the second base 541* is shorter than the distance between the first top surface 552* and the second base 541*.

[0147] The photon source 55* can be a silicon LED and / or a single photon source, optionally a SPAD or an avalanche Zener diode, the avalanche Zener diode optionally having a breakdown voltage of less than 10 V.

[0148] The photon detector 55* comprises an absorption region 10*, 47*, which is designed and arranged to absorb the photons 58* emitted by the photon source 55* such that the absorption region 10*, 47* generates one electron-hole pair for each photon 58*, optionally exactly. The absorption region 10*, 47* is in contact with the first pn junction 50* (and the third pn junction 554*). The first pn junction 50* is designed to generate a charge avalanche due to the generated electron-hole pair. The photon detector 54* is designed to detect the respective photon 58* emitted by the photon source 55* based on the generated charge avalanche.

[0149] The photon detector 54* can include a single-photon detector, optionally a single-photon avalanche diode, optionally a SPAD.

[0150] The absorption region 10*, 47* comprises or consists of a p-doped substrate that completely covers the surface facing the photon source 55*, i.e., the second base surface 541*, of the first pn transition 50*.

[0151] The absorption region 10*, 47* is in contact with the photon source 55*, here the p-doped substrate 46* of the third pn transition 554* of the photon source 55*.

[0152] The photon detector 55* comprises a second pn junction 52* formed from a second p-layer 32* and the first n-layer 22*, wherein the second p-layer 32* and the first n-layer 22* are in contact with each other.

[0153] The entropy source 401* comprises a metal layer 53*, optionally together with an internal silicide layer or one facing a surface O, which shields the entropy source 401* from the outside.

[0154] The entropy source 401* can include at least two anodes 124*, 134* for the photon source 55* and the photon detector 54*, which can be conductively connected to each other via the metal layer 53*.

[0155] The photon source 55* and / or the photon detector 54*, optionally the entropy source 401* as a whole, can be designed rotationally symmetric along an axis. The axis can run parallel to the normal vectors described above, which are perpendicular to the first and / or the second base surface 541*, 551* and / or perpendicular to the surface O.

[0156] The entropy source 401* can be produced using BCD technology.

[0157] An upper and / or lower surface of the entropy source 401* can be mirrored and / or comprise a light-blocking layer, at least in the area of ​​the photon source 55* and / or the photon detector 54*.

[0158] During operation of the entropy source 401*, photons 58* can be emitted at random time intervals at the third pn junction 554* of the photon source 55*, so that the photons 58* leave the third pn junction 554* of the photon source 55* via its first base 551* in the direction of the second base 541* of the first pn junction of the photon detector 54*, form an electron-hole pair in the absorption region 10*, 47* and trigger a charge avalanche at the first pn junction 50*.

[0159] In detail, the vertical entropy source 401* can be characterized, as described in this document, by a vertical arrangement of the photon source 55* relative to the photon detector 54*. The horizontal plane is defined by the surface O of the semiconductor substrate 110* with the epitaxial layer 48*. The line connecting the centers of gravity of the vertical arrangement consisting of the photon source 55* and the photon detector 54* is thus vertically aligned with the surface O of the substrate 49* with the epitaxial layer 48*, where "vertical" here can be understood as a relatively soft angle of more than 30°, ideally 90°, between this line and the surface O. The monolithically integrated entropy source 401* shown comprises the photon source 55* and the photon detector 54*, wherein the photon source 55* and the photon detector 54* can be arranged vertically one above the other in a common substrate 110* made of a semiconductor material.Optionally, the photon source 55* is a single-photon source configured to provide only one or a few photons 58* at a time (so-called single-photon source). Optionally, the photon source 55* is a light-emitting avalanche Zener diode (Zener-avLED) operated at an operating point below or near the breakdown voltage. Optionally, the photon detector 54* is a single-photon detector, such as a single-photon avalanche diode.

[0160] The entropy source 401* can be formed in a (BCD) substrate 110* using BCD technology. The substrate 110* can comprise the support substrate 49* and the epitaxial layer 48* grown on the support substrate 49*. The pn junctions 50*, 52* can be configured as described above. Fig. The photon detector 55* can be arranged as described in section 10. The photon detector 55* can comprise an avalanche region formed in a region around the upper pn junction 50* of the photon detector 54* and an absorption region 10*, 47* with a high-voltage p-type well 10* and a p-type well 47* for converting photons into electron-hole pairs, wherein the absorption region 10*, 47* can be directly adjacent to the regions 22*, 32* forming the low-lying pn junction 50*. The fully developed high-voltage p-type well 10* can thereby enable optimal connection of the low-lying pn junction 50* from the anode 124*, 134*.

[0161] The upper deep pn junction 50* of the photon detector 54* can be located between a deep n layer 22*, which serves as the cathode 132*, and a deep p layer 32* immediately adjacent to the deep n layer 22*. The absorption region 10*, 47* can be located immediately adjacent to the deep p layer 32* and can be essentially a p region (optionally including an intrinsic region). The anode 46* (p-) of the uppermost or third pn junction 554* can be connected via the p region 47* to a p+ region 51*, and the anode 32* of the middle or second pn junction 50* can also be connected via region 10* and region 47* to the p+ region 51*.

[0162] In the illustrated embodiment, the respective anodes 124*, 134* of the photon source 55* and the photon detector 54* are combined. These can then be electrically contacted, for example, via the common metallization 53* on the surface O of the substrate 110*. A common and continuous metallization 53* can also provide shielding against electromagnetic radiation from above. The associated cathodes 122*, 132* are each implemented separately as an example and can be electrically contacted via a first associated further metallization 141*.

[0163] The entropy source 401* can be formed as a circular structure (corresponding to a spatial rotation of the depicted plane around an imaginary central axis in the vertical direction). However, other forms of the entropy source 401* are also possible.

[0164] Fig. Figure 12 shows a schematic representation of an exemplary second embodiment of the entropy source 401*. The in Fig. The embodiment shown in 12 largely corresponds to the one in the Fig. The first embodiment shown in Figure 11 and described above applies accordingly. The reference numerals and their respective assignment to individual features are therefore also applicable.

[0165] In the second embodiment, the absorption region 10*, 47*, which has the p-doped substrate, is designed such that it only partially covers the surface or second base 541* of the first pn junction 50* facing the photon source 55* and forms a channel extending from this second base 541* of the first pn junction 50* towards the photon source 55*, which is laterally bounded by an n-doped substrate 29*.

[0166] This means that, compared to the first embodiment, the high-voltage p-well 10* is structurally tapered and an additional (weakly) n-doped region 29* is provided. The high-voltage p-well 10* of the absorption region 10*, 47* forms a channel between the [missing information] also in Fig. Figure 11 shows the upper p-well 47* and the (lower) p-layer 32* of the second pn junction 50*. The channel's surroundings are defined by the (weakly) n-doped region 29*. The channel electrically connects the lower upper pn junction 50* to the upper pn junction 45*, 46* without an additional punch through the n-doped region 29*, and irradiates it with photons 58* from the photon source 54*.

[0167] Fig. Figure 13 shows a schematic representation of an exemplary third embodiment of the entropy source 401*. The third embodiment shown largely corresponds to that described in the Fig. 11 and Fig. The first and second embodiments shown in Figure 12 and described above apply accordingly. The reference numerals and their respective assignment to individual features are therefore valid.

[0168] However, the absorption region 10*, 47* has (or consists of) an n-doped substrate 29* that completely covers the base 541* of the first pn transition 50* facing the photon source 55*.

[0169] In contrast to the second embodiment, the third embodiment does not include a channel-shaped high-voltage p-trough 10* in the absorption region 10*, 47*. The weakly n-doped region 29* formed in the epitaxial layer 48* extends over the entire lower region between the second pn junction 50* and the photon source 54*. In this respect, compared to the second embodiment, the high-voltage p-trough 10* in this region has been structurally replaced by the (weakly) n-doped region 29*. The lower-lying upper pn junction 50* is thus connected to the photon source 54* only after an additional penetration / punch through the weakly n-doped region 29*, which results in the decoupling of potentially several parallel entropy sources 401*.

[0170] Fig. Figure 14 shows a graphical representation of the dependence of a) the SPAD current and b) the ratio between the SPAD current and the Zener current as a function of the Zener reverse voltage at various SPAD reverse voltages (less than, equal to, greater than the breakdown voltage) within the entropy source 401*. The dependence shown in a) clearly demonstrates that the SPAD current increases exponentially with the Zener reverse voltage in the range of 5.6 V to 6.6 V. This applies to all operating modes of the SPAD, i.e., below its own breakdown voltage (< VBD, linear region), near the breakdown voltage (~ VBD, avalanche region), and also above the breakdown voltage (> VBD), and thus also in Geiger operation.

[0171] The lower curve shown in section b) (< VBD) indicates that the measured current ratio between the SPAD current and the Zener current is approximately 1:4000 for various Zener reverse voltages in the range of 5.8 to 6.6 V. In the region of the SPAD's breakdown voltage (~ VBD), the ratio increases to values ​​around 1:10. This is due to the SPAD's so-called multiplication factor, which deviates from a linear range in the breakdown voltage region. The upper curve finally shows the corresponding ratio for the SPAD operated above its associated breakdown voltage (> VBD) (approximately 1:1). This means that when the SPAD is operated above its associated breakdown voltage (> VBD), the generated photocurrent and the Zener current of the Zener-avLED are approximately equal, and a clear measurement signal can be obtained by coupling photons to the SPAD.

[0172] Fig. Figure 15 shows a schematic representation of a quantum random number generator 400* for generating and outputting a digital random number sequence, e.g. in the form of a random bitstream ZBS (see also Fig. 17) and / or, optionally by means of a finite automaton 404.8*, a random bit data word 418*.

[0173] The quantum random number generator 400* is described in more detail below.

[0174] The quantum random number generator 400* includes the entropy source 401* described above. The entropy source 401* of the quantum random number generator 400* can be powered via a supply voltage line V. ENT , which can be connected to a voltage converter 408*, ​​is supplied with a voltage relative to a reference potential on a reference potential line GND.

[0175] An output signal or voltage signal 405* generated by the entropy source 401* can be used in an analog-to-digital converter (ADC) 403*, which optionally has a reference voltage line V. REF The signal can be supplied, first digitized and then passed as a digital output signal 407* to a pulse extension circuit 406*.

[0176] The output signal 405* of the entropy source 401* can be obtained, for example, by positively biasing region 45* relative to region 51* (via breakdown voltage). This enables the third pn junction 554* to emit photons 58*. Region 22* is positively biased relative to region 32* (in reverse bias). When the third pn junction 554* emits a photon 58* and this photon 58* is detected by the second pn junction 50*, a current pulse can be tapped at the cathode 132*, which can then be converted into a voltage pulse. This voltage pulse can correspond to the output signal 405* of the entropy source 401*.

[0177] The supply voltage line V ENT and / or the reference voltage line V REFThe voltage can be monitored via a voltage monitor 413*, whereby the voltage transformer 408* and / or the voltage monitor 413* can be supplied with voltage via a positive supply voltage line VDD relative to the reference potential on the reference potential line GND. The voltage transformer 408* can be connected to the voltage monitor 413* via a voltage transformer line 421*.

[0178] The pulse extension circuit 406* can be a monostable multivibrator (monoflop, MF). The monoflop can be used to extend a pulse on the digital output signal line 407* of the ADC 403* depending on a specific predefined system clock, for example, to a duration of at least one clock cycle of the system clock.

[0179] The pulse extension circuit 406* can output a synchronized voltage signal 415*, i.e., for example, a pulse with a certain minimum length, and optionally pass it to a pseudorandom number generator 404.3*.

[0180] The pseudorandom number generator 404.3* can be a time-to-pseudo-random number converter (TPRC). This can be a single-stage or multi-stage converter. For example, the TPRC can include an analog instrument, a time-to-analog converter (TAC), and / or an analog-to-pseudo-random number converter (APRC). The TPRC can include a feedback shift register which, depending on its design, shifts its values ​​one position left or right with each clock cycle of the system clock and feeds the feedback value of a predefined feedback polynomial into the freed bit. The feedback polynomial can be a simple, primitive one. One advantage of such a TPRC is its speed and small chip area, as well as the fact that an attacker can hardly measure its success.Instead of the TPRC, a time-to-digital converter (TDC) can also be used, which is typically a binary start-stop counter that is started with a first pulse of the synchronized voltage signal 415* and stopped with a second pulse of the synchronized voltage signal 415*. The pseudorandom number generator 404.3* can be (optionally directly) connected to an internal data bus 419*. An output signal 410* of the pseudorandom number generator 404.3* can also be fed to an entropy extraction unit 404.4*.

[0181] To generate the output signal 410* of the pseudorandom number generator 404.3*, starting with a seed value of the pseudorandom number generator 404.3*, exactly one pseudorandom number from the pseudorandom number generator 404.3* can be assigned (bijectively) to each clock cycle of the system clock after a falling edge of the synchronized voltage signal 415*, i.e., from the value of the pseudorandom number, the time position of the corresponding clock cycle of the system clock after the falling edge of the synchronized voltage signal 415* can then be deduced.

[0182] Thus, a pseudorandom number generator 404.3* can be used. One advantage of this is that even if an attacker successfully injects a disturbance into the synchronized voltage signal 415*, the randomness of the quantum random bit at the output 411* of the entropy extraction 404.4* is only marginally affected, since the attacker would need to know the corresponding feedback polynomial of the pseudorandom number generator 404.3*. The feedback polynomial can, for example, be randomly selected from a multitude of possibilities. The same applies to the seed value of the pseudorandom number generator 404.3*, which an attacker would also have to determine. Another advantage of a pseudorandom number generator 404.3* over a simple digital counter is the smaller footprint of the feedback logic, achieved using a simple, primitive feedback polynomial compared to a binary counter.If the linearly feedback shift register of the pseudorandom number generator is long enough, then each clock cycle between two pulses of the voltage signal 405* generated by the entropy source 401* is typically assigned a unique pseudorandom number.

[0183] Entropy extraction 404.4* can be used to detect an error (i.e., an undesired state) in the output signal 410* of the pseudorandom number generator 404.3*. For this purpose, entropy extraction 404.4* can utilize two linearly feedback shift registers that are comparable via a comparator. This eliminates the need for conventional binary counters. Depending on the register depth, feedback can be implemented using simple primitive polynomials as generator polynomials and feedback polynomials, respectively. The length of the linearly feedback shift registers is freely adjustable. Longer shift registers generally exhibit good random statistics or random distributions. Shorter shift registers allow for a high data rate. Using shift registers in this context offers the advantage of requiring fewer gates, allowing for a small logic depth in the circuits, and thus enabling a high clock rate.This reduces the probability of two identical numbers occurring and increases the random bit rate.

[0184] A corresponding entropy extraction procedure can provide that two values ​​of the output signal 410* of the pseudorandom number generator 404.3* are first determined and stored in shift registers of the entropy extraction device 404.4*. Once two values ​​are stored in the shift register of the entropy extraction device 404.4*, the device can compare these two values. The values ​​in the shift registers of the entropy extraction device 404.4* thus comprise a first value and a second value, both of which were determined by the pseudorandom number generator 404.3*. The entropy extraction device 404.4* can then evaluate the two values. If the first value is smaller than the second value and the difference between the first and second values ​​is greater than a minimum difference ε, the entropy extraction device 404.4* can set the value of its output 411* to a first logical value.If the first value is greater than the second value and the difference between the first and second values ​​is greater than the minimum difference ε, then the entropy extraction 404.4* can set its output 411* to a second logical value that is different from the first logical value. If the difference between the first and second values ​​is less than the minimum difference ε, then the entropy extraction 404.4* can discard both the first and second values. In such a case, the entropy extraction 404.4* can cause a so-called watchdog 404.5* to increment an error counter by a first error counter increment. The first error counter increment can be negative. Conversely, the entropy extraction 404.4* can decrement the error counter of the watchdog 404.5* by a second error counter increment if the difference between the first and second values ​​is greater than the minimum difference ε.The second error counter increment can be the same as the first. The respective logical value (e.g., 0 or 1) to which the entropy extraction 404.4* sets its output 411* corresponds to a random number. Since the entropy extraction 404.4* continuously outputs random numbers, this creates a random number stream ZBS. This random number stream ZBS can be used for a crypto engine 800*, as described in more detail later.

[0185] The Watchdog 404.5* can be connected to the internal data bus 419* as a transport medium for the random bitstream ZBS. The internal data bus 419* can be connected, for example, to a crypto engine 800* and / or one or more memories and / or one or more CPUs (see also the description of...). Fig. 17) The watchdog 404.5* can be connected to the voltage monitor 413* via one or more optional digital input / output signal lines 414*. The watchdog 404.5* can monitor voltage values ​​determined by the voltage monitor 413*. The voltage monitor 413* can be configured to determine and / or monitor one or more voltages in the quantum random number generator 400*, and optionally also one or more voltages within a specific application circuit, such as the crypto engine 800* and / or a system 1000*. The voltage monitor 413* can, for example, be an ADC.

[0186] One task of the watchdog 404.5* can be to monitor the entropy quality of the random numbers at the output 411* of the entropy extraction unit 404.4*, which form the random bit stream ZBS. The watchdog 404.5* can be configured to detect at least three defined error cases. The watchdog 404.5* can pass valid quantum random bits 411*, generating a seed value S, via a line 412* to a (backup) pseudo-random number generator (PRNG) 404.6*, which may include another linearly feedback shift register. The watchdog 404.5* can prevent the use of the valid quantum random bits by a finite-state machine 404.8*. This machine is shown here connected to the internal data bus 419* as an example. If an error occurs, the 404.5* watchdog can set certain error bits for further evaluation, which another bus participant (e.g.,a microcontroller (MCU)) can read and / or write via an external data bus DB, a data bus interface DBIF and the internal data bus 419*.

[0187] If, for example, the watchdog 404.5* detects a fault in the quantum random number generator 400*, it can put the quantum random number generator 400* into a failsafe state. To do this, the watchdog 404.5* can, for example, set a selection signal 416* of a signal multiplexer 404.7* downstream of the random number generation such that the signal multiplexer 404.7* sends the pseudorandom number PRN of the optional PRNG 404.6* as a stream of pseudorandom bits via a pseudorandom signal line 417* to the input of the finite-state machine 404.8* instead of the random numbers RN at the output 411* of the entropy extraction 404.4*.

[0188] The optional additional linear feedback shift register of the PRNG 404.6* can be configured to generate pseudorandom numbers (PRN). The seed value S can contain the last valid quantum random bits of the output 411* of the entropy extraction unit 404.4*. The watchdog 404.5* can then apply or output these last valid quantum random bits 411* to the input of the optional PRNG 404.6*. The seed value S can thus be used as a random, safe starting value for a generator polynomial for the feedback of the optional additional linear feedback shift register of the PRNG 404.6* to generate the pseudorandom number PRN and signal it via the pseudorandom signal line 417*. The generator polynomial and its degree can be freely selected. The optional backup pseudo-random number generator 404.6* allows for the provision of secure random numbers, at least temporarily, in case of an error.

[0189] The finite-state machine 404.8* can be configured to receive the random numbers forming the random bitstream ZBS, or optionally the pseudorandom number PRN (optionally at the output of the signal multiplexer 404.7*), and to generate at least one quantum random data word 418* based on this. Optionally, the quantum random data word 418* can be written from the machine 404.8* to a memory 404.9*, optionally a volatile memory (RAM) or a FIFO (First In - First Out) memory, via a pseudorandom signal line 417*. It is conceivable that the machine 404.8* sets a finish flag 404.10* via the internal data bus 419* as soon as the quantum random data word 418* has been written to the memory 404.9*. A processor (MCU) can then, for example, access memory 404.9* and read the quantum random data word 418* and use it, for example, for encryption.This means that, in addition to or as an alternative to the random bit data stream ZBS, the crypto engine 800* (see . ) can be used. Fig. 17) The quantum random data word 418* can also be used for encryption. The description below, referring to the random bit data stream ZBS, therefore applies analogously to the quantum random data word 418*.

[0190] Fig. Figure 16 shows a schematic representation of an exemplary layout of an integrated electronic circuit 500* with the quantum random number generator 400* with the entropy source 401* in a pad frame 503* in a top view.

[0191] The integrated electronic circuit 500*, for example a microcontroller with a CPU, can have an inner area 505*. Subcircuits of the integrated electronic circuit 500* can be located within the inner area 505*.

[0192] The inner area 505* can be surrounded by a wiring area 504*. Supply voltage lines, data bus lines and / or other lines can be routed or located within the wiring area 504*.

[0193] The wiring area 504* and the inner area 505* of the integrated electronic circuit 500* can be surrounded by a pad frame 503* (also referred to as a pad border). The pad frame 503* can include connection pads 502* (connection surfaces) (optional for electrical bond connections and / or other electrical connection points).

[0194] The entropy source 401* and / or the quantum random number generator 400* can be located wholly or at least substantially within the pad frame 503*, more precisely between at least two connection pads 502*. This is possible because gaps between the individual connection pads 502* cannot be filled with electronic circuit components. However, these gaps must still be processed during the manufacturing of the integrated electronic circuit 500* and can therefore incur manufacturing costs. Placing the entropy source 401* and / or the quantum random number generator 400* wholly or at least substantially within the pad frame 503* can therefore reduce the additional costs for their provision.

[0195] At least the photon source 55* and / or the photon detector 54* can be placed or arranged in the pad frame 503* (optionally between two connection pads 502*). Furthermore, the ADC 403*, the voltage converter 408* for supplying power to the entropy source 403*, the pulse extension circuit 406*, and / or other analog components of the quantum random number generator 400* can be placed in the pad frame 503* (optionally between two connection pads 502*).

[0196] Fig. Figure 17 shows a schematic representation of a system for encrypted communication 1000* with a quantum random number generator, optionally the quantum random number generator 400* described above, a crypto engine 800* and a data interface 600*.

[0197] The system 1000* is connected to an external data processing device or an external computer system 700*, optionally a microprocessor or an MCU, via the data interface 600* and a data bus 601*.

[0198] The quantum random number generator 400* has at least the entropy source 401* described above. The quantum random number generator 400* could be the quantum random number generator 400* described above, meaning that, in addition to the entropy source 401*, the quantum random number generator 400* could have one or more of the sources mentioned above in relation to Fig. The 14 described units comprise the above description. The above description therefore also applies analogously to the 1000* system. Insofar as individual units of the quantum random number generator 400* are related to Fig. As described again in section 17 below, this description also applies to the quantum random number generator 400* described above.

[0199] The quantum random number generator 400* is designed to output the random bit data stream ZBS generated as described above to the crypto engine 800*.

[0200] The Crypto Engine 800* can be configured to encrypt an initial random bit portion of the random bit data stream ZBS into an encrypted random bit data stream VZS. For this purpose, the Crypto Engine 800* can use a key that may be stored in a memory 801* of the Crypto Engine 800*.

[0201] The MCU 700* can be configured to retrieve encrypted random bits as encrypted random numbers via the data bus 601* and the data interface 600*.

[0202] The crypto engine 800* can be configured to decrypt encrypted commands from the external computer system 700* to the system 1000*, which the MCU 700* outputs to the system 1000* via the data bus 601* and the interface 600*.

[0203] The Crypto Engine 800* can be configured to output the decrypted commands to the System 1000* or to use them itself if the Crypto Engine 800* is the intended recipient of such a decrypted command. This allows the MCU 700* to securely control the System 1000*.

[0204] The watchdog 404.5* or a similar device can be configured to monitor the entropy of the random bit stream ZBS, the operating voltage of the entropy source 401* and / or the voltage converter 408*, ​​which provides the supply voltage VSUP for the entropy source 401*, an externally applied supply voltage and / or a supply voltage device CLV for the supply voltage of the digital device parts for correct function or correct values.

[0205] Additional monitoring circuits 1001* may be configured to detect further anomalies.

[0206] A voltage pre-regulator 1002* can be designed to supply further voltage regulators with electrical energy and to keep the current constant (to exclude side channels via power consumption).

[0207] A test interface 1003* can enable a fabrication test.

[0208] That means, Fig. Figure 17 shows a schematic representation of a system for encrypted communication 1000* with a quantum random number generator, optionally the quantum random number generator 400* described above, a crypto engine 800*, and a data interface 600*. The system 100* is connected to an external data processing device, optionally a microprocessor or MCU 700*, via the data interface 600* and a data bus 601*. The quantum random number generator 400* includes at least the entropy source 401* described above.

[0209] In detail, the quantum random number generator 400* generates a random bitstream ZBS of random bits, which is used in the crypto engine 800* for key generation and / or other cryptographic operations. The entropy source 401* described above enables a high random bit rate in the random bitstream ZBS, thus improving the security of the cryptographic operations of the crypto engine 800*.

[0210] The 400* quantum random number generator can achieve a high random bit rate, which can form the basis for secure cryptographic operations. This high random bit rate can significantly increase security against quantum attacks. The high random bit rate ensures high security and efficiency by providing the foundation for fast and secure key generation and encryption operations.

[0211] The crypto engine 800* can include an encryption unit 801*, which is configured to generate at least one cryptographic key based on an initial random bit component of the random bit stream ZBS. The encryption unit 801* can be configured to encrypt data that the system 1000* sends to other bus participants via a data bus 600* in the form of an output data stream VZS, based on the generated key. The encryption in the crypto engine 800* can be performed by a computer- and / or machine-implemented algorithm.

[0212] The Crypto-Engine 800* can optionally be implemented entirely as a computer-implemented device.

[0213] The crypto engine 800* can have a memory location 802*. The computer-implemented encryption algorithm, more precisely the program code, can be stored at least temporarily in memory location 801*.

[0214] The Crypto Engine 800* can include a CPU 803*. When executing the computer-implemented algorithm, the CPU 803* can execute the algorithm's program code stored in memory 802*. This can have a technical effect in the form of secure encryption of data that the System 1000* sends via data bus 601* to another bus participant (e.g., the MCU 700*). The CPU 803* is not exclusively a component of the Crypto Engine 800*, but can also be part of System 1000* and / or the Quantum Random Number Generator 400*.

[0215] The data sent or output by System 1000* can include a second random bit component of the random bit stream ZBS. The intersection of the first set of the first random bit component of the random bit stream ZBS and the second set of the second random bit component of the random bit stream ZBS can be empty or zero, so that no random bits are sent by System 1000* to other bus participants (e.g., MCU 700*) of data bus 601*, which System 1000* used for data encryption.

[0216] The quantum random number generator 400* can include an entropy module – also called watchdog 404.5* – which can be configured to monitor the entropy of the random bits of the random bit stream ZBS generated by the quantum random number generator 400*, or of random data derived therefrom. The entropy module 404.5* can be configured to determine and / or monitor a measurement for a predetermined parameter of the entropy of the random bits of the random bit stream ZBS. Such measurements can be, for example, the mean, standard deviation, etc. The entropy module 404.5* can be configured to compare the measurement with an acceptable range of values ​​and to take a predetermined countermeasure if the measurement is outside the acceptable range. In this way, the entropy module 404.5* can...5* ensure that sufficient randomness is present to guarantee secure cryptographic operations using the random bits of the random bit stream ZBS. If necessary, the entropy module 404.5* can also require deviations from randomness that are reasonable from a security perspective. For example, it can invert the random bit stream ZBS for subsequent random bits whenever the quantum random number generator 400* has generated a predetermined number of consecutive random bits with the same logical content. Optionally, this function of deliberately deviating from an ideal random bit stream ZBS can be switched on and off via the data interface 601* of the system 1000* by means of an encrypted write command to a register or flag of the quantum random number generator 400* or one of its device components. The entropy module 404.5.5* can perform this monitoring using a computer- and / or machine-implemented algorithm. The program code of the computer-implemented algorithm can be stored in a 404.9* memory of the Quantum Random Number Generator 400*. The program code can be executed by a CPU of the Quantum Random Number Generator 400 or the System 1000*. The use of an Entropy Module 404.5* can offer the advantage of increased security for the cryptographic processes of the Crypto Engine 800* and improved usability of the random bits of the Random Bit Stream ZBS of the Quantum Random Number Generator 400*.

[0217] The quantum random number generator 400* can include a filter module – also known as entropy extraction 404.4*. The filter module 404.4* of the quantum random number generator 400* can be designed to improve the statistical properties of the random bits in the random bit stream ZBS by removing systematic patterns and / or ensuring the uniform distribution of the random bits. Here, too, a computer- and / or machine-implemented algorithm can be used (with the above descriptions regarding algorithms applying analogously). Optionally, the filter module is part of a control logic. The filter module 404.4* can offer the advantage of optimizing the random bits of the random bit stream ZBS for cryptographic applications. Optionally, the filter module 404.4* can...5* include a digital high-pass filter that limits the ideal white noise of an ideal random bit data stream to low frequencies, which has the effect of avoiding too many consecutive random bits in the random bit stream ZBS of the same logical content.

[0218] The System 100* can include an interface unit—also referred to as a data bus interface 600*—which can be configured to enable encrypted communication between the System 1000*, specifically the Crypto Engine 800*, and an external system connected as bus participants on a common data bus 601*. The interface unit 600* can be configured to support at least one or more different communication protocols. This allows the System 1000* to be used in various networks. Optionally, the interface unit 600* can be configured for this purpose via a voltage level at designated external terminals and / or via special cryptographic commands. The interface unit 600* ensures that encrypted data (VZS) can be securely transmitted through the System 1000* and thus through the Crypto Engine 800*.The control of the communication protocols can include a computer- and / or machine-implemented algorithm (whereby what was described above with reference to the algorithms applies analogously) and / or software programs (unless explicitly stated otherwise herein, computer-implemented also means machine-implemented). This enables secure data transmission between the quantum random number generator 400* and / or the crypto engine 800* and / or other bus participants (e.g., MCU 700*) of the shared data bus 601*.The data that the system 1000* and / or the crypto engine 800* transmit as part of the system 1000* to other bus participants 700* of the data bus 601* can again include the aforementioned second random bit component of the random bits of the random bit stream ZBS of the quantum random number generator 400* and / or status information of the quantum random number generator 400* and / or its device parts and / or status information of the crypto engine 800* and / or status information of other device parts of the system 1000*. The data that the system 1000* and / or the crypto engine 800* receive from other bus participants (e.g. MCU 700*) via the data bus 601* can again include the aforementioned control data for configuring the quantum random number generator 400* and / or the crypto engine 800*.

[0219] The System 1000* and / or the Crypto Engine 800* and / or the Quantum Random Number Generator 400* may include one or more CPU cores and / or one or more memories in which program code for a computer- and / or machine-implemented emulation of device parts of the System 1000* and / or the Crypto Engine 800* and / or the Quantum Random Number Generator 400* and / or other device parts of the System 1000* is stored, at least temporarily.

[0220] In operation of the system 1000*, the quantum random number generator 400* can continuously generate random bits of the random bit stream ZBS.

[0221] The generated random bits can be monitored by the entropy module 404.5* to ensure that they actually have sufficient entropy.

[0222] The monitored random bits can be filtered by the 404.4* filter module, optionally to ensure that they do not contain systematic patterns, are evenly distributed and / or do not include random structures that could ultimately result in the random sending of messages in plaintext over a period of time.

[0223] The first random bit component of the filtered random bits can be fed to the encryption unit 801* of the crypto engine 800*, which uses the random bits of the first filtered random bit component to generate cryptographic keys and / or to encrypt data of the system 1000*.

[0224] The interface unit 600* can ensure the secure transmission of encrypted data to external systems or other bus participants (e.g. MCU 700) of the external data bus 601*.

[0225] The cooperation of these device components can ensure a high level of security for the System 1000* and the Crypto-Engine 800*, since the generated random bits are highly random and the cryptographic operations are therefore very difficult to compromise.

[0226] The Crypto Engine 800* can include a Key Management Unit 804*. The Key Management Unit 804* can be configured to manage the generated cryptographic keys, store them, and / or make them available to the necessary processes or units that require them. This has the advantage of securely managing the keys of the Crypto Engine 800*.

[0227] The System 1000* can include a line control unit, which can be configured to monitor signals on communication lines running between the various modules of the System 1000* and / or the Crypto Engine 800*. This ensures that data integrity is maintained.

[0228] The performance control unit can be part of a so-called watchdog of the System 1000*, which monitors the correct function of the System 1000* (Health Check) and detects attacks if necessary, or measures the probability of an attack currently taking place and determines a corresponding measurement if necessary.

[0229] It is conceivable that the Crypto Engine 800* is implemented as, or includes, a post-quantum crypto engine. This would protect the Crypto Engine 800* against attacks by quantum computers and, potentially, modern artificial intelligence algorithms. The Crypto Engine 800* and / or the System 1000* could include a Post-Quantum Coprocessor 805* for this purpose. The Post-Quantum Coprocessor (PQK) could be defined as a special processor designed to execute computer- and / or machine-implemented post-quantum cryptography algorithms. Optionally, the Post-Quantum Coprocessor 805* is a component of the Crypto Engine 800*. The Post-Quantum Coprocessor 805* can also be a component of the System 1000* and interact with the Crypto Engine 800*. This would provide increased resistance to quantum attacks.

[0230] The Crypto Engine 800* and / or the System 1000* can use one or more of the following methods for PQC encryption: ‚BIKE1-L1-CPA‘, ‚BIKE1-L3-CPA‘, ‚BIKE1-L1-FO‘, ‚BIKE1-L3-FO‘, ‚Kyber512‘, ‚Kyber768‘, ‚Kyber1024‘, ‚Kyber512-90s‘, ‚Kyber768-90s‘, ‚Kyber1024-90s‘, ‚LEDAcryptKEM-LT12‘, ‚LEDAcrypt-KEM-LT32‘, ‚LEDAcryptKEM-LT52‘, ‚NewHope-512-CCA‘, ‚NewHope-1024-CCA‘, ‚NTRU-HPS-2048-509‘, ‚NTRU-HPS-2048-677‘, ‚NTRU-HPS-4096-821‘, ‚NTRU-HRSS-701‘, ‚LightSaber-KEM‘, ‚Saber-KEM‘, ‚FireSaber-KEM‘, ‚BabyBear‘, ‚BabyBearEphem‘, ‚Mama-Bear‘, ‚MamaBearEphem‘, ‚PapaBear‘, ‚PapaBearEphem‘, ,FrodoKEM-640-AES', ‚FrodoKEM-640-SHAKE‘, ‚FrodoKEM-976-AES‘, ‚FrodoKEM-976-SHAKE‘, ‚FrodoKEM-1344-AES‘, ‚FrodoKEM-1344-SHAKE‘, ‚SIDH-p434‘, ‚SIDH-p503‘, ‚SIDH-p610‘, ,SIDH-p751', ‚SIDH-p434-compressed‘, ‚SIDH-p503-compressed‘, ‚SIDH-p610-compressed‘, ‚SIDH-p751-compressed‘, ‚SIKE-p434‘, ‚SIKE-p503‘, ‚SIKE-p610‘, ‚SIKE-p751‘, ‚SIKE-p434-compressed‘, ‚SIKE-p503-compressed‘, ‚SIKE-p610-compressed‘, ‚SIKE-p751-compressed‘.

[0231] The Crypto Engine 800* and / or the System 1000* can use one or more of the following PQC signature methods for signing data messages: ‚DILITHIUM_2‘, ‚DILITHIUM_3‘, ‚DILITHIUM_4‘, ‚MQDSS-31-48‘, MQDSS-31-64', SPHINCS+-Haraka-128f-robust', SPHINCS+-Haraka-128f-simple', ‚SPHINCS+-Haraka-128s-robust‘, ‚SPHINCS+-Haraka-128s-simple‘, ‚SPHINCS+-Haraka-192f-robust‘, ‚SPHINCS+-Haraka-192f-simple‘, ‚SPHINCS+-Haraka-192s-robust‘, ‚SPHINCS+-Haraka-192s-simple‘, ‚SPHINCS+-Haraka-256f-robust‘, ‚SPHINCS+-Haraka-256f-simple‘, ‚SPHINCS+-Haraka-256s-robust‘, ‚SPHINCS+-Haraka-256s-simple‘, ‚SPHINCS+-SHA256-128f-robust‘, ,SPHINCS+-SHA256-128f-simple', ‚SPHINCS+-SHA256-128s-robust‘, ‚SPHINCS+-SHA256-128s-simple‘, ‚SPHINCS+-SHA256-192f-robust‘, ‚SPHINCS+-SHA256-192f-simple‘, ‚SPHINCS+-SHA256-192s-robust‘, ‚SPHINCS+-SHA256-192s-simple‘, ‚SPHINCS+-SHA256-256f-robust‘, ‚SPHINCS+-SHA256-256f-simple‘, ‚SPHINCS+-SHA256-256s-robust‘, ‚SPHINCS+-SHA256-256ssimple‘, ‚SPHINCS+-SHAKE256-128f-robust‘, ‚SPHINCS+-SHAKE256-128f-simple‘, ‚SPHINCS+-SHAKE256-128s-robust‘, ‚SPHINCS+-SHAKE256-128s-simple‘, ‚SPHINCS+-SHAKE256-192f-robust‘,'SPHINCS+-SHAKE256-192fsimple', 'SPHINCS+-SHAKE256-192s-robust', 'SPHINCS+-SHAKE256-192s-simple', 'SPHINCS+-SHAKE256-256f-robust', 'SPHINCS+-SHAKE256-256fsimple', 'SPHINCS+-SHAKE256-256s-robust', 'SPHINCS+-SHAKE256-256s-simple',m'picnic L1_FS', 'picnic_L1_UR', 'picnic_L3_FS', 'picnic_L3_UR', 'picnic_L5_FS', 'picnic_L5_UR', 'picnic2_L1_FS', 'picnic2_L3_FS', 'picnic2_L5_FS', 'qTesla-pI', 'qTesla-p-III'.,

[0232] The second random bit component of the random bit stream ZBS can be used to generate the relevant signatures and keys.

[0233] The Crypto Engine 800* and / or the System 1000* can include a (quantum-resistant) Key Generator 806*. This Key Generator 806* is optionally part of the Crypto Engine 800* and / or the System 1000* and can be configured to generate a key that is resistant to quantum attacks (according to current technological standards). The quantum-resistant Key Generator 806* achieves this by using random bits from the first random bit portion of the random bit stream ZBS for key generation. This allows for the creation of secure, quantum-resistant keys.

[0234] The quantum random number generator can be designed to provide a random bit rate of the random bit stream ZBS that is high enough to generate quantum-resistant keys.

[0235] These keys can be generated by the quantum-resistant key generator 806* and subsequently used by the post-quantum coprocessor 805* to encrypt the data transmitted by the system 1000* and / or its crypto engine 800* and / or its device components.

[0236] The interface unit 600* can be designed to ensure that the quantum-resistant keys are transmitted securely.

[0237] This ensures the security of data transmission to and from System 1000*.

[0238] The System 1000* can be designed for applications that require high computing power, such as in high-frequency trading systems or other time-critical applications.

[0239] The System 1000* and / or the Crypto Engine 800* can include a parallel encryption processor 807*. This parallel encryption processor 807* enables the Crypto Engine 800* to perform multiple encryption operations simultaneously, minimizing processing time. The system can include more than one CPU and / or more than one quantum random number generator 400* to operate or execute the encryption operations, which are optionally implemented as algorithms. This can have the advantage of enabling the System 1000* to process data more quickly.

[0240] The System 1000* can have a (fast) clock line 808* (or a clock line 808* operating at a higher frequency compared to the other clock lines). The clock line 808* can be configured to synchronize an operation of the parallel encryption processor 807* with the other modules of the crypto engine 800* and / or the System 1000*. This avoids delays and can achieve the desired synchronization.

[0241] The quantum random number generator 400* can provide the required random bits at a high bit rate, which are directly passed to the parallel encryption processor 807*. The parallel encryption processor 808* can be configured to use these random bits to perform parallel encryption operations. The clock line 808* can be configured to ensure that the operations of the device components of the system 1000* are synchronized. Performing parallel encryption through the parallel encryption processor 807* can offer the advantage of increased processing speed for the system 1000*. This can provide high computing power and enable the simultaneous execution of multiple cryptographic operations, which can be beneficial in time-critical applications.

[0242] An energy-efficient Crypto Engine 800* can be provided, e.g. for use in a mobile device (e.g. smartphone, tablet etc.) and / or an IoT system.

[0243] The Crypto Engine 800* and / or the System 1000* may include an Energy Saving Module 809*. This Energy Saving Module 809* may be configured to monitor and / or regulate the energy consumption of the System 1000* and / or the Crypto Engine 800*. It is conceivable that the Energy Saving Module 809* is configured to deactivate unused modules of the System 1000* and / or the Crypto Engine 800* and / or reduce their performance. This can achieve the desired energy savings.

[0244] It is conceivable that the system 1000* receives encrypted commands via the data bus 601*, which necessitate a restriction and / or cessation of the generation of random bits. The system 1000* may also, for example, have a power-down pin to reduce energy consumption. This can be advantageous, among other things, because the entropy source 401* may require higher voltages. This, in turn, can optimize energy consumption.

[0245] The Crypto Engine 800* and / or the System 1000* can include a (low-energy) clock line 810*, i.e., a special clock line that operates at a (lower) frequency (or a frequency that is low or small compared to the other frequencies used). This can reduce energy consumption.

[0246] Function and Interaction: The internal random number generator (RNG) operates either in a power-saving mode with lower energy consumption and typically a lower random bit rate (which can then be zero) or in a normal operating mode with increased energy consumption and a higher random bit rate. The power-saving module ensures that only the necessary random bits are generated. The low-power clock line synchronizes the operations of the RNG and the crypto engine while maintaining low energy consumption. The technical benefit of this approach is a significant reduction in energy consumption while simultaneously maintaining the security of the cryptographic operations.

[0247] Advantages: This variant is particularly suitable for use in battery-powered devices, as it reduces energy consumption to a minimum.

[0248] Disadvantages: The reduced performance may not be sufficient in applications that require high computing power.

[0249] A security-focused Crypto Engine 800* can be provided. The Crypto Engine 800* can meet the highest security requirements.

[0250] The Crypto Engine 800* and / or the System 1000* can include a Security Monitor 811*. The Security Monitor 811* can be configured to continuously monitor the state of the Quantum Random Number Generator 400*, the Crypto Engine 800*, and / or other components of the System 1000*. The Security Monitor 811* can be configured to shut down and / or reconfigure the Quantum Random Number Generator 400*, the Crypto Engine 800*, and / or other components of the System 1000* in the event of a (detected) attack and / or error, and / or to put them into a predetermined safe mode and / or an emergency state. The Security Module 811* can be configured to allow one or more bus participants (e.g.,The MCU 700*) on the data bus 601* can signal such an incident (for example, via an interrupt line and / or an interrupt line in conjunction with setting a specific register flag and / or an interrupt in conjunction with setting a specific register value in a register of the system 1000* and / or by setting a specific register and / or flag value in a register of the system 1000*). This improves and ensures the security of the entire crypto engine 800* and the system 1000*. The security monitor 811* can be part of the watchdog 404.5* described above, which performs the health check. The security monitor 811* can be implemented entirely or at least substantially in hardware to reduce its susceptibility to manipulation.

[0251] The Crypto Engine 800* and / or the System 1000* can include a (secure) communication unit 812*, which can be configured to ensure encrypted and / or eavesdropping-proof communication via the interface 600*, optionally all external interfaces of the System 1000*. This enables secure communication.

[0252] Encrypted or eavesdropping-proof communication can refer to the use of technologies and procedures that ensure the confidentiality and integrity of information during transmission. Such communication techniques protect messages from unauthorized access, eavesdropping, and / or manipulation by third parties.

[0253] Encryption can be understood as the process by which a message (plaintext) is converted into unreadable text (ciphertext) using an algorithm. An unauthorized third party who intercepts the message cannot read it without the corresponding decryption key. Examples of encryption methods include symmetric encryption (e.g., AES) and / or asymmetric encryption (e.g., RSA).

[0254] The quantum random number generator 400* can continuously supply random bits, which can be monitored for integrity by the security monitor 811*. The communication unit 812* can ensure that (all external) data transmissions via the data bus 601* are encrypted and / or protected against eavesdropping. A high level of security for the crypto engine 800* and the system 1000* can be achieved through computer- and / or machine-implemented monitoring algorithms of the security monitor 811* and / or encryption software of the communication unit 812*.

[0255] Each module can be implemented in hardware and / or software. The control of one, several, or all of the modules described herein can be achieved by one or more computer- and / or machine-implemented algorithms. A CPU of the Quantum Random Number Generator 400*, the Crypto Engine 800*, and / or the CPU of the System 1000* can be configured to execute the respective program code of the algorithm(s). The algorithm(s) can be stored in a memory of the Quantum Random Number Generator 400*, the Crypto Engine 800*, and / or the CPU of the System 1000*. The term "control" also includes regulation, i.e., control with feedback.

[0256] The following disclosure relates to the quantum random number generator according to an optional embodiment and to an entropy source which may be included by the quantum random number generator. One or more quantum random number generators, which may optionally have the optional features presented below, may be included by an electronic circuit and / or used by a disclosed method and / or integrated into the other disclosed items, although this is not mandatory. The optional features of the quantum random number generator and the entropy source are specified in the following clauses: 1. Quantum random number generator (400*), characterized in that the quantum random number generator (400*) comprises: - a monolithically integrated entropy source (401*), wherein the entropy source (401*) comprises: - a photon source (55*) configured to emit photons (58*), wherein the photon source (55*) comprises: - a first outer shell, wherein the first outer shell is formed by a first base (551*), a first top surface (552*) and at least one first side surface (553*) connecting the first base (551*) and the first top surface (552*), and - a photon detector (54*) designed to detect the photons (58*) emitted by the photon source (55*), - wherein the first base surface of the photon source (55*) is arranged facing the photon detector (54*), and - an electronic circuit designed to generate a random bit (411*) depending on an output signal (405*) of the entropy source (401*), and optionally to output the generated random bit (411*), - wherein a manifestation of the output signal (405*) of the entropy source (401*) depends on a temporal frequency of the photons (58*) detected by the photon detector (54*). 2. Entropy source (401*) according to clause 1, characterized in that the photon detector (54*) comprises: - a second outer shell, wherein the second outer shell is formed by a second base (541*), a second top surface (542*) and at least one second side surface (543*) connecting the second base (541*) and the second top surface (542*), - wherein the first base (541*) of the photon source (55*) is arranged facing the second base (541*) of the photon detector (55*). 3. Monolithically integrated entropy source (401*), optionally for a quantum random number generator (400*), wherein the entropy source (401*) comprises: - a photon source (55*) designed to emit photons (58*), and - a photon detector (54*) configured to detect the photons (58*) emitted by the photon source (55*), the photon detector (54*) comprising: - a second outer shell, wherein the second outer shell is formed by a second base surface (541*), a second top surface (542*) and at least one second side surface (543*) connecting the second base surface (541*) and the second top surface (542*), characterized in that - the second base surface (541*) of the photon detector (54*) is arranged facing the photon source (55*). 4. Entropy source (401*) according to one of the preceding clauses, characterized in that the photon source (55*) is a silicon LED and / or a single photon source, optionally a SPAD or an avalanche Zener diode, wherein the avalanche Zener diode optionally has a breakdown voltage of less than 10 V. 5. Entropy source (401*) according to one of the preceding clauses, characterized in that the photon source (55*) comprises: - a third pn junction (554*) formed from a third p-layer (46*) and a third n-layer (45*), - where the third p-layer (46*) and the third n-layer (45*) are optionally in contact with each other. 6. Entropy source (401*) according to one of clauses 1 to 5, characterized in that the photon detector (54*) comprises a single-photon detector, optionally a single-photon avalanche diode, optionally a SPAD. 7. Entropy source (401*) according to one of clauses 1 to 6, characterized in that the photon detector (55) comprises: - a first pn junction (50*) formed from a first p-layer (32*) and a first n-layer (22*), - where the first p-layer (32*) and the first n-layer (22*) are optionally in contact with each other. 8. Entropy source (401*) according to clause 7, characterized in that the photon detector (55*) comprises: - an absorption region (47*) designed and arranged to absorb the photons (58*) emitted by the photon source (55*) in such a way that the absorption region (47*) generates, optionally exactly, one electron-hole pair per photon (58*), - wherein the absorption region (47*) is in contact with the first pn junction (50*) and the first pn junction (50*) is designed to generate a charge avalanche due to the generated electron-hole pair, and - the photon detector (54*) is designed to detect the respective photon (58*) emitted by the photon source (55*) based on the generated charge avalanche. 9. Entropy source (401*) according to clause 8, characterized in that the absorption region (47*) has or consists of a p-doped substrate (10*) that completely covers a surface of the first pn transition (50*) facing towards the photon source (55*). 10. Entropy source (401*) according to clause 8, characterized in that the absorption region (47*) has a p-doped substrate (10*) which only partially covers a surface of the first pn transition (50*) facing the photon source (55*) and forms a channel extending from this surface of the first pn transition (50*) towards the photon source (55*), which is laterally bounded by an n-doped substrate (29*). 11. Entropy source (401*) according to clause 8, characterized in that the absorption region (47*) has or consists of an n-doped substrate (29*) that completely covers a surface of the first pn transition (50*) facing towards the photon source (55*). 12. Entropy source (401*) according to one of clauses 8 to 11, characterized in that the absorption region (47*) is in contact with the photon source (55*), optionally a p-doped substrate (46*) of the photon source (55*). 13. Entropy source (401*) according to one of clauses 1 to 12, characterized in that the photon detector (55*) comprises: - a second pn junction (52*) formed from a second p-layer (32*) and another or the first n-layer (22*), - wherein the second p-layer (32*) and the further or the first n-layer (22*) are optionally in contact with each other. 14. Entropy source (401*) according to one of clauses 1 to 13, characterized in that the entropy source (401*) has a metal layer (53*), optionally together with an internal silicide layer, which shields the entropy source (401*) from the outside. 15. Entropy source (401*) according to clause 14, characterized in that the entropy source (401*) has at least two anodes (124*, 134*) for the photon source (55*) and the photon detector (54*) which are conductively connected to each other via the metal layer (53*). 16. Entropy source (401*) according to one of the preceding clauses, characterized in that the photon source (55*) and / or the photon detector (54*), optionally the entropy source (401*) as a whole, is designed rotationally symmetric along an axis that is perpendicular to the first and / or the second base surface (541*, 551*). 17. Entropy source (401*) according to one of the preceding clauses, characterized in that the entropy source (401*) is produced using BCD technology. 18. Entropy source (401*) according to one of clauses 1 to 17, characterized in that the entropy source (401*) comprises: - a substrate (110*) with a support substrate (49*) and an epitaxial layer (48*), - wherein, as far as referenced to any one of claims 7 to 13, the epitaxial layer (48*) has the first pn junction (50), and, as far as referenced to claim 13, the support substrate (49*) has the second pn junction (52*). 19. Entropy source (401*) according to one of clauses 1 to 18, characterized in that a top and / or bottom surface of the entropy source (401*) is mirrored at least in the area of ​​the photon source (55*) and / or the photon detector (54*) and / or comprises a light-blocking layer. 20. Quantum random number generator (400*) according to one of the preceding clauses, characterized in that the quantum random number generator (400*) comprises a pseudorandom number generator (404.3*) configured to generate a digital output signal (410*) based on the output signal (405*) of the entropy source (401*) and a generator polynomial that is optionally predetermined or adjustable. 21. Quantum random number generator (400*) according to clause 20, characterized in that the quantum random number generator (400*) comprises an entropy extraction (404.4*) configured to generate the random bit (411*) based on the digital output signal (410*) of the pseudorandom number generator (404.3*). 22. Quantum random number generator (400*) according to clause 21, characterized in that the entropy extraction (404.4*) is designed to generate the random bit (411*) in which this: - a first value and a second value of the digital output signal (410*) were determined, - sets a value of an output of the random bit generation unit (404.4*) to a first logical value if the first value of the digital output signal (410*) is less than the second value of the digital output signal (410*) and the difference between the first value of the digital output signal (410*) and the second value of the digital output signal (410*) is greater than a minimum difference (ε), - to set the value of the output of the random bit generation unit (404.4*) to a second logical value if the first value of the digital output signal (410*) is greater than the second value of the digital output signal (410*) and the difference between the first value of the digital output signal (410*) and the second value of the digital output signal (410*) is greater than the minimum difference (ε). 23. Quantum random number generator (400*) according to clause 22, characterized in that the random bit generation unit (404.4*) is configured to discard the first value of the digital output signal (410*) and the second value of the digital output signal (410*) of the digital signal (410*) if a difference between the first and the second value is less than a predetermined minimum difference (ε). 24. Quantum random number generator (400*) according to clause 23, characterized in that the quantum random number generator (400*) comprises a monitoring unit (404.5*) configured to monitor the output of the random bit generation unit, optionally to detect a malfunction of the quantum random number generator (400*) when a number of discarded values ​​of the random bit generation unit (404.4*) exceeds a predetermined limit. 25. Integrated electronic circuit (500*), characterized in that the circuit (500*) comprises a quantum random number generator (400*) according to one of the preceding clauses, wherein the integrated electronic circuit (500*) is optionally a microelectronically integrated circuit. Reference symbol list 100 Computer-implemented method for securing electronic communication with a communication partner 102 - 124 procedural steps 150 first blockchain Block 150a of the first blockchain 152 second blockchain Block 152a of the second blockchain 154 overarching blockchain Block 154a of the parent blockchain 160 Direction of travel 170 overlap 200 electronic circuits 202 Data storage element 204 Quantum Random Number Generator 206 Communication interface 208 Entropy source 300 computer-readable media 302 data 400 computer-readable interface 402 Computer 404 communication partners 500 motor vehicles 502 Control device 600 Trusted Platform Modules 700 computer network 702 network nodes 800 military unit 900 manufacturing processes 902 Procedure step 10* p-doped substrate 29* n area (HVNW / NEPI) 22* first area (e.g. NBL) 32* second area (e.g. PBL) 45* n+ area (N+) 46* p+ area (PBODY) 47* Absorption area 48* epitaxial layer 49* Carrier substrate 51* p+ area (P+) 50* first pn transition 52* second pn transition 53* Metallization or metal layer 54* Photon detector 541* floor area 542* Cover area 543* Side surface / Shell surface 55* photon source 551* floor area 552* Cover area 553* Side surface / Shell surface 554* third pn transition 58* Photon(s) 110* substrate 122* Cathode Photon Source 132* Cathode Photon Detector 124*, 134* Anode 141* Metallization 142* Metallization 400* Quantum Random Number Generator 401* Entropy source 403* Analog-to-Digital Converter 404.3* Pseudorandom number generator 404.4* Entropy extraction or filter module 404.6* (Backup) Pseudo-random number generators 404.7* Signal Multiplexer 404.8* finite automaton 404.9* memory 404.10* Finish Flag 405* Output signal Entropy source 406* Pulse extension circuit 407* Output signal Analog-to-digital converter 408* Voltage converter 410* Output signal of the pseudorandom number generator 411* Output Entropy extraction or filter module 412* Line Watchdog / (Backup) Pseudo-random number generators 413* Voltage monitor 414* Input / Output Signal Lines 415* synchronized voltage signal 416* Selection signal 418* Quantum random data word 419* internal data bus 421* Voltage converter cable 500* integrated electronic circuit 501* Frame / Outer edge 502* Connection pad 503* Pad Frame 504* Wiring area 505* inner area 600* data interface 601* external data bus 700* external data processing device 800* Crypto Engine 801* Crypto Engine Memory 802* memory 803* CPU 804* Key Management Unit 805* Post-Quantum Coprocessor 806* (quantum-resistant) key generator 807* (parallel) encryption processor 808* (fast) clock line 809* Energy saving module 810* (Low-energy) clock line 811* Security Monitor 812* (secured) communication unit 1000* System for encrypted communication 1001* monitoring circuits 1002* Voltage regulator 1003* Test interface VDD supply voltage line V ENT Power supply line V REF Reference voltage line GND reference potential line ZBS random bit (data) stream VZS encrypted random bit data stream O Surface of the substrate S surface of the support substrate QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] EP 3 529 694

[0010] WO 2016 / 016741 A1

[0010] US 2019 / 0 212 985 A1

[0010] Cited non-patent literature

[0000] KANDI, M. A. [et al.]: A Blockchain-based Key Management Protocol for Secure Device-to-Device Communication in the Internet of Things. In: 2020 IEEE I9th International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom), Guangzhou, China, 2020, S. 1868-1873. DOI: 10.1109 / TrustCom50675.2020.00255

[0010] Wikipedia, the free encyclopedia. Bearbeitungsstand: 08.09.2024. URL: https: / / en.wikipedia.org / w / index.php?title=Random_number_generation& oldid=1244727281

[0010] DENNIS, R. [et al.]: A Temporal Blockchain: A Formal Analysis. In: 2016 International Conference on Collaboration Technologies and Systems (CTS), Orlando, FL, USA, 2016, 5.430-437. DOI: 10.11 09 / CTS.201 6.0082

[0010]

Claims

[1] Integrated circuit, characterized by , that the integrated circuit includes: - a data storage element (202); - a quantum random number generator (204); and - a communication interface (206); wherein the data storage element (202), the quantum random number generator (204) and the communication interface (206) are integrated into the integrated circuit and the integrated circuit is configured for this purpose: a) to provide at least one true random number using the quantum random number generator (204); b) to generate a cryptographic key based on the provided random number and to provide it for the adaptation of an encryption method for encrypted communication with a communication partner (404); c) to provide information to the communication partner about the adaptation of the encryption method via the communication interface (206); and d) to generate a block (150a) to confirm the adaptation of the encryption method for a blockchain (150) and to store the blockchain (150) with the block (150a) in the data storage element (202). [2] Integrated circuit according to claim 1, wherein the integrated circuit is further configured to encrypt and / or store the block (150a) and / or the hash value and / or the blockchain (150) using at least one of the random numbers provided by the quantum random number generator (204). [3] Integrated circuit according to claim 1 or 2, wherein the integrated circuit is configured as a microcontroller or as a nanocontroller. [4] Integrated circuit according to any one of claims 1 to 3, wherein the integrated circuit is monolithically designed as a semiconductor component. [5] Integrated circuit according to one of claims 2 to 4, wherein the data storage element (202) is integrated into the integrated circuit as a monolithically integrated data storage element (202). [6] Integrated circuit according to one of the preceding claims, wherein the quantum random number generator (204) comprises a monolithically integrated entropy source (208). [7] Integrated circuit according to one of the preceding claims, wherein the data storage element (202) is configured to provide a storage space of at least 10 kB and optionally a maximum of 2 MB for storing the at least one blockchain (150). [8] Integrated circuit according to one of the preceding claims, wherein the quantum random number generator (204) is configured to provide random numbers with a data stream of at least 10 KBit / s, optionally at least 50 KBit / s, optionally at least 100 KBit / s and optionally at least 500 KBit / s. [9] Integrated circuit according to any of the preceding claims, wherein the integrated circuit is configured to perform steps c) and d), optionally steps a) to d), repeatedly. [10] Integrated circuit according to claim 9, wherein the integrated circuit is configured to repeatedly perform the adaptation of the encryption method by repeatedly performing steps c) and d), optionally by repeatedly performing steps a) to d). [11] Integrated circuit according to claim 10, wherein the integrated circuit is configured to perform the adjustment of the encryption method at regular and / or irregular intervals. [12] Integrated circuit according to claim 11, wherein the time intervals are 48 hours or less, optionally 24 hours or less, optionally 12 hours or less, optionally 6 hours or less, optionally 3 hours or less, optionally 1 hour or less, optionally 30 min or less, optionally 10 min or less, optionally 5 min or less, optionally 2 min or less, and optionally 1 min or less. [13] Integrated circuit according to one of the preceding claims, wherein the encryption method is designed as a symmetric and / or asymmetric encryption method. [14] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is configured to perform a key selection and / or key exchange, optionally a Diffie-Hellman-Merkle key exchange, with the communication partner (404) using the information provided to the communication partner (404) via the adaptation of the encryption method by means of the communication interface (206) on the generated cryptographic key. [15] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is further configured to generate the cryptographic key based on the at least one random number such that the cryptographic key has a length of at least 128 characters, optionally at least 256 characters, optionally at least 512 characters, optionally at least 1,024 characters and optionally at least 2,048 characters. [16] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is further configured to generate the cryptographic key based on the at least one random number such that the random number provided by the quantum random number generator (204) for this purpose has a length of at least 16 bits, optionally at least 32 bits, optionally at least 64 bits, optionally at least 128 bits, optionally at least 256 bits and optionally at least 512 bits. [17] Integrated circuit according to one of the preceding claims, wherein generating the block (150a) to confirm the adaptation of the encryption method for the at least one blockchain (150) comprises generating a hash value to confirm the adaptation of the encryption method. [18] Integrated circuit according to any of the preceding claims, wherein the electronic circuit is further configured to: e) to synchronize the blockchain (150) partially or completely with a copy of the blockchain (150) of another participant in the blockchain (150) and / or to compare it with a copy of the blockchain (150) of another participant in the blockchain (150) and to assess the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner on the basis of the synchronization and / or the comparison. [19] Integrated circuit according to claim 18, wherein the communication partner (404) is another participant in the blockchain (150) and wherein the integrated circuit is configured to synchronize and / or compare the blockchain (150) partially or completely with the copy of the blockchain (150) of the communication partner (404) in feature e). [20] Integrated circuit according to claim 18 or 19, wherein the integrated circuit is further configured to: f) to stop communication with the communication partner (404) and / or to provide information about an anomaly in the encryption method if the assessment of the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner (404) concludes that the trustworthiness of the encryption method and / or the adaptation of the encryption method and / or the communication partner (404) may be compromised. [21] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is further configured to generate the block (150) and / or the hash value for the blockchain (150) such that the block (150a) and / or the hash value and optionally the entire blockchain (150) are encrypted and / or are stored encrypted in the internal data storage element (202). [22] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is configured to delete the blockchain (150) containing the blocks (150a) confirming the adaptation of the encryption method from the data storage element (202) upon the occurrence of a predetermined event and to replace it with a new blockchain (150) of shorter length and / or lower data volume. [23] Integrated circuit according to claim 22, wherein the predetermined event occurs when the blockchain (150) reaches a predetermined length and / or a predetermined data volume. [24] Integrated circuit according to one of the preceding claims, wherein the integrated circuit is configured to partially or completely release the storage space occupied by the blockchain (150) when the blockchain is deleted from the data storage element, optionally for storing the new blockchain. [25] Integrated circuit according to any one of claims 22 to 24, wherein the integrated circuit is configured to generate a block (154a) for a higher-level blockchain (154) to confirm the replacement of the blockchain (150) by the new blockchain (152) of shorter length and / or size, and to store the higher-level blockchain (154) with the generated block (154a) in the internal data storage element (202). [26] Integrated circuit according to one of the preceding claims, wherein the electronic circuit (202) is further configured to generate the block (150a) for confirming the adaptation of the encryption method as a block (150a) for a first blockchain (150) and as a block (152a) for a second blockchain (152) and to store the first blockchain (150) and the second blockchain (150) with the respective generated block (150a, 152a) in the internal data storage element (202). [27] Integrated circuit according to claim 26, wherein the integrated circuit is further configured to use the first blockchain (150) and the second blockchain (152) in parallel with staggered start and end times of use. [28] Integrated circuit according to claim 26 or 27, wherein the integrated circuit is configured to utilize the first blockchain (150) and the second blockchain (152) each up to a predetermined length and / or up to a predetermined data volume, wherein the respective end of use occurs upon reaching the predetermined length and / or the predetermined data volume of the first or second blockchain (150, 152). [29] Integrated circuit according to claim 28, wherein the integrated circuit is configured to delete the first blockchain (150) when the end of its useful life is reached and to replace the first blockchain with a new first blockchain of shorter length and / or size, and to delete the second blockchain (152) when the end of its useful life is reached and to replace the second blockchain with a new second blockchain of shorter length and / or size. [30] Integrated circuit according to claim 29, wherein the integrated circuit is further configured to continue using the second blockchain (152) when the first blockchain (150) is deleted and replaced at the end of its useful life, and to continue using the first blockchain (150) when the second blockchain (152) is deleted and replaced at the end of its useful life. [31] Integrated circuit according to one of claims 29 and 30, wherein the integrated circuit is further configured to release the storage space in the data storage element (202) occupied by the first and / or second blockchain (150, 152) upon deletion of the first and / or second blockchain (150, 152), optionally for a new first and second blockchain (150, 152). [32] Computer Readable Medium (300), characterized by , that the computer-readable medium (300) comprises data (302) defining an operating instruction adapted for controlling a semiconductor manufacturing apparatus, such that the integrated circuit according to one of claims 1 to 31 is manufactured by means of the semiconductor manufacturing apparatus when the data are output to the semiconductor manufacturing apparatus. [33] Computer-readable medium (300) according to claim 32, characterized by, that the data (302) comprise a digital representation of the electronic circuit (200) so that, with the operating instructions, the integrated circuit is manufactured using the digital representation when the data (302) are output to the semiconductor manufacturing apparatus. [34] Computer-readable medium (300) according to claim 32 or 33, characterized by , that the fabrication of an integrated circuit using the semiconductor fabrication device includes in accordance with the operating instructions: - Manufacturing the integrated circuit on a wafer in a semiconductor process, optionally in a CMOS semiconductor process, a BiCMOS semiconductor process, a semiconductor process for bipolar devices, optionally using the Bipolar CMOS technique. [35] Method (900) for manufacturing an integrated circuit according to any one of claims 1 to 31, characterized by , that the procedure (900) includes: - Manufacturing (902) the electronic circuit (200) using a semiconductor manufacturing device, optionally using a computer-readable medium (300) according to one of claims 32 to 34. [36] Computer-readable interface (400) comprising an integrated circuit according to any one of claims 1 to 31, wherein the computer-readable interface (400) is configured to be connected to a computer (402) and, in a state connected to the computer (402), to provide a cryptographic key and / or to enable a secure adaptation of an encryption method for communication between the computer (402) and a communication partner (404) and / or to enable a secure communication connection with the communication partner (404). [37] Use of an integrated circuit according to any one of claims 1 to 31 for providing a cryptographic key and / or for securely adapting an encryption method for communication between an IoT device and a communication partner (404). [38] Use of an integrated circuit according to any one of claims 1 to 31 for providing a cryptographic key and / or for securely adapting an encryption method for communication between a first military unit (800) and a second military unit (800). [39] Use according to claim 38, wherein the first and / or second military unit (800) comprises or is configured as one of the following elements: - a soldier; - a military vehicle; - an unmanned military vehicle; - a weapon system; - a missile; - an explosive device; - a mine; - an element of a military swarm; - an agent of a multi-agent system; - a measuring probe and / or reconnaissance probe; - a command center; - a control device; and - a satellite. [40] Trusted Platform-Module (600) comprising an integrated circuit according to any one of claims 1 to 31. [41] Control device (502) for a motor vehicle (500) comprising an integrated circuit according to any one of claims 1 to 31. [42] Control device (502) according to claim 41, wherein the control device (502) is configured to secure communication between the control device and another component of the motor vehicle and / or an external communication partner by means of the integrated circuit and / or to provide an adaptation of an encryption to secure the communication. [43] Motor vehicle (500) comprising a control device (502) according to claim 41 or 42. [44] Computer network (700) comprising several network nodes (702), wherein the several network nodes (702) each have at least one integrated circuit according to any one of claims 1 to 31 and wherein the computer network (700) is configured to enable encrypted communication between the network nodes (702) using the electronic circuits (200) of the respective network nodes (702). [45] Integrated circuit according to any one of claims 1 to 31, characterized by , that the quantum random number generator includes (204, 400*): - a monolithically integrated entropy source (401*), wherein the entropy source (401*) comprises: - a photon source (55*) configured to emit photons (58*), wherein the photon source (55*) comprises: - a first outer shell, wherein the first outer shell is formed by a first base (551*), a first top surface (552*) and at least one first side surface (553*) connecting the first base (551*) and the first top surface (552*), and - a photon detector (54*) designed to detect the photons (58*) emitted by the photon source (55*), - wherein the first base surface of the photon source (55*) is arranged facing the photon detector (54*), and - an electronic circuit designed to generate a random bit (411*) depending on an output signal (405*) of the entropy source (401*), and optionally to output the generated random bit (411*), - wherein a manifestation of the output signal (405*) of the entropy source (401*) depends on a temporal frequency of the photons (58*) detected by the photon detector (54*).

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