Data package processing with dynamic argument assignment

Abstract

Methods, devices, and computer program products for processing data packets are provided. The method includes receiving a data packet. The method further includes matching the data packet with a steering table entry (STE), wherein the STE contains arguments associated with processing the data packet and a pointer to an executable sequence. The method further includes dynamically configuring the executable sequence to process the data packet using at least the arguments. The method further includes executing the executable sequence to process the data packet.

Description

TECHNICAL AREA

[0001] Exemplary embodiments of the present disclosure relate generally to packet routing in network systems. BACKGROUND

[0002] Modern network solutions must handle large volumes of data packet transmissions. With the increasing demand for high-speed data packet transmissions, the need for rapid decision-making regarding each received packet also grows. The applicant has identified numerous shortcomings and problems associated with conventional data packet processing methods. Through careful work, ingenuity, and innovation, many of these identified problems have been resolved by developing solutions contained in embodiments of the present disclosure, many examples of which are described in detail here. SUMMARY

[0003] The invention is defined by the claims. To illustrate the invention, aspects and embodiments that may or may not fall within the scope of the claims are described here.

[0004] Embodiments of the present disclosure relate to data packet processing. Due to the high volume of transmitted packets in modern network environments, there is a need for fast data packet processing. Therefore, embodiments of the invention described herein may include the dynamic configuration of an executable sequence for compressing operations performed on data packets. In this way, embodiments of the invention can centralize processing commands (e.g., operations) related to the routing of data packets, since the operations are repetitive.

[0005] In some embodiments, a method for processing data packets is provided. The method may first receive a data packet and match the data packet with a steering table entry (STE), wherein the STE contains arguments associated with processing the data packet and a pointer to an executable sequence. Furthermore, the method may include dynamically configuring the executable sequence to process the data packet using at least the arguments. Finally, the method may include executing the executable sequence to process the data packet.

[0006] In some embodiments, the data packet may contain a header. Furthermore, the STE may contain a tag that includes a set of criteria and a matching parameter. In this way, matching the data packet with the STE involves using the matching parameter to identify one or more segments of the header and comparing those segments with the set of criteria.

[0007] In some embodiments, the STE can contain a matching parameter that specifies the size of the tag. In some embodiments, the matching parameter can correspond to 4 DWORDS.

[0008] In some embodiments, the STE may further include a fallback pointer configured to identify an alternative STE that may contain alternative arguments associated with processing the data packet. In this way, the method may further include matching the data packet with the alternative STE, dynamically configuring the executable sequence to process the data packet using the alternative arguments, and executing the executable sequence to process the data packet.

[0009] In some embodiments, the STE may further include a sequence containing a sequence of executable operations and a sequence pointer for identifying the sequence. In some embodiments, the method may further include receiving one or more inputs from at least one of the arguments or the sequence identified by the sequence pointer and dynamically configuring the executable sequence using the sequence of executable operations and the one or more inputs.

[0010] In some embodiments, the method may further include parsing the data packet into discrete parts and storing the discrete parts of the data packet in registers.

[0011] In some embodiments, the STE may contain a sequence pointer. In this way, the method may further include retrieving a sequence identified by the sequence pointer, wherein the sequence contains a sequence of executable operations. Furthermore, the method may include receiving one or more inputs from at least one of the registers, arguments, or the sequence. In addition, the method may include dynamically configuring the executable sequence using the sequence of executable operations and the one or more inputs.

[0012] In some embodiments, a network adapter is provided for processing data packets. The network adapter may include a network interface functionally coupled to a communication network and a packet processing circuit functionally coupled to the network interface. Upon receiving a data packet via the network interface, the packet processing circuit may be configured to match the data packet with a sequence executable (STE) containing arguments associated with processing the data packet, as well as a pointer to an executable sequence. Furthermore, the packet processing circuit may dynamically configure the executable sequence to process the data packet using at least the arguments and execute the executable sequence to process the data packet.

[0013] In some embodiments, the data packet may contain a header. Furthermore, the STE may contain a tag that includes a set of criteria and a matching parameter. The packet processing circuitry can be configured to match the data packet with the STE by using the matching parameter to identify one or more segments of the header and comparing those segments with the set of criteria.

[0014] In some embodiments, the STE may contain a matching parameter that specifies the size of the tag.

[0015] In some embodiments, the STE may further include a fallback pointer configured to identify an alternative STE containing alternative arguments associated with processing the data packet. Additionally, the packet processing circuitry may be configured to match the data packet with the alternative STE, dynamically configure the executable sequence to process the data packet using at least the alternative arguments, and execute the executable sequence to process the data packet.

[0016] In some embodiments, the STE may further contain a sequence that includes a sequence of executable operations and a sequence pointer for identifying the sequence. The packet processing circuitry may be configured to receive one or more inputs from at least one of the arguments or from the sequence identified by the sequence pointer and dynamically configure the executable sequence using the sequence of executable operations and the one or more inputs.

[0017] In some embodiments, the packet processing circuit can be configured to parse the data packet into discrete parts and store the discrete parts in registers.

[0018] In some embodiments, the STE may further include a sequence pointer. The packet processing circuit may also be configured to retrieve a sequence identified by the sequence pointer, receive one or more inputs from at least the registers, arguments, or sequence, and dynamically configure the executable sequence using the sequence of executable operations and the inputs.

[0019] In some embodiments, a computer program product is provided for processing data packets. The computer program product may include at least one non-volatile, machine-readable storage medium on which program instructions are stored that can be executed. Upon execution, the instructions may cause a device to receive a data packet, compare the data packet with a STE containing arguments associated with processing the data packet and a pointer to an executable sequence, dynamically configure the executable sequence to process the data packet using at least the arguments, and execute the executable sequence to process the data packet.

[0020] In some embodiments, the data packet may contain a header. Furthermore, the STE may contain a tag that includes a set of criteria and a matching parameter. Upon execution, the program instructions can cause the device to match the data packet against the STE by using the matching parameter to identify one or more segments of the header and comparing those segments against the set of criteria.

[0021] In some embodiments, the STE also includes a matching parameter that specifies the size of the tag.

[0022] In some embodiments, the STE may further include a fallback pointer configured to identify an alternative STE, wherein the alternative STE contains alternative arguments associated with the processing of the data packet. Furthermore, upon execution, the program instructions may cause the device to compare the data packet with the alternative STE, dynamically configure the executable sequence to process the data packet using at least the alternative arguments, and execute the executable sequence to process the data packet.

[0023] In some embodiments, the STE may further contain a sequence, wherein the sequence includes a sequence of executable operations and a sequence pointer for identifying the sequence. Furthermore, upon execution, the program instructions may cause the device to receive one or more inputs from at least one of the arguments or from the sequence identified by the sequence pointer and to dynamically configure the executable sequence using the sequence of executable operations and the one or more inputs.

[0024] In some embodiments, the program instructions, when executed, can cause the device to parse the data packet into discrete parts and store the discrete parts of the data packet in registers.

[0025] In some embodiments, the STE further includes a sequence pointer, wherein the program instructions, upon execution, can cause the device to retrieve a sequence identified by the sequence pointer, receive one or more inputs from at least one of the registers, arguments, or sequence, and dynamically configure the executable sequence using the sequence of executable operations and the one or more inputs.

[0026] Methods, devices, and computer program products for processing data packets are provided. The method includes receiving a data packet. The method further includes matching the data packet with a steering table entry (STE), wherein the STE contains arguments associated with processing the data packet and a pointer to an executable sequence. The method further includes dynamically configuring the executable sequence to process the data packet using at least the arguments. The method further includes executing the executable sequence to process the data packet.

[0027] The foregoing summary serves only to provide a basic understanding of some aspects of the present disclosure. Accordingly, it should be noted that the embodiments described above are merely examples and should not be interpreted as limiting the scope or spirit of the disclosure in any way. It should be noted that the scope of the present disclosure includes many other potential embodiments in addition to those summarized here, some of which are described in more detail below.

[0028] Any feature of one aspect or embodiment can be applied to other aspects or embodiments in any suitable combination. In particular, any feature of one process aspect or embodiment can be applied to one device aspect or embodiment, and vice versa. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Having described above certain embodiments of the present disclosure in general terms, reference is now made to the accompanying drawings. The components shown in the figures may or may not be present in certain embodiments described herein. Some embodiments may include fewer (or more) components than shown in the figures. Fig. Figure 1 is a schematic representation of the position of the data packet processor according to some embodiments described here; Fig. Figure 2 is a schematic representation of an exemplary network device according to some embodiments described here; Fig. Figure 3 is a flowchart illustrating a method for data packet processing using dynamic argument assignment according to some embodiments described herein; and Fig. Figure 4 is a schematic representation of input sources with respect to an executable sequence according to some embodiments described herein. DETAILED DESCRIPTION

[0030] Embodiments of the present disclosure are now described in more detail below with reference to the accompanying drawings, which show some, but not all, embodiments. In fact, the present disclosure can be realized in many different forms and should not be interpreted as being limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure satisfies applicable legal requirements. The same numbers refer throughout to the same elements. As used here, terms such as "front," "back," "top," "bottom," "side," etc., are used for explanatory purposes in the examples provided below to describe the relative position of certain components or parts of components.Furthermore, it is obvious to a person sufficiently knowledgeable in the field, in view of the present disclosure, that the terms “essentially” and “approximately” indicate that the referenced element or the associated description is accurate within the applicable technical tolerances.

[0031] Where possible, all singular terms used here also include the plural and vice versa, unless explicitly stated otherwise. Furthermore, the terms "ein" and / or "eine" used here are intended to mean "one or more," even though the phrase "ein or mehr" is also used here. In addition, the article "der" in this description is intended to include one or more elements referred to in conjunction with the article "der" and can be used synonymously with "der" or "das" or "eine or mehr." Moreover, the term "Satz" (sentence) used here includes one or more elements (e.g., related elements, unrelated elements, a combination of related and unrelated elements, etc.) and can be used synonymously with "ein or mehr." Where only one element is meant, the phrase "nur ein" or a similar formulation is used.Furthermore, the terms "has," "have," "exhibit," or the like are to be understood herein as open-ended terms. When something is said herein to be "based" on something else, it may also be based on one or more other things. In other words, unless expressly stated otherwise, "based on" in this description means "at least partly based on" or "at least partly based on it." Also, the term "or" in this description, when used in a series, is to be understood as inclusive and may be used synonymously with "and / or" unless expressly stated otherwise (e.g., in combination with "either" or "only one of"). No element, action, or instruction used herein should be construed as critical or essential unless expressly stated.

[0032] A data packet is a block of data transmitted over a network, and this data block can be a small segment of a larger message. Data transmitted over a network is sent via data packets. In this way, each data packet forms part of a complete message and contains relevant information that helps identify the sending and destination devices (e.g., the receiving device), as well as other information for processing the data packet. When data packets are received at the destination device, they can be reassembled by the destination device into a usable message. A number of challenges related to data processing concern the routing of data packets.The routing of data packets refers to the decision of where a packet should be sent and what operations should be performed on the data in the packet after it has been received, in order to effect reassembly or to derive other benefits from modifying the packet.

[0033] Data packets can take various forms (raw Ethernet protocol, Ethernet Control Message Protocol, User Datagram Protocol, Transmission Control Protocol, and / or the like). However, the basic structure of a data packet typically comprises three parts: the header, the payload, and the trailer. The header contains instructions about the data being transmitted by the packet, which may include fields such as version, Internet header length, identifier, total length, time to live (TTL), source address, and / or destination address. Different data packet types may contain different fields in the header, providing metadata associated with the packet. The payload (e.g., the body) of the data packet may contain the actual data that the packet transmits to the destination.At the receiving device, the payload of the received data packets can be assembled to create the message (e.g., a video, an image, an application, and / or the like). The trailer indicates the end of the data packet.

[0034] A routing table is part of the configuration of a network device or network infrastructure. It is used to manage and direct the flow of data packets within a network. Also known as a forwarding table or routing table, it can be stored in network devices such as routers, switches, a central processing unit (CPU), a data processing unit (DPU), a graphics processing unit (GPU), or similar devices. The routing table can use various criteria, such as destination addresses, source addresses, protocol types, and the like, to determine how data packets should be handled. A routing table can contain individual rows and columns that populate the table. Each entry in the table can contain specific conditions and corresponding actions to be taken when those conditions are met.For example, a steering table can contain multiple fields that specify rules and / or criteria that, based on the header information or the payload of the package, dictate how a package should be handled.

[0035] An entry in the steering table is called a steering table entry (STE). Each STE can be assigned specific functions, such as executing operations, matching functions, updating or optimizing operations, and the like. The STE can be used in traffic management to determine how packets should be handled after being received by the network device so that they are ready for the next processing stage. The processing instructions for the packet can contain information about how the packet should be delivered to a specific destination, the order in which the packet should be assembled, what changes should be made to the packet, what security checks should be performed, and / or the like. Packets and their associated operations are typically processed individually and independently of other packets and / or their operations.In this way, the data packets are processed individually, even though some data packets require similar, if not identical, operations.

[0036] In high-performance computing environments, high-speed data transmission over networks presents a significant challenge. Some of these challenges relate to packet routing. As mentioned above, packet routing involves deciding where an incoming packet should be delivered and what operations should be performed on the headers or data within a packet being sent or received. Traditionally, routing is achieved by first reading the header information of a data packet and then deciding, based on predefined rules, which actions to take. This is resource-intensive and inefficient when a network needs to process the same or similar operations for a large number of data packets.

[0037] Network devices such as network interface cards (NICs) play a crucial role in increasing network efficiency by offloading tasks traditionally handled by software on the host processor, thereby reducing CPU cycles. A NIC is a hardware component that connects a computer to a network environment. The NIC facilitates the optimization, transmission, and processing of network traffic (e.g., data packets). It also supports input / output interrupts, direct memory access interfaces, and similar features. The NIC provides a dedicated, end-to-end connection to a network by offering the physical layer necessary for communication.A NIC can, for example, take the form of a data processing unit (DPU) to facilitate network traffic management, enhance security, and improve storage processing capabilities. A specific example of a DPU that can be used is an Nvidia BlueField® processor, which can incorporate cloud infrastructure processing, freeing up host CPU cores to manage application operations instead of infrastructure tasks. Communication can be routed over wired connections (Ethernet), wireless connections (e.g., Wi-Fi), or a combination thereof.

[0038] In multi-user systems, such as servers hosting virtual machines, network interface cards (NICs) must process packets destined for or originating from various recipients. To this end, the NICs in a network environment perform packet routing to ensure that the data packets are processed correctly. However, in a high-performance computing environment, the rate at which data packets should be processed can become extremely high, which can lead to conflicts with network latency requirements, among other things. In such high-performance environments, increasing bandwidth increases the rate at which packets are sent or received, necessitating faster routing decisions. Furthermore, a multi-user host (e.g., virtual machines) can receive a multitude of different packets, each of which may require separate processing.To efficiently route and process data packets, the network relies on databases. These databases can be used to identify the packet type, identify the packet owner, specify the operations to be performed on the packet, and so on. Given the high volume of packets and the speed at which they must be processed, accessing large databases for each packet can become a significant bottleneck. To address these concerns, embodiments of the present invention provide devices and methods for compressing or densely structuring databases to enable rapid lookups and quick decision-making regarding packet routing and processing.

[0039] The present disclosure can, through dynamic argument assignment, compress the actions taken to process multiple data packets associated with the same or similar processing operations, as described herein. While conventional solutions process operations on data packets on an individual basis, the present disclosure enables a reduction in resource expenditure through the dynamic configuration of executable sequences that can be used to process multiple data packets associated with the same or similar processing operations. In this respect, the dynamic configuration of an executable sequence can include the creation of an executable sequence in real time based on features of the incoming data packets using existing inputs, as further described herein.For example, if a data packet is received that has processing operations similar to and / or identical to those of another data packet, embodiments of the invention provide that an executable sequence can be created using stored inputs and that the executable sequence can be used to process subsequent data packets that have the same / similar characteristics. In this way, the resources required for processing the data packets can be reduced compared to conventional operations that process data packets without considering the similarity of the operations between the data packets.

[0040] Furthermore, the dynamic configuration of executable sequences, as described herein, allows the adaptation of executable sequences based on received data packets so that these executable sequences can process subsequent data packets. The ability to configure an executable sequence based on an incoming data packet stream can compress the operations performed on the incoming data packets by reducing duplicate data packet processing operations, thereby promoting efficient use of data packet processing resources.

[0041] With reference to the figures, data packet processing with dynamic argument assignment is presented and described below. As in Fig. As shown in Figure 1, in some embodiments a user can interact with a user device (e.g., user device(s) 102) to transmit a data packet to a data packet processor 104. The user device 102 can be a computer, a server, a web server, a database server, a file server, a laptop, a desktop computer, a workstation, an additional network device, an Internet of Things device, an electronic kiosk, a mainframe, and / or the like. The data packet can be processed by the data packet processor 104 and subsequently transmitted to a destination device 106. The destination device 106 can be the final destination or an intermediate destination for the data packet. In this way, the data packet processing within the data packet processor can cause the distribution of the data packets received by the user device 102 to the appropriate destination device 106.The target device 106 can be a server, a web server, a database server, a file server, a laptop, a desktop computer, a workstation, an additional network device, an Internet of Things device, an electronic kiosk, a mainframe, and / or the like. In some cases, the data packet processor 104 can be part of the user device 102, while in other cases, the data packet processor can be part of the target device 106. In still other cases, the data packet processor 104 can be part of another device or circuit that communicates with the user device 102 and / or the target device 106, such as a network device 120. In some embodiments, the network device 120 can include a network adapter, a NIC, a switch, or the like.In some embodiments, the data packet processor 104, the network device 120, or the processor 105 may include, among other things, a data processing unit (DPU), such as the Nvidia BlueField® DPU. Furthermore, in some embodiments, the network device 120 and / or the data packet processor 104 may include the processor 105. For example, the processor 105 may be the processor of the network device 120 and / or the data packet processor 104. In addition, in some embodiments, the network device may include components such as a network interface card (NIC), a network switch, a network gateway, or the like. In other words, the methods, operations, and processes described herein may be implemented using components such as a network switch in some embodiments.

[0042] Fig. Figure 2 illustrates a schematic representation of an example circuit for processing data packets. For better understanding, it shows Fig. 2 the circuit as implemented by a network device 120; however, part or all of the circuit may be contained in the user device 102 and / or the target device 106 and / or implemented by a separate device that communicates with the user device 102 and / or the target device 106, for example, if no network device is provided. As in Fig. As shown in Figure 2, the circuit can comprise the processor 105, a memory 114, an input / output circuit 116, and a communication circuit 118. Furthermore, in some embodiments, as shown in Figure 2, the circuit can include... Fig. 2 shown, comprising a steering table 110.

[0043] Although the term "circuit," as used here in reference to components 105, 114-120, is described in some cases using functional language, it is understood that the respective implementations necessarily involve the use of specific hardware configured to perform the functions of the respective circuit described herein. It is also understood that certain of these components 105, 114-120 may include similar or identical hardware. For example, two circuit sets may both use the same processor, network interface, storage medium, or the like to perform their associated functions, so that no duplicate hardware is required for each circuit set. In this context, it is understood that some of the components associated with the components described in Fig. The components described in the circuit shown in Figure 2 may be housed together, while other components are housed separately. While the term "circuit" is generally understood to mean hardware, in some embodiments the term "circuit" may also include software for configuring the hardware. For example, in some embodiments, "circuit" may include processing circuits, storage media, network interfaces, input / output devices, and the like. In some embodiments, other elements of the circuit may provide or complement the functionality of certain circuits. For example, the data packet processor 104 may provide processing functionality, the memory 114 may provide storage functionality, the communication circuit 118 may provide network interface functionality, and so on.

[0044] In some embodiments, the processor 105 (and / or coprocessor or other processing circuitry supporting or otherwise associated with the processor) can communicate with the memory 114 via a bus to exchange information between the components of the circuit. The memory 114 can be non-volatile and may, for example, comprise one or more volatile and / or non-volatile memories or a combination thereof. In other words, the memory 114 may, for example, be an electronic storage device (e.g., a non-volatile, computer-readable storage medium). The memory 114 can be configured to store information, data, content, applications, instructions, or the like to enable a device, such as the user device 102 or the target device 106, to perform various functions according to embodiments described in this disclosure.Memory 114 can also be configured to provide functions for processing incoming data packets, such as buffering, caching, firmware configurations, and the like. In this way, memory 114 can improve the network adapter's ability to manage the flow of incoming data packets.

[0045] Additionally or alternatively, in some embodiments, the processor 105 can use memory 114 to store or access previously collected information. For example, in some implementations, the processor 105 may include hardware, software, firmware, and / or a combination thereof that interacts with memory 114 to send, query, update, and / or store data. For example, a STE may be stored in memory 114, and the processor 105 can access it as needed. Furthermore, the steering table may reside in any memory (such as memory 114) accessible to the processor 105, the NIC, or the like. In this respect, the steering table may reside on the NIC chip, in host memory, or in any other accessible memory 114.In another example, a register and the elements assigned to the register can also be stored in memory 114, as described in more detail below.

[0046] Although in Fig. While represented as a single memory in Figure 2, the memory 114 can comprise a plurality of memory components. These plurality of memory components can be implemented on a single computing device or distributed across a plurality of computing devices. In various embodiments, the memory 114 can, for example, comprise a hard disk, main memory, cache memory, flash memory, compact disc read-only memory (CD-ROM), digital versatile disc read-only memory (DVD-ROM), an optical disc, information storage circuitry, or a combination thereof. The memory 114 can be configured to store information, data, applications, instructions, or the like for the device (e.g.,to enable the user device 102 or the target device 106) to execute various functions according to the embodiments discussed herein. For example, in at least some embodiments, the memory 114 can be configured to buffer data for processing by the processor 105. Additionally or alternatively, in at least some embodiments, the memory 114 can be configured to store program instructions for execution by the processor 105. The memory 114 can store information in the form of static and / or dynamic information. This stored information can be stored and / or used by the processor 105 or other components during the execution of their functions.

[0047] The Processor 105 can be implemented in various ways and may, for example, comprise one or more processing units configured to operate independently. Additionally or alternatively, the Processor 105 may comprise one or more processors arranged in tandem configuration via a bus to enable independent instruction execution, pipelining, and / or multithreading.The Processor 105, for example, can be implemented in various ways, including one or more microprocessors with one or more accompanying digital signal processors, one or more processors without an accompanying digital signal processor, one or more coprocessors, one or more multi-core processors, one or more controllers, processing circuits, one or more computers, various other processing elements, including integrated circuits such as an ASIC (application-specific integrated circuit) or an FPGA (field-programmable gate array), or a combination thereof. For example, the Processor 105 can include a DPU, a CPU, a GPU, a network adapter, a switch, or the like. Furthermore, the [processor] can be... Fig. The data packet processor 104 shown in Figure 1 can include the processor 105. In this way, the data packet processor 104 can include the variants of the processor 105 described here. The term "processing circuit" can be understood to include a single-core processor, a multi-core processor, multiple processors within the device, and / or remote or "cloud" processors. Accordingly, although it is shown in Figure 1, it can include a single-core processor, a multi-core processor, multiple processors within the device, and / or remote or "cloud" processors. Fig. 2 is shown as a single processor, but in some embodiments, processor 105 comprises a plurality of processors. The plurality of processors can be located on a single computing device (e.g., the one shown in Fig. The network device 120 shown in the diagram, the user device 102, or the target device 106) may be implemented, or distributed across several such devices. The plurality of processors may be functionally interconnected and may be configured together to perform one or more functions of the circuit (e.g., the functions shown in the diagram). Fig. 2 network device 120 shown, user device 102 or target device 106) perform as described herein.

[0048] In one embodiment, the processor 105 can be configured to execute instructions stored in memory 114 or otherwise accessible to the processor 105. Alternatively or additionally, the processor 105 can be configured to execute hard-coded functions. Regardless of whether it is configured by hardware or software methods, or by a combination thereof, the processor 105 can represent a unit (e.g., physically implemented in a circuit) capable of performing operations according to an embodiment of the present disclosure when configured accordingly. Alternatively, as another example, if the processor 105 is implemented as a software instruction processor, the instructions can specifically configure the processor 105 to perform one or more algorithms and / or operations described herein when the instructions are executed.For example, if these instructions are executed by processor 105, they can cause the associated device (e.g., data packet processor 104, as in . Fig. 1 shows the network device 120, as shown in Fig. 2, the user device 102 or the target device 106) performs one or more of the functions described herein. Furthermore, it is understood that the data packet processor 104, as shown in Fig. 1 may include at least some of the components and functions as described with reference to the network device 120 and / or the processor 105, as shown in Fig. Figure 2 shows and describes the functions of processor 105. For example, when the functions of processor 105 are described, it is understood that data packet processor 104 can also perform the described functions. As described in more detail below, the functionality of processor 105 can include the execution of the executable sequence.

[0049] In some embodiments, the circuit further comprises an input / output circuit 116, which in turn may communicate with the processor 105 to provide an acoustic, visual, mechanical, or other output and / or, in some embodiments, to receive a display of input from a user or other source. In this sense, the input / output circuit 116 may include means by which analog-to-digital and / or digital-to-analog data conversions can be performed. For example, the input / output circuit 116 may include support for a display, touchscreen, keyboard, mouse, image capture device (e.g., a camera), microphone, and / or other input / output mechanisms. The input / output circuit 116 may include a user interface and may be a web user interface, a mobile application, a kiosk, or the like.

[0050] The processor 105 and / or the user interface circuit comprising the processor 105 can be configured to control one or more functions of a display or one or more user interface elements via computer program instructions (e.g., software and / or firmware) stored in memory accessible to the processor 105 (e.g., memory 114 and / or the like). In some embodiments, aspects of the input / output circuit 116 can be reduced compared to embodiments in which the circuit can be implemented as an end-user machine or other type of device designed for complex user interactions. In some embodiments (like other components discussed herein), the input / output circuit 116 can be derived from the associated device circuit (e.g., the one described in [reference]). Fig. The network device 120, the user device 102, or the target device 106 shown in Figure 2 can be removed. The input / output circuit 116 can be connected to the memory 114, the communication circuit 118, and / or one or more other components, for example, via a bus. Although more than one input / output circuit and / or other components may be included, in Fig. 2 only one is shown, so as not to complicate the revelation (e.g., as with the other components discussed herein).

[0051] In some embodiments, the communication circuit 118 comprises any means, such as a device or circuit, implemented either in hardware, software, firmware, or a combination of hardware, software, and / or firmware, and configured to receive and / or send data to a network and / or other associated device, circuit, or module. In this respect, the communication circuit 118 may, for example, include a network interface to enable communication with a wired or wireless communication network. In some embodiments, the communication circuit 118 may, for example, be configured to receive and / or send any data that can be stored by the memory 114, using any protocol that can be used for communication between computing devices.For example, the communication circuit 118 may include one or more network cards, antennas, transmitters, receivers, buses, switches, routers, modems, and supporting hardware and / or software and / or firmware / software, or any other device suitable for enabling communication over a network. Additionally or alternatively, in some embodiments, the communication circuit 118 may include a circuit for interacting with the one or more antennas to cause the transmission of signals through the one or more antennas or to process the reception of signals received through the one or more antennas. These signals may be transmitted by the network device 120 using any number of wireless personal area network (PAN) technologies, such as Bluetooth® v1.0 to v5.0, Bluetooth Low Energy (BLE), infrared radio (e.g., infrared), or infrared radio.IrDA), ultra-wideband (UWB), inductive wireless transmission, or the like. Furthermore, it is understood that these signals can be transmitted using Wi-Fi, near-field communication (NFC), the worldwide functional standard for microwave data transmission, Worldwide Interoperability for Microwave Access (WiMAX), or other proximity-based communication protocols. The communication circuit 118 can additionally or alternatively be used with the memory 114, the input / output circuit 116, and / or any other component in the diagram. Fig. The communication circuit 118 can be connected to the components shown, for example via a bus. It can also be configured to receive and send information to the various associated components. Furthermore, the communication circuit 118 can communicate with other devices that have memory holding the information required for processing data packets.

[0052] Furthermore, the in Fig. The steering table 110 shown in Figure 2 is used to determine how a packet is processed. Steering table 110 can contain data used to map a data packet to a steering table entry (STE). For example, the packet data can include any fields of the packet, including media access control (MAC) addresses, internet protocol (IP) addresses, transmission control point (TCP) data, version data, internet header length, identifier, total length, time to live (TTL), source address, and / or the like. Operations can include, but are not limited to, sending the packet to a register, sending the packet to an STE, updating the data packet header information, updating the data packet payload information, creating an executable sequence, or the like.

[0053] Accordingly, non-volatile, computer-readable storage media can be configured to store firmware, one or more application programs, and / or other software containing instructions and / or other computer-readable program code segments that can be executed to control the operation of the associated device circuitry (e.g., the circuit in the Fig. 2 network device 120, user device 102, or target device 106) shown, to control various operations, including the examples described here. Thus, a number of computer-readable program code sections can be implemented in one or more computer program products and controlled by a device (e.g., the one shown in 2) to implement various operations, including the examples described here. Fig. The network device 120 shown in Figure 2, the user device 102, or the target device 106), a database, and / or another programmable device are used to generate the machine-implemented processes discussed herein. It is also noted that all or some of the information described herein may be based on data provided by one or more components of the associated device circuitry (e.g., the network device 120 shown in Figure 2, the user device 102, or the target device 106), a database, and / or another programmable device to generate the machine-implemented processes discussed herein. Fig. The network device 120 shown in Figure 2, the user device 102, or the target device 106) can be received, generated, and / or stored. In some embodiments, one or more external systems (such as a remote cloud computing and / or data storage system) can also be used to provide at least some of the functions described herein.

[0054] Embodiments of the present disclosure provide methods, devices, and computer program products for data packet processing using dynamic argument assignment. In device embodiments of the disclosure, a network adapter may be used. The network adapter may include a network interface that is functionally coupled to a communication network. Furthermore, the network adapter may include a packet processing circuit that is functionally coupled to the network interface, wherein the packet processing circuit may be configured to process the data packet upon receipt of a data packet via the network interface as described herein. Additionally, a computer program product for processing data packets may be used.The computer program product may include at least one non-volatile, computer-readable storage medium on which instructions are stored which, when executed, cause a device to process a data packet as described herein.

[0055] With reference to Fig. 3. A method for processing data packets may comprise the following steps. Initially, in some embodiments, the method may include receiving a data packet, as shown in block 302. In one embodiment, a network device 120 may receive the data packet from a user device (e.g., the user device 102). Fig. 1) about the in Fig. 2 Communication circuit 118 shown received.

[0056] In some embodiments, the method may include storing the packet in a register, such as a register located in memory 114 of the network device 120 in the Fig. The method is defined in the example shown in Figure 2. The register can contain all or some of the information associated with the packet. In some embodiments, the method may further include parsing the data packet into discrete parts and storing the discrete parts of the data packet in registers. In this way, the packet can be parsed into sections and stored in the registers. Parsing the packet may include separating header and payload data, distinguishing certain header data from other header data, relating certain data to other data, and the like. For example, the header information and payload data of the data packet can be stored in the register. In this way, the parsed data can be structured so that it can be efficiently referenced during packet processing.For example, the parsed data stored in the registers can be referenced by the data packet processor 104 during the processing of the data packet.

[0057] As in Block 304 of Fig. As shown in Figure 3, the data packet can be matched against a steering table entry (STE), where the STE contains arguments associated with the processing of the data packet. In some embodiments, the STE (e.g., STE 111, as shown in Figure 3) can be a Fig. 1 and Fig. 2 shown) in the steering table (e.g., steering table 110). For example, in some embodiments, the data packet may contain a header, and the STE 111, which is located in memory 114 of the in Fig. The network device shown in Figure 2, 120, can be stored and may further contain a tag that includes a set of criteria. The STE 111 may contain a matching parameter. Matching the data packet with the STE 111 may involve using the matching parameter to identify one or more segments of the header and comparing that one or more segments of the header with the set of criteria.

[0058] The STE 111 can include a data structure that specifies the operations to be performed on each data packet. In this way, the STE 111 can give instructions to the processor 105 for handling, forwarding, and processing incoming data packets. As in Fig. As shown in Figure 2, a network device can, for example, use the STE 111 to determine where a data packet should be routed. The STE 111 can be based on specific protocols such as IP, TCP, UDP, or specific fields in headers such as UDP_sport or TCP_dport, or the like. The STE 111 can vary in size and complexity depending on the network infrastructure, network requirements, devices associated with the network, security features, and the like. In some embodiments, the STE 111 can, for example, have a fixed size of 64 bytes and contain information used to determine how a packet should be processed. The STE 111 can include a "tag" used to match the STE 111 with packet headers, as well as an action segment that lists specific operations to be performed on the packet.

[0059] The tag within the STE 111 can contain a specific pattern or set of criteria used to identify packets that should be processed in a particular way. The tag can be compared to a corresponding portion of the header of each incoming packet. The portion of the packet header used for comparison can be defined by a "matching parameter" within the STE 111. The matching parameter identifies which segment of the packet header should be used for comparison with the tag. For example, the matching parameter might identify the Media Access Control (MAC) address segment in the data packet header as the segment to be used for comparison. In this example, the STE 111 tag can be compared to the MAC address of the data packet to determine how the data packet should be handled.

[0060] In some embodiments, the STE 111 can contain a matching size, where the matching size specifies the size of the tag. In this way, the matching size can identify that the tag should have a certain size, for example, 4 DWORDS. The matching size can also identify the size of the corresponding header segment of the packet. Since the tag and the header segment must match to be considered a "match," they should both be the same size. Therefore, the matching size can specify the size of the tag and the size of the segment in the packet's header. For example, an STE 111 stored in memory 114 can contain a specific matching size. In this example, the corresponding header segment of an incoming data packet can be compared to the matching size of the STE 111.

[0061] In some embodiments, the STE 111 may further include a fallback pointer, wherein the fallback pointer identifies an alternative process in the event of a mismatch between the data packet and the STE 111. The mismatch may indicate a mismatch between elements of the STE 111 and corresponding elements of the data packet (e.g., "no match"). For example, if the MAC address of a data packet does not match the corresponding MAC address in the STE 111, the fallback pointer can be used.

[0062] In some embodiments, the STE 111 may further contain a fallback pointer configured to identify an alternative STE, wherein the alternative STE contains alternative arguments associated with the processing of the data packet. The alternative STE may, for example, be stored in the same memory 114 as the STE 111, or it may be located in a different memory to which the STE 111 is assigned. Fig. The data packet processor 104 shown in Figure 1 can be accessed. In some embodiments, the fallback pointer can point to an alternative STE that has a similar tag to the tag of the original STE 111. In this way, the fallback pointer can contain reasoning to understand the tag of the original STE 111 and the specific segment of the data packet and point to an alternative STE with similar matching conditions. In other words, the fallback pointer can select an alternative STE based on the tag of the original STE 111, rather than selecting an alternative STE at random. However, in some embodiments, the fallback pointer can select an alternative STE at random. In some embodiments, the alternative STE identified by the fallback pointer can then refer to its own tag, matching parameter, and size to determine a match between the alternative STE and the packet.Furthermore, in some embodiments, the method may include comparing the data packet with the alternative STE. For example, the network device 120 may compare the data packet with an alternative STE.

[0063] The STE 111 can also contain arguments to be passed to a sequence (a list of instructions for processing the data packet). If the data packet matches the tag of the STE 111 (for example, is a "match"), a sequence pointer can be used to retrieve a sequence of operations to be performed. The retrieved sequence can contain a number of executable operations that can be used to process the data packet, as described in more detail below.

[0064] In some embodiments, the STE 111 may include a sequence pointer, and the method may further comprise retrieving a sequence identified by the sequence pointer, wherein the sequence comprises a sequence of executable operations. Furthermore, in some embodiments, the method may also comprise receiving one or more inputs from at least one of the registers, arguments, or inline with the sequence identified by the sequence pointer.

[0065] For example, the sequence pointer can be located within STE 111. If a match is identified (for example, if there is a match between the STE tag and the specific segment of the header), the sequence pointer can be used to retrieve a sequence. The sequence pointer can point to a sequence that contains instructions for processing the packet. In this way, the sequence can be a general sequence for an operation to be used to process the packet. For example, if one data packet ultimately needs a value of 16 added to its Time to Live (TTL) field, but another data packet needs a value of 17 added to its TTL field, the sequence can contain an "addition function" on the TTL field of both packets. Thus, the sequence can generally specify an addition function for the TTL, but not contain the specific value to be added.

[0066] As in Block 306 of Fig. As shown in Figure 3, the procedure can include the dynamic configuration of an executable sequence. For example, the processor 105 of a network device 120 (shown in Figure 3) can be configured as follows: Fig. 2) Dynamically configure the executable sequence associated with a data packet by creating, modifying, reconfiguring, or otherwise constructing an executable sequence to process a particular data packet. For example, once a sequence is retrieved, the data packet processor 104, as described in Fig. As shown in Figure 1, create an executable sequence (e.g., configure it dynamically) that can be used to process the data packet (e.g., send it to a processor in the target device). The inputs for the executable sequence can come from three sources: the retrieved sequence itself (e.g., where the inputs match the sequence), the STE 111, and / or the registers.

[0067] In cases where the inputs for the executable sequence are derived from the retrieved sequence, the executable sequence can dynamically configure itself based on the sequence. In other words, data from the sequence can be used to configure the executable sequence. In other cases, where the executable sequence is dynamically configured based on the STE, the data from the STE can be used to configure the executable sequence. Furthermore, the executable sequence can be dynamically configured based on inputs from the registers. In this way, the data from the data packet stored in the registers can be used to dynamically configure the executable sequence.

[0068] In some embodiments, the method may further include dynamically configuring the executable sequence to process the data packet using the sequence identified by the sequence pointer. For example, a network device 120 may retrieve the sequence stored in memory 114. The processor 105 may determine which sequence to retrieve. In this example, the processor 105 may then dynamically configure the executable sequence to process the data packet using the sequence identified by the sequence pointer. As in Fig. As shown in Figure 4, the data packet processor 104 (shown in Figure 4) can be used. Fig. 1) Use sequence 402 to dynamically configure the executable sequence 406.

[0069] For example, the entries 407 can refer to Fig. 4. The inputs 407 are based on input sources 404, which include register 401, the retrieved sequence 402, and / or the STE 403. The inputs 407 can be divided into one or more sections (e.g., islands), each potentially derived from up to two of the aforementioned input sources 404. For example, an executable sequence 406 can contain the inputs 407 received from register 401 and the retrieved sequence 402.

[0070] The inputs 407 for dynamically configuring the executable sequence 406 can be divided into various sections of the executable sequence, including a procedure section 408, a register selector 410, a number of bits 412, and an offset 414. In some embodiments, the procedure section 408 of the executable sequence can specify the input sources 404 from which the inputs 407 are to be selected (e.g., up to two from the register 401, the retrieved sequence 402, and / or the STE 403). The selected inputs 407 can be classified as primary bits 416 and secondary bits 418. For example, if the inputs 407 of an executable sequence have two sources, one being the retrieved sequence 402 and the other register 401, the inputs from the retrieved sequence 402 can be grouped with the inputs from register 401. In this example, as shown in Fig. As shown in Figure 4, the procedure section 408 of the executable sequence specifies that inputs selected from the retrieved sequence 402 are to be classified as primary bits 416 and inputs selected from the register 401 are to be classified as secondary bits 418.

[0071] Furthermore, the register selector 410 can, if necessary, select the appropriate position within register 401 that can be used as input 407. In other words, if one of the input sources is register 401, the register selector 410 can specify from which position in register 401 the respective inputs 407 should be selected (e.g., from which row of the register the respective inputs should be selected).

[0072] The sections can be further restricted with respect to size (e.g., num_bits) and position where the sections should begin (e.g., offset). The num_bits 412 can specify how many primary bits 416 should be selected from a particular source. For example, if the retrieved sequence 402 is specified as the input source 404 for the primary bits 416, the num_bits 412 can specify the number of primary bits 416 to be taken from the retrieved sequence 402. In the Fig. In the example shown, num_bits 412 can indicate that nine primary bits 416 should be selected.

[0073] The offset 414 can specify the position within a line of the executable sequence 406 at which the primary bits 416 are to be stored relative to the starting position of the line. As in Fig. As shown in Figure 4, the offset 414 in the executable sequence 406 can, for example, specify that the primary bits 416 should begin at the sixth position within the corresponding line of the executable sequence 406. After storing the primary bits 416, the secondary bits 418 can be stored at the free positions in the respective line of the executable sequence 406, both before and after the position of the primary bits 416, thus creating "islands" of primary bits, as shown in Figure 4. Fig. 4 shown.

[0074] In some embodiments, and in a case where an alternative STE is used, the method may include dynamically configuring the executable sequence to process the data packet using at least the alternative arguments. For example, network device 120 may dynamically configure the executable sequence to process the data packet using at least the alternative arguments.

[0075] As in Block 308 of Fig. As shown in Figure 3, the procedure can include executing the executable sequence. As described above, the executable sequence can, for example, contain specific instructions (e.g., arguments) for processing the data packet. In this way, the executable sequence can be sent to a processor, such as a processor of target device 106, which is shown in the example of Figure 3. Fig. Figure 1 shows how the processor can execute the sequence and perform the necessary operations on the data packet. Execution can thus include implementing the associated operations and corresponding arguments with respect to the packet. These operations can include forwarding the packet to a specific destination, modifying the packet, performing security checks, and / or the like.

[0076] In one example, two data packets can be received by the network device. The first data packet can have a first source, while the second data packet can have a second, different source. These data packets can be parsed and stored in registers (e.g., the one in Fig. The data packets are stored in the registers shown in the four shown. The data packets can be matched with corresponding STEs, which can have arguments to add a value to the packet headers. For example, the STE for the first packet can add 16 to the Time-to-Live (TTL) field of the first packet, while the STE for the second packet can add 17 to the TTL of the second packet. The retrieved sequences can be an identical sequence (e.g., sequence 402 in). Fig. 4) which contains an "Additions" operation. Next, the executable sequences configured for the packages can accept input from up to two of three sources (e.g., input sources 404 in Fig. 4) Received: the register, the STE, and / or the sequence. The inputs can be grouped and stored within the executable sequence, thus configuring each executable sequence to process a specific data packet. Alternatively, the inputs can be stored in a register, thereby using the same executable sequence, with each packet having the corresponding value in the register. Subsequently, the data packets and their executable sequences can be sent to a target device (e.g., the one in Fig. 1. The target device shown (106) is sent, where the executable sequences can be used by the target device's processor to process the respective data packets. For example, as a result of executing the executable sequences, operations can be performed on the respective data packets, including forwarding the packets to a specific destination, modifying the packets, performing security checks on the packets, or the like.

[0077] In some embodiments, the steps described here can be performed by a computer program product. The computer program product can be used to process data packets, and the computer program product comprises at least one non-volatile, machine-readable storage medium that stores program instructions. For example, with reference to Fig.2. A network device 120 comprises a computer program product stored in a memory 114, wherein the computer program product can be used to process data packets received by the network device. When these program instructions are executed, the computer program product can cause a device (e.g., the network device 120) to perform the steps described above. In this way, the program instructions of the computer program product, when executed, can perform the same or similar steps as the procedure described herein.

[0078] Many modifications and other embodiments of the present disclosure set forth herein will be readily apparent to a person skilled in the art in the field to which these embodiments relate, taking into account the teachings presented in the preceding descriptions and the accompanying drawings. Although the figures show only certain components of the methods and systems described herein, it is understood that various other components may also be part of an optical component or an optoelectronic element. Furthermore, the methods described above may, in some cases, comprise fewer steps, while in other cases they may comprise additional steps. Modifications of the steps of the method described above may, in some cases, be carried out in any order and in any combination.

[0079] Therefore, it is understood that the disclosure is not limited to the specific embodiments disclosed herein and that modifications and other embodiments are to be included within the scope of the appended claims. Although certain terms are used here, they serve only a general and descriptive purpose and not to limit the scope of the disclosure.

[0080] It is understood that the aspects and embodiments described above are purely exemplary and that modifications of details may be made within the scope of protection of the claims.

[0081] Each device, each method and each feature disclosed in the description, and (where applicable) the claims and drawings, may be provided independently or in any suitable combination.

[0082] Reference numerals appearing in the claims are for illustrative purposes only and do not restrict the scope of protection of the claims.

Claims

[1] Method for processing data packets, comprising the following: Receiving a data packet; Matching the data packet with a steering table entry (STE), where the STE contains arguments associated with processing the data packet and a pointer pointing to an executable sequence; dynamically configuring the executable sequence to process the data packet using at least the arguments; and Executing the executable sequence to process the data packet. [2] Method according to claim 1, wherein the data packet comprises a header, wherein the steering table entry further comprises: a day that includes a set of criteria; and a matching parameter, where matching the data packet with the steering table entry includes using the matching parameter to identify one or more segments of the header and comparing the one or more segments of the header with the set of criteria. [3] Method according to claim 2, wherein the steering table entry further comprises a balancing parameter, wherein the balancing parameter specifies a tag parameter. [4] Method according to claim 3, wherein the adjustment parameter is 4 DWORDS. [5] Method according to claim 2, 3 or 4, wherein the steering table entry further comprises: an escape pointer configured to identify an alternative steering table entry, the alternative steering table entry comprising alternative arguments associated with the processing of the data packet, the procedure further includes the following: Matching the data package with the alternative steering table entry; dynamically configuring the executable sequence to process the data packet using at least the alternative arguments; and Executing the executable sequence to process the data packet. [6] Method according to any of the preceding claims, wherein the steering table entry further comprises: a sequence, wherein the sequence comprises a sequence of executable operations; and a sequence pointer to identify the sequence; the procedure further includes the following: Receiving one or more inputs from at least one of the arguments or the sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs. [7] A method according to any of the preceding claims, the method further comprising: Parsing the data packet into discrete parts; and Storing the discrete parts of the data packet in registers. [8] Method according to claim 7, wherein the steering table entry further comprises a sequence pointer, wherein the method further comprises: Retrieving a sequence identified by the sequence pointer, wherein the sequence comprises a sequence executing operations; Receiving one or more inputs from at least one of the registers, arguments, or sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs. [9] Network device comprising the following: Network interface that is functionally coupled to a communication network; and A packet processing circuit that is functionally coupled with the network interface, wherein the packet processing circuit is configured after receiving a data packet via the network interface to: Matching the data packet with a steering table entry, wherein the steering table entry includes arguments associated with the processing of the data packet, as well as a pointer pointing to an executable sequence; dynamically configuring the executable sequence to process the data packet using at least the arguments; and Executing the executable sequence to process the data packet. [10] Network device according to claim 9, wherein the data packet comprises a header, wherein the steering table entry further comprises: a day that includes a set of criteria; and a matching parameter, wherein the packet processing circuit is configured to match the data packet with the steering table entry by using the matching parameter to identify one or more segments of the header and comparing the one or more segments of the header with the set of criteria. [11] Network device according to claim 10, wherein the steering table entry further comprises a matching variable, wherein the matching variable specifies a size of the tag. [12] Network device according to claim 10 or 11, wherein the steering table entry further comprises: an escape pointer configured to identify an alternative steering table entry, the alternative steering table entry comprising alternative arguments associated with the processing of the data packet, the packet processing circuit is further configured to: Matching the data package with the alternative steering table entry; dynamically configure the executable sequence to process the data packet using at least the alternative arguments; and Executing the executable sequence to process the data packet. [13] Network device according to any one of claims 9-12, wherein the steering table entry further comprises: a sequence, wherein the sequence comprises a sequence of executable operations; and a sequence pointer to identify the sequence; the packet processing circuit is further configured to: Receiving one or more inputs from at least one of the registers or the sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs. [14] Network device according to one of claims 9-13, wherein the packet processing circuit is further configured to: Parsing the data packet into discrete parts; and Storing the discrete parts of the data packet in registers. [15] Network device according to claim 14, wherein the steering table entry further comprises a sequence pointer, wherein the packet processing circuit is further configured to: Retrieving a sequence identified by the sequence pointer, wherein the sequence comprises a sequence of executable operations; Receiving one or more inputs from at least one of the registers, arguments, or sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs. [16] Network device according to any one of claims 9-15, wherein the network device further comprises: a network adapter a data processing unit (DPU) or a network switch. [17] Computer program product for processing data packets, wherein the computer program product comprises at least one non-volatile, computer-readable storage medium which stores program instructions which, when executed, cause a device to: Receiving a data packet; Matching the data packet with a steering table entry (STE), where the STE contains arguments associated with processing the data packet and a pointer pointing to an executable sequence; dynamically configure the executable sequence to process the data packet using at least the arguments; and Executing the executable sequence to process the data packet. [18] Computer program product according to claim 17, wherein the data package comprises a header, wherein the steering table entry further comprises: a day that includes a set of criteria; and a matching parameter, wherein, upon execution, the program instructions cause the device to match the data packet with the steering table entry by using the matching parameter to identify one or more segments of the header and comparing the one or more segments of the header with the set of criteria. [19] Computer program product according to claim 18, wherein the steering table entry further comprises a matching variable, wherein the matching variable specifies a size of the tag. [20] Computer program product according to claim 18 or 19, wherein the steering table entry further comprises: an escape pointer configured to identify an alternative steering table entry, the alternative steering table entry comprising alternative arguments associated with the processing of the data packet, where, upon execution, the program instructions cause the device to: Matching the data package with the alternative steering table entry; dynamically configure the executable sequence to process the data packet using at least the alternative arguments; and Executing the executable sequence to process the data packet. [21] Computer program product according to one of claims 17-20, wherein the steering table entry further comprises: a sequence, wherein the sequence comprises a sequence of executable operations; and a sequence pointer to identify the sequence; where, upon execution, the program instructions cause the device to: Receiving one or more inputs from at least one of the registers or the sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs. [22] Computer program product according to one of claims 17-21, wherein the program instructions, when executed, cause the device to: Parsing the data packet into discrete parts; and Storing the discrete parts of the data packet in registers. [23] Computer program product according to claim 22, wherein the steering table entry further comprises a sequence pointer, wherein the program instructions, when executed, cause the device to: Retrieving a sequence identified by the sequence pointer, wherein the sequence comprises a sequence of executable operations; Receiving one or more inputs from at least one of the registers, arguments, or sequence identified by the sequence pointer; and Dynamically configuring the executable sequence using the sequence of executable operations and one or more inputs.

Images