CLUSTERING OF GEOMETRIC PRIMITIVES USING SPATIAL PROXIMITY AND CONNECTION

The clustering of geometric primitives using spatial proximity and connectivity within a top-down BVH construction algorithm addresses inefficiencies in existing methods, improving rendering performance and reducing artifacts in ray tracing applications.

DE102025155394A1Undetermined Publication Date: 2026-07-02NVIDIA CORP
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Patent Information

Application Number
DE102025155394
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-12-31
Filing Date
2025-12-30
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

Existing clustering approaches for geometric primitives in mesh representations are inefficient, leading to suboptimal performance and artifacts in rendered images, particularly in ray tracing and other image generation applications.

Method used

A clustering method that groups geometric primitives based on spatial proximity and connectivity, using a top-down bounding volume hierarchy (BVH) construction algorithm to minimize bounding box surface area and overlap, and optimize cluster size and connectivity for improved ray tracing efficiency.

Benefits of technology

Enhances rendering efficiency by reducing the number of triangles checked per ray, minimizing resource waste, and reducing artifacts in rendered images.

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Abstract

The approaches presented here involve clustering geometric primitives, such as triangular areas, within a mesh representation, which is advantageous for downstream processing. In at least one embodiment, clustering can be partially based on the spatial positions of the geometric primitives, for example, to minimize the surface area of ​​bounding boxes around clustered primitives or to minimize the overlap between bounding boxes. Other factors, such as connectivity within or between clusters, can also be considered. A cost function can be used that comprises a weighted combination of cost terms, where these cost terms can be selected partly based on the type of downstream processing to be performed or on hardware requirements / optimizations for performing the processing.
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Description

BACKGROUND In various applications—for example, rendering, light transport simulation (such as ray tracing, path tracing, ray marching, etc.), or other types of image or video generation—there is a need to provide a representation of at least one object to be processed as part of the application. This representation might take the form of a geometric mesh along with one or more textures or other similar objects. To improve efficiency, it can be advantageous to group instances of surface geometry—such as triangles or other geometric primitives—into clusters that can be processed together (or otherwise treated as individual objects or primitives).In one example, the path of a ray can be traced to intersect a single cluster, and then the hit check would only need to be performed for the triangles within that cluster, instead of for all possible triangles of a mesh used to render an image of a scene. Unfortunately, previous clustering approaches have not proven to provide optimal clustering, leading to inefficiencies and, in some cases, artifacts in the rendered images. SUMMARY The invention is defined by the claims. To illustrate the invention, aspects and embodiments that may or may not fall within the scope of the claims are described here. The approaches presented here involve clustering geometric primitives, such as triangular areas, within a mesh representation, which is advantageous for downstream processing. In at least one embodiment, clustering can be partially based on the spatial positions of the geometric primitives, for example, to minimize the surface area of ​​the bounding boxes around clustered primitives or to minimize the overlap between bounding boxes. Other factors, such as connectivity within or between clusters, can also be considered. A cost function can be used that comprises a weighted combination of cost terms, where these cost terms can be selected, in part, based on the type of downstream processing to be performed or on hardware requirements / optimizations for performing the processing. Further features of the disclosure are characterized by the independent and dependent claims. Any feature of one aspect of the disclosure can be applied to other aspects of the disclosure in any suitable combination. In particular, procedural aspects can be applied to apparatus or system aspects and vice versa. Furthermore, features implemented in hardware can be implemented in software and vice versa. All existing references to software and hardware features should be interpreted accordingly. Each system or device feature described herein can also be defined as a process feature, and vice versa. Functionally described system and / or device aspects (including means-plus functional features) can alternatively be expressed by their corresponding structure, for example, by a suitably programmed processor and associated memory. It is also understood that certain combinations of the various features described and defined in any aspect of the revelation can be implemented and / or provided and / or used independently of one another. The disclosure also provides for computer programs and computer program products comprising software code which, when executed on a data processing device, is capable of performing any of the present methods and / or embodying any of the device and system features described herein, including individual or all partial steps of any method. The disclosure also provides for a computer or data processing system (including networked or distributed systems) with an operating system that supports a computer program for executing any of the methods described herein and / or for embodying any of the device or system features described herein. The revelation also provides a computer-readable medium on which one or more of the aforementioned computer programs are stored. The revelation also provides for a signal that transmits one or more of the aforementioned computer programs. The disclosure extends to methods and / or devices and / or systems as described herein with reference to the accompanying drawings. Aspects and embodiments of the disclosure are now described only as examples and with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS Various embodiments according to the present disclosure are described with reference to the drawings. Fig. 1 illustrates an exemplary geometric mesh representation with clusters of geometric surfaces according to at least one embodiment; Fig. 2 illustrates a view of an approach for dividing a set of geometric elements using spatial position according to at least one embodiment; Fig. 3 illustrates components of an exemplary system that can be used to determine clusters of elements in a mesh representation according to at least one embodiment; Fig. 4 illustrates an exemplary process that can be carried out to perform cluster formation of elements in a mesh representation according to at least one embodiment; Fig. 5A and Fig.Figure 5B illustrates exemplary approaches for determining and evaluating potential partition plane positions according to at least one embodiment; Figure 6 illustrates an exemplary approach for determining clusters comprising specific geometric elements according to at least one embodiment; Figure 7 illustrates images with and without degenerate results resulting from suboptimal clustering according to at least one embodiment; Figure 8 illustrates an exemplary process that can be performed to cluster elements in a mesh representation partially based on connectivity according to at least one embodiment; Figures 9A and 9B illustrate components of an exemplary content generation system according to at least one embodiment; FigureFigure 10 illustrates components of a distributed system that can be used to generate and provide image content, including generating mesh representations of one or more objects, according to at least one embodiment; Figure 11 illustrates an exemplary data center system according to at least one embodiment; Figure 12 illustrates a computer system according to at least one embodiment; Figure 13 illustrates a computer system according to at least one embodiment; Figure 14 illustrates at least sections of a graphics processor according to one or more embodiments; and Figure 15 illustrates at least sections of a graphics processor according to one or more embodiments. DETAILED DESCRIPTION The following description details various embodiments. For explanatory purposes, specific configurations and details are presented to provide a comprehensive understanding of the embodiments. However, it will also be apparent to those skilled in the art that the embodiments can be implemented without these specific details. Furthermore, known features may be omitted or simplified to avoid obscuring the described embodiment. The systems and methods described herein can be used without restriction by non-autonomous vehicles or machines, semi-autonomous or autonomous vehicles or machines (e.g., in one or more advanced driver assistance systems (ADAS), one or more in-vehicle infotainment systems, one or more emergency vehicle detection systems), controlled and uncontrolled robots or robotic platforms, warehouse vehicles, off-road vehicles, vehicles with one or more trailers, aircraft, boats, shuttles, emergency vehicles, motorcycles, electric or motorized bicycles, airplanes, construction vehicles, trains, underwater vehicles, remotely controlled vehicles such as drones and / or other types of vehicles.Furthermore, the systems and methods described herein can be used for a variety of purposes, for example, but without limitation, for machine control, machine locomotion, machine propulsion, synthetic data generation, generative AI, model training or updating, perception, augmented reality, virtual reality, mixed reality, robotics, security and monitoring, simulation and digital twin creation, autonomous or semi-autonomous machine applications, deep learning, environmental simulation, data center processing, conversational AI, light transport simulation (e.g., ray tracing, path tracing, etc.), collaborative content creation for 3D objects, generative AI, cloud computing, and / or other suitable applications. Disclosed embodiments may be included in a wide variety of different systems, such as automotive systems (e.g., an in-vehicle infotainment system for an autonomous or semi-autonomous machine, a perception system for an autonomous or semi-autonomous machine), systems implemented using a robot, antenna systems, medical systems, boat systems, intelligent area monitoring systems, systems for performing deep learning operations, systems for performing simulation operations, systems for performing digital twin operations, systems implemented using an edge device, systems implementing one or more virtual machines (VMs), systems for performing operations for generating synthetic data, systems implemented at least partially in a data center, and systems for performing operations with conversational AI.Systems that implement one or more language models – such as large language models (LLMs), visual language models (VLMs), etc.; systems for performing generative AI operations (e.g., using one or more language models, transformer models, etc.); systems for performing light transport simulation; systems for performing collaborative content creation for 3D objects; systems for performing generative AI operations; systems implemented at least partially using cloud computing resources; and / or other types of systems. In some examples, the machine learning model(s) described herein (e.g., deep neural networks, language models, LLMs, VLMs, multimodal language models, perceptual models, tracking models, fusion models, transformer models, diffusion models, pure encoder models, pure decoder models, encoder-decoder models, Neural Rendering Field (NERF) models, etc.) can be packaged as a microservice—for example, an inference microservice (e.g., NVIDIA NIMs)—which can include a container (e.g., an operating system (OS)-level virtualization package) that can include an application programming interface (API) layer, a server layer, a runtime layer, and / or at least one model engine. For example, the inference microservice can include the container itself and the model(s) (e.g., weights and signs). In some cases, for example when the machine learning model(s) is / are small enough (e.g.If the model(s) have a sufficiently small number of parameters, they can be contained within the container itself. In other cases—for example, if the model(s) are large—the model(s) can be hosted / stored in the cloud (e.g., in a data center) and / or on-premises and / or at the edge (e.g., on a local server or data processing device, but outside the container). In such implementations, the model(s) can be accessed via one or more APIs, such as REST APIs.Therefore, the machine learning model(s) described herein can, in some embodiments, be used as an inference microservice to accelerate the deployment of a model(s) in any cloud, data center, or edge computing system, while ensuring data security. For example, the inference microservice may include one or more APIs, a pre-configured container for simplified deployment, an optimized inference engine (e.g.,created using standardized AI model deployment and execution software such as NVIDIA's Triton Inference Server) and / or one or more APIs for high-performance deep learning inference, which may include an inference runtime environment and model optimizations that provide low latency and high throughput for production applications - such as NVIDIA's TensorRT) and / or enterprise management data for telemetry (e.g., including identity, metrics, health checks, and / or monitoring). The machine learning model(s) described herein can be included as part of the microservice, along with an accelerated infrastructure capable of single-command deployment and / or orchestration and automatic scaling using a container orchestration system on an accelerated infrastructure (e.g., from a single device to the size of a data center). Therefore, the inference microservice can include the machine learning model(s) (e.g., optimized for high-performance inference), inference runtime software for executing the machine learning model(s) and providing outputs / responses to inputs (e.g., user queries, prompts, etc.), and enterprise management software for providing health checks, identity verification, and / or other monitoring capabilities.In some implementations, the inference microservice may include software to perform an in-place replacement and / or update of the machine learning model(s). During a replacement or update, the software performing the replacement / update may retain the user configurations of the inference runtime software and the enterprise management software. Approaches according to various illustrative embodiments can facilitate the efficient processing of surface geometries, such as those used in a rendering process based on light transport simulation. To improve efficiency, it can be advantageous to group instances of the surface geometry (e.g., triangles or other geometric primitives) into clusters, so that when tracing the path of a ray that, for example, intersects only a single cluster, a hit check only needs to be performed for the triangles within that cluster and not for all possible triangles in a scene.Clusters can be set to the same target size (or within a specific size range), where this size / range is partially determined by the number of triangles that can be stored simultaneously in the memory of a processing unit, such as a graphics processing unit (GPU). It can be advantageous for the triangles in a given cluster to be spatially close to one another, for example, if the bounding boxes around these clusters have a minimum size and do not overlap, or only partially overlap. In at least one embodiment, an extended top-down binding volume hierarchy (BVH) construction algorithm can be used, employing triangle centroids to recursively split the grouping of triangles, restricting the split position to generate leaves of a target size (or a narrow size range).Clusters can be formed from elements at leaf nodes, so the terms "node" and "cluster" can be used almost synonymously in this context (the term "node" is often used for a BVH hierarchy, but for cluster formation, the hierarchy can be ignored). Any splitting (except at leaf nodes) can result in clusters that are multiples of the target cluster / group size. A selection can be made from the possible splitting options, partly based on the cost in terms of the surface area of ​​the bounding boxes around these clusters, for example, to minimize an average / total area. In some embodiments, attempts can also be made to maximize cluster sizes by introducing a cost for underfilling, as well as to minimize overlap between bounding boxes. In at least one embodiment, further optimization can involve maximizing connectivity (or "adjacency") within clusters. An application might require, or at least benefit from, more control over how elements are grouped, rather than relying solely on spatial proximity. Approaches according to at least one embodiment can employ factors such as per-element connectivity and weights in cluster formation. Each element (e.g., a triangle) can have a list of zero or more connected elements, along with a numerical weight for each connection. The sum of the weights of the internal connections within each cluster can be maximized, or equivalently, the sum of the external connections can be minimized to identify a cut with minimal cutting costs.Such an approach has the advantage of providing variability in the division plane position, based in part on the relevant costs. In at least one embodiment, a division cost value for each potential division plane position can be determined using prefix sum sampling. Such an approach can utilize connectivity tables that can be reconstructed for each axis to include sorted, element-relative indices, with a minimum value determined from the various axes. In at least one embodiment, additional intersection considerations can be used to avoid introducing artifacts that might arise from selecting intersection positions that, while cost-effective, could lead to suboptimal results or artifacts later on.This can involve, for example, the use of a ratio cut that can divide relevant costs by the number of elements on either side of a proposed cut position, or a normalization cut that can divide by the cumulative number of connections each element has. These costs can then be summed with the surface heuristic and other costs (such as at least some of those disclosed herein) to select an optimal clustering or cutting position for each of a number of iterations of a clustering process. Variations of these and other similar functions can also be used within the scope of the various embodiments, as would be obvious to experts in the field in view of the teachings and proposals contained herein. Fig. 1 illustrates a perspective view 100 of an exemplary mesh representation 102, which can be generated and / or used according to various embodiments. A three-dimensional (3D) object can be represented by a set of points in 3D space, for example, in a Cartesian coordinate system. A mesh representation 102 of this object can be generated by using edges to connect pairs of these points or “vertices,” with an edge between two vertices then running approximately along the surface of the object (rather than connecting vertices, which would cause the edges to pass through the interior of the object or over gaps in the object, resulting in an inaccurate shape representation). A geometric mesh can include several geometric objects (or elements, primitives, etc.), for example, in the form of triangles or triangular faces 104, as shown in Fig.Figure 1 illustrates that three edges are formed between vertices. The faces of such a mesh representation can, taken together, provide an approximation of the surface and / or shape of the corresponding 3D object. Smaller faces can provide a more accurate representation, but increasing the number of faces required can increase the resource expenditure for generating, storing, and using the mesh data. Therefore, a balance is usually struck between surface accuracy and data storage capacity when determining the number of faces or vertices to be used to represent an object in a mesh, as well as the ranges of possible distances between vertices and other such factors. Triangular meshes are commonly used in rendering engines to render views of digital objects when combined with at least one texture or other visual element or aspect.Existing ray tracing application programming interfaces (APIs) often rely on an application that pre-provides all the geometry or on providing a mesh that can be used to build a bounding volume hierarchy (BVH) or other acceleration structure that the hardware can track. This information is acquired or generated, then stored in local memory to enable tracing by a GPU or other such processing unit. Once the data is on the GPU, such as after the BVH has been generated, tracing can be quite fast. Unfortunately, the time required to create the BVH can be many times longer—for example, at least five times longer—than the time required for tracing.If a scene contains elements that move or otherwise need to be animated, the need to create and update such a BVH can significantly impact performance. Another potential drawback of this approach is that the scene size is limited by the amount of memory available for storage. Therefore, tracking highly detailed geometries can be difficult, or at least time-consuming and resource-intensive. Approaches according to at least one embodiment attempt to avoid some of these and other such problems that can negatively impact performance. One such approach exploits the fact that much of the geometry in a scene changes only slightly, if at all, between adjacent frames of a video sequence. For example, a given scene may contain many instances of static geometry, including buildings, rocks, sidewalks, and other static geometry that does not typically move within a scene. Newer GPUs, such as NVIDIA Corporation's Blackwell GPUs, can split a BVH and then reassemble pre-built sections of the hierarchy that do not need to be reconstructed. A Blackwell-type GPU can build an acceleration structure for a small group of triangles and store it for reuse.The groups can then be combined into more complex hierarchies, and this merging can be quite fast, partly due to optimizations that can be made to these groupings of triangles. Certain processing units may also have specific sizes for which they are optimized; for example, a GPU might be optimized to process exactly 128 or 256 triangles simultaneously, and if a group contains fewer triangles, this can lead to a decrease in performance or efficiency. Various rendering approaches can treat these groupings or “clusters” of triangles (or other similar surfaces) as individual graphics primitives. This allows rendering algorithms to leverage the knowledge that the triangles within a given cluster are close to each other in object space and likely share similar properties. Figure 1 illustrates various triangle clusters 106, each comprising a non-overlapping set of triangles. These triangles are all connected by at least one common edge to at least one other triangle in the cluster 106 and are relatively close to each other in object space (and, after rendering, in screen space). Examples of such rendering approaches include Epic Games’ Nanite virtualized geometry technology in Unreal Engine 5 and NVIDIA Corporation’s Blackwell cluster acceleration architecture. One challenge with such approaches is determining how to optimally, or even advantageously, group these triangles into clusters. Random clustering or clustering based solely on connectivity can lead to suboptimal clusters and wasted resources. For example, high connectivity within clusters may be desirable for tasks such as decimating triangle meshes, but additional post-processing may be required to achieve, but not exceed, a certain number of elements per cluster. Clusters generated based on connectivity can also be suboptimal for ray tracing because there is no specific optimization for tight bounding boxes. If triangles in a cluster were randomly selected and distributed across a mesh, the bounding boxes would overlap considerably, likely spanning almost the entire mesh.During ray tracing, a ray's path would likely intersect or hit most of the bounding boxes, resulting in the inspection of most triangles in a mesh for each ray. Smaller and / or narrower bounding boxes can significantly reduce the number of triangles to be inspected when a ray is determined to intersect a particular bounding box. Approaches according to various embodiments of the present disclosure provide for improved clustering of triangles or other geometric components of a mesh representation. Such approaches can take into account various desirable properties when clustering mesh geometries. For example, in at least one embodiment, it may be advantageous to identify clusters of a fixed size or as close as possible to a fixed size. This can be advantageous, at least because data structures are often fixed, and any number of triangles in a cluster below the maximum number can lead to wasted space and insufficient hardware utilization. Such approaches can support various types of geometries, including triangles, quadrilaterals, and even other geometric clusters. In at least one embodiment, such an approach may attempt to determine the size (e.g.,The goal is to minimize the volume of a bounding box or bounding sphere around a cluster to enable tight grouping in space. Such an approach can also attempt to minimize the overlap between neighboring cluster bounding boxes, which can be important for ray tracing processes that use bounding box-based acceleration structures. Similarly, minimizing connectivity within individual clusters can be beneficial for tasks such as mesh simplification during level-of-detail (LOD) generation, among other such options. Approaches according to at least one embodiment can employ a clustering algorithm based on a top-down bounding volume hierarchy (BVH). This can, for example, involve the recursive division of a space based on one or more division criteria. When constructing a top-down structure, elements along each of the three axes x, y, and z can be sorted, and then a suitable division position for each axis can be identified. These sortings can be stored and maintained to represent both the elements in each node and their sorted order within the nodes for each axis. These can be referred to as "sorted element arrays," although the sorting remains valid only within node regions. These elements can be sorted, for example, based on the location of their centroids along each axis.Some of the elements are then located on the first side of the division, while the remaining elements are on the other side of the division for a given axis, although in some cases some of the elements may cross the division and thus have parts on both sides. For clustering, it is generally desirable to have a single cluster membership per element, with elements being split on one side or the other based, for example, on their center of gravity position. For simplicity, these sides of a division are referred to as the "left" and "right" sides, as many examples are explained in relation to 2D figures; however, it should be understood that this usage does not imply any requirement or restriction regarding the direction or orientation of a division plane or any other such feature.The sorting of node elements for each axis can be maintained after splitting a node by partitioning its elements in other axes perpendicular to the split, depending on whether each element is located in a first or second direction with respect to the split (e.g., left or right of the split plane). The elements on each of these sides can then be repeatedly split recursively until the groupings contain at most a target or maximum number of elements, or another such splitting criterion is satisfied. Various approaches can be used to determine the positions of these different split planes. For example, a surface heuristic can be used that attempts to optimize a bounding box around the elements on a split side that has a small surface area relative to the number of elements in that bounding box.A common surface heuristic, for example, has a square shape, where the minimum value can represent the suitable division positions. In at least one embodiment, the cost for each division position can be determined based on the surface area of ​​the bounding frame relative to the number of elements in that frame. An attempt can be made to identify the position with the lowest cost along all three axes. Elements can also be uniquely stored using a point, such as the centroid of a particular triangle or element. Such an approach can constrain the node split position to generate leaves of a precise size and can form clusters from elements within each leaf. A surface heuristic (SAH) can be used to construct BVHs and identify and select an optimal (or at least most suitable) split position within the bounded set of candidates. Various SAHs are designed for tasks such as ray tracing, and generating clusters in this way can be particularly advantageous if the resulting clusters are intended for ray tracing. In at least one embodiment, this advantage is achieved in part by optimizing the bounding frames. Reducing the number of candidates often also improves algorithm performance.An exemplary approach would be to attempt to cluster elements of a given size Cn to include, for example, 128 or 256 elements in each cluster. Such an approach could begin with a SAH-based top-down BVH construction algorithm (similar to a sweep kd tree algorithm for points) that uniquely partitions elements instead of duplicating elements crossing a partition level into both partition blocks (or "children"). The inputs could include, for example, element bounding boxes and element or bounding box centroids, which can vary for different implementations. The input elements initially form a single root node that can be recursively partitioned. An indirect element sort can be determined and maintained for each dimension, which can further improve performance.When searching for a splitting position for an arbitrary dimension, candidates that are not multiples of the cluster size Cn on the left can be excluded. Such a process can therefore involve the further development of Cn during iteration. Elements are partitioned into left and right nodes, and the process repeats until n elements per node satisfy the condition n ≤ Cn, or the number of elements per node is equal to or less than the cluster size, to account for a remaining edge case. Clusters can be trivially formed by the elements in each remaining node. These would be the leaf nodes for a BVH or kd-tree algorithm. There would be at most one cluster (or leaf node) with fewer than Cn elements, with all other clusters having the target cluster size Cn.Such an approach to cluster generation can be important for downstream processing such as ray tracing or other light transport simulation techniques. In at least one embodiment, there can be fewer than the target number of elements per leaf. This can, for example, involve relaxing the initial restriction of exactly n = Cn elements per cluster to a tunable range CA ≤ n ≤ CB, thus giving the surface heuristic more leeway for optimizing the bounding boxes. In some embodiments, it can be advantageous to have a slightly better surface heuristic value than an exact number of triangles in a cluster. There can be a minimum number of triangles to be included in a cluster, for example, at least 120 triangles for a target size of 128, but the value for a particular cluster can be arbitrarily within this range if it better satisfies a target criterion. An iterative split can be performed, where the number of elements in the different leaf nodes simply needs to fall within the target range.The optimal number of elements in a cluster can depend on various factors, such as the operation being performed and / or the hardware used for execution. The optimal number can also depend, in part, on the placement of the triangles, as it might be better to have 127 elements in a cluster than to include a 128th element located at a considerable distance, which would result in a significantly larger bounding box and potentially many other triangles that would need to be checked for multiple rays during ray tracing or similar operations. If ray tracing is particularly fast for a given implementation, the size of the bounding box might not be critical, allowing the range of elements to be included in each cluster to be smaller or closer to the target size. In at least one embodiment, the relaxation of the original restriction can be achieved by: where i is the number of elements to the left of the split candidate. Other approaches besides the surface heuristic can be used in other embodiments, but in implementations where the surface heuristic is already used in the hardware / software for BVH creation, leveraging this availability can avoid excessive complexity. In Fig. 2, the vertical gray regions 210, 212, 214, 216 in the top view 204 and the bottom view 206 represent the areas where selecting a division level is acceptable. The positions of the regions differ based on the elements in the left or right child nodes after division at each candidate position. The top view 204 considers the sizes of the left child nodes, while the bottom view 206 considers the sizes of the right child nodes. Selecting a division level outside these gray regions 210, 212, 214, 216 would result in a future division during the recursive division process, leading to a node with a number of elements outside the target range (e.g., 120-128).This example restricts the splitting candidates to those with acceptable left and right child node sizes after splitting (for all three axes) to determine the best splitting position within the node. In this example, the number of elements in each leaf node will satisfy the target size range or criterion as long as the selected splitting plane lies within the gray areas 210, 212, 214, and 216. Arrows 218 in the figure represent the ranges of elements in the candidate child nodes, as well as the beginning and end of each range within which a splitting plane can be optimally positioned. In some situations, there may be no agreement on acceptable splitting position ranges between the left and right scanning directions, so there may not be a solution that satisfies the target criterion.In this case, a selection algorithm can attempt to identify the splitting plane position that is closest to the target criterion, or select the best position from the left or right scanning direction such that at least one of the nodes resulting from the split meets the size criterion. In previous approaches, the division occurred at i mod N = 0, where i is the number of elements in the left half. A division position satisfying the preceding upper equation can help ensure that leaf nodes in the left child have a number of elements in the interval [CA..CB]. Likewise, the preceding lower equation can provide a similar constraint for the right child. If only candidates satisfying both equations are considered, leaves of the desired size can be obtained. Fig. 2 illustrates an example situation 200 where there are four possible division candidates 202 for n in the interval [127..128]. As mentioned, such an approach can be spatial in nature, attempting to group triangles that are spatially close to each other but not necessarily connected.For example, it might be advantageous to cluster the triangles that make up the fingertips of a hand, even though these fingertips are not (at least directly) connected to each other. By relaxing the division positions, leaf sizes of 127 or 128 are possible. If the total number of elements is small, it may not be possible to satisfy both equations. One solution in such a situation is to resort to restricting the division position to only one equation for these nodes, where all but possibly one node have n ≥ CA elements, and where at most one leaf node has a number of elements smaller than the target size, as given by n < CA. Such an approach can allow a range of cluster sizes [CA..CB], but these values ​​may all be equally preferred, so the cost metric of the SAH algorithm can be used for decision-making. In at least one embodiment, this cost metric can be updated by adding extra costs p to balance maximizing the number of elements per cluster, as given, for example, by: The derivation adds costs for underpopulated clusters, which can be given by k Σ(CB- n) for all leaf nodes, where k is an adjustable constant. Since leaf nodes are formed later in the algorithm, this can be approximated for larger nodes by calculating pleft and pright, the best number of missing elements from clusters in each child. These are equal to (-i)modCB and (in)modCB, respectively. The above cost equation can be used to determine the final costs added to the existing SAH costs, p. In some embodiments, pleft and pright can be scaled based on the surface area of ​​the bounding box of each child node to match the combined cost unit type. Parameter k can also be a function of n to adjust the importance of earlier split positions in the hierarchy. In some embodiments, the actual underfilling costs per leaf node may be non-linear and, in at least some cases, can be modeled with a transfer function f: An artificial example is f(x) = x², where x is the number of missing elements, causing the cost to increase superlinearly with higher numbers of missing elements. This can be applied to the total number of missing elements as above. The transfer function can instead be used to model the cost per leaf, assuming a uniform distribution of missing elements across the child nodes, with: Although a SAH, as described here, can generate small bounding boxes, it may not be specifically optimized for reduced overlap between adjacent nodes. Reduced overlap can be advantageous because intersection checking might unnecessarily require checking both nodes within an overlapping area. In at least one embodiment, a solution can be used that involves adding the left / right bounding box overlap cost value to the existing SAH cost metric. Similar to SAH itself, this additional cost can correspond to the surface area of ​​the overlap volume between the bounding boxes of the candidate nodes, multiplied by the number of elements in the parent node n, according to the SAH normalization, as applicable.This can involve calculating the intersection of the bounding boxes of the right and left halves and then adding costs based on the surface area of ​​this intersection volume. Some algorithms might divide by the surface area of ​​the parent node, but this can be skipped due to cancellations. The overlap volume then exists only between the two child nodes considered for division to simplify the problem space. The size of the bounding box is already minimized in at least one embodiment due to the division process used, as explained above. However, it may be better to use a slightly larger bounding box for at least one node if this results in less overlap.The different cost terms can therefore be weighted accordingly in different embodiments, whereby the values ​​of the weightings are determined empirically or derived in other ways. Fig. 3 illustrates components of an example system 300, which, according to at least one embodiment, can be used for generating a mesh including clustered elements. In this example, inputs such as a point-based object representation 302 can be received and provided as input to a mesh generator 304. The representation can, for example, include three-dimensional (3D) point cloud data acquired by a LiDAR system with respect to a physical object, or any other such representation. The mesh generator 304 can analyze the point-based object representation 302 to attempt to generate a geometric mesh representation of the object.This can, for example, involve determining suitable pairs of vertices to be connected, where these connections define surfaces or geometric elements that will encompass the mesh and approximate a surface shape of the object corresponding to the input representation. This can, for example, involve generating a geometric mesh using a set of triangles as mesh elements or surfaces. As mentioned, it can be advantageous, at least for some downstream operations, to group subsets of these triangles into a set of clusters. Accordingly, the generated mesh representation 306 can be provided as input to a cluster generator 308, although in some embodiments such a cluster generator can alternatively be part of the mesh generator 304.In this example system 300, the cluster generator 308 is a separate component, since a network representation can be received as an already generated input, so no additional generation step is required. In this example, the cluster generator 308 can include a grouping or intersection position proposal algorithm 310, which can attempt to determine, for each iteration through the set of triangles of the mesh, potential intersection positions or groupings that satisfy one or more criteria, as explained above. Generated proposals can then be sent to a cost calculator 312, which uses a suitable cost formula to determine the cost of each proposal, selecting the proposal that incurs the lowest cost (or satisfies another selection criterion). As mentioned, the cost formula can include various terms that can be selected for different downstream operations and can include costs for surface area, bounding frame overlap, connectivity, and the like.The process can be performed iteratively until clusters are obtained that, with the exception of at most one cluster, have a target number (or a number within a certain range, as explained below) of elements in each cluster. Once such clusters are identified, a geometric mesh representation of the clustered elements can be created, which can be provided as input for a downstream operation, pipeline, or process. Fig. 4 illustrates an example process 400 that can be carried out using such a system to determine a clustering to be used for a geometric mesh representation, according to at least one embodiment. It is understood that for this and other processes presented herein, additional, fewer, or alternative steps may be carried out in a similar or alternative sequence, or at least partially in parallel, within the scope of the various embodiments, unless expressly stated otherwise. Furthermore, although this example is discussed in relation to the use of a surface heuristic, there may be other algorithms, heuristics, and approaches that can be used to calculate costs for different cutting positions or element groupings within the scope of different embodiments.In this example process 400, a geometric mesh representation 402 is obtained, consisting of a set of interconnected geometric elements, such as triangular faces. The spatial positions and boundaries of the various geometric elements of the mesh can be identified 404. This may include, for example, determining the centroid positions for individual elements, as well as a bounding box or other similar metrics. Iterative grouping or splitting can be performed until clusters with a target number of elements are obtained, except that there may be at most one cluster for numbers of elements that cannot be divided evenly by target size. For a current iteration, potential groupings (or splitting planes or intersection positions, etc.) can be determined.) for the elements 406 are determined, partly based on the spatial positions of the geometric elements, among other selection criteria explained and proposed herein. For each of these individual groupings (or at least a subset of the groupings), division costs (or a similar cost value) can be calculated using a cost function 408 that includes at least one term corresponding to a surface heuristic or a similar metric. A proposed grouping can then be selected as the appropriate grouping for this iteration 410, at least partly based on the grouping associated with the lowest cutting costs.If it is determined that the iterative grouping has not yet resulted in clusters of the target size, such that at least one further iteration of grouping is required, the process can continue with another set of subgroupings, which are proposed and whose costs are determined. Once it has been determined that the target cluster size has been achieved (for all but at most one cluster), an identification of the selected clusters of elements (or the elements in each cluster) can be provided with respect to the mesh representation, for example, by mapping the global index values ​​of the geometric elements to a set of cluster identifiers. The mesh representation with the clustering information can then be provided for use in at least one subsequent or downstream operation, for example, among other such operations, with respect to rendering or ray tracing. In at least one embodiment, further optimization may involve maximizing connectivity (or "adjacency") within clusters. An application may require more control over, or at least benefit from, how elements are grouped, rather than relying solely on spatial proximity. For example, triangles may share vertices, and increasing vertex reuse within a cluster may be advantageous. Vertex sharing can be beneficial when generating clusters along common boundaries, particularly for decimation and level-of-detail (LOD) generation. For continuous LOD, the ability to preferentially keep "locked" edges and / or vertices within clusters when forming clusters from clusters may also be important. Approaches according to at least one embodiment can use per-element connectivity and weights. Each element can have a list of zero or more connected elements, as well as a numerical weight for each connection. The sum of the weights of the internal connections within each cluster can be maximized or, equivalently, the sum of the external connections can be minimized. Fig. 5A illustrates an exemplary partitioning approach 500 that can be used to find a "minimum cut" according to at least one embodiment. Such a process can be used to select a cut position for a set of triangles 508, where connectivity is defined by common edges. Each arrow in the figure represents a connection between two triangles along a common edge in the direction of the commonness (orthogonal to the edge at that location).This approach may differ from approaches that aim for a shortest path or a minimum spanning tree, where weighting is often avoided. While such top-down recursive splitting approaches may not find an optimum, the quality of the generated clusters can still be significantly improved by integrating connectivity information and applying minimum cutting cost optimizations, even when considering only axis-aligned splits. As mentioned, in some operations or use cases it can be advantageous to optimize or at least consider adjacency and connectivity. An approach like the one disclosed with respect to Fig. 5A has the advantage of being able to consider connectivity while simultaneously providing variability in partition plane position based partly on the relevant costs. A connectivity term can be added to the cost function to reward solutions that favor connectivity, with the term weighted according to a particular operation or use case, etc. Such an approach also has advantages in other situations, as a cost penalty can be applied when a reduction in connectivity is desired. As mentioned earlier, the weights can be configurable, user-defined, or empirically determined through experimentation, among other options.Instead of focusing on connections to neighboring nodes, such an approach can consider connections across the potential division plane position. The cost of connecting to neighboring nodes usually balances out, so it may be more important and / or advantageous to consider connections across the division plane, such as connections 504 and 506 illustrated in Fig. 5A. This consideration, along with a surface heuristic and other approaches discussed here, can be used to determine an optimal division plane position for a set of triangles or other geometric primitives. Normalization can also be applied to certain values ​​if this is advantageous for computation and / or resource consumption. In the example illustrated in Fig. 5A, the cutting costs are the sum of the connection weights that cross the division plane. In this example, the dotted line represents a cross-section of the division plane 502, with two connections 504, 506 between triangles being divided by the selected division plane 502. An algorithm can be used to compute the cutting costs, which are integrated into a top-down BVH design algorithm. The cutting costs for a division candidate after the i-th element, cuti, are the sum of the weights of all connections that bridge the division plane. The weights themselves can be used to establish a tunable equilibrium with the SAH costs. Such cutting costs can increase proportionally if the connectivity represents an area of ​​n elements in 3D space, and some embodiments may include a normalization term that is divided by n.Further scaling by n and possibly the surface area of ​​the node can be used to convert the cutting costs into relative units of the SAH costs. One way to calculate the cutting cost is to try to find, for each element to the left of the candidate split, all connected elements to the right of the candidate split. If such an element is found, the weight for that connection can be added to the cost. However, performing such a search for each split candidate is redundant, and the search itself can be relatively slow, even though the elements are sorted. Approaches according to at least one embodiment can efficiently calculate the cutting cost at each node. In at least one such approach, an array of size n is constructed and populated with the sum of the positive weights for connections to the right and the negative weights for connections to the left. Connections outside the node can be ignored.The running total of this arrangement, which can be calculated using a prefix sum sampling, can provide the splitting costs at each position. Fig. 5B illustrates an approach 550 for determining the cutting costs according to at least one embodiment. This approach can use a prefix sum sampling of the joining weights of the rising and falling flanks to obtain cutting costs. The triangles are viewed from left to right, with the positions determined using the centroids of the triangles, such that the triangles in Fig. 5B, from left to right, are triangles A, B, C, and D. In this example, there is a potential splitting plane position between each pair of centroids from left to right, as well as to the left and right of all centroids within a first (A) and last (D) triangle. Of the five possible splitting positions, indicated by the vertical lines in Fig.As illustrated in 5B, the division positions to the left and right of all centroids would not result in a division (since all triangles would be located to the left or right of the division position), so these division plane positions can be discarded and the three possible division planes between the centroids of triangles A and D remain for consideration. In this example, each right-hand connecting edge can have a value of +1, and each left-hand connecting edge can have a value of -1 (although other values ​​or orientations could be used in other embodiments). For each of the connections between triangle centroids that would cross a division plane, there is a pair of values, including +1 for the rising edge and -1 for the falling edge. An algorithm implementing the approach illustrated in Fig. 5B would generate a list of edges, or connections, to other triangles (AB, BC, BD) for each triangle. Each connection can have a weight, but for simplicity, these weights can be assumed to be 1 for all connections. In this example, triangles A, C, and D each have one outgoing connection to be considered, while triangle B has three outgoing connections to be considered.One such approach might involve iterating through all these triangles to try to determine the sum of the connections to the right and the sum of the connections to the left. A pattern can then be generated that includes the rising and falling edges of the cost, so that the pattern represents the changes in edge-cutting cost for a potential split location after each triangle's centroid. From left to right, each connection to the right (rising edge) in this example increases the value by +1, and on the return to the left (falling edge), it decreases the value by -1. The total for each triangle can then be calculated based on the values ​​for its connections, regardless of whether they are rising or falling edges.For example, triangle B, as shown, has one falling flank connecting back to the left to triangle A with a value of -1 and two rising flank connections to triangles C and D, resulting in two values ​​of +1. Therefore, a final value of +1 for a partition candidate after this triangle is obtained, as shown in the top row of the bottom arrangement. Triangles C and D each have only one falling flank connection back to triangle B; therefore, these triangles each have a value of -1. In this example, the values ​​for each triangle can be determined and listed in the top row of the array. Using these values, a prefix sum scan can then be performed. From left to right, there is no previous value to sum to the current value, and the initial value of zero, which would represent a split before triangle A, is ignored. The first entry in the array's prefix sum scan row will have the value of triangle A, or +1—the cut cost for a split before triangle B. The second value will be the sum of the triangle values ​​for triangles A (+1) and B (+1), resulting in a value of +2. The third value in the prefix sum scan row will be this last sum (+2) plus the value of triangle C (-1), resulting in a value of +1. The process continues from left to right until all connections for potential split plane locations have been considered.The process can then attempt to identify one or more cutting positions with the lowest value. In this example, there are two splitting plane positions for which the prefix sum sampling is +1, corresponding to the connection between triangles AB and the connection between triangles BD. Based on the cutting costs, the splitting plane position should therefore be either at the identified position 552 or at the second position 554. The choice between the two positions may depend, in part, on at least one other value determined in relation to the splitting position determination process. In at least some embodiments, however, it may not be easy to determine whether a particular connection is "left," "right," or "external" (among other such designations). It may also be at least somewhat inefficient to have to try to determine which side of a partition (or which node) contains a particular triangle of a set. For example, a search of all elements in both nodes of a partition might be performed to determine connections between triangles. If a connection to a particular triangle, say X, is identified for a particular triangle in a node, it may be necessary to search all elements in both nodes (and possibly other nodes) to determine whether triangle X is in a particular node.Approaches according to at least one embodiment can attempt to reduce the search and / or processing effort by generating one or more pre-calculated tables that make it possible to query and find such information relatively quickly. In at least one embodiment, connectivity tables for each axis can be reconstructed to include indices in the sorted element arrays. These tables can be used to determine in constant time whether a connected element is in the same node and in which direction. A scattering operation can be used to perform such a reconstruction in at least one embodiment. The index of each element within the sorted element arrays can be added to the connections for that element in each axis. Since the weights can be stored in an equivalent array, this can either correspond to the location of the returning connection or generate a new weight array. Fig.Figure 6 illustrates an exemplary approach 600 that can be used to construct a sorted element-relative adjacency by scattering 602 a sorted index 604 onto a returning join table 606. In this example, triangles are sorted along an axis based on their centroid position (or some other such point or reference to the triangles). One axis is considered, but this would apply to all axes. The triangles are grouped into two nodes of 8 each. A sorted index 604 is implied by the position of element 608, or the triangle, in the sorted element arrangement. It is illustrated that triangle 3 is connected to both triangle 4 and triangle 5 at position 8. In this example, it is desirable to know if these are in the same node and, if so, in which direction. Using the sorted connection table 606 for each element 610, it can be determined (in constant time) that the connections of triangle 3 (triangles 4 and 5) are located at sorted index 7 and 9, respectively. Sorted index 7 lies outside the node (8-15) of triangle 3 and is therefore external.The sorted index 9 lies within the node of triangle 3 and is larger than position 8, so the connection becomes a rising flank for triangle 3. The input to such an algorithm can therefore be a list of connections between triangles, for example, a list of connection indices (of the input triangles) for each input triangle. From this input, an equivalent adjacency table can then be constructed, which instead stores indices to spatially sorted triangles for each axis after each iteration of splitting nodes. Such a table can be constructed relatively quickly and efficiently. When constructing a table, there are two sets of connections between elements. In at least one embodiment, although the connections are bidirectional, the input may need to explicitly list each of these connections twice to specify each of the two directions (e.g., triangle A connected to triangle B, and triangle B connected to triangle A).As mentioned, a scattering approach can be used to determine the relationship between any two elements in the set. As mentioned, there can be three different sortings, one for each axis, and the arrangement can be rebuilt for each. Such an approach can help to make a pipeline that includes operations such as rendering or ray tracing run more efficiently. Another potential challenge in determining minimum cutting costs is that cutting the first and last element is often a trivial solution, leading to degenerate results, such as those illustrated in left-hand image 702 of Fig. 7. Computing only the minimum cutting costs can often result in cutting positions where only one element or a small number of elements are cut off, rather than a more advantageous cutting position. As illustrated, this can lead to clusters in region 702 that may be suboptimal compared to advantageous clusters, such as those illustrated for a similar region 706 in right-hand image 704 of Fig. 7.As illustrated, the clusters in region 706 of the right-hand image likely exhibit higher connectivity and smaller bounding frames, which may be advantageous for at least certain operations, as explained elsewhere. Approaches according to at least one embodiment can attempt to avoid these problems or improve the selection of the cutting position by using one or more cutting techniques. These can include, for example, a ratio cut and a normalization cut. A ratio cut can divide relevant costs by the number of elements on either side of the proposed cutting position. Normalized costs, on the other hand, can be divided by the cumulative number of connections that each element has. These costs can then be summed using the surface heuristic and other costs discussed herein. Cutting costs can be implemented relatively easily by cutting-scale and replacing the cutting costs, as given by: Due to the normalizing effect of ratio reduction by dividing by the number of elements, some embodiments can restore the original cost scale by multiplying this result by n, including the application of other previously described normalizations and unit conversions. For example, one embodiment can scale once by n to undo the normalization of the ratio cut and again to adjust the SAH units: Figure 7 illustrates in the right-hand figure 704 how the use of a technique such as ratio cutting avoids degenerate divisions that might otherwise occur, as illustrated in the left-hand figure 700. Balancing weights with the SAH costs can further help to avoid such degenerate divisions. A normalized approach to the section is an alternative and can be achieved through: Such an approach can use a running total degree (or “valence”) of each element, as can be given by: This value can be calculated using a prefix sum sampling. Similar to the ratio section, the result can be further scaled by n and all previously explained normalizations and unit conversions can be applied. Several use cases or operations can benefit from such approaches. For example, animation speed can be increased because only specific positions within certain clusters are modified, and these clusters can be rebuilt faster than an entire mesh or BVH. A renderer can also offer a higher level of detail (or different levels of detail) by creating various clusters, and at runtime, a renderer can select which clusters to combine into a larger BVH for tracking. For instance, a renderer could combine a set of high-detail clusters and a set of low-detail clusters, depending on what is appropriate for the position of those clusters in the scene (with clusters closer to a virtual camera benefiting from higher detail). Fig. 8 illustrates an exemplary process 800 that can be carried out to consider at least the connectivity and spatial position when determining a clustering to be used for a geometric mesh representation, according to at least one embodiment. In this example, a geometric mesh representation 802 is obtained (or generated, etc.) consisting of a set of interconnected geometric elements, for example, fully connected triangular faces. The spatial positions and possibly also the boundaries of the various geometric elements of the mesh can be identified 804. In at least one embodiment, this can include determining a centroid position (or other such position) for each element and subsequently sorting the elements along one or more axes.Potential groupings of the elements can then be determined, which may be based in part on these spatial positions. As mentioned, different criteria can be used to select an optimal grouping (or cutting or division plane position) at each of a number of iterations, and each criterion may have a weighted term in an associated cost function. In this example, “spatial” costs for each grouping can be calculated, with the spatial costs being computed using a surface heuristic (or other such algorithm), as explained elsewhere herein.“Cutting” costs can also be calculated for each grouping at each iteration, partly based on a number of connections between groupings of elements or within each grouping, for example, to try to reward connections within a grouping or to penalize external connections between groupings. There can be one or more additional cost values ​​calculated for one or more additional selection criteria, which may be based, for example, on the overlap of bounding frames, cumulative connections, and the like. For each iteration, one of the proposed groupings can be selected, which in this example has the lowest total cost, determined using a cost function that includes weighted terms for spatial cost, cutting cost, and any additional costs to be considered.The weights to be used for the various terms can be configurable, provided by a user, dependent on a subsequent application, or determined through experiments, among other things. If it is determined that the iterative grouping has not yet resulted in clusters of the target size, such that at least one further iteration of grouping is required, the process can continue with another set of proposed subgroupings and their costs determined. Once it has been determined that no cluster or grouping is above the target size (at most one cluster or grouping may be below the target size), the identification of the selected clusters of elements (or the elements in each cluster) with respect to the network representation can be provided. This can be done, for example, by mapping the global index values ​​of the geometric elements to a set of cluster identifiers or linearized lists of global index values ​​for each cluster.The network representation with the clustering information can then be provided to be used in at least one subsequent or downstream operation, for example, among other such operations, in relation to rendering or ray tracing. As mentioned, such approaches offer the flexibility to perform different types of clustering that consider different factors or different weightings of factors, which can be advantageous for various use cases. To illustrate the conversion of cost units and some advantages of fixed-size clusters, consider this example of calculating the cost of splitting a node with 1000 elements at position 700 with a target size of 128 triangles per cluster. A first (e.g., left) side of a split might have 5 complete clusters with a total of 640 triangles and 60 triangles remaining. A second (e.g., right) side would then have 2 complete clusters with 44 triangles remaining. It could be assumed that the process will continue to split these nodes evenly or create minimum-size clusters to handle the remaining triangles.In the first scenario, the left side would have 6 groups with 700 / 6 = 116.6 triangles, or 6 × ≈ 11.3 missing triangles. The right side would have 3 clusters, each with 28 missing triangles. The underfill metric can generally be based on 6 × 11.3 + 3 × 28 = 151.8 missing triangles from all clusters. Some exemplary effects of this and reasons for cost unit conversion are as follows. In an exemplary use case where memory is allocated for full clusters and not all of it is used, this could result in an estimated wasted memory of 151.8 triangles if clustering were to complete uniformly. At 16 bytes per triangle, this equates to a cost of approximately 2.4 KB of memory. It is possible that saving, say, 1 KB of memory is worth performing 10 ray-tracing intersection checks per bounding frame surface at runtime (units of SAH). In practice, clusters can be further split before ray tracing, so these conversions are an oversimplification. Nevertheless, the cost of 2.4 × 10 = 24 can then be added to the SAH cost of splitting the node at position 700 in a purely linear relationship. In an embodiment that will build cluster acceleration structures for all clusters, it may be advantageous to schedule one thread for each triangle in each cluster. This could result in scheduling 151.8 / 1000 threads, or 1.2 clusters, without any data to process. The build performance might then be around 85% throughput, which is not necessarily detrimental in practice, as the system might not allocate memory for the missing triangles. If building a cluster acceleration structure takes 60 microseconds and it is worthwhile to spend 1 SAH unit to save 100 microseconds, then 1.2 × (100 / 60) = 2 can be added to the cost of splitting the node at position 700. The cluster acceleration structure can be inefficient if it comprises only a single triangle, which might correspond to, for example, 100 SAH units. Once a certain threshold is exceeded, it may no longer make any difference and could be closer to zero SAH units. Here, measurement could prove particularly beneficial. An algorithm implementation could then provide arguments for a cost transfer function approximation (e.g., linear / step function, polynomial, logarithmic and / or exponential constants). A nonlinear relationship has been observed between cluster size and the performance of the cluster acceleration structure setup. Various implementations take SAH costs into account. However, this is not a requirement, and it has been observed that the value of the SAH cost changes with different node sizes. The surface area can depend on the size of the scene. Nodes at the top of a tree are typically larger and contain more elements, thus arbitrarily driving up all SAH costs. These could be normalized, but this is unlikely to make much of a difference in practice as long as some conversion takes place when mixing costs of different units. In this context, it might be relevant for at least some implementations that edge-cutting costs scale with the number of cut edges. However, SAH costs typically scale with the number of elements. Since the number of cut edges is a portion of a surface formed by elements (at least if the elements are triangles), this value can generally be proportional to the square root of the total number of elements in the node. This is similar to the difference between cutting a grid or the perimeter of a sphere-plane intersection versus the surface area of ​​the sphere. If no normalization were performed, edge-cutting costs would be negligible in the larger nodes compared to the smaller ones. This can lead to the use of a value like this to stabilize the conversion to the SAH metric.It should be noted that other normalizations – such as the ratio section explained earlier – are not included in this equation. As mentioned, mesh representations with clustering of geometric features can be used for tasks such as rendering an image or video image, including a view of an object represented by the mesh. Fig. 9A illustrates an example system 900 for rendering such an image, video image, or other instance of image-related content according to at least one embodiment. Such a system may include or integrate the functionality presented here to enable, among other things, consideration of a portion of the surface geometry of a model that has an unobstructed visual path to a camera-accessible area. In this example, an image for a scene in a virtual environment 900 is to be rendered, although such a system can also be used to render images for semi-virtual or real environments.The virtual environment 900 can include geometry data and other data representing shapes or objects in the environment, such as three-dimensional (3D) objects that are representative of or to be included in a scene occurring within the environment, such as foreground objects like people or vehicles, or background objects like roads and buildings. In at least some embodiments, at least some of the content for the scene can also be obtained from an asset repository 902 or other such storage location, which may contain content—such as geometry, texture, and density data—that can be used for rendering the scene.In at least some embodiments or cases, a user device 904 may be present on which an application for generating or managing content is executed, enabling a user to select objects 902 and at least one relevant section of the virtual environment 900 to be used when rendering the scene. The user device 904 may also enable a user to control aspects of the image to be rendered, such as the position or pose of an object in the scene, as well as a viewing angle and other parameters of a virtual camera used for rendering an image of the virtual environment 900. In this example, at least one computing resource 906 is used to perform the rendering. This resource can, for example, correspond to one or more servers, which, among other such options, can be located locally or on at least one network. In some embodiments, the rendering can instead be performed, at least partially, on the user device 904. The computing resource 906 can obtain or receive data to be used for rendering, including geometry, texture, and density data for the virtual environment or virtual objects, as well as information about the positions and poses of these objects in the scene and parameters of a virtual camera to be used to determine the view of the scene to be rendered.This information can be received, for example, by a content application 908 running on a central processing unit (CPU) 910 of the computing resource, which is responsible for tasks such as collecting data, initiating the rendering of an image, and performing formatting or encoding of a generated image, as well as other such operations. The content application can, for example, cooperate with a rendering manager 912, which may be responsible for coordinating operations of a rendering pipeline running on the computing resource 906. This pipeline may include, among other things, modules 914, 916, or processes responsible for tasks such as geometry-related tasks (including lighting and shading tasks) and rasterization. In at least one embodiment, a rendering manager 912 can generate a digital reconstruction of the virtual environment 900.In at least some embodiments, at least some of these rendering tasks can be performed using one or more GPUs 920A-D of the computing resource, and possibly one or more processors or computing instances (physical or virtual) of one or more other computing resources. A task such as light transport simulation (e.g., ray tracing, path tracing, ray marching, etc.) or volumetric sampling can be performed on a single processor, such as a single GPU, or the operations can be distributed across multiple GPUs 920A-D. In this example, there can be a pool or set of GPUs 920A-D, and a resource manager 918 can be at least partially responsible for allocating a GPU to perform the processing for an operation. If it is desired or advantageous to use more than one GPU, the resource manager 918 can allocate one or more GPUs with the appropriate capacity or performance. This can involve allocating a number of GPUs specified in a request or determining a number of GPUs to allocate, partly based on the request.In some embodiments, the resource manager may also be able to monitor available bandwidth or memory to determine which and how many GPUs to allocate. For example, if high bandwidth capacity allows operations to be distributed across a larger number of GPUs, where the impact of bandwidth is less critical due to beam information forwarding, whereas a system with limited bandwidth may cause the resource manager to try to allocate as few GPUs as possible to reduce the number of forwarding messages required. In at least one embodiment, data partitioning can be performed, for example, by a rendering manager 912, and the allocation of data to different processors can be performed by a system resource manager 918. The resource manager can receive information from the rendering component and select suitable processors from a pool of available processors 920 or processor capacities. In some embodiments, the rendering application can select the partitioning, while in other embodiments, the renderer may not have control over the data partitioning, which can be performed by a separate management component (not illustrated in Fig. 9A). A rendered image, for example, can be stored in an image memory 922 or made available for presentation via a user device and / or a display device 924, among other uses. Fig. 9B illustrates an exemplary image generation pipeline 950 that can be used in a system 900—such as the one illustrated in Fig. 9A—to render one or more images, such as video frames in a sequence for a particular scene and / or domain. In this example, pixel data 952 for an image currently being rendered (which may include G-buffer data for primary surfaces) can be received as input for a reflection and refraction component 954 of a rendering system.Reflection and Refraction Component 954 can use this data to attempt to determine data for any specific reflections and / or refractions in the pixel data, and can provide this data to a Backprojection and G-Buffer Patching Component 956, which can perform backpropagation as described herein to locate appropriate points for these reflections and refractions, and can use this data for patching the G-Buffer 968, which can provide updated inputs for a subsequent image to be rendered.The data can then be provided to a light sampling component 958 for performing light sampling, a ray tracing illumination component 960 for performing ray tracing illumination, and one or more shaders 962, which can determine the pixel colors for the various pixels of the single image, at least partially, based on the specified illumination information (along with other information such as color, texture, etc.). The results can be accumulated by an accumulation module 964 or a component for generating an output frame 966 of a desired size, resolution, or format. In at least one embodiment, a Shader 962 can perform the backprojection step. Once a backprojection pass is complete and gradient surface parameters have been inserted into the current G-buffer, a renderer can perform the illumination passes. Using the information from the illumination passes and the illumination results of the previous frame, gradients can be computed, filtered, and used for gradient rejection. Such an approach can be used to compute robust temporal gradients between the current and previous frames in a temporal noise suppressor for ray-tracked renderers. This backprojection-based approach can also operate using reflections and refractions and can be used with rasterized G-buffers.Previous approaches to reverse projection omitted any G-buffer patching and instead relied on the current G-buffer raw data, which also resulted in false positive gradients. Patching the surface parameters eliminates false positives in most cases, making the denoised image very stable yet still responsive to changes in lighting. Once the reverse projection pass is complete and gradient surface parameters have been inserted into the current G-buffer, a renderer can perform the illumination passes. Using the information from the illumination passes and the illumination results from the previous image, the gradients are calculated, filtered, and used for gradient rejection. NeRF or other machine learning models can be employed at various stages of such a pipeline to derive aspects of the rendering process. Aspects of several of the approaches presented here may be lightweight enough to be executed in real time at different locations, for example, on a device such as a client device comprising a personal computer or a game console. Such processing may be performed on or for content generated on or received by that client device, or received from an external source, such as, but not limited to, streaming data or other content received over at least one network from a cloud server 1020 or a third-party service 1060. In some cases, at least part of the processing, generation, compilation, and / or determination of this content may be performed by one of these other devices, systems, or entities and subsequently made available to the client device (or another recipient) for presentation or other use. As an example, Fig. 10 illustrates an exemplary network configuration 1000 that can be used for providing, generating, modifying, encoding, processing, and / or transmitting image data or other such content. In at least one embodiment, a client device 1002 can generate or receive data for a session using components of a content application 1004 on the client device 1002 and data stored locally on that client device. In at least one embodiment, a content application 1024 running on a server 1020 (e.g., a cloud server or edge server) can initiate a session connected to at least one client device 1002, using a session manager and user data stored in a user database 1036, and can cause content such as one or more digital objects (e.g., images, videos, etc.) to be transmitted.Implicit and / or explicit object representations (such as models or meshes) from an asset repository 1034 are determined by a content manager 1026. A content manager 1026 can work with a rendering module 1030 to generate or select objects, digital objects, or other such content to be represented in an image to be rendered. Views of these objects can be rendered by the rendering module 1030 and made available for presentation via the client device 1002. In this example, the content application 1024 includes a mesh generator 1028, which can generate mesh representations of objects using point clouds or other such object data that can be provided to a rendering module 1030 to render a view of a digital object.In at least one embodiment, the content application 1024 can cooperate with one or more encoders, transcoders, and / or compressors that can perform tasks such as encoding, decoding, compressing, and / or decompressing a texture, image, or other such object or instance of content, whereby different compressions or encodings may be advantageous for different operations, such as storage versus processing. At least one portion of the rendered and / or compressed content can be transferred to the client device 1002 using a suitable transfer manager 1022 for delivery via download, streaming, or another such transfer channel. An encoder can be used to encode and / or compress at least some of this data before transferring it to the client device 1002.In at least one embodiment, the client device 1002, which receives such content, can provide this content to a corresponding content application 1004, which may also or alternatively include a graphical user interface 1010, a network generator 1012, and a rendering module 1014 for use in providing, synthesizing, rendering, composing, modifying, or using content for presentations (or other purposes) on or by the client device 1002. A decoder can also be used to decode data received via network(s) 1040 for presentation via the client device 1002, for example, image or video content via a display 1006 and audio content, for example, sounds and music, via at least one audio playback device 1008, for example, loudspeakers or headphones.In at least one embodiment, at least some of this content can already be stored, rendered, or accessible on the client device 1002, so that no transmission over the network 1040 is required for at least this portion of the content, for example, if this content was previously downloaded or stored locally on a hard disk or optical disc. In at least one embodiment, a transmission mechanism such as data streaming can be used to transfer this content from server 1020 or user database 1036 to the client device 1002.In at least one embodiment, at least one section of this content can be obtained, enhanced, and / or streamed from another source, for example, a third-party service 1060 or another client device 1050, which may also include a content application 1062 for creating, enhancing, or providing content. In at least one embodiment, sections of this functionality can be performed using multiple data processing devices or multiple processors within one or more data processing devices, for example, using a combination of CPUs and GPUs. In at least one embodiment, components such as those illustrated in Fig. 10 can be used to offer aspects of different embodiments as one or more services, for example, a web service or a cloud service, which can be accessed using a suitable API or address. Such a process can be relatively slow, so it may be advantageous to integrate a streaming service process into an object pipeline (e.g., during game development). This could be done once, and the resulting clustering could be stored for distribution within a game, so that the clustering algorithm is not directly part of the rendering but rather something pre-computed. In this example, these client devices can include any suitable data processing devices, such as desktop computers, laptops, set-top boxes, streaming devices, game consoles, smartphones, tablet computers, VR headsets, AR glasses, wearable computers, or smart TVs. Each client device can send a request over at least one wired or wireless network, such as the internet, Ethernet, a local area network (LAN), or a cellular network. In this example, these requests can be sent to an address associated with a cloud provider that operates or controls one or more electronic resources in a cloud provider environment, such as a data center or server farm.In at least one embodiment, the request can be received or processed by at least one edge server located at a network edge and outside at least one security layer connected to the cloud provider environment. This reduces latency by allowing client devices to interact with servers in closer proximity, while simultaneously improving the security of resources within the cloud provider environment. In at least one embodiment, such a system can be used to perform graphical rendering operations. In other embodiments, such a system can be used for other purposes, for example, to provide image or video content for testing or validating autonomous machine applications or for performing deep learning operations. In at least one embodiment, such a system can be implemented using an edge device or can involve one or more virtual machines (VMs). In at least one embodiment, such a system can be implemented at least partially in a data center or at least partially using cloud computing resources. DATA CENTER Fig. 11 illustrates an example of a data center 1100 in which at least one embodiment can be used. In at least one embodiment, data center 1100 comprises a data center infrastructure layer 1110, a framework layer 1120, a software layer 1130, and an application layer 1140. In at least one embodiment, as shown in Fig. 11, the data center infrastructure layer 1110 can comprise a resource coordinator 1112, grouped computing resources 1114 and node computing resources (“node CRs”) 1116(1)-1116(N), where “N” represents any positive integer. In at least one embodiment, the nodes CRs 1116(1)-1116(N) may, in particular, comprise any number of central processing units (CPUs) or other processors (including accelerators, field-programmable gate arrays (FPGAs), graphics processing units, etc.), memory devices (e.g., dynamic read-only storage) and mass storage devices (e.g., solid-state or hard disk drives), network input / output (“NW-I / O”) devices, network switches, virtual machines (“VMs”), power supply modules and / or cooling modules, etc.In at least one embodiment, one or more node CRs from node CRs 1116(1)-1116(N) can be a server that has one or more of the aforementioned computing resources. In at least one embodiment, grouped compute resources 1114 can comprise separate groupings of node compute resources (CRs) located within one or more racks (not shown) or in many racks housed in data centers at different geographic locations (also not shown). Separate groupings of node CRs within grouped compute resources 1114 can include grouped compute, network, memory, or storage resources that can be configured or allocated to support one or more workloads. In at least one embodiment, multiple node CRs, including CPUs or processors, can be grouped within one or more racks to provide compute resources for supporting one or more workloads.In at least one embodiment, the one or more racks can also include any number of power supply modules, cooling modules and network switches in any combination. In at least one embodiment, the resource coordinator 1112 can configure or otherwise control one or more node CRs 1116(1)-1116(N) and / or grouped computing resources 1114. In at least one embodiment, the resource coordinator 1112 can comprise a software design infrastructure (“SDI”) management unit for data center 1100. In at least one embodiment, the resource coordinator can comprise hardware, software, or a combination thereof. In at least one embodiment, as shown in Fig. 11, the framework layer 1120 comprises a job scheduler 1122, a configuration manager 1124, a resource manager 1126, and a distributed file system 1128. In at least one embodiment, the framework layer 1120 may comprise a framework for supporting the software 1132 of the software layer 1130 and / or one or more application(s) 1142 of the application layer 1140. In at least one embodiment, the software 1132 or application(s) 1142 may each comprise web-based service software or applications, such as those provided by Amazon Web Services, Google Cloud, and Microsoft Azure. In at least one embodiment, the framework layer 1120 can in particular be a type of free and open-source web application framework such as Apache Spark™ (hereinafter referred to as “Spark”), which provides a distributed file system 1128 for processing large amounts of data (e.g."Big Data"). In at least one embodiment, the job scheduler 1122 can include a Spark driver to facilitate the scheduling of workloads supported by different layers of the data center 1100. In at least one embodiment, the configuration manager 1124 can be able to configure different layers, such as the software layer 1130 and the framework layer 1120, including Spark and the distributed file system 1128, to support data processing at scale. In at least one embodiment, the resource manager 1126 can be able to manage clustered or grouped compute resources that are associated with or allocated to support the distributed file system 1128 and the job scheduler 1122.In at least one embodiment, clustered or grouped computing resources can comprise a grouped computing resource 1114 on the data center infrastructure layer 1110. In at least one embodiment, the resource manager 1126 can coordinate with the resource coordinator 1112 to manage these allocated or assigned computing resources. In at least one embodiment, the software 1130 included in software layer 1132 may include software used by at least sections of the node CRs 1116(1)-1116(N), grouped computing resources 1114, and / or the distributed file system 1128 of framework layer 1120. The one or more types of software may, in particular, include internet website search software, email virus scanning software, database software, and video streaming software. In at least one embodiment, the application(s) 1142 included in application layer 1140 may comprise one or more types of applications used by at least sections of the node CRs 1116(1)-1116(N), grouped compute resources 1114, and / or the distributed file system 1128 of framework layer 1120. One or more types of applications may include, but are not limited to, any number of genetic research applications, cognitive computation, and machine learning applications, including training or inference software, machine learning framework software (e.g., PyTorch, TensorFlow, Caffe, etc.), or other machine learning applications used in conjunction with one or more embodiments. In at least one embodiment, each of the configuration manager 1124, the resource manager 1126, and the resource coordinator 1112 can implement any number and type of self-modifying actions based on any set and type of data acquired in any technically feasible way. In at least one embodiment, self-modifying actions can relieve a data center operator of data center 1100 of potentially poor configuration decisions and potentially prevent underutilization and / or poor performance of parts of a data center. In at least one embodiment, the data center 1100 may comprise tools, services, software, or other resources for training one or more machine learning models or for predicting or inferring information using one or more machine learning models according to one or more embodiments described herein. For example, in at least one embodiment, a machine learning model may be trained by calculating weighting parameters according to a neural network architecture using software and computing resources as described above with respect to data center 1100.In at least one embodiment, trained machine learning models corresponding to one or more neural networks can be used, using the resources described above with respect to Computing Center 1100, to infer or predict information using weighting parameters calculated by one or more training techniques described herein. In at least one embodiment, the data center can use CPUs, application-specific integrated circuits (ASICs), GPUs, FPGAs, or other hardware to perform training and / or inference using the resources described above. Furthermore, one or more of the software and / or hardware resources described above can be configured as a service to allow users to train or infer information, such as image recognition, speech recognition, or other artificial intelligence services. Such components can be used to determine optimal clustering of geometric elements of a mesh representation for use with one or more subsequent operations. COMPUTER SYSTEMS Fig. 12 is a block diagram illustrating an exemplary computer system, which may be a system with interconnected devices and components, a system-on-a-chip (SoC), or a combination thereof, comprising a processor that may include execution units for executing an instruction according to at least one embodiment. In at least one embodiment, the computer system may, without limitation, include a component such as a processor to utilize execution units, including logic, for performing algorithms for processing data according to the present disclosure, for example, in the embodiment described herein. In at least one embodiment, the computer system may include processors such as, for example,The system may feature the PENTIUM®, Xeon™, Itanium®, XScale™ and / or StrongARM™ processor family, Intel® Core™ or Intel® Nervana™ microprocessors available from Intel Corporation in Santa Clara, California, although other systems (including PCs with other microprocessors, technical workstations, set-top boxes, and the like) may also be used. In at least one embodiment, the Computer System 1200 may run a version of the WINDOWS operating system available from Microsoft Corporation in Redmond, Washington, although other operating systems (for example, UNIX and Linux), embedded software, and / or graphical user interfaces may also be used. Embodiments can be used in other devices, such as portable devices and embedded applications. Some examples of portable devices include mobile phones, Internet Protocol devices, digital cameras, personal digital assistants (PDAs), and portable PCs. In at least one embodiment, embedded applications can include a microcontroller, a digital signal processor (DSP), a system-on-a-chip, network computers (NetPCs), set-top boxes, network hubs, wide-area network switches (WAN switches), or any other system capable of executing one or more instructions according to at least one embodiment. In at least one embodiment, computer system 1200 can, without limitation, comprise processor 1202, which can, without limitation, include one or more execution units 1208 for performing machine learning model training and / or inference according to the techniques described herein. In at least one embodiment, computer system 1200 is a desktop or server system with a single processor; however, in another embodiment, computer system 1200 can be a multiprocessor system. In at least one embodiment, processor 1202 can, without limitation, comprise a complex instruction set computer microprocessor (“CISC” microprocessor), a reduced instruction set computing microprocessor (“RISC” microprocessor), a very long instruction word microprocessor (“VLIW” microprocessor), a processor implementing a combination of instruction sets, or any other device, such as a digital signal processor.In at least one embodiment, processor 1202 can be coupled to a processor bus 1210, which can transmit data signals between processor 1202 and other components in computer system 1200. In at least one embodiment, processor 1202 can have an internal Level 1 cache memory (“L1” cache memory) (“cache”) 1204 without restriction. In at least one embodiment, processor 1202 can have a single internal cache or multiple levels of an internal cache. In at least one embodiment, cache memory can be located outside of processor 1202. Other embodiments can also include a combination of internal and external cache memories, depending on the specific implementation and requirements. In at least one embodiment, register file 1206 can store different data types in different registers, including, in particular, integer registers, floating-point registers, status registers, and instruction pointer registers. In at least one embodiment, processor 1202 also includes an execution unit 1208, in particular logic for performing integer and floating-point operations. In at least one embodiment, processor 1202 may also include a read-only memory (“ROM”) for microcode (“ucode”) that stores microcode for specific macro instructions. In at least one embodiment, execution unit 1208 may include logic for handling a packed instruction set 1209. In at least one embodiment, by including a packed instruction set 1209 in an instruction set of a general-purpose processor 1202, together with associated circuitry for executing instructions, operations used by many multimedia applications can be performed using packed data in a general-purpose processor 1202.In one or more embodiments, many multimedia applications can be accelerated and run more efficiently by utilizing the entire width of a processor's data bus for performing operations on packed data, thus eliminating the need to transfer smaller data units across the processor's data bus to perform one or more operations on a single data element at a time. In at least one embodiment, the execution unit 1208 can also be used in microcontrollers, embedded processors, graphics devices, DSPs, and other types of logic circuits. In at least one embodiment, the computer system 1200 can include a memory 1220 without restriction. In at least one embodiment, the memory 1220 can be implemented as a dynamic random-access memory (“DRAM”) device, a static random-access memory (“SRAM”) device, a flash memory device, or another storage device. In at least one embodiment, the memory 1220 can store instructions 1219 and / or data 1221, which are represented by data signals that can be executed by the processor 1202. In at least one embodiment, the system logic chip can be coupled to the processor bus 1210 and the memory 1220. In at least one embodiment, the system logic chip can, without restriction, include a memory control hub (“MCH”) 1216, and the processor 1202 can communicate with the MCH 1216 via the processor bus 1210. In at least one embodiment, the MCH 1216 can provide a high-bandwidth memory path 1218 to memory 1220 for instruction and data storage, as well as for storing graphics instructions, data, and textures. In at least one embodiment, the MCH 1216 can route data signals between the processor 1202, memory 1220, and other components in the computer system 1200, and bridge data signals between the processor bus 1210, memory 1220, and a system I / O 1222. In at least one embodiment, a system logic chip can provide a graphics port for coupling to a graphics controller.In at least one embodiment, MCH 1216 can be coupled to memory 1220 via a high-bandwidth memory path 1218, and graphics / video card 1212 can be coupled to MCH 1216 via an Accelerated Graphics Port (“AGP”) intermediate connection 1214. In at least one embodiment, computer system 1200 can use a system I / O bus 1222, which is a proprietary hub interface bus, to couple MCH 1216 with I / O control hub (“ICH”) 1230. In at least one embodiment, ICH 1230 can provide direct connections to some I / O devices via a local I / O bus. In at least one embodiment, the local I / O bus can, without limitation, include a high-speed I / O bus for connecting peripheral devices to the memory 1220, the chipset, and the processor 1202. Examples may include an audio control 1229, a firmware hub (“Flash BIOS”) 1228, a wireless transceiver 1226, a data storage device 1224, a legacy I / O control 1223 with user input and keyboard interfaces 1225, a serial expansion port 1227, such as a Universal Serial Bus (“USB”), and a network control 1234.Data storage 1224 can include a hard disk drive, a floppy disk drive, a CD-ROM drive, a flash memory device, or another mass storage device. In at least one embodiment, Fig. 12 illustrates a system comprising interconnected hardware devices or “chips,” while in other embodiments, Fig. 12 may illustrate an exemplary system on a single chip (“SoC”). In at least one embodiment, devices may be interconnected via proprietary interconnects, standardized interconnects (e.g., PCIe), or a combination thereof. In at least one embodiment, one or more components of Computer System 1200 are interconnected via Compute Express Link (CXL) interconnects. Such components can be used to determine optimal clustering of geometric elements of a mesh representation for use with one or more subsequent operations. Fig. 13 is a block diagram illustrating an electronic device 1300 for using a processor 1310 according to at least one embodiment. In at least one embodiment, the electronic device 1300 can be, for example, and without limitation, a notebook, a tower server, a rack server, a blade server, a laptop, a desktop computer, a tablet, a mobile device, a telephone, an embedded computer, or any other suitable electronic device. In at least one embodiment, the electronic device 1300 can, without limitation, comprise a processor 1310, which is communicatively coupled to any suitable number or type of components, peripherals, modules, or devices. In at least one embodiment, the processor 1310 is coupled via a bus or interface, such as a 1°C bus, a system management bus (“SMBus”), a low pin count (LPC) bus, a serial peripheral interface (“SPI”), a high definition audio (“HDA”) bus, a serial advanced technology attachment (“SATA”) bus, a universal serial bus (“USB” (versions 1, 2, 3), or a universal asynchronous receiver / transmitter (“UART”) bus. In at least one embodiment, Fig. 13 illustrates a system comprising interconnected hardware devices or “chips,” while in other embodiments, Fig. 13 may illustrate an exemplary system on a chip (“SoC”).In at least one embodiment, the devices illustrated in Fig. 13 can be interconnected using proprietary interconnects, standardized interconnects (e.g., PCIe), or a combination thereof. In at least one embodiment, one or more components of Fig. 13 are interconnected using Compute Express Link (CXL) interconnects. In at least one embodiment, Fig. 13 can show a display 1324, a touchscreen 1325, a touchpad 1330, a near field communication (“NFC”) 1345, a sensor hub 1340, a temperature sensor 1346, an Express chipset (“EC”) 1335, a Trusted Platform Module (“TPM”) 1338, BIOS / firmware / flash memory (“BIOS, FW Flash”) 1322, a DSP 1360, a drive 1320 such as a solid-state drive (“SSD”) or a hard disk drive (“HDD”), a wireless local area network (“WLAN”) 1350, a Bluetooth unit 1352, a wireless wide area network (“WWAN”) 1356, a global positioning system (GPS) 1355, a camera (“USB 3.0 camera”) 1354, such as a USB The system may include a 3.0 camera and / or a Low Power Double Data Rate ("LPDDR") memory unit ("LPDDR3") 1315, implemented, for example, in the LPDDR3 standard. These components can each be implemented in any suitable manner. In at least one embodiment, other components can be communicatively coupled to processor 1310 via the components described above. In at least one embodiment, an accelerometer 1341, an ambient light sensor (“ALS”) 1342, a compass 1343, and a gyroscope 1344 can be communicatively coupled to the sensor hub 1340. In at least one embodiment, a temperature sensor 1339, a fan 1337, a keyboard 1336, and a touchpad 1330 can be communicatively coupled to EC 1335. In at least one embodiment, loudspeakers 1363, headphones 1364, and a microphone (“Mic”) 1365 can be communicatively coupled to an audio unit (“audio codec and Class-D amplifier”) 1362, which in turn can be communicatively coupled to DSP 1360. In at least one embodiment, audio unit 1362 can, for example and without limitation, comprise an audio encoder / decoder (“codec”) and a class-D amplifier.In at least one embodiment, the SIM card (“SIM”) 1357 can be communicatively coupled with the WWAN unit 1356. In at least one embodiment, components such as the WLAN unit 1350 and the Bluetooth unit 1352, as well as the WWAN unit 1356, can be implemented in a Next Generation Form Factor (“NGFF”). Such components can be used to determine optimal clustering of geometric elements of a mesh representation for use with one or more subsequent operations. Figure 14 is a block diagram of a processing system according to at least one embodiment. In at least one embodiment, System 1400 comprises one or more processors 1402 and one or more graphics processors 1408 and can be a single-processor desktop system, a multi-processor workstation system, or a server system with a large number of processors 1402 or processor cores 1407. In at least one embodiment, System 1400 is a processing platform integrated into a system-on-a-chip (SoC) integrated circuit for use in mobile, portable, or embedded devices. In at least one embodiment, System 1400 may comprise or be integrated into a server-based gaming platform, a gaming console (including a gaming and media console), a mobile gaming console, a handheld gaming console, or an online gaming console. In at least one embodiment, System 1400 is a mobile phone, a smartphone, a tablet data processing device, or a mobile internet device. In at least one embodiment, Processing System 1400 may also comprise, be coupled to, or be integrated into a wearable device, such as a smartwatch, smart glasses, an augmented reality device, or a virtual reality device. In at least one embodiment, Processing System 1400 is a television or a set-top box device with one or more processors 1402 and a graphical interface generated by one or more graphics processing units 1408.In at least one embodiment, one or more processors 1402 each comprise one or more processor cores 1407 for processing instructions that, upon execution, perform operations for system and application software. In at least one embodiment, each of the one or more processor cores 1407 is configured to process a specific instruction set 1409. In at least one embodiment, the instruction set 1409 can enable complex instruction set computing (CISC), reduced instruction set computing (RISC), or processing via a very long instruction word (VLIW). In at least one embodiment, the processor cores 1407 can each process a different instruction set 1409, which may include instructions to facilitate the emulation of other instruction sets.In at least one embodiment, the processor core 1407 can also include other processing devices, such as a digital signal processor (DSP). In at least one embodiment, processor 1402 comprises cache memory 1404. In at least one embodiment, processor 1402 can have a single internal cache or multiple levels of an internal cache. In at least one embodiment, the cache memory is shared by different components of processor 1402. In at least one embodiment, processor 1402 also uses an external cache (e.g., a Level 3 (L3) cache or Last-Level Cache (LLC) (not shown)) that can be shared by the processor cores 1407 using known cache coherence techniques. In at least one embodiment, register file 1406 is additionally included in processor 1402, which can comprise different types of registers for storing different types of data (e.g., integer registers, floating-point registers, status registers, and an instruction pointer register).In at least one embodiment, register file 1406 may include general-purpose registers or other registers. In at least one embodiment, one or more processors 1402 are coupled to one or more interface buses 1410 to transmit communication signals such as address, data, or control signals between processor 1402 and other components in system 1400. In at least one embodiment, interface bus 1410 can be a processor bus, such as a version of a Direct Media Interface (DMI) bus. In at least one embodiment, interface 1410 is not limited to a DMI bus and can include one or more peripheral component interconnect buses (e.g., PCI, PCI Express), memory buses, or other types of interface buses. In at least one embodiment, processor(s) 1402 includes an integrated memory controller 1416 and a platform control hub 1430.In at least one embodiment, the storage controller 1416 facilitates communication between a storage device and other components of the system 1400, while the platform control hub (PCH) 1430 provides connections to I / O devices via a local I / O bus. In at least one embodiment, the storage device 1420 can be a dynamic random-access memory (DRAM) device, a static random-access memory (SRAM) device, a flash memory device, a phase-change memory device, or another storage device with suitable performance to serve as process memory. In at least one embodiment, the storage device 1420 can operate as system memory for system 1400 to store data 1422 and instructions 1421 for use when one or more processors 1402 execute an application or process. In at least one embodiment, the memory controller 1416 also couples with an optional external graphics processor 1412, which can communicate with one or more graphics processors 1408 in processors 1402 to perform graphics and media operations. In at least one embodiment, a display device 1411 can be connected to processor(s) 1402.In at least one embodiment, the display device 1411 can comprise one or more internal display devices, such as in a mobile electronic device or a laptop device, or an external display device connected via a display interface (e.g., DisplayPort, etc.). In at least one embodiment, the display device 1411 can comprise a head-mounted display (HMD), for example, a stereoscopic display device for use in virtual reality (VR) applications or augmented reality (AR) applications. In at least one embodiment, the platform control hub 1430 enables peripheral devices to connect to a storage device 1420 and a processor 1402 via a high-speed I / O bus. In at least one embodiment, the I / O peripheral devices include, among others, an audio control 1446, a network control 1434, a firmware interface 1428, a wireless transceiver 1426, touch sensors 1425, and a data storage device 1424 (e.g., a hard disk drive, flash memory, etc.). In at least one embodiment, the data storage device 1424 can be connected via a storage interface (e.g., SATA) or via a peripheral bus, such as a peripheral component interconnect bus (e.g., PCI, PCI Express). In at least one embodiment, the touch sensors 1425 can include touchscreen sensors, pressure sensors, or fingerprint sensors.In at least one embodiment, the wireless transceiver 1426 can be a Wi-Fi transceiver, a Bluetooth transceiver, or a cellular network transceiver, such as a 3G, 4G, or Long-Term Evolution (LTE) transceiver. In at least one embodiment, the firmware interface 1428 enables communication with system firmware and can, for example, be a Unified Expandable Firmware Interface (UEFI). In at least one embodiment, the network controller 1434 can enable network connectivity to a wired network. In at least one embodiment, a high-performance network controller (not shown) couples with interface bus 1410. In at least one embodiment, the audio controller 1446 is a multi-channel HD audio controller. In at least one embodiment, the system 1400 includes an optional legacy I / O controller 1440 for coupling legacy devices (e.g., Personal System 2 (PS / 2) devices) to the system.In at least one embodiment, the platform control hub 1430 can also be connected to one or more Universal Serial Bus (USB) controllers 1442 to connect input devices such as keyboard and mouse combinations 1443, a camera 1444 or other USB input devices. In at least one embodiment, an instance of the memory controller 1416 and the platform control hub 1430 can be integrated into a discrete external graphics processor, such as an external graphics processor 1412. In at least one embodiment, the platform control hub 1430 and / or the memory controller 1416 can be external to one or more processors 1402. For example, in at least one embodiment, the system 1400 can comprise an external memory controller 1416 and a platform control hub 1430, which can be configured as a memory control hub and peripheral control hub within a system chipset that communicates with processor(s) 1402. Such components can be used to determine optimal clustering of geometric elements of a mesh representation for use with one or more subsequent operations. Fig. 15 is a block diagram of a processor 1500 comprising one or more processor cores 1502A-1502N, an integrated memory controller 1514, and an integrated graphics processor 1508 according to at least one embodiment. In at least one embodiment, the processor 1500 may include additional cores up to and including additional core 1502N, which are represented by dashed boxes. In at least one embodiment, each of the processor cores 1502A-1502N comprises one or more internal cache units 1504A-1504N. In at least one embodiment, each processor core also has access to one or more shared cache units 1506. In at least one embodiment, internal cache units 1504A-1504N and shared cache units 1506 constitute a cache memory hierarchy within the processor 1500. In at least one embodiment, cache memory units 1504A-1504N can comprise at least one level of instruction and data cache within each processor core and one or more levels of shared mid-level cache, such as a Level 2 (L2), Level 3 (L3), Level 4 (L4), or other cache levels, with a highest cache level prior to external memory being classified as LLC. In at least one embodiment, the cache coherence logic maintains coherence between different cache units 1506 and 1504A-1504N. In at least one embodiment, the processor 1500 can also comprise a set of one or more bus control units 1516 and a system agent core 1510. In at least one embodiment, one or more bus control units 1516 manage a set of peripheral buses, such as one or more PCI or PCI Express buses. In at least one embodiment, the system agent core 1510 provides management functions for various processor components. In at least one embodiment, the system agent core 1510 comprises one or more integrated memory controllers 1514 to manage access to various external storage devices (not shown). In at least one embodiment, one or more of the processor cores 1502A-1502N include support for simultaneous multithreading. In at least one embodiment, the system agent core 1510 includes components for coordinating and operating the cores 1502A-1502N during multithreaded processing. In at least one embodiment, the system agent core 1510 may additionally include a power control unit (PCU) comprising logic and components for regulating one or more power states of the processor cores 1502A-1502N and the graphics processor 1508. In at least one embodiment, processor 1500 additionally comprises graphics processor 1508 for performing graphics processing operations. In at least one embodiment, graphics processor 1508 is coupled with shared cache units 1506 and a system agent core 1510, which includes one or more integrated memory controllers 1514. In at least one embodiment, the system agent core 1510 also includes a display controller 1511 for controlling the graphics processor output to one or more coupled displays. In at least one embodiment, display controller 1511 can also be a separate module that is coupled to graphics processor 1508 via at least one intermediate connection, or it can be integrated into graphics processor 1508. In at least one embodiment, a ring-based interconnect 1512 is used to couple internal components of the processor 1500. In at least one embodiment, an alternative interconnect may be used, for example, a point-to-point interconnect, a switched interconnect, or other techniques. In at least one embodiment, the graphics processor 1508 is coupled to the ring interconnect 1512 via an I / O connection 1513. In at least one embodiment, the I / O connection 1513 represents at least one of several variants of I / O intermediate connections, including an on-package I / O intermediate connection, which facilitates communication between different processor components and a high-performance embedded memory module 1518, for example, an eDRAM module. In at least one embodiment, each of the processor cores 1502A-1502N and the graphics processor 1508 use embedded memory modules 1518 as a shared last-level cache. In at least one embodiment, processor cores 1502A-1502N are homogeneous cores executing a common instruction set architecture. In at least one embodiment, processor cores 1502A-1502N are heterogeneous with respect to their instruction set architecture (ISA), wherein one or more of the processor cores 1502A-1502N execute a common instruction set, while one or more other cores of the processor cores 1502A-1502N execute a subset of a common instruction set or a different instruction set. In at least one embodiment, processor cores 1502A-1502N are heterogeneous with respect to their microarchitecture, wherein one or more cores with a relatively higher power consumption are coupled with one or more power cores with a lower power consumption. In at least one embodiment, the processor 1500 can be implemented on one or more chips or as a system-on-a-chip (SoC) integrated circuit. Such components can be used to determine optimal clustering of geometric elements of a mesh representation for use with one or more subsequent operations. Various embodiments can be described by the following sentences: 1. At least one processor, comprising: one or more processing units for: identifying spatial positions of a plurality of geometric primitives to be used for rendering an image of a scene; determining, for each of a number of iterations, potential subgroupings of the plurality of geometric primitives, partly based on the spatial positions; calculating, for each iteration, the spatial cost for each subgrouping using a surface heuristic; calculating, for each iteration, the cutting cost for each subgrouping, partly based on a number of connections between geometric primitives that traverse between different groups or within the same group of a given subgrouping; and providing, after a final iteration of the number of iterations,1. A set of final subgroupings of geometric primitives to be used for rendering the image, wherein the set of final subgroupings has the lowest cost, calculated using at least the spatial cost and the connectivity cost. 2. At least one processor according to sentence 1, wherein the one or more processing units are further provided for: identifying the connections between geometric primitives that cross between different groups or within the same group, wherein each connected pair of geometric primitives has a first connection and a second connection in opposite directions. 3. At least one processor according to sentence 2, wherein the one or more processing units are further provided for: determining the cutting cost using a spatially sorted array of primitive indices.which are calculated using the first and second connections identified for the connected pairs of geometric primitives. 4. At least one processor according to sentence 2 or 3, wherein the one or more processing units are further provided for: determining the cutting costs at each of a plurality of potential cutting positions for the potential subgroupings using a prefix sum sampling to generate a running total of a primitive array sorted by spatial position. 5. At least one processor according to sentence 4, wherein the one or more processing units are further provided for: determining the cutting costs partly using a ratio cut to divide the relevant costs by a number of elements on each side of the potential cutting positions. 6. At least one processor according to sentence 4 or 5,wherein the one or more processing units are further provided for: determining the cutting costs partly using a normalization cut to account for a cumulative number of connections per geometric primitive. 7. At least one processor according to any one of sentences 4 to 6, wherein the one or more processing units are further provided for: calculating, for each iteration, at least additional costs for each subgrouping, partly based on at least one additional selection criterion; and providing, after the last iteration of the number of iterations, the set of final subgroupings of geometric primitives to be used for rendering the image, wherein the set of final subgroupings has the lowest costs, using at least the spatial costs,the cutting costs and at least one additional cost are calculated. 8. At least one processor according to sentence 7, wherein the at least one additional cost includes at least one of the bounding frame overlap costs or bounding frame surface costs for the geometric primitives in each group of potential subgroupings. 9. At least one processor according to sentence 7 or 8, wherein the spatial costs and the connectivity costs are weighted by weights determined partly on the basis of a subsequent operation performed using mesh representation that includes the set of final subgroupings of the geometric primitives. 10. At least one processor according to any of the preceding sentences,wherein the processor is included in at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content; a system,which involves one or more virtual machines (VMs); a system implemented at least partially in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system for performing generative AI operations using a large language model (LLM); a system that uses or employs one or more inference microservices; a system that involves one or more machine learning models provided in a service or microservice along with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system implemented at least partially using cloud computing resources. 11. Computer-implemented method, comprising: Determining, for each of a number of iterations,potential subgroupings of a plurality of geometric primitives, partly based on identified spatial positions; calculating, for each iteration, cutting costs for each subgrouping, partly based on a number of connections between geometric primitives crossing between different groups or within the same group of a given subgrouping; selecting, for each iteration, a subgrouping with the lowest cost, based at least partly on the cutting costs; and providing, after a final iteration of the number of iterations, a set of final subgroupings of the geometric primitives to be used with one or more subsequent operations. 12. Computer-implemented method according to Theorem 11, further comprising: calculating, for each iteration, spatial costs for each subgrouping using a surface heuristic,wherein the subgrouping selected for each iteration is further selected based on the spatial costs. 13. Computer-implemented method according to sentence 12, further comprising: calculating, for each iteration, at least one additional cost for each subgrouping, partly based on at least one additional selection criterion; and providing, after the last iteration of the number of iterations, the set of final subgroupings of the geometric primitives, wherein the set of final subgroupings has the lowest costs calculated using at least the spatial costs, the cutting costs, and the at least one additional cost. 14. Computer-implemented method according to any one of sentences 11 to 13, further comprising: calculating the cutting costs using a spatially sorted arrangement of primitive indices calculated using a first join and a second join.that were identified for linked pairs of geometric primitives. 15. Computer-implemented method according to any one of sentences 11 to 14, further comprising: calculating the cutting costs at each of a plurality of potential cutting positions for the potential subgroupings using a prefix sum sampling to generate a running total of a primitive arrangement sorted by spatial position. 16. Computer-implemented method according to any one of sentences 11 to 15, further comprising: calculating the cutting costs partly using a ratio cut to divide relevant costs by a number of elements on each side of the potential cutting positions or a normalization cut to account for a cumulative number of links per geometric primitive. 17. System comprising: one or more processing units for determining a set of clusters of geometric primitives,which are to be used for performing a light transport simulation for an image to be rendered, wherein the clusters are determined recursively by dividing the geometric primitives into smaller clusters based partly on spatial positions of the geometric primitives and connectivity of the geometric primitives between the clusters. 18. System according to Theorem 17, wherein the one or more processing units are further provided to determine the clusters recursively partly based on at least one additional division criterion, wherein the clusters are determined partly using a cost function that includes weighted terms for the spatial positions, the connectivity and the at least one additional division criterion. 19. System according to Theorem 17 or 18,wherein the one or more processing units are further provided for calculating cutting costs for the clusters using a spatially sorted arrangement of primitive indices calculated using joins identified for joined pairs of geometric primitives, or a plurality of potential cutting positions for potential subgroupings determined using prefix sum sampling to generate a running total of a primitive arrangement sorted by spatial position. 20. System according to one of sentences 17 to 19,wherein the system comprises at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system for performing generative AI operations using a large language model (LLM); a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content; a system,which involves one or more virtual machines (VMs); a system implemented at least partially in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system that uses or employs one or more inference microservices; a system that involves one or more machine learning models provided in a service or microservice along with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system implemented at least partially using cloud computing resources. 21. Computer-implemented method, comprising: identifying spatial positions of a plurality of geometric primitives to be used for rendering an image of a scene; determining, for each of a number of iterations,22. Potential subgroupings of the plurality of geometric primitives, partly based on spatial positions, wherein at most one of the potential subgroupings has a size that is not a multiple of a target group size; Selecting, for each iteration of the number of iterations, a subgrouping that generates minimum cost, determined using at least one surface heuristic with respect to boundary geometries around the potential subgroupings; and Providing, after a final iteration of the number of iterations, a set of final subgroupings of the geometric primitives to be used for rendering the image. 22. Computer-implemented method according to Theorem 21, wherein the target group size corresponds to a maximum number of geometric primitives that can be stored simultaneously in the memory of a processing unit. 23. Computer-implemented method according to Theorem 21 or 22,wherein the set of final subgroupings includes at most one subgrouping that does not correspond to the target group size. 24. Computer-implemented method according to any one of theorems 21 to 23, further comprising: determining the potential subgroupings partly by scanning along at least two different axes in two different directions. 25. Computer-implemented method according to any one of theorems 21 to 24, wherein the surface heuristic is used to optimize a low surface area of ​​a boundary geometry with respect to a number of geometric primitives grouped within the boundary geometries. 26. Computer-implemented method according to any one of theorems 21 to 25, wherein the surface heuristic uses a weighted combination of surface area and overlap of the boundary geometries. 27. Computer-implemented method according to any one of theorems 21 to 26, wherein the boundary geometries correspond to boundary frames.28. Computer-implemented method according to any one of Theorems 21 to 27, wherein the spatial positions correspond to the centroids calculated for the plurality of geometric primitives. 29. Computer-implemented method according to any one of Theorems 21 to 28, wherein the geometric primitives comprise triangular areas to be used for hit checking during an implementation of a light-transport simulation technique. 30. At least one processor comprising: one or more processing units for: identifying spatial positions of a plurality of geometric primitives to be used for rendering an image of a scene; determining, for each of a number of iterations, potential subgroupings of the plurality of geometric primitives, partly based on the spatial positions and a target group size; selecting,for each iteration, a subgrouping that generates minimal cost with respect to boundary geometries around the potential subgroupings; and providing, after a final iteration of the number of iterations, a set of final subgroupings of the geometric primitives to be used for rendering the image. 31. At least one processor according to Theorem 30, wherein the potential subgroupings include at most one subgrouping that is not a multiple of the target audience size. 32. At least one processor according to Theorem 30 or 31, wherein the one or more processing units are further provided to determine the potential subgroupings partially by scanning along at least one axis in two different directions. 33. At least one processor according to any one of Theorems 30 to 32, wherein the subgroupings are determined using a surface heuristic.to optimize a low surface area of ​​a boundary geometry with respect to a number of geometric primitives grouped within the boundary geometries.34. At least one processor according to Theorem 33, wherein the surface heuristic uses a weighted combination of surface area and overlap of the boundary geometries.35. At least one processor according to one of Theorems 30 to 34,wherein the processor is included in at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content; a system,which includes one or more virtual machines (VMs); a system implemented at least partially in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system for performing generative AI operations using a large language model (LLM); a system that uses or employs one or more inference microservices; a system that includes one or more machine learning models provided in a service or microservice along with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system implemented at least partially using cloud computing resources. 36. System, comprising: one or more processing units for determining a set of clusters of geometric primitives,which are to be used for performing a light transport simulation for an image to be rendered, wherein the clusters are determined recursively by dividing the geometric primitives into smaller clusters based partly on spatial positions of the geometric primitives, a target cluster size, and minimum cost with respect to boundary geometries around the clusters. 37. System according to Theorem 36, wherein the clusters include at most one cluster that is not equal to the target cluster size. 38. System according to Theorem 36 or 37, wherein the spatial positions correspond to the centroids calculated for the geometric primitives. 39. System according to one of Theorems 36 to 38, wherein a surface is calculated using a weighted combination of surface size and overlap of the boundary geometries. 40. System according to one of Theorems 36 to 39,wherein the system comprises at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system for performing generative AI operations using a large language model (LLM); a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content; a system,that involves one or more virtual machines (VMs); a system implemented at least partially in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system that uses or employs one or more inference microservices; a system that involves one or more machine learning models provided in a service or microservice along with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system implemented at least partially using cloud computing resources. Other variations are also within the scope of the present disclosure. That is to say, while the disclosed techniques can be subjected to various modifications and alternative constructions, certain illustrated embodiments thereof are shown in the drawings and have been described in detail above. However, it should be understood that the disclosure is not intended to be limited to any particular form or forms disclosed, but rather, on the contrary, to cover all modifications, alternative constructions, and equivalents that fall within the scope and purpose of the disclosure as defined in the accompanying claims. The use of the terms "a" and "the" and similar designations in connection with the description of the disclosed embodiments (particularly in connection with the following claims) is to be interpreted as encompassing both the singular and the plural, unless otherwise specified herein or clearly contradicted by the context, and not as a definition of a term. The terms "comprise," "with," "including," and "have" are, unless otherwise specified, to be understood as open terms (in the sense of "particularly" or "including, but not limited to"). The term "connected," when used unchanged and with reference to physical connections, is to be understood as partially or wholly contained within, attached to, or joined together, even if something in between is involved.Where a range of values ​​is specified, this is merely an efficient way of individually naming each value within the range, unless otherwise indicated, and each value within the range is deemed to be included in the description as if it were individually named. The use of the terms "set" (e.g., "a set of elements") or "subset" is, unless otherwise stated or contradicted by the context, to be understood as a non-empty collection comprising one or more elements. Unless otherwise noted and not contradicted by the context, the term "subset" of a corresponding set does not necessarily denote a separate subset of the corresponding set; rather, subset and corresponding set may be the same. Connectives, such as expressions of the form "at least one of A, B, and C" or "A, B, and / or C," are, unless expressly stated otherwise or clearly contradicted by the context, generally understood, using the context, to mean that an element, term, etc., may be either A, B, or C, or any non-empty subset of the set of A, B, and C. For example, in the illustrative example of a set with three elements, the connective "at least one of A, B, and C," like the connective "A, B, and / or C," refers to each of the following sets: {A}, {B}, {C}, {A, B}, {A, C}, {B, C}, {A, B, C}. Thus, such connectives are generally not intended to imply that any particular embodiment requires the presence of at least one of A, at least one of B, and at least one of C.Additionally, unless otherwise stated or contradicted by the context, the term "plural" indicates a state of plurality (e.g., "a plurality of elements" means multiple elements). A plurality consists of at least two elements, but may include more if either explicitly stated or indicated by the context. Unless otherwise stated or evident from the context, the phrase "based on" means "at least partly based on" and not "exclusively based on". The operations of the processes described herein may be performed in any suitable order, unless otherwise specified herein or clearly contradicted by the context. In at least one embodiment, a process such as the processes described herein (or variations and / or combinations thereof) is carried out under the control of one or more computer systems equipped with executable instructions and is implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) that is executed collectively on one or more processors, by hardware, or combinations thereof. In at least one embodiment, code is stored on a computer-readable storage medium, for example, in the form of a computer program comprising a plurality of instructions executable by one or more processors.In at least one embodiment, a computer-readable storage medium is a non-volatile computer-readable storage medium that excludes volatile signals (e.g., a propagating volatile electrical or electromagnetic transmission) but includes non-volatile data storage circuits (e.g., buffers, caches, and queues) within transceivers for volatile signals. In at least one embodiment, code (e.g., executable code or source code) is stored on a set of one or more non-volatile, computer-readable storage media (or other memory for storing executable instructions). Executable instructions are stored on these instructions, which, when executed (i.e., as a result of execution) by one or more processors of a data processing system, cause the data processing system to perform the operations described herein.In at least one embodiment, a set of non-volatile, computer-readable storage media comprises multiple non-volatile, computer-readable storage media. One or more of the individual non-volatile storage media within the set do not contain the entire code, whereas the multiple non-volatile, computer-readable storage media collectively store the entire code. In at least one embodiment, executable instructions are executed such that different instructions are executed by different processors—for example, a non-volatile, computer-readable storage medium stores instructions, and a central processing unit (CPU) executes some of the instructions, while a graphics processing unit (GPU) executes other instructions.In at least one embodiment, different components of a computer system have separate processors, and different processors execute different subsets of instructions. Accordingly, in at least one embodiment, computer systems are configured to implement one or more services that individually or jointly perform operations of the processes described herein, and such computer systems are equipped with suitable hardware and / or software that enables the execution of operations. Furthermore, a computer system implementing at least one embodiment of the present disclosure is a single device, and in another embodiment, it is a distributed computer system comprising several devices that operate differently, such that the distributed computer system performs the operations described herein and each individual device does not perform all operations. The use of all present examples or illustrative language (e.g., "such as," "for example," "by way of example") serves only to better illustrate embodiments of the disclosure and does not constitute a limitation of the scope of the disclosure unless otherwise claimed. No wording in the patent specification should be interpreted as indicating that an unclaimed element is essential for carrying out the disclosure. All references cited herein, including publications, patent applications and patents, are hereby incorporated by reference to the same extent as if each reference had been individually and expressly indicated for inclusion by reference and set forth herein in its entirety. In the description and claims, the terms "coupled" and "connected," along with their derivatives, may be used. It should be understood that these terms are not necessarily intended to be synonymous. Rather, "connected" or "coupled" may be used in certain examples to indicate that two or more elements are in direct or indirect physical or electrical contact with each other. "Coupled" may also mean that two or more elements are not in direct contact with each other but nevertheless cooperate or interact. Unless expressly stated otherwise, terms such as "processing", "data processing", "calculating", "determining" or the like throughout this patent specification refer to actions and / or processes of a computer or data processing system or similar electronic data processing device that manipulate and / or convert data represented in the registers and / or storage of the data processing system as physical, e.g. electronic, quantities into other data represented in the storage, registers or other information, transmission or display devices of the data processing system in a similar manner as physical quantities. Similarly, the term "processor" can refer to a device or a section of a device that processes electronic data from registers and / or memory and converts that electronic data into other electronic data that can be stored in registers and / or main memory. As non-restrictive examples, the "processor" can be a CPU or a GPU. A "data processing platform" can have one or more processors. As used here, "software" processes can, for example, include software and / or hardware units that perform work over time, such as tasks, threads, and intelligent agents. Likewise, each process can refer to multiple processes for the sequential or parallel, continuous or intermittent execution of instructions.The terms “system” and “procedure” are used interchangeably here, insofar as a system can embody one or more procedures and procedures can be considered as a system. This document may refer to the acquisition, acquisition, reception, or input of analog or digital data into a subsystem, computer system, or computer-implemented machine. Acquiring, acquiring, receiving, or inputting analog and digital data can be accomplished in various ways, such as receiving data as parameters of a function call or an application programming interface (API) call. In some implementations, the process of acquiring, acquiring, receiving, or inputting analog or digital data can be performed by transmitting data over a serial or parallel interface. In other implementations, the process of acquiring, acquiring, receiving, or inputting analog or digital data can be performed by transmitting data over a computer network from a providing unit to a receiving unit.It can also refer to the provision, output, transmission, sending, or presentation of analog or digital data. In various examples, the process of providing, outputting, transmission, sending, or presenting analog or digital data can be carried out by transferring data as input or output parameters of a function call, a parameter of an application programming interface, or an interprocess communication mechanism. Although the foregoing discussion presents exemplary implementations of the described techniques, other architectures may be used to implement the described functionality and are intended to fall within the scope of this disclosure. Furthermore, although certain distributions of responsibilities have been defined above for illustrative purposes, various functions and responsibilities may be distributed and divided in different ways depending on the circumstances. Furthermore, although the subject matter has been described in terms specific to structural features and / or methodological actions, it should be understood that the subject matter claimed in the attached claims is not necessarily limited to the specific features or actions described. Rather, the specific features and actions are disclosed as exemplary forms of implementing the claims. It is understood that the foregoing aspects and embodiments are described only as examples and that modifications to the details may be made within the scope of the claims. Each device, method and feature disclosed in the description and (where applicable) in the claims and drawings may be provided independently or in any suitable combination. The reference figures appearing in the claims serve only for illustration and have no limiting effect on the scope of the claims.

Claims

At least one processor, comprising: one or more processing units for: identifying spatial positions of a plurality of geometric primitives to be used for rendering an image of a scene; determining, for each of a number of iterations, potential subgroupings of the plurality of geometric primitives, partly based on the spatial positions; calculating, for each iteration, spatial costs for each subgrouping using a surface heuristic; calculating, for each iteration, cutting costs for each subgrouping, partly based on a number of connections between geometric primitives that traverse between different groups or within the same group of a given subgrouping;and provide, after a final iteration from the number of iterations, a set of final subgroupings of the geometric primitives to be used for rendering the image, wherein the set of final subgroupings has the lowest cost, calculated using at least the spatial cost and the connectivity cost. At least one processor according to claim 1, wherein the one or more processing units are further provided for: identifying the connections between the geometric primitives that cross between different groups or within the same group, wherein each connected pair of geometric primitives has a first connection and a second connection in opposite directions. At least one processor according to claim 2, wherein the one or more processing units are further provided for: determining the cutting costs using a spatially sorted arrangement of primitive indices calculated using the first connection and the second connection identified for the connected pairs of geometric primitives. At least one processor according to claim 2 or 3, wherein the one or more processing units are further provided for: determining the cutting costs at each of a plurality of potential cutting positions for the potential subgroupings using a prefix sum sampling to generate a running total of a primitive array sorted by spatial position. At least one processor according to claim 4, wherein the one or more processing units are further provided for: determining the cutting costs partly using a ratio cut to divide the relevant costs by a number of elements on each side of the potential cutting positions. At least one processor according to claim 4 or 5, wherein the one or more processing units are further provided for: determining the cutting costs partly using a normalization cut to take into account a cumulative number of connections per geometric primitive. At least one processor according to any one of claims 4 to 6, wherein the one or more processing units are further provided for: calculating, for each iteration, at least one additional cost for each subgrouping, partly based on at least one additional selection criterion; and providing, after the last iteration from the number of iterations, the set of final subgroupings of the geometric primitives to be used for rendering the image, wherein the set of final subgroupings has the lowest cost, calculated using at least the spatial cost, the cutting cost and the at least one additional cost. At least one processor according to claim 7, wherein the at least one additional cost comprises at least one of bounding frame overlap costs or bounding frame surface costs for the geometric primitives in each group of potential subgroupings. At least one processor according to claim 7 or 8, wherein the spatial costs and the connectivity costs are weighted by weights determined partly on the basis of a subsequent operation performed using a mesh representation comprising the set of final subgroupings of the geometric primitives. At least one processor according to any preceding claim, wherein the processor comprises at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content; a system that incorporates one or more virtual machines (VMs);a system implemented at least partially in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system for performing generative AI operations using a large language model (LLM); a system that uses or employs one or more inference microservices; a system that incorporates one or more machine learning models provided in a service or microservice along with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system implemented at least partially using cloud computing resources. A computer-implemented procedure comprising: determining, for each of a number of iterations, potential subgroupings of a plurality of geometric primitives, partly based on identified spatial positions; calculating, for each iteration, cutting costs for each subgrouping, partly based on a number of connections between geometric primitives crossing between different groups or within the same group of a given subgrouping; selecting, for each iteration, a subgrouping with the lowest cost, based at least partly on the cutting costs; and providing, after a final iteration from the number of iterations, a set of final subgroupings of the geometric primitives to be used with one or more subsequent operations. Computer-implemented method according to claim 11, further comprising: calculating, for each iteration, spatial costs for each subgrouping using a surface heuristic, wherein the subgrouping selected for each iteration is further selected based on the spatial costs. A computer-implemented method according to claim 12, further comprising: calculating, for each iteration, at least one additional cost for each subgrouping, partly based on at least one additional selection criterion; and providing, after the last iteration from the number of iterations, the set of final subgroupings of the geometric primitives, wherein the set of final subgroupings has the lowest cost calculated using at least the spatial cost, the cutting cost and the at least one additional cost. A computer-implemented method according to any one of claims 11 to 13, further comprising: calculating the cutting costs using a spatially sorted arrangement of primitive indices calculated using a first connection and a second connection identified for connected pairs of geometric primitives. A computer-implemented method according to any one of claims 11 to 14, further comprising: calculating the cutting costs at each of a plurality of potential cutting positions for the potential subgroupings using a prefix sum sampling to generate a running total of a primitive arrangement sorted by spatial position. A computer-implemented method according to any one of claims 11 to 15, further comprising: calculating the cutting costs partly using a ratio cut to divide relevant costs by a number of elements on each side of potential cutting positions, or a normalization cut to consider a cumulative number of connections per geometric primitive. System comprising: one or more processing units for determining a set of clusters of geometric primitives to be used for performing a light transport simulation for an image to be rendered, wherein the clusters are determined recursively by dividing the geometric primitives into smaller clusters based partly on spatial positions of the geometric primitives and connectivity of the geometric primitives between the clusters. System according to claim 17, wherein the one or more processing units are further provided to determine the clusters recursively partly based on at least one additional division criterion, wherein the clusters are determined partly using a cost function comprising weighted terms for the spatial positions, the connectivity and the at least one additional division criterion. System according to claim 17 or 18, wherein the one or more processing units are further provided for calculating cutting costs for the clusters using a spatially sorted arrangement of primitive indices calculated using links identified for linked pairs of geometric primitives, or a plurality of potential cutting positions for potential subgroupings determined using prefix sum sampling to generate a running total of a primitive arrangement sorted by spatial position. System according to any one of claims 17 to 19, wherein the system comprises at least one of: a system for performing simulation operations; a system for performing simulation operations for testing or validating autonomous machine applications; a system for performing digital twin operations; a system for performing light transport simulation; a system for rendering a graphical output; a system for performing deep learning operations; a system for performing generative AI operations using a large language model (LLM); a system implemented using an edge device; a system for generating or presenting virtual reality (VR) content; a system for generating or presenting augmented reality (AR) content; a system for generating or presenting mixed reality (MR) content;a system that includes one or more virtual machines (VMs); a system that is at least partially implemented in a data center; a system for performing hardware tests using simulation; a system for generating synthetic data; a system that uses or employs one or more inference microservices; a system that includes one or more machine learning models that are provided in a service or microservice together with an operating system-level virtualization package (e.g., a container); a platform for collaborative content creation for 3D objects; or a system that is at least partially implemented using cloud computing resources.