Quantum computing element tuning

Abstract

According to an embodiment, an arrangement for tuning a plurality of quantum computing elements based on a common activation signal, the arrangement comprising: a common activation signal line for providing a common activation signal; and a plurality of driver cells, wherein each driver cell in the plurality of driver cells is electromagnetically coupled to the common activation signal line, each driver cell in the plurality of driver cells is inductively couplable to a corresponding quantum computing element in a plurality of quantum computing elements for tuning the corresponding quantum computing element via a coupling of the common activation signal to the corresponding quantum computing element via the driver cell, and each driver cell in the plurality of driver cells comprises at least one tunable inductance configured to control at least a magnitude of the coupling of the common activation signal to the corresponding quantum computing element.

Description

QUANTUM COMPUTING ELEMENT TUNINGTECHNICAL FIELD

[0001] The present disclosure relates to a quantum computing, and more particularly to an arrangement for tuning a plurality of quantum computing elements based on a common activation signal , a quantum computing system, and a method for tuning a plurality of quantum computing elements based on a common activation signal .BACKGROUND

[0002] The ability to tune quantum computing element, such as qubits and / or couplers between qubits , can be desirable for large scale quantum computing . For example , by tuning a quantum computing element , the resonance frequency of the quantum computing element can be shifted . Shifting of the resonance frequencies of qubits and / or couplers between qubits can be used to , for example , bring qubits into resonance . The ability to bring qubits to resonance may be important for performing quantum logic gate operations using the qubits .SUMMARY

[0003] This summary is provided to introduce a selection of concepts in a s implif ied form that are further described below in the detailed description . This summary is not intended to identify key features or essential features of the claimed subj ect matter, nor is itintended to be used to limit the scope of the claimed subj ect matter .

[0004] It is an obj ective to provide an arrangement for tuning a plurality of quantum computing elements based on a common activation signal , a quantum computing system, and a method for tuning a plural ity of quantum computing elements based on a common activation signal . The foregoing and other obj ectives are achieved by the features of the independent claims . Further implementation forms are apparent from the dependent claims , the description and the figures .

[0005] According to a first aspect , an arrangement for tuning a plurality of quantum computing elements based on a common activation signal , the arrangement comprising : a common activation signal line for providing a common activation signal ; and a plurality of driver cells , wherein each driver cel l in the plurality of driver cells is electromagnetically coupled to the common activation signal line , each driver cell in the plurality of driver cells is inductively couplable to a corresponding quantum computing element in a plurality of quantum computing elements for tuning the corresponding quantum computing element via a coupling of the common activation signal to the corresponding quantum computing element via the driver cell , and each driver cell in the plurality of driver cel ls comprises at least one tunable inductance configured to control at least a magnitude of the coupling of the common activation signal to the corresponding quantum computing element . Thearrangement can, for example , efficiently tune the plurality of quantum computing elements based on the common activation signal .

[0006] In an implementation form of the first aspect , each driver cell in the plurality of driver cel ls further compri ses a main current loop, wherein the driver cell is configured to control a temporal length of the coupl ing of the common activation signal to the corresponding quantum computing element based on a magnetic flux through the main current loop . The arrangement can, for example , efficiently control the temporal length of the coupling .

[0007] In another implementation form of the first aspect , the arrangement further comprises a first plurality of persistent current loops , wherein each persi stent current loop in the first plural ity of persis tent current loops is inductively coupled to the main current loop of a corresponding driver cell in the plurality of driver cells and configured to control the magnetic flux through the main current loop . The arrangement can, for example , efficiently control the magnetic flux through the main current loop and thus control the temporal length of the coupling .

[0008] In another implementation form of the first aspect , the at least one tunable inductance comprises at least one direct current superconducting interference device , dc-SQUID, and the inductance of the at least one tunable inductance is tunable via a magnetic flux through the at least one dc-SQUI D . The arrangement can,for example , efficiently tune the inductance of the at least one tunable inductance and thus control at least the magnitude of the coupling of the common activation signal to the quantum computing elements .

[0009] In another implementation form of the first aspect , the arrangement further comprises a second plurality of persistent current loops , wherein each persistent current loop in the second plurality of persistent current loops is inductively coupled to the at least one dc-SQUID of a corresponding driver cell in the plurality of driver cells and configured to control the magnetic flux through the at least one dc-SQUID . The arrangement can, for example , efficiently control the magnetic flux through the main current loop using the second plurality of persistent current loops and thus control the temporal length of the coupling .

[0010] In another implementation form of the first aspect , each driver cel l in the plurality of driver cells is inductively couplable to the corresponding quantum computing element in the plurality of quantum computing elements via an output inductive element , wherein : the at least one tunable inductance is arranged in parallel with the output inductive element ; the at least one tunable inductance is arranged in series with the output inductive element ; and / or each driver cell in the plurality of driver cells comprises a main current loop, wherein the output inductive element divides the main current loop into a first subloop and a second subloop, the at least one tunable inductance comprisesa plurality of tunable inductances , the first subloop comprises at least one of the plurality of tunable inductances , and the second subloop comprises at least one of the plurality of tunable inductances . The arrangement can, for example , efficiently control at least the magnitude of the coupling of the common activation signal to the corresponding quantum computing element via the output inductive element .

[0011] In another implementation form of the first aspect , the arrangement further comprises at least one bit signal line , wherein each bit signal line in the at least one bit signal line is electromagnetically coupled to a corresponding driver cell in the plurality of driver cells and configured to control a polarity between the common activation signal and an output signal transmitted to the corresponding quantum computing element in response to the common activation signal via the driver cell . The arrangement can, for example , efficiently control the polarity between the common activation signal and the output signal .

[0012] In another implementation form of the first aspect , the at least one tunable inductance comprises a plurality of tunable inductances in series and / or the at least one tunable inductance comprises a plurality of Josephson j unctions in series .

[0013] In another implementation form of the first aspect , each quantum computing element in the plurality of quantum computing elements comprises a qubit or acoupler between qubits . The arrangement can, for example , efficiently tune the qubits or the couplers between qubits .

[0014] In another implementation form of the first aspect , the tuning the corresponding quantum computing element comprises tuning an effective inductance of the corresponding quantum computing element and / or tuning a frequency of the corresponding quantum computing element . The arrangement can, for example , efficiently tune the effective inductance and / or frequency the qubits or the couplers between qubits .

[0015] In another implementation form of the first aspect , each quantum computing element in the plurality of quantum computing elements comprises at least one superconducting interference device , SQUID, and each driver cell in the plurality of driver cells is inductively couplable to the at least one SQUID of a corresponding quantum computing element in the plurality of quantum computing elements for tuning the corresponding quantum computing element via tuning a magnetic flux through the at least one SQUID . The arrangement can, for example , efficiently tune the effective inductance and / or frequency of the quantum computing elements via tuning the magnetic flux through the at least one SQUID .

[0016] In another implementation form of the first aspect , the plurality of driver cells comprises at least one driver cel l pair , wherein each of the at least one driver cell pair is inductively couplable to a corresponding quantum computing element in the plurality ofquantum computing elements for tuning the corresponding quantum computing element via the coupling of the common activation signal to the corresponding quantum computing element via the driver cel l pair . The arrangement can, for example , improve tuning of the corresponding quantum computing element .

[0017] According to a second aspect , a quantum computing system comprises the arrangement according to the first aspect , a plurality of qubits and / or a plural ity of tunable couplers , wherein each driver cell in the plurality of driver cells is inductively coupled to a corresponding qubit in the plurality of qubits and / or a corresponding coupler in the plurality of tunable couplers .

[0018] According to a third aspect , a method for tuning a plural ity of quantum computing elements based on a common activation signal using the arrangement according to the first aspect , the method compris ing : providing a common activation s ignal to the common activation signal l ine ; and tuning the at least one tunable inductance of at least one driver cell in the plurality of driver cel ls to control at least a magnitude of the coupling of the common activation s ignal to the corresponding quantum computing element .

[0019] Many of the attendant features wil l be more readily appreciated as they become better understood by reference to the following detailed description considered in connection with the accompanying drawings .DESCRIPTION OF THE DRAWINGS

[0020] In the following, example embodiments are described in more detail with reference to the attached figures and drawings , in which :

[0021] Fig . 1 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to an embodiment ;

[0022] Fig . 2 illustrates a schematic representation of a driver cell according to an embodiment ;

[0023] Fig . 3 illustrates a schematic representation of a driver cell according to another embodiment ;

[0024] Fig . 4 illustrates a schematic representation of a driver cell according to another embodiment ;

[0025] Fig . 5 illustrates a schematic representation of a driver cell according to another embodiment ;

[0026] Fig . 6 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment ;

[0027] Fig . 7 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment ;

[0028] Fig . 8 illustrates a schematic representation of driver cell according to another embodiment ;

[0029] Fig . 9 illustrates a schematic representation of driver cell according to another embodiment ;

[0030] Fig . 10 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment ;

[0031] Fig . 11 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment ;

[0032] Fig . 12 illustrates a schematic representation of a quantum computing system according to an embodiment ;

[0033] Fig . 13 illustrates a schematic representation of a control unit according to an embodiment ;

[0034] Fig . 14 illustrates a flow chart representation of a method according to an embodiment ;

[0035] Fig . 15 illustrates a schematic representation of circuit model of a driver cell according to an embodiment ;

[0036] Fig . 16 illustrates a plot representation of common activation signals and corresponding output signals according to an embodiment ;

[0037] Fig . 17 illustrates a plot representation of common activation signals and corresponding output signals according to another embodiment ;

[0038] Fig . 18 illustrates a plot representation of output signals according to an embodiment ;

[0039] Fig . 19 illustrates a plot representation of output signals according to an embodiment ; and

[0040] Fig . 20 illustrates a plot representation of output signals according to an embodiment .

[0041] In the following, like reference numerals are used to designate l ike parts in the accompanying drawings .DETAILED DESCRIPTION

[0042] In the following description, reference is made to the accompanying drawings , which form part of the disclosure , and in which are shown, by way of illustration, specific aspects in which the present disclosure may be placed . I t i s understood that other aspects may be utili zed, and structural or logical changes may be made without departing from the scope of the present disclosure . The following detailed description, therefore , is not to be taken in a limiting sense , as the scope of the present disclosure is defined by the appended claims .

[0043] For instance , it is understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa . For example , if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explicitly described or il lustrated in the f igures . On the other hand, for example , if a specific apparatus is described based on functional units , a corresponding method may include a step performing the described functionality, even ifsuch step is not explicitly described or illustrated in the figures . Further, it is understood that the features of the various example aspects described herein may be combined with each other, unless specifically noted otherwise .

[0044] Fig . 1 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to an embodiment .

[0045] According to an embodiment , the arrangement 100 comprises a common activation signal line 101 for providing a common activation signal .

[0046] The signal lines disclosed herein, such as the common activation signal line 101 , may be implemented, for example , as traces on a printed circuit board ( PCB ) , as traces on a silicon chip, as cables , as transmission lines , as waveguides , or s imi lar . The s ignal lines may comprise superconductive signal lines .

[0047] The common activation signal may also be referred to as a clock signal , a common activation pulse , a clock pulse , or similar .

[0048] The arrangement 100 may further comprise a plurality of driver cells . Each driver cell 102 in the plurality of driver cells can be electromagnetically coupled 103 to the common activation signal line 101 . Each driver cell 102 in the plurality of driver cel ls can be inductively couplable 104 to a corresponding quantum computing element 105 in a plurality of quantum computing elements for tuning the corresponding quantumcomputing element via a coupling of the common activation signal to the corresponding quantum computing element via the driver cell . Each driver cel l 102 in the plurality of driver cells can comprises at least one tunable inductance configured to control at least a magnitude of the coupling of the common activation signal to the corresponding quantum computing element .

[0049] The common activation signal can be coupled to the corresponding quantum computing element via the driver cell as an output signal of the driver cell . The output s ignal may al so be referred to as a driver cell output signal or similar .

[0050] Each driver cell 102 in the plurality of driver cells can be electromagnetically coupled 103 to the common activation signal line 101 in various ways . For example , in some embodiments , each driver cell 102 in the plurality of driver cel ls can be galvanically, inductively, or capacitively coupled to the common activation signal line 101 . A galvanic coupling may comprise , for example , a galvanic connection via a resistor or an inductor . An inductive coupling may be implemented us ing, for example , a trans former or some other inductive element or elements . A capacitive coupling may be implemented using, for example , a capacitor or using some other capacitive element or elements .

[0051] According to an embodiment , each quantum computing element in the plurality of quantum computing elements comprises a qubit or a coupler between qubits .

[0052] According to an embodiment , the tuning the corresponding quantum computing element comprises tuning an effective inductance of the corresponding quantum computing element and / or tuning a frequency of the corresponding quantum computing element .

[0053] The tuning the corresponding quantum computing element may comprise tuning the effective inductance of the corresponding quantum computing element . For example , if the corresponding quantum computing element comprises a superconducting interference device ( SQUID) , the effective inductance can be tuned by tuning the effective critical current of the SQUID by tuning a magnetic flux through the SQUID . Herein, a SQUID may also be referred to as a direct current SQUID (dc- SQUID) . The effective inductance can, depending on the application, have other effects , such as frequency tuning . Frequency tuning can tune the resonance frequency of the corresponding quantum computing element . In the case of qubits , the resonance frequency may also be referred to as the qubit frequency . In some embodiments , a SQUID can be used as a wideband analog reflective attenuator . In the context of persistent current systems , for example , other tuning mechani sms can be used in conj unction with the common activation signal .

[0054] Fig . 2 illustrates a schematic representation of driver cell according to an embodiment .

[0055] According to an embodiment , each driver cell 102 in the plural ity of driver cells further compri ses a main current loop 203 , wherein the driver cell 102 isconfigured to control a temporal length of the coupling of the common activation signal to the corresponding quantum computing element based on a magnetic flux through the main current loop 203 .

[0056] For example , in the embodiment of Fig . 2 , the driver cell 102 comprises a main current loop 203 comprising two Josephson j unction 201 and an output inductive element 202 dividing the main current loop 203 into a first subloop and a second subloop . The first subloop comprises a first Josephson j unctions 201 , and the second subloop comprises a second Josephson j unctions 201 . The temporal length of the coupling of the common activation signal to the corresponding quantum computing element via the output inductive element 202 can be controlled by controlling the magnetic flux through the main current loop 203 .

[0057] According to an embodiment , the arrangement further comprises at least one bit signal line 204 , wherein each bit signal line in the at least one bit signal line 204 is electromagnetically coupled to a corresponding driver cell in the plurality of driver cells 102 and configured to control a polarity between the common activation signal and an output signal transmitted to the corresponding quantum computing element in response to the common activation signal via the driver cell .

[0058] When the at least one bit signal line 204 is configured to control a polarity between the common activation signal and an output signal , a bit signal inthe at least one bit signal line 204 can control whether the common activation signal and the output signal have the same polarity or the opposite polarity.

[0059] For example, in the embodiment of Fig. 2, a bit signal line 204 is galvanically coupled to the driver cell 102. In other embodiments, each bit signal line in the at least one bit signal line 204 may be, for example, inductively or capacitively coupled to a corresponding driver cell.

[0060] In some embodiments, the arrangement 100 may comprise a plurality of bit signal lines 204. Each bit signal line may be electromagnetically coupled to one or more driver cells 102. For example, in some embodiments, the arrangement 100 may comprise a separate bit signal line 204 for each driver cell 102, a common bit signal line 204 for a subset of driver cells 102, or a common bit signal line 204 for all driver cells 102.

[0061] In the embodiment of Fig. 2, the electromagnetic coupling 103 comprises an inductive coupling 210. In some embodiments, the inductive coupling 210 may be implemented using, for example, one or more transformers .

[0062] Fig. 3 illustrates a schematic representation of driver cell according to another embodiment.

[0063] According to an embodiment, the at least one tunable inductance comprises at least one direct current superconducting interference device, dc-SQUID, 301 and the inductance of the at least one tunable inductanceis tunable via a magnetic flux through the at least one dc-SQUID 301 .

[0064] According to an embodiment , each driver cell 102 in the plurality of driver cells is inductively couplable to the corresponding quantum computing element in the plurality of quantum computing elements via an output inductive element 202 , each driver cell 102 in the plurality of driver cells compri ses a main current loop 203 , and the output inductive element 202 divides the main current loop 203 into a first subloop and a second subloop, the at least one tunable inductance comprises a plurality of tunable inductances , the first subloop comprises at least one of the plurality of tunable inductances , and the second subloop comprises at least one of the plurality of tunable inductances .

[0065] For example , in the embodiment of Fig . 3 , the output inductive element 202 divides the main current loop 203 into a first subloop and a second subloop, the first subloop comprises a first dc-SQUID, and the second subloop comprises a second dc-SQUID .

[0066] A magnetic flux through the first and second dc-SQUID 301 can tune the inductance of the dc-SQUID 301 . Tuning of the inductance can, in turn, tune a magnitude of the coupling of the common activation signal to the corresponding quantum computing element via the output inductive element 202 .

[0067] Fig . 4 illustrates a schematic representation of driver cell according to another embodiment .

[0068] According to an embodiment , the at least one tunable inductance is arranged in parallel with the output inductive element 202 .

[0069] Herein, "in parallel" may mean electrically parallel and "in series" may mean electrically in series .

[0070] For example , in the embodiment of Fig . 4 , the driver cell 102 comprises a main current loop 203 comprising two Josephson j unction 201 and an output inductive element 202 dividing the main current loop 203 into a first subloop and a second subloop . The first subloop comprises a first Josephson j unctions 201 , and the second subloop comprises a second Josephson j unctions 201 . Further, the at least one tunable inductance comprises a dc-SQUID 301 that is arranged in parallel with the output inductive element 202 .

[0071] Fig . 5 illustrates a schematic representation of driver cell according to another embodiment .

[0072] According to an embodiment , the at least one tunable inductance is arranged in series with the output inductive element 202 .

[0073] For example , in the embodiment of Fig . 5 , the driver cell 102 comprises a main current loop 203 comprising two Josephson j unction 201 and an output inductive element 202 dividing the main current loop 203 into a first subloop and a second subloop . The first subloop comprises a first Josephson j unctions 201 , and the second subloop comprises a second Josephson j unctions 201 . Further, the at least one tunable inductance comprisesa dc-SQUID 301 that is arranged in series with the output inductive element 202.

[0074] In some embodiments, the at least one tunable inductance may be arranged using any combination of the embodiments of Figs. 3 - 5.

[0075] The Josephson junctions 201 and / or dc-SQUIDs 301 may be referred to as switching junctions. The switching junctions may sustain a persistent current during, for example, a pulse provided by the common activation signal and perform dynamic switching at the beginning and / or end of such a pulse. A role of other junctions / SQUIDs in the arrangement 100 may be to adjust the pulse amplitude and / or pulse length via their inductance. The switching junctions may also be referred to as main junctions or similar.

[0076] The switching junctions can be responsible for placing integer number of quanta into, for example, the main current loop. The other junctions / SQUIDs can be used to modify some inductive element of the arrangement 100 with the intent of adjusting pulse amplitude / length etc. However, in these adjusting junctions / SQUIDs, the current may always remain well below the critical current during the common activation signal and as such they do not switch. In the switching junctions, critical current can be reached but not crossed.

[0077] Output flux can be increased by adding more switching junctions into the arrangement 100, since this increases the number of flux quanta involved in the pulse, or by decreasing the inductance into which thej unctions switch and simultaneously increasing the critical current . Only the switching j unctions of the driver cell 102 "switch" , the Josephson j unctions of the dc- SQUIDs should not switch for the circuit to work in desired manner . The j unctions used for tuning the circuit parameters should have critical currents above that of the switching j unctions .

[0078] Fig . 6 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment .

[0079] According to an embodiment , the arrangement 100 further comprises a first plurality of persistent current loops 601 , wherein each persistent current loop in the f irst plurality of persistent current loops 601 is inductively coupled to the main current loop 203 of a corresponding driver cell 102 in the plurality of driver cells and configured to control the magnetic flux through the main current loop 203 .

[0080] Herein, a persistent current may refer to an effect whereby biasing a shunted Josephson j unction above its critical current allows persistent current to accumulate in the persistent current loop . A shunted Josephson j unction refers to the fact that the persi stent current loop comprises the shunt resistive element . The shunt resi stive element may also be referred to as a shunt resistor or similar . The shunt resistive element can allow transients to stabili ze in the persistent current loop . Thus , the shunt resistive element can al lowthe persistent current loop to controllably accumulate persi stent current for a steady state in the inductive element and the Josephson j unction even though current does not flow through the shunt resistive element in steady state . The shunted Josephson j unction and the at least one inductive element form the persistent current loop . The shunt resistive element does not play a role once persistent current has been established in the persistent current loop, i . e . there is no voltage across the shunt resistive element and no current flows through the shunt resistive element in a steady state . Instead, current flows through the Josephson j unction and the at least one inductive element .

[0081] A shunt resistor may be needed in many implementations of persistent current loops . However, in some embodiments , a shunt resistor may not be needed . Thus , in any embodiment disclosed herein, a persistent current loop , such as in the first / second plurality of persi stent current loops , may or may not comprise a shunt resistor .

[0082] The pers istent current can be added into each persi stent current loop in di screte flux quanta due to the magnetic flux through the persistent current loop being quanti zed .

[0083] The first plurality of persistent current loops 601 can be used to , for example , cal ibrate each driver cell 102 in the plurality of driver cells . For example , due to fabrication variances in the quantum computing elements , the common activation signal may need to becoupled at a different magnitude to each quantum computing element . The magnitude of the coupl ing can be set using the first plurality of persistent current loops 601 during, for example , a calibration phase .

[0084] Fig . 7 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment .

[0085] According to an embodiment , the arrangement 100 further comprises a second plurality of persistent current loops 701 , wherein each persistent current loop in the second plurality of persistent current loops 701 is inductively coupled to the at least one dc-SQUID 301 of a corresponding driver cel l 102 in the plurality of driver cells and configured to control the magnetic flux through the at least one dc-SQUID .

[0086] The at least one dc-SQUID 301 may be arranged in various ways in the driver cells 102 , such as those illustrated in the embodiments of Figs . 3 - 5 .

[0087] Fig . 8 illustrates a schematic representation of driver cell according to another embodiment .

[0088] The arrangement according to any preceding claim, the at least one tunable inductance comprises a plurality of Josephson j unctions in series .

[0089] For example , in the embodiment of Fig . 8 , the tunable inductance comprises a dc-SQUID like loop 801 comprising six Josephson j unction that is arranged in parallel with the output inductive element 202 . The number of Josephson j unctions illustrated in the embodimentof Fig . 8 is only exemplary and the plurality of Josephson j unctions in series may comprise any number of Josephson j unctions . Further, the dc-SQUID like loop 801 being arranged in parallel with the output inductive element 202 is only one possible embodiment . In any embodiment disclosed herein, the at least one tunable inductance may comprise a plurality of Josephson j unctions in series . For example , in any of the embodiments of Figs . 3 - 5 , any dc-SQUID 301 may be replaced with dc-SQUID like loop 801 similar to that illustrated in the embodiment of Fig . 8 and compri sing any number of Josephson j unctions .

[0090] Fig . 9 illustrates a schematic representation of driver cell according to another embodiment .

[0091] According to an embodiment , the at least one tunable inductance comprises a plurality of tunable inductances in series .

[0092] For example , in the embodiment of Fig . 9 , the tunable inductance comprises three dc-SQUIDs 301 in series arranged in parallel with the output inductive element 202 . The number of dc-SQUIDs in the embodiment of Fig . 9 is only exemplary and the plurality of tunable inductances in series may comprise any number of tunable inductances , such as dc-SQUIDs 301 . Further, the three dc-SQUIDs arranged in parallel with the output inductive element 202 is only one possible embodiment . In any embodiment disclosed herein, the at least one tunable inductance may comprise a plurality of tunable inductances in series . For example , in any of the embodimentsof Figs. 3 - 5, any dc-SQUID 301 may be replaced with a plurality of dc-SQUIDs 301 in series similarly to the embodiment of Fig. 9 and comprising any number of dc- SQUIDs 301.

[0093] In some embodiments, the each of the two Josephson junction 201 may comprise a plurality of Josephson junctions in series. This may be referred to as a Suzuki stack. For example, in any of the embodiments of Figs. 2 - 9, the each of the two Josephson junctions 201 may be replaced with a plurality of Josephson junctions in series. This can increase the amplitude of the output signal.

[0094] Fig. 10 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment.

[0095] According to an embodiment, the plurality of driver cells comprises at least one driver cell pair 1001, wherein each of the at least one driver cell pair is inductively couplable to a corresponding quantum computing element 105 in the plurality of quantum computing elements for tuning the corresponding quantum computing element 105 via the coupling of the common activation signal to the corresponding quantum computing element 105 via the driver cell pair 1001.

[0096] For example, the embodiment of Fig. 10 illustrates one driver cell pair 1001. Both driver cells 102 in the driver cell pair 1001 are inductively coupled 104 to a corresponding quantum computing element 105.

[0097] The driver cells 102 in the driver cell pair 1001 can be configured to , for example , provide a double amplitude in the output signal compared to a single driver cell if , for example , the same polarity is configured to the driver cells 102 via the at least one bit signal line 204 .

[0098] Alternatively or additionally, the driver cells 102 in the driver cell pair 1001 can be configured to , for example , provide a null / zero amplitude in the output signal if , for example , the opposite polarity is configured to the driver cells 102 via the at least one bit signal line 204 . Thus , a null / zero amplitude can be achieved in the output signal even when the common activation signal provides a pulse .

[0099] Fig . 11 illustrates a schematic representation of an arrangement for tuning a plurality of quantum computing elements based on a common activation signal according to another embodiment .

[0100] According to an embodiment , each quantum computing element 105 in the plurality of quantum computing elements comprises at least one superconducting interference device ( SQUID) and each driver cel l 102 in the plurality of driver cells is inductively couplable to the at least one SQUID of a corresponding quantum computing element 105 in the plurality of quantum computing elements for tuning the corresponding quantum computing element via tuning a magnetic flux through the at least one SQUID .

[0101] For example , in the embodiment of Fig . 11 , each quantum computing element 105 comprises a SQUID .

[0102] Although in some embodiments disclosed herein each quantum computing element 105 may be illustrated as comprising a single SQUID, each quantum computing element 105 in the plurality of quantum computing elements may comprise any number of SQUIDs . Further, each quantum computing element 105 may comprise any number of other components . For example , in some embodiments , each quantum computing element 105 may comprise a plurality of components compri sing a SQUID . Thus , each quantum computing element 105 may comprise , for example , a more complex superconducting circuit of which the SQUID is part of .

[0103] Fig . 12 illustrates a schematic representation of a quantum computing system according to an embodiment .

[0104] According to an embodiment , a quantum computing system 1200 comprises the arrangement 100 , a plurality of qubits 1201 and / or a plurality of tunable couplers 1202 , wherein each driver cell 102 in the plural ity of driver cells is inductively coupled to a corresponding qubit in the plurality of qubits 1201 and / or a corresponding coupler in the plurality of tunable couplers 1202 .

[0105] For example , in the embodiment of Fig . 12 , two driver cells 102 of the arrangement 100 are illustrated . Each driver cell 102 is inductively coupled to a corre-spending coupler 1202 implemented as a SQUID . Each coupler 1202 is arranged to control coupling between qubits 1201 . The qubits 1201 are also implemented as SQUIDs . By tuning the couplers 1202 , the interaction between the qubits 1201 can be controlled .

[0106] The couplers 1202 may also be referred to as tunable couplers or similar .

[0107] In some embodiments , the quantum computing system 1200 may comprise a third plurality of persistent current loops , wherein each persistent current loop in the third plurality of pers istent current loops i s inductive coupled to a corresponding coupler 1202 in the plurality of couplers . The persistent current loops may produce a substantially constant magnetic flux through each coupler 1202 . The driver cells 102 can be used to tune the magnetic flux through each coupler 1202 to control the coupling of the qubits 1201 .

[0108] In other embodiments , the at least some drive cells 102 may be inductively coupled to corresponding qubits 1201 . Coupling between qubits 1201 may be further controlled by, for example , tuning the resonance frequencies of the qubits 1201 via the driver cells 102 .

[0109] The embodiment illustrated in Fig . 12 is a simplified embodiment for illustrative purposes . In practical implementations the quantum computing system 1200 may comprise , for example , hundreds , thousand, or millions of qubits 1201 . The qubits 1201 may be arranged into , for example , a square lattice , wherein each qubit1201 is couplable to four neighboring qubits 1201 via couplers 1202.

[0110] According to an embodiment, each qubit 1201 in the plurality of qubits comprises at least one Josephson junction and / or each coupler 1202 in the plurality of couplers comprises at least one Josephson junction.

[0111] Although some embodiments may be disclosed herein with reference to a certain type of qubit and / or a certain type of coupler, these qubit and coupler types are only exemplarily. In any embodiment disclosed herein, the qubits and / or couplers may be implemented in various ways and using various technologies.

[0112] Herein, any qubit may comprise, for example, a flux qubit, a phase qubit, and / or a transmon qubit.

[0113] When the quantum computing system 1200 is operational, the arrangement 100, the plurality of qubits 1201, and / or the plurality of couplers 1202 may be physically located in a cryostat or similar. The cryostat may cool the arrangement 100, the plurality of qubits 1201, and / or the plurality of couplers 1202 to cryogenic temperatures. This may be required if the plurality of qubits 1201 are, for example, superconducting qubits.

[0114] Fig. 13 illustrates a schematic representation of a control unit according to an embodiment.

[0115] According to an embodiment, the quantum computing system 1200 further comprises a control unit 1300 coupled to the common activation signal line 101 of the arrangement 100. The control unit 1300 may be configuredto provide the common activation signal to the common activation signal line 101.

[0116] The control unit 1300 may also be coupled to the at least one bit signal line 204 and configured to control a polarity between the common activation signal and an output signal transmitted to the corresponding quantum computing element in response to the common activation signal via the driver cell.

[0117] The control unit 1300 may comprise at least one processor 1301. The at least one processor 1301 may comprise, for example, one or more of various processing devices, such as a co-processor, a microprocessor, a control unit 1300, a digital signal processor (DSP) , a processing circuitry with or without an accompanying DSP, or various other processing devices including integrated circuits such as, for example, an application specific integrated circuit (ASIC) , a field programmable gate array (FPGA) , a microprocessor unit (MCU) , a hardware accelerator, a special-purpose computer chip, or the like.

[0118] The control unit 1300 may further comprise a memory processor 1302. The memory processor 1302 may be configured to store, for example, computer programs and the like. The memory processor 1302 may comprise one or more volatile memory devices, one or more non-volatile memory devices, and / or a combination of one or more volatile memory devices and non-volatile memory devices. For example, the memory processor 1302 may be embodied as magnetic storage devices (such as hard disk drives,floppy disks, magnetic tapes, etc.) , optical magnetic storage devices, and semiconductor memories (such as mask ROM, PROM (programmable ROM) , EPROM (erasable PROM) , flash ROM, RAM (random access memory) , etc.) .

[0119] The control unit 1300 may further comprise other components not illustrated in the embodiment of Fig. 13. The control unit 1300 may comprise, for example, an input / output bus for connecting the control unit 1300 to the arrangement 100. Further, a user may control the control unit 1300 via the input / output bus. The control unit 1300 may further comprise means for providing the first / second pulse to the signal lines. For example, the control unit 1300 may comprise a DC source, such as a DC current source.

[0120] When the control unit 1300 is configured to implement some functionality, some component and / or components of the control unit 1300, such as the at least one processor 1301 and / or the memory processor 1302, may be configured to implement this functionality. Furthermore, when the at least one processor 1301 is configured to implement some functionality, this functionality may be implemented using program code comprised, for example, in the memory processor 1302.

[0121] The control unit 1300 may be implemented using, for example, a computer, some other computing device, or similar. The control unit 1300 may further comprise other components, such as a signal source for providing the common activation signal.

[0122] Fig . 14 illustrates a flow chart representation of a method according to an embodiment .

[0123] According to an embodiment , a method 1400 for tuning a plurality of quantum computing elements based on a common activation signal using the arrangement 100 comprises providing 1401 a common activation signal to the common activation signal line .

[0124] The method 1400 may further comprise tuning 1402 the at least one tunable inductance of at least one driver cell in the plurality of driver cells to control at least a magnitude of the coupl ing of the common activation signal to the corresponding quantum computing element .

[0125] Fig . 15 illustrates a schematic representation of circuit model of a driver cell according to an embodiment .

[0126] Fig . 16 illustrates a plot representation of common activation signals and corresponding output signals according to an embodiment .

[0127] Plot 1601 corresponds to the common activation signals . Each activation signal corresponds to a different de offset . Plot 1602 corresponds to the corresponding output signals when the common activation signals of plot 1601 are fed into the circuit il lustrated in the embodiment of Fig . 15 .

[0128] The f lat top in of the common activation signals in plot 1601 is due to an artifact of the used triangle wave clock pulse .

[0129] Fig. 17 illustrates a plot representation of common activation signals and corresponding output signals according to an embodiment.

[0130] Plot 1701 corresponds to the common activation signal for the circuit illustrated in the embodiment of Fig. 15. Plot 1702 corresponds to the corresponding output signals when the magnetic flux through the dc-SQUID is tuned. As can be seen form plot 1702, the amplitude of the output signal can be controlled by tuning the magnetic flux through the dc-SQUID.

[0131] Fig. 18 illustrates a plot representation of output signals according to an embodiment.

[0132] The output signal illustrated in the embodiment of Fig. 18 are obtained by feeding a sinusoidal common activation signal to a driver cell. Curve 1801 corresponds to driver cell comprising one Josephson junction, curve 1802 corresponds to driver cell comprising two Josephson junctions in series, and curve 1803 corresponds to driver cell comprising three Josephson junctions in series. The current values indicated in Fig. 18 refer to the critical currents of the individual Josephson junctions.

[0133] The maximum output flux amplitude of the simple driver cell into the output inductive element 202 can be 0.5O, where (Pois the magnetic flux quantum. Inductive coupling between the common activation signal line 101 and the driver cell 102 can determine the fraction that reaches the quantum computing element 105.

[0134] To reach, for example , 5GHz to 4GHz frequency tuning of the quantum computing element 105 , sinceand f / fmnr=0-^ is reali zed at 0.28 A , direct inductive coupling of k > 0.56 may be needed to reach this amplitude . The direct inductive coupling refers to the inductively coupling between a driver cell and a corresponding quantum computing element . I f a low inductance output is chosen, the gain is / Ltc, where LTCis the AQFP inductance of the tunable-coupler pickup loop . Here , LAQFP refers to the inductance of the output inductive element 202 or any equivalent inductive element and LTCrefers to the inductive of a coupler loop of the corresponding quantum computing element , such as a SQUID of a qubit .

[0135] The Suzuki stack can increase the output flux proportionally . However, circuit parameters should be carefully tuned to avoid unwanted flux j umps . For example, small fabrication parameter variation, such as 1 - 3 % , may be needed .

[0136] Fig . 19 illustrates a plot representation of output signals according to an embodiment .

[0137] The embodiment of Fig . 19 illustrated output signals . Each output signal corresponds to a different de offset in the common activation signal . Curve 1901 corresponds to a OA de offset , curve 1902 corresponds to a 0 . 25 mA de offset, curve 1903 corresponds to a 0 . 5mA de offset, curve 1904 corresponds to a 0.75 mA de offset, curve 1905 corresponds to a 1 mA de offset, and curve 1906 corresponds to a 1.25 mA de offset.

[0138] The magnitude of the effect of clock de offset on the amplitude of the output signal depends on the circuit parameters of the arrangement 100. In the embodiment of Fig. 19, the effect is minimized via the selection of the circuit parameters, but the effect still exists to a lesser extent. It may be desirable to minimize this effect and the remaining effects can be compensated by amplitude adjustment circuits.

[0139] Fig. 20 illustrates a plot representation of output signals according to an embodiment.

[0140] The output signal illustrated in the embodiment of Fig. 20 are in response to a sinusoidal common activation signal. Curve 2001 corresponds to a tunable inductance of 0.5 nH, curve 2002 corresponds to a tunable inductance of 0.8 nH, curve 2003 corresponds to a tunable inductance of 1 nH, curve 2004 corresponds to an inductance of 1.3 nH, curve 2005 corresponds to a tunable inductance of 1.5 nH, and curve 2006 corresponds to a tunable inductance of 1.8 nH. Thus, the amplitude of the output signal can be tuned via the at least one tunable inductance, such as a SQUID.

[0141] Any range or device value given herein may be extended or altered without losing the effect sought. Also any embodiment may be combined with another embodiment unless explicitly disallowed.

[0142] Although the subj ect matter has been described in language specific to structural features and / or acts , it is to be understood that the subj ect matter defined in the appended claims is not necessarily limited to the specific features or acts described above . Rather, the specific features and acts described above are disclosed as examples of implementing the claims and other equivalent features and acts are intended to be within the scope of the claims .

[0143] It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments . The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benef its and advantages . It wi ll further be understood that reference to ' an ' item may refer to one or more of those items .

[0144] The steps of the methods described herein may be carried out in any suitable order, or simultaneously where appropriate . Additionally, individual blocks may be deleted from any of the methods without departing from the spirit and scope of the subj ect matter described herein . Aspects of any of the embodiments described above may be combined with aspects of any of the other embodiments described to form further embodiments without losing the effect sought .

[0145] The term ' comprising ' is used herein to mean including the method, blocks or elements identified, butthat such blocks or elements do not comprise an exclusive list and a method or apparatus may contain additional blocks or elements .

[0146] It will be understood that the above descrip- tion is given by way of example only and that various modif ications may be made by those s kil led in the art . The above specification, examples and data provide a complete description of the structure and use of exemplary embodiments . Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments , those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the spirit or scope of this specifica- tion .

Claims

CLAIMS :1 . An arrangement for tuning a plurality of quantum computing elements based on a common activation signal , the arrangement comprising : a common activation signal line for providing a common activation signal ; and a plurality of driver cells , wherein each driver cell in the plurality of driver cells is electromag- netically coupled to the common activation signal line , each driver cell in the plurality of driver cells is inductively couplable to a corresponding quantum computing element in a plurality of quantum computing elements for tuning the corresponding quantum computing element via a coupling of the common activation signal to the corresponding quantum computing element via the driver cell , and each driver cel l in the plurality of driver cells comprises at least one tunable inductance configured to control at least a magnitude of the coupling of the common activation signal to the corresponding quantum computing element .2 . The arrangement according to claim 1 , wherein each driver cell in the plurality of driver cel ls further compri ses a main current loop, wherein the driver cell is configured to control a temporal length of the coupl ing of the common activation signal to the corresponding quantum computing element based on a magnetic flux through the main current loop .3 . The arrangement according to claim 2 , the arrangement further comprising a first plurality of persistent current loops , wherein each persistent current loop in the first plurality of persistent current loops is inductively coupled to the main current loop of a corresponding driver cell in the plurality of driver cells and configured to control the magnetic flux through the main current loop .4 . The arrangement according to any preceding claim, wherein the at least one tunable inductance comprises at least one direct current superconducting interference device , dc-SQUID, and the inductance of the at least one tunable inductance is tunable via a magnetic flux through the at least one dc-SQUID .5 . The arrangement according to claim 4 , wherein the arrangement further comprises a second plurality of persistent current loops , wherein each persistent current loop in the second plurality of persistent current loops is inductively coupled to the at least one dc- SQUID of a corresponding driver cell in the plurality of driver cell s and configured to control the magnetic flux through the at least one dc-SQUID .6 . The arrangement according to any preceding claim, wherein each driver cel l in the plurality of driver cells is inductively couplable to the correspond-ing quantum computing element in the plurality of quantum computing elements via an output inductive element , wherein : the at least one tunable inductance is arranged in parallel with the output inductive element ; the at least one tunable inductance is arranged in series with the output inductive element ; and / or each driver cell in the plural ity of driver cells comprises a main current loop, wherein the output inductive element divides the main current loop into a first subloop and a second subloop, the at least one tunable inductance comprises a plurality of tunable inductances , the first subloop comprises at least one of the plurality of tunable inductances , and the second subloop comprises at least one of the plurality of tunable inductances .7 . The arrangement according to any preceding claim, further comprising at least one bit signal line , wherein each bit signal line in the at least one bit signal line is electromagnetically coupled to a corresponding driver cell in the plurality of driver cells and configured to control a polarity between the common activation signal and an output signal transmitted to the corresponding quantum computing element in response to the common activation signal via the driver cell .8 . The arrangement according to any preceding claim, wherein the at least one tunable inductance comprises a plurality of tunable inductances in seriesand / or the at least one tunable inductance comprises a plurality of Josephson j unctions in series .9 . The arrangement according to any preceding claim, wherein each quantum computing element in the plurality of quantum computing elements comprises a qubit or a coupler between qubits .10 . The arrangement according to any preceding claim, wherein the tuning the corresponding quantum computing element comprises tuning an effective inductance of the corresponding quantum computing element and / or tuning a frequency of the corresponding quantum computing element .11 . The arrangement according to any preceding claim, wherein each quantum computing element in the plurality of quantum computing elements comprises at least one superconducting interference device , SQUID, and each driver cell in the plurality of driver cel ls is inductively couplable to the at least one SQUID of a corresponding quantum computing element in the plurality of quantum computing elements for tuning the corresponding quantum computing element via tuning a magnetic flux through the at least one SQUID .12 . The arrangement according to any preceding claim, wherein the plurality of driver cells comprises at least one driver cell pair, wherein each of the at least one driver cel l pair is inductively couplable toa corresponding quantum computing element in the plurality of quantum computing elements for tuning the corresponding quantum computing element via the coupling of the common activation signal to the corresponding quantum computing element via the driver cell pair .13 . A quantum computing system comprising the arrangement according to any preceding claim, a plurality of qubits and / or a plurality of tunable couplers , wherein each driver cel l in the plurality of driver cells is inductively coupled to a corresponding qubit in the plurality of qubits and / or a corresponding coupler in the plurality of tunable couplers .14 . A method for tuning a plurality of quantum computing elements based on a common activation signal using the arrangement according to any of claims 1 - 12 , the method comprising : providing a common activation signal to the common activation signal line ; and tuning the at least one tunable inductance of at least one driver cell in the plurality of driver cells to control at least a magnitude of the coupl ing of the common activation signal to the corresponding quantum computing element .

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