Coupling arrangement for quantum computing

Abstract

According to an embodiment, an arrangement for quantum computing comprises a ground plane (110), a qubit (120), and a flux coupler (130). The ground plane divides space into a first half-space and a second half-space. A first opening (101) and a second opening (102) are formed in the ground plane (110). A slit (103) formed in the ground plane (110) extends from the first opening (101) to the second opening (102). The qubit (120) is disposed in the first half-space. A projection of the qubit (120) on the ground plane (110) at least partly overlaps with the first opening (101). The flux coupler (130) is disposed in the second half-space. A projection of the flux coupler (130) on the ground plane at least partly overlaps with the second opening (102).

Description

COUPLING ARRANGEMENT FOR QUANTUM COMPUTINGTECHNICAL FIELD[1] The present disclosure relates to quantum computing, and more particularly to an arrangement for quantum computing and to a quantum computing system .BACKGROUND

[0002] Conventional flux coupler structures suffer from an inherent trade-off between the inductive coupling strength and a qubit decay mechanism arising from capacitive coupling between the qubit and the flux bias coil . As a result , the magnitude of current necessary for flux tuning and flux pulses using conventional structures is rather high (e . g . , order of a few milliamps ) . This makes it difficult to meet the millikelvin power budgets in large quantum computing systems .SUMMARY[3] This summary is provided to introduce a selection of concepts in a s implif ied form that are further described below in the detailed description . This summary is not intended to identify key features or essential features of the claimed subj ect matter, nor is it intended to be used to limit the scope of the claimed subj ect matter .

[0004] It is an obj ective to provide an arrangement for quantum computing and to a quantum computing system . The foregoing and other obj ectives are achieved by thefeatures of the independent claims . Further implementation forms are apparent from the dependent claims , the description and the figures .[5] At least some embodiments provide an arrangement which reduces the capacitive coupling between the qubit and the flux coupler . As a result , the energy decay of the qubit through the flux coupler is reduced .

[0006] In at least some embodiments , this improvement is accomplished by screening the feed coil capacitance with a ground plane and coupling the qubit and flux coupler via a slit in the ground plane .

[0007] At least some embodiments reduce the magnitude of current necessary for flux tuning and / or flux pulses .[8] At least some embodiments allow flip-chip stack-up .

[0009] According to a first aspect , an arrangement for quantum computing comprises a ground plane , a qubit , and a flux coupler . The ground plane divides space into a first half-space and a second half -space . A first opening and a second opening are formed in the ground plane . A slit formed in the ground plane extends from the first opening to the second opening . The qubit disposed in the first half-space . A proj ection of the qubit on the ground plane at least partly overlaps with the first opening . A flux coupler is disposed in the second halfspace . A proj ection of the flux coupler on the ground plane at least partly overlaps with the second opening .

[0010] According to an example embodiment of the first aspect , the ground plane is a superconducting layer .

[0011] According to an example embodiment of the first aspect , the qubit comprises a qubit coil of superconducting metal .

[0012] According to an example embodiment of the first aspect , a proj ection of the qubit coil on the ground plane at least partly overlaps with the first opening .

[0013] According to an example embodiment of the first aspect , a proj ection of the qubit coil on the ground plane surrounds the first opening .

[0014] According to an example embodiment of the first aspect , a proj ection of the qubit coil on the ground plane fits into the first opening .

[0015] According to an example embodiment of the first aspect , the qubit coil is mounted paral lel to the ground plane .

[0016] According to an example embodiment of the first aspect , a centre of the qubit coil is aligned with a centre of the first opening in a direction perpendicular to the ground plane .

[0017] According to an example embodiment of the first aspect , the flux coupler comprises a feed coil of superconducting metal .

[0018] According to an example embodiment of the first aspect , the feed coil is mounted parallel to the ground plane .

[0019] According to an example embodiment of the first aspect , a centre of the feed coil is aligned with a centre of the second opening in a direction perpendicular to the ground plane .

[0020] According to an example embodiment of the first aspect , a proj ection of the feed coil on the ground plane at least partly overlaps with the second opening .

[0021] According to an example embodiment of the first aspect , a proj ection of the feed coil on the ground plane surrounds the second opening .

[0022] According to an example embodiment of the first aspect , the qubit is integrated on a Quantum Processing Unit -QPU- chip, the QPU chip being mounted parallel to the ground plane .

[0023] According to an example embodiment of the first aspect , the QPU chip is mounted on the ground plane via flip-chip .

[0024] According to an example embodiment of the first aspect , the qubit is a flux qubit .

[0025] According to an example embodiment of the first aspect , the superconducting ground plane , the qubit , and the flux coupler are located inside the cryostat .

[0026] According to a second aspect , a quantum computing system comprises a plurality of arrangements according to any embodiment of the first aspect .

[0027] Many of the attendant features wil l be more readily appreciated as they become better understood by reference to the following detailed description considered in connection with the accompanying drawings .DESCRIPTION OF THE DRAWINGS

[0028] In the following, example embodiments are described in more detail with reference to the attached figures and drawings , in which :

[0029] Fig . 1A is a three-dimensional view of an arrangement for quantum computing according to an example embodiment ;

[0030] Fig . IB is another three-dimensional view of the arrangement of Fig . 1A;

[0031] Fig . 1C is a proj ected view of the arrangement of FIG . 1A on the ground plane ;

[0032] Fig. ID is a cross-sectional view of the arrangement of FIG. IB in sectional plane Pl;

[0033] Fig. 2 is a projected view of an arrangement on the ground plane according to an example embodiment;

[0034] Fig. 3A is a cross-sectional view of the arrangement of FIG. IB in sectional plane P2;

[0035] Fig. 3B is a cross-sectional view of the arrangement of FIG. IB in sectional plane P3;

[0036] Fig. 3C is a projected view of the arrangement of FIG. 1A on a sectional plane;

[0037] Fig. 4A illustrates a magnetic flux density z- component of a baseline arrangement for quantum computing;

[0038] Fig. 4B illustrates an electric field of the baseline arrangement of Fig. 4A;

[0039] Fig. 5A illustrates a magnetic flux density z- component of an arrangement for quantum computing according to an example embodiment;

[0040] Fig. 5B illustrates an electric field of the arrangement of Fig. 5A;

[0041] Fig. 6A illustrates a circuit analysis of an example embodiment;

[0042] Fig. 6B illustrates a circuit analysis of another example embodiment.

[0043] I n the following, like reference numerals are used to designate like parts in the accompanying draw- rngs .DETAILED DESCRIPTION

[0044] I n the following description, reference is made to the accompanying drawings, which form part of thedisclosure , and in which are shown, by way of illustration, specific aspects in which the present disclosure may be placed . It is understood that other aspects may be utilised, and structural or logical changes may be made without departing from the scope of the present disclosure . The following detailed description, therefore , is not to be taken in a limiting sense , as the scope of the present disclosure is defined be the appended claims .

[0045] For instance , it is understood that a disclosure in connection with a described method may also hold true for a corresponding device or system configured to perform the method and vice versa . For example , if a specific method step is described, a corresponding device may include a unit to perform the described method step, even if such unit is not explicitly described or il lustrated in the f igures . On the other hand, for example , if a specific apparatus is described based on functional units , a corresponding method may include a step performing the described functionality, even if such step is not explicitly described or illustrated in the figures . Further, it is understood that the features of the various example aspects described herein may be combined with each other, unless specifically noted otherwise .

[0046] Fig . 1A is a three-dimensional view of an arrangement for quantum computing according to an example embodiment . Fig . IB is another three-dimensional view of the arrangement of Fig . 1A .

[0047] According to an embodiment , the arrangement 100 comprises a ground plane 110 , a qubit 120 , and a flux coupler 130 .

[0048] Fig. 1C is a projected view of the arrangement of Fig. 1A on the ground plane 110.

[0049] Fig. ID is a cross-sectional view of the arrangement of FIG. IB in sectional plane Pl.

[0050] The flux coupler 130 may be configured to tune a frequency of the qubit. In particular, the flux coupler 130 may be configured to flux bias the qubit 120.

[0051] The qubit 120 may be, for example, a superconducting qubit, such as a transmon qubit, a flux qubit, a charge qubit, a phase qubit, a fluxonium qubit, or a unimon qubit.

[0052] Although some embodiments may be disclosed herein with reference to a certain type of qubit, these qubit types are only exemplarily. In any embodiment disclosed herein, the plurality of qubits may be implemented in various ways and using various technologies.

[0053] The arrangement may be completely or partially placed in one or more cryostats, such as cryostats equipped with one or more dilution refrigerators. In particular, the qubit 120, coupler 120, and the ground plane 110 can be placed in one or more dilution refrigerators. A dilution refrigerator may also be referred to as a cryostat.

[0054] The ground plane 110 may be a superconducting layer. The ground plane 110 may comprise a superconducting material. The superconducting material may be a superconducting metal, such as Niobium or Aluminium, or any other superconducting material, or combination of superconducting materials.

[0055] A first opening 101 and a second opening 102 are formed in the ground plane 110. A slit 103 is formed in the ground plane 110. The slit 103 connects the firstopening 101 and the second opening 102. The slit 103 extends from the first opening 101 to the second opening 102. The first opening 101 is formed at a first end of the slit 103, and the second opening 102 at a second end of the slit 103.

[0056] As illustrated by FIG. ID, the ground plane 110 divides space into a first half-space 111 and a second half-space 112. The qubit 120 is disposed in the first half-space 111. The flux coupler 130 is disposed in the second half-space 112.

[0057] The ground plane 110 has a first face 113 and a second face 114. The first face 113 faces the first half-space 111. The second face 114 faces the second half-space 112.

[0058] The qubit 120 faces the first opening 101 from a first side of the superconducting ground plane 110 (i.e., the first half-space 111) . The flux coupler 130 faces the second opening 102 from a second side of the ground plane 110 (i.e., the second half-space 112) .

[0059] A projection of the qubit 120 on the ground plane 110 at least partly overlaps with the first opening 101. A projection of the flux coupler 130 on the ground plane 110 at least partly overlaps with the second opening 102.

[0060] The qubit 120 may comprise a qubit coil 121 of superconducting metal. The qubit coil 121 may comprise one or more loops of the superconducting material that may be interrupted by one or more Josephson junctions.

[0061] The superconducting material may be a superconducting metal, such as Niobium or Aluminium, or any other superconducting material, or combination of superconducting materials.

[0062] The flux coupler 130 comprises a feed coil 131 The feed coil 131 may also be called flux bias coil. The feed coil 131 may comprise one or more loops of the superconducting material.

[0063] The superconducting material may be a superconducting metal, such as Niobium or Aluminium, or any other superconducting material, or combination of superconducting materials.

[0064] The feed coil 131 is inductively coupled to the qubit coil 121. Flux bias may be achieved by feeding current to the feed coil 131. A persistent current circuit may be configured to feed persistent current into the feed coil 131 to flux bias the qubit 120.

[0065] The qubit coil 121 and / or the feed coil 131 may be mounted parallel to the ground plane 110.

[0066] The qubit coil 121 faces the first opening 101. In other words, a (e.g., orthogonal) projection of the qubit coil 121 on the ground plane 110 at least partly overlaps with the first opening 101. In particular, a centre of the qubit coil 121 may be aligned with a centre of the first opening 101 in a direction perpendicular to the ground plane 110. In some embodiments, the projection of the qubit coil 121 on the ground plane 110 surrounds the first opening 101. In other embodiments, the projection of the qubit coil 121 on the ground plane 110 fits into the first opening 101.

[0067] The feed coil 131 faces the second opening 102. In other words, a (e.g., orthogonal) projection of the feed coil 131 on the ground plane 110 at least partly overlaps with the second opening 102. In particular, a centre of the feed coil 131 may be aligned with a centre of the second opening 102 in a direction perpendicularto the ground plane 110. In some embodiments, a projection of the feed coil 131 on the ground plane 110 surrounds the second opening 102. In other embodiments, a projection of the feed coil 131 on the ground plane 110 fits into the second opening 102.

[0068] The qubit coil 131 and the feed coil 121 do not face each other. In other words, the projection of the qubit coil 131 on the ground plane 110 does not overlap with the projection of the feed coil 121 on the ground plane 110.

[0069] The superconducting ground plane 110 screens the feed coil capacitance. The qubit 120 and the flux coupler 130 are inductively coupled via the slit 103 in the ground plane 110. The slit 103 couples flux from the feed coil 131 to the qubit coil 121.

[0070] This reduces the capacitive coupling between the qubit and the flux coupler. This result in decreased energy decay of the qubit through the flux coupler. Assuming that the real part of the flux coupler impedance is the only decay channel, in at least some embodiments, T1 (thermal relaxation time) can be in the ballpark of minutes.

[0071] The slit and openings form a flux transport (or transformer) structure between the qubit coil 121 and feed coil 131. A total flux through the flux transport structure is zero. While the total flux through the flux transport structure is zero, there can be nonzero flux locally at different locations along the flux transport structure. This local flux induces a screening current in the qubit coil 121.

[0072] The qubit coil 121 is a zero-resistance inductive loop. The screening current in the qubit coil 121 screens external flux.

[0073] To tune the qubit, a tuning current may be fed into the feed coil 131. This induces a screening current in the qubit coil 121. The net flux through the qubit coil 121 is screened by the screening current induced in the qubit coil 121 during qubit tuning.

[0074] Current can be fed into the feed coil 131 by different mechanisms. These mechanisms may involve a break in superconductivity. For example, inductive loops interrupted by shunted Josephson junctions allow depositing flux quanta into the loop by application of sufficiently strong external flux pulses. By this mechanism, there can be net non-zero flux in the feed coil.

[0075] The first opening 101 and / or the second opening 102 may have a rectangular shape.

[0076] I n example embodiments, the first opening 101 has approximatively the same dimensions as the qubit coil 121. The first opening 101 may be larger or smaller than the qubit coil 121. In particular, a ratio of a main dimension (e.g., length) of the first opening 101 by a main dimension (e.g., length) of the qubit coil 121 may be more than 0.5, or more than 0.8, or more than 0.9, and / or less than 1.1, or less than 1.2 or less than 2.

[0077] I n example embodiments, the second opening 102 has approximatively the same dimensions as the feed coil 131. The second opening 102 may be larger or smaller than the feed coil 131. In particular, a ratio of a main dimension (e.g., length) of the second opening 102 by a main dimension (e.g., length) of the feed coil 131 maybe more than 0.5, or more than 0.8, or more than 0.9, and / or less than 1.1, or less than 1.2 or less than 2.

[0078] A width of the slit 103 may be as small as the fabrication parameters permit. In practice, the slit width may be around 1 pm, or even as small as 0.1 pm. In example embodiments, the slit width may be less than 10 pm, or less than 1 pm or less than 0.5 pm.

[0079] I n example embodiments, the slit length may more than 50 pm, or more than 100 pm, and / or less than 400 pm, or less than less than 500 pm.

[0080] In an example embodiment, the first opening 101 dimensions are 12x8 pm, the slit width is 1 pm, the slit length is 100 pm, and the second opening 102 dimensions are 20x20 pm.

[0081] As illustrated by Fig. 2, an arrangement 200 may comprise a plurality of qubits 120 (e.g., 120-1, 120-2) , each qubit 120 (e.g., 120-1, 120-2) being coupled to a respective flux coupler 130 (e.g., 130-1, 130- 2) via a respective slit 103 (e.g., 103-1, 103-2) in the ground plane 110.

[0082] A distance between two slits 103 (e.g., 103-1, 103-2) may be more than 150 pm and / or less than 2 mm.

[0083] Simulations show that the crosstalk (e.g., normalized mutual inductance from a qubit to the flux coupler coupled to the neighbouring qubit) is low (<1%) .

[0084] Fig. 4A illustrates a magnetic flux density z- component of a baseline arrangement. Fig. 4B illustrates an electric field of the same baseline arrangement. According to the baseline arrangement, the qubit coil faces the feed coil. Figs 4A and Fig. 4B show the capacitive coupling between the qubit and the feed coil in the baseline arrangement.

[0085] Fig. 5A illustrates a magnetic flux density z- component of an arrangement according to an example embodiment. Fig. 5B illustrates an electric field of the same example embodiment. As illustrated by FIGs 5A and 5B, the qubit 120 and the flux coupler 130 are inductively coupled via the slit 103. The capacitive coupling between the qubit 120 and the flux coupler 130 is reduced .

[0086] Simulations for the example embodiment (illustrated by FIGs 5A and 5B) show a ratio of the mutual inductance to the capacitive coupling (L / C) of 2.1e-12 H / 2.2e-20 F = 97e6 H / F. In comparison, simulations for the baseline arrangement with a qubit coil facing a feed coil (illustrated by FIG. 4A and 4B) show a L / C of 1. eil H / 1.2e-15 F = 14e3 H / F. The example embodiment thus improves L / C by a factor 7000.

[0087] S imulations for example embodiments predict a mutual inductance of 1.2 pH, a mutual inductance of 0.4 nH for the feed coil, and a capacitance of one turn of coil of 4e-19 F.

[0088] Simulations for example embodiments predict a reduction (in comparison to the baseline arrangement) of the inductive coupling by a factor of 10, while the capacitive coupling is reduced by a factor of 1000.

[0089] In at least some embodiments, the capacitive coupling C is so low that if real part of the capacitance and real part of the impedance were the only limiting factors, T1 (thermal relaxation time) may be in the order of seconds or even minutes.

[0090] As illustrated by FIG. 3A to 3C, the qubit 101 may be integrated on a quantum processing unit (QPU)

[0091] The flux coupler 130 may be integrated on a wiring chip 132 (e.g., a so-called interposer (chip) or persistent current layer (PCL) chip) . The wiring chip 132 may supply persistent current to provide a static magnetic field to the flux coupler. The wiring chip 132 may comprise single flux quantum (SFQ) electronics.

[0092] The ground plane 110 may be integrated on the wiring chip 132.

[0093] The feed coil 131 may be directly mounted on the second face 114 of the ground plane 110 or mounted at a distance from the ground plane 110.

[0094] The QPU 122 chip is separated from the wiring chip 132. The QPU 122 chip may be mounted parallel to the wiring chip 132. A distance between the QPU chip 122 and the wiring chip 132 may be e.g., in a range of 0.1- 500 pm, or 5-50 pm.

[0095] The QPU chip 122 may be mounted on the wiring chip 132 via flip-chip (also known as controlled collapse chip connection) . In particular, the QPU chip 122 may be secured to the wiring chip 132 with bump bonds 301.

[0096] The bump bonds 301 may comprise a superconducting material, such as Indium. In particular, the material of the bump bonds may be different from the superconducting material of the ground plane 110 and / or the qubit coil and / or the feed coil. The bump material may contribute to filtering of pair breaking frequencies from entering the QPU chip from other chips.

[0097] The features disclosed herein can be implemented in various different integration levels. For example, different QPU cores can be on a same chip or the QPU cores can be on different chips in a single package.The package can be based on connecting the chips by wire bonding, or there can be a flip-chip solution with one or more carrier chips connecting to one or more QPU cores .

[0098] Fig. 6A illustrates a circuit analysis of an example embodiment.

[0099] The qubit 620 is connected to the ground via a resistance 601 (e.g., R1 = 50Q) of the persistent current circuit. The capacitive coupling between the qubit and the feed coil oscillates across the resistance 601. This results in energy decay of the qubit.

[0100] Fig. 6B illustrates a circuit analysis of another example embodiment.

[0101] The qubit 620 has a symmetrical connection to the ground. In practice, this may be achieved by designing (e.g., with the help of simulation) a geometry of the layout (e.g., physical implementation of metal on chip) such that no detrimental asymmetries are present. The capacitive coupling between the qubit and the feed coil does not generate a difference across the resistance 601 of the persistent current circuit. In other words, because of the symmetrical connection of the qubit to the ground there is the same voltage on both sides of the resistance 601. As a result, the capacitive coupling between the qubit and the feed coil does not dissipate in the resistance 601. This reduces (or supresses) the energy decay of the qubit. In other words, the energy transfer is orthogonal to the qubit mode. As such, the qubit mode does not couple to the dissipation in the persistent current circuit.[1] Any range or device value given herein may be extended or altered without losing the effect sought.Also any embodiment may be combined with another embodiment unless explicitly disallowed .

[0002] Although the subj ect matter has been described in language specific to structural features and / or acts , it is to be understood that the subj ect matter defined in the appended claims is not necessarily limited to the specific features or acts described above . Rather, the specific features and acts described above are disclosed as examples of implementing the claims and other equivalent features and acts are intended to be within the scope of the claims .[3] It will be understood that the benefits and advantages described above may relate to one embodiment or may relate to several embodiments . The embodiments are not limited to those that solve any or all of the stated problems or those that have any or all of the stated benef its and advantages . It wi ll further be understood that reference to ' an ' item may refer to one or more of those items .

[0004] The steps of the methods described herein may be carried out in any suitable order, or simultaneously where appropriate . Additionally, individual blocks may be deleted from any of the methods without departing from the spirit and scope of the subj ect matter described herein . Aspects of any of the embodiments described above may be combined with aspects of any of the other embodiments described to form further embodiments without losing the effect sought .[5] The term ' comprising ' is used herein to mean including the method, blocks or elements identified, butthat such blocks or elements do not comprise an exclusive list and a method or apparatus may contain additional blocks or elements .

[0006] It will be understood that the above descrip- tion is given by way of example only and that various modif ications may be made by those s kil led in the art . The above specification, examples and data provide a complete description of the structure and use of exemplary embodiments . Although various embodiments have been described above with a certain degree of particularity, or with reference to one or more individual embodiments , those skilled in the art could make numerous alterations to the disclosed embodiments without departing from the scope of this specification .

Claims

CLAIMS :

1. An arrangement (100) for quantum computing, comprising : a ground plane (110) , the ground plane dividing space into a first half-space and a second half-space, a first opening (101) and a second opening (102) being formed in the ground plane (110) , wherein a slit (103) formed in the ground plane (110) extends from the first opening (101) to the second opening (102) ; a qubit (120) disposed in the first half-space, wherein a projection of the qubit (120) on the ground plane (110) at least partly overlaps with the first opening (101) ; and a flux coupler (130) disposed in the second halfspace, wherein a projection of the flux coupler (130) on the ground plane at least partly overlaps with the second opening (102) .

2. The arrangement (100) according to any preceding claim, wherein the ground plane (110) is a superconducting layer.

3. The arrangement (100) according to any preceding claim, wherein the qubit (120) comprises a qubit coil (121) of superconducting metal, wherein a projection of the qubit coil (121) on the ground plane (110) at least partly overlaps with the first opening (101) .

4. The arrangement (100) according to claim 3, wherein a projection of the qubit coil (121) on the ground plane (110) surrounds the first opening (101) .

5. The arrangement (100) according to claim 3, wherein a projection of the qubit coil (121) on the ground plane (110) fits into the first opening (101) .

6. The arrangement (100) according to any of claims 3 to 5, wherein the qubit coil (121) is mounted parallel to the ground plane (110) , a centre of the qubit coil (121) being aligned with a centre of the first opening(101) in a direction perpendicular to the ground plane (110) .

7. The arrangement (100) according to any preceding claim, wherein the flux coupler (130) comprises a feed coil (131) of superconducting metal, wherein a projection of the feed coil (131) on the ground plane at least partly overlaps with the second opening (102) .

8. The arrangement (100) according to the preceding claim, wherein the feed coil (131) is mounted parallel to the ground plane (110) , a centre of the feed coil (131) being aligned with a centre of the second opening(102) in a direction perpendicular to the ground plane (110) .

9. The arrangement (100) according to claim 7 or 8, wherein a projection of the feed coil (131) on the ground plane (110) surrounds the second opening (102) .

10. The arrangement (100) according to any preceding claim, wherein the qubit (120) is integrated on aQuantum Processing Unit -QPU- chip, the QPU chip being mounted parallel to the ground plane (110) .

11. The arrangement (100) according to the preced- ing claim, wherein the QPU chip is mounted on the ground plane (110) via flip-chip.

12. The arrangement (100) according to any preceding claim, wherein the qubit (120) is a flux qubit.

13. The arrangement (100) according to any preceding claim further comprising a cryostat, wherein the superconducting ground plane (110) , the qubit (120) , and the flux coupler (130) are located inside the cryostat.

14. A quantum computing system comprising a plurality of arrangements (100) according to any preceding claim.

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