Method for reading out the states of several qubits, in particular super-conducting qubits and / or spin qubits, read-out device and quantum computer

Abstract

The present invention relates to a method for reading out the states of several qubits (Q1-Qn), in particular superconducting qubits and / or spin qubits, wherein for reading out the states, the same sample signal (7) is supplied to the qubits (Q1-Qn) via a common sample line (8), and wherein a separate answer circuit (5), preferably having an answer resonator (4), is assigned to each qubit (Q1-Qn), and wherein in response to the supplied sample signal (7) an answer signal (20) containing information about the state of the respective qubit (Q1-Qn) is output via the respective answer circuit (5), wherein the answer signal (20) of at least one qubit (Q1-Qn) is delayed with respect to the answer signal (20) of at least one further qubit (Q1-Qn). The invention also relates to a read-out device and to a quantum computer.

Description

[0001] DESCRIPTION

[0002] Method for reading the states of several qubits, in particular superconducting qubits and / or spin qubits, readout device and quantum computer

[0003] The invention relates to a method for reading the states of multiple qubits, in particular superconducting qubits and / or spin qubits. The same sample signal is supplied to the qubits via a common sample line for reading the states. Each qubit is assigned its own response circuit, preferably comprising a response resonator. In response to the supplied sample signal, a response signal containing information about the state of the respective qubit is output via the respective response circuit. Furthermore, the invention relates to a readout device and a quantum computer.

[0004] Two essential requirements for the realization of a quantum computer are, firstly, the ability to manipulate a register of qubits and, secondly, the ability to read their state. Currently, registers of three to seven superconducting qubits can be manipulated, and it is possible to read multiple qubits simultaneously. Either a common readout resonator can be used for the multiple qubits, as described in the article “Preparation and measurement of three-qubit entanglement in a superconducting circuit” by DiCarlo, L., Reed, M., Sun, L. et al., Nature 467, 574-578 (2010). https: / / doi.org / 10.1038 / nature09416, or dedicated electronics are used for each qubit, in particular a separate readout resonator for each qubit, as described in the article “Generation of three-qubit entangled states using superconducting phase qubits” by Neeley, M., Bialczak, R., Lenander, M. et al., Nature 467, 570-573 (2010) https: / / doi.org / 10.1038 / nature09416.1038 / nature09418.

[0005] The paper "Two-Qubit State Tomography Using a Joint Dispersive Readout" by S. Filipp et al., PRL 102, 200402 (2009) further describes the joint, simultaneous readout of two superconducting qubits. Both qubits are assigned a common response circuit in the form of a response resonator connected to both qubits.

[0006] For the field of quantum circuits, a readout scheme would be desirable whose complexity does not increase proportionally with the number of qubits involved and which also enables the readout of more than two qubits.

[0007] A known approach involves reading out multiple qubits in parallel using frequency division multiplexing (FDM). This is described in the papers "Frequency Division Multiplexing Readout and Simultaneous Manipulation of an Array of Flux Qubits" by M. Jerger et al., arXiv: 1205.6375v2 [quant-ph], July 12, 2012, and "Multiplexed readout of four qubits in 3D circuit QED architecture using broadband Josephson parametric amplifier" by S. Kundu et al., Appl. Phys. Lett 114, 172601 (2019) https: / / doi.org / 10.1063 / 1.5089729. The advantage of this technique is that it is, in principle, scalable to any number of qubits. The architecture of this approach includes response resonators with different frequencies for the individual qubits, all of which are addressed via a single, common sample line, which also connects the qubit chip to readout electronics.The use of different frequencies and corresponding response resonators makes it possible to distinguish the response signals of the different qubits in parallel or simultaneous readout scenarios. The common sample line is provided by a microwave transmission line. This frequency-selective approach also requires N individual microwave frequencies to read out N qubits. A fast digital-to-analog converter (DAC) synthesizes N specific sub-GHz baseband signal tones for the individual qubits, as many tones as desired within the available bandwidth. These tones are then upconverted to the desired response resonator frequency of a few GHz using a reference microwave source and a two-quadrature (IQ) mixer.The generated multi-tone sample signal is transmitted via an on-chip sample line coupled to the individual qubit response resonators at different frequencies. The transmitted signal is downconverted to baseband frequencies, in other words, demodulated, and digitized using a fast analog-to-digital converter (ADC). The amplitude and phase change of each transmitted tone are then obtained from the quadrature I and Q using a fast Fourier transform. Quantum manipulation and readout of N qubits according to this scheme require the generation of N microwave tones in addition to the readout tones.

[0008] A disadvantage of the FDM-based approach is that it requires a wide-bandwidth amplifier and, consequently, a low signal-to-noise ratio (SNR). For the simultaneous readout of multiple qubits, a multi-frequency sample signal must be generated that addresses all response resonators or their resonance cavities. The frequencies, which are selected at a spacing of 70 to 100 MHz, should be grouped into a baseband. This results in a relatively wide baseband and a low signal-to-noise ratio. A base bandwidth of approximately 1 GHz is required to implement frequency-division multiplexing of seven qubits.

[0009] The low signal-to-noise ratio increases the number of readout cycles to obtain reliable information about the states of the qubits.

[0010] It is an object of the present invention to provide a method for reading out a plurality of qubits of the type mentioned above, the complexity of which does not increase proportionally with the number of qubits involved and which is simultaneously characterized by an improved signal-to-noise ratio.

[0011] This object is achieved in a method for reading out the states of several qubits of the type mentioned above in that the response signal of at least one qubit is delayed compared to the response signal of at least one further qubit.

[0012] In an expedient embodiment of the method according to the invention, it is provided that the delay of the response signal of the at least one qubit is achieved with at least one delay device assigned to the response circuit of the at least one qubit and / or in particular directly downstream thereof.

[0013] The invention also relates to a readout device for carrying out the readout method according to the invention, comprising a plurality of response circuits, preferably having a response resonator, which are each connected or connectable to a qubit, and at least one delay device which is assigned to at least one response circuit and / or in particular is connected directly downstream and can delay a response signal output by the at least one response circuit, which contains information about the state of a qubit.

[0014] In other words, the core idea of ​​the present invention is to use a time-multiplexed readout scheme for reading the states of multiple qubits. This makes it possible to dispense with the use of different frequencies for different qubits and response resonators of different frequencies for the different qubits. A common sample signal can be used for the multiple qubits, which is significantly narrower in bandwidth than the sample signal required in the FDM-based approach. A single microwave tone or the same narrow spectrum can be used for all qubits, and all qubits can be assigned response resonators with the same frequency. According to the invention, the response signals are differentiated according to the individual qubits not by means of different frequencies, but by time-multiplexing.Individual time delays provided for the different qubits make it possible to separate the response signals originating from different qubits with the state information, even in a common response signal, into which the several individual response signals originating from the different qubits are expediently combined before they reach a readout device. According to the invention, the response signals are thus separated or kept apart not in frequency, but in time, in order to be able to assign them to the individual qubits.

[0015] Using the invention, it becomes possible to reduce the bandwidth of the analog chain, for example, to as little as 10 MHz. Compared to the 1 GHz bandwidth of the FDM-based approach, this corresponds to a reduction by a factor of 100. The inventive approach can also simplify real-time processing technology, as it is highly suitable for processing in the time domain, for example, in an FPGA (Field Programmable Gate Array). Compared to the FDM approach, the invention essentially shifts the frequency domain, which is not well suited to FPGAs, to the time domain, since all responses have the same frequency or at least approximately the same narrow frequency spectrum.

[0016] Measurement time can also be reduced because reliable measurements are obtained thanks to low-noise responses. Only a few measurement cycles are required for statistical analysis, which also allows for a reduction in measurement time.

[0017] A higher signal-to-noise ratio is achieved compared to the state of the art, particularly the FDM approach. At the same time, simpler hardware can be used. With the method and readout device according to the invention, more than two qubits, for example, eight qubits or more than 8 qubits, can be read out.

[0018] It is advisable to provide or use separate response resonators for the qubits. In particular, a separate response resonator can be provided or used for each qubit.

[0019] The response signals will typically exhibit a temporal progression. They can also be said to be time-varying. As noted, they can be given by wavelets or include wavelets.

[0020] The delay of the response signal of the at least one qubit according to the invention is expediently carried out in such a way that the temporal profile of the response signal is maintained. In other words, after the delay of the response signal, in particular after the respective response signal has passed through at least one delay device, a time-variable response signal is still present. This differs from an alternative method known to the applicant, in which individual values ​​representing a qubit state are transferred to sample-and-hold modules and held there as static values.

[0021] Within the scope of the invention, a common sample signal is expediently emitted for all qubits, e.g., by a sample signal generating device, and fed to the multiple qubits, rather than emitting multiple sample signals for the multiple qubits one after the other, which reach the qubits at different times. Expediently, the sample signal arrives at the response circuits of the multiple qubits, in particular their response resonators, simultaneously. The readout device according to the invention is designed accordingly in an advantageous development.

[0022] This can be achieved, for example, by routing the sample signal from a central sample signal generating device via the common sample line toward the multiple qubits. Several branch lines branch off from the common sample line, e.g., at the end, each of which leads to a qubit. The arrangement is advantageously designed such that the path the sample signal must travel from the sample signal generating device to the respective qubit or its response resonator is the same length for all qubits, ensuring simultaneous arrival.

[0023] By applying the sample signal to all qubits simultaneously, a shorter measurement time can be achieved than would be the case if the sample signal is applied to the qubits one after the other.

[0024] The invention has proven particularly effective for spin qubits and / or superconducting qubits, especially flux qubits. However, it can in principle also be used for other types of qubits.

[0025] The multiple qubits can be arranged in an array. They can form a qubit array or be part of one. They are usually located on a chip, which can also be referred to as a qubit chip.

[0026] Within the scope of the invention, a dispersive readout of the qubit states is preferably carried out. This particularly means or includes, in particular, that the qubit states are not destroyed by the readout.

[0027] The sample signal can, for example, be a pulse-shaped signal or comprise at least one signal pulse.

[0028] The sample signal may be in the form of a wavelet or at least comprise one. A wavelet is a wave-like oscillation with an amplitude starting at zero, an amplitude increase, and a subsequent amplitude decrease back to zero.

[0029] In particular, the sample signal is a pulse-shaped signal that is synthesized using a digital-to-analog converter (DAC) and then upconverted to microwave frequencies, in particular by analog mixing with a high-frequency oscillator, especially a local one. The sample signal can also be generated directly using a high-frequency digital-to-analog converter. Alternatively or additionally, the qubit response signals can each be provided by a pulse-shaped signal or comprise at least one signal pulse. The response signals can be in the form of wavelets or comprise at least one such wavelet.

[0030] If the sample signal is pulse-shaped or comprises one or more sample pulses, the pulse duration is preferably in the range of 1 nanosecond to 200 nanoseconds. It can be provided that the pulse duration is in the range of 100 nanoseconds to 200 nanoseconds.

[0031] Short pulse durations, in particular, enable shorter measurement times. However, shorter pulse durations are associated with a larger bandwidth, which in turn can slightly worsen the signal-to-noise ratio. Thus, there is a trade-off, and particularly suitable values ​​can be selected depending on the application.

[0032] In a further advantageous embodiment, the sample signal has a bandwidth in the range of several MHz. For example, it can have a bandwidth in the range of 5 MHz to 10 MHz.

[0033] The temporal delay of the response signal(s) provided according to the invention can be implemented by means of one or more suitable delay devices. Preferably, the delay device(s) is / are designed and / or configured such that it can delay a time-variable response signal while maintaining its temporal profile. A time-variable response signal then still exhibits its temporal profile even after passing through one or more delay devices. A delay occurs while maintaining its continuous-time character. It can also be provided that the delay device is designed and / or configured, or the delay devices are designed and / or configured, to impose a non-time-discrete delay on the respective response signal.

[0034] In a further advantageous embodiment, the respective delay device(s) provides a fixed delay. The delay cannot then be changed. In particular, the respective delay device(s) cannot be externally controlled with regard to the length of the delay implemented by it.

[0035] Furthermore, it should be known which delay is implemented for each qubit. This is especially important so that the state information of the different qubits can be reliably distinguished, especially in a common response signal obtained by summation after the delay.

[0036] In a preferred embodiment, the at least one delay device can further be configured to operate at temperatures of 1 K and below, preferably 200 mK and below. It can be arranged in a region of the readout device intended and configured for low-temperature operation.

[0037] Furthermore, it may be the case that the at least one delay device is not triggerable or is not triggered within the scope of the method according to the invention.

[0038] The delay of the response signal(s) can be achieved without intermediate storage. Accordingly, it can be provided that the one or more delay devices are not designed and / or configured to intermediately store the response signals originating from the various qubits.

[0039] For example, paths of different lengths are or will be provided or implemented for the response signals in order to "offset" them in time. A delay of one response signal compared to another response signal can thus be realized in particular by a longer "path" or transmission path, for example by means of an additional electrical line or an additional electrical line section, particularly in the circuit. In other words, an additional conductor track or an additional conductor track section or a comparatively longer conductor track or a comparatively longer conductor track section can be provided for a response signal of at least one qubit, so that this response signal - compared to a response signal from another qubit - has to travel a longer path in the circuit and is shifted back in time.

[0040] Conductor tracks or conductor track sections of different lengths are a particular example of passive delay devices. These offer the advantage that they do not introduce additional heat into the low-temperature region.

[0041] One or more active delay devices can also be used. An active delay device can, for example, have at least one RC component and at least one amplifier. With regard to active delay devices, it is also advantageous that these cannot be controlled (externally). At least one RC component and at least one amplifier can each form a delay module of a delay device, and a delay device can also comprise two or more such modules. In a further development, it can then further be provided that at least two delay devices differ in the number of their delay modules.

[0042] It is possible for all response signals to be delayed to varying degrees. The readout device according to the invention can be designed and / or configured accordingly.

[0043] A further embodiment of the method according to the invention is characterized in that exactly one response signal is not delayed. If three or more qubits are read, the remaining response signals are advantageously delayed to varying degrees.

[0044] The reading device according to the invention can in turn be designed and / or configured accordingly.

[0045] For example, if only two qubits are to be read, it may be sufficient if the response signal of one qubit can be or is delayed relative to the response signal of the other qubit. In other words, the response signal of one qubit is not delayed. Especially in this case, a single delay device may be sufficient.

[0046] It is preferred that more than two qubits, in particular more than three qubits, preferably more than four qubits, particularly preferably more than five qubits, are or can be read out using the method according to the invention and / or by means of the readout device according to the invention. Accordingly, the readout device expediently comprises more than two qubit response circuits, in particular more than three, preferably more than four, particularly preferably more than five qubit response circuits, each of which preferably comprises a response resonator.

[0047] If the response circuits for the qubits each comprise a response resonator, in a preferred embodiment there is no strong coupling between the response resonators.

[0048] If N (N = 2, 3, 4, 5, ...) qubits are to be read, N delay devices can be provided. It is also possible to have N-1 delay devices for the case of N qubits to be read (since the response signal of a qubit is not delayed).

[0049] If two or more delay devices, in other words, multiple delay devices, are provided, it can be the case that different delay devices cause different delays of qubit response signals. Purely by way of example, several different delays of the response signals of different qubits can be caused or achieved by using several different lengths of conductor tracks or conductor track sections as delay devices.

[0050] If two or more delay devices are present, it is preferable that these or these are used to implement propagation or transmission paths of different lengths for the response signals of different qubits.

[0051] A further embodiment is characterized in that response signals originating from different qubits each pass through a different number of several existing delay devices. With regard to the readout device according to the invention, it can be considered that it is designed accordingly.

[0052] Purely by way of example, two (or three) qubits are to be read out and two delay devices are provided, each designed to provide the same time delay. The delay devices can, for example, be of identical construction, such as conductor tracks or lines of the same length. In this case, it can be provided that response signals originating from one of the two (or three) qubits are delayed by only one delay device, in particular by only passing through one delay device, and response signals originating from another of the two (or three) qubits are delayed by both delay devices, in particular by both delay devices. In this case, these receive a delay that is twice as long in comparison. Response signals from any third qubit, for example, can not be delayed at all. As a result, the response signals from all three qubits are separated in time.

[0053] The individual delay devices can then, for example, each cause the same delay, since a difference is achieved by a different number, although it is not excluded that they differ from each other and cause different delays.

[0054] It can also be provided that at least one of the delay devices is used to delay the response signals of at least two, in other words several, qubits.

[0055] The readout device according to the invention can be designed such that the response signals output by two different response circuits and belonging to at least two different qubits can be or are supplied to at least one of the delay devices in order to delay them.

[0056] The response signals of the multiple qubits, one or more of which have been subjected to a delay, are expediently combined, in particular summed, to obtain a common response signal, preferably within a qubit chip also comprising the qubits and / or using a passive or active circuit. In other words, multiple response signals, one or more, or possibly all, of which have been delayed, are combined, in particular added. The common response signal is expediently evaluated in the time domain.

[0057] The obtained common response signal can be given by a wavelet or at least comprise such a wavelet.

[0058] For merging, the multiple qubits or their associated delay devices can be connected directly on the output side—or indirectly via additional components—to a common transmission or readout line. The common readout line can also coincide with the sample line. In particular, the sample line is connected to both a sample signal generation device and a common readout device, so that it can serve as a (common) sample line and a (common) readout line.

[0059] If an active circuit is used, it is preferably designed as a low-power circuit. Low power is understood to mean, in particular, one in the milliwatt range. The resulting common response signal can be fed to a common readout device for further processing, preferably via the common transmission or readout line, which may coincide with the sample line. The common readout device can be part of a readout device according to the invention or can be arranged downstream of it.

[0060] The combined response signal can be digitized, allowing sampling values ​​to be captured in a conventional manner.

[0061] In particular, the common response signal can first be amplified, (optionally) down-converted, in other words demodulated, and then preferably digitized by means of an ADC and subsequently further processed, which has proven to be particularly suitable.

[0062] In a preferred embodiment, at least three qubits, preferably at least four qubits, particularly preferably at least five qubits or their response circuits are connected to a common readout line.

[0063] The common response signal, which is in particular digitized, can be analyzed in order to obtain or extract information about the states of the plurality of qubits, in particular to determine which state the qubits are in or have been in. In a further development, the readout device according to the invention is designed and / or configured accordingly. The readout device according to the invention can, for example, comprise at least one device or at least one module which is designed and / or configured accordingly. A module can also be provided by software or a combination of hardware and software. In this case, a determination can be made in a manner known per se as to which of two possible states ("1" or "0") the qubits are in or have been in. In a further development, the readout device according to the invention is designed and / or configured accordingly.The readout device according to the invention can, for example, comprise at least one device or at least one module, which is designed and / or configured accordingly. A module can also be provided by software or a combination of hardware and software.

[0064] It is possible to analyze only a portion of the joint response signal to obtain or extract information about the states of multiple qubits. For example, only a (first) rising edge of the joint response signal, particularly its front, is used. It is also possible to analyze the entire waveform of the joint response signal to obtain information about the states of multiple qubits.

[0065] In particular, it can be provided that one or more sampling points of the common response signal are determined or used in order to obtain or extract information about the states of the multiple qubits.

[0066] One embodiment is characterized in that a preferably digitized front of the common response signal is analyzed in order to extract or obtain information about the states of the multiple qubits. The readout device according to the invention is designed and / or configured accordingly in a further development. The readout device according to the invention can, for example, comprise at least one device or at least one module which is designed and / or configured accordingly. A module can also be provided by software or a combination of hardware and software.

[0067] The analysis of the front can be carried out in particular in order to separate the response signals contained therein originating from the various qubits or, in turn, fronts of these and to extract the state information contained therein.

[0068] In other words, the states of the different qubits can be selected in the front of the common response signal or by analyzing it.

[0069] This has proven particularly useful when the common response signal is or has been demodulated beforehand. Thus, it can be provided that the common response signal is or has been demodulated to obtain a demodulated common response signal, and an analysis of the front of the demodulated common response signal is performed.

[0070] The common response signal may have a stepped front with multiple steps, each of which corresponds to the response signal of a qubit—or the front of a response signal of a qubit. Preferably, the sampling rate is then selected such that two to three sampling points are located on each of the steps; in other words, two to three sampling points are provided for the response signal of each qubit—or a front of this. For example, if the states of ten qubits are to be read out, the front of an associated common response signal could, in particular, have ten steps, and the sampling rate would then expediently be selected such that 20 to 30 sampling points are located on the front.The time-domain processing provided by the invention also makes it possible to analyze the common response signal without prior demodulation in order to obtain information about the states of the two or more qubits.

[0071] In other words, it can be provided that a (digitized) modulated common response signal is analyzed to obtain or extract the state information for the multiple qubits. In this case, the common response signal can be present, for example, as a high-frequency signal with a frequency in the GHz range. It can be provided by a wavelet or at least comprise one.

[0072] In particular, in the event that no demodulation of the common response signal takes place beforehand, it can be provided that the analysis for obtaining or extracting the state information of the plurality of qubits comprises determining at least one amplitude and / or at least one zero crossing of the common response signal, in particular the timing of at least one zero crossing, and / or the timing of at least one peak contained in the common response signal. In a further development, the readout device according to the invention is designed and / or configured accordingly. The readout device according to the invention can, for example, comprise at least one device or at least one module which is designed and / or configured accordingly. A module can also be provided by software or a combination of hardware and software.

[0073] The at least one amplitude can, for example, be the amplitude at the highest (or lowest) point of a peak (positive or negative deflection) contained in the common response signal. A peak is understood, in particular, to be an upwardly or downwardly opening waveform of the signal.

[0074] From one or more of the above-mentioned quantities, the states of the qubits can then be deduced. For example, the amplitude and / or timing of a first peak contained in the common response signal can be determined and used to determine the state.

[0075] It is also possible to use the entire profile of the common response signal, for example, several sampling points from the entire sale, to obtain information about the states of the multiple qubits, e.g., the shape of the entire wavelet. The readout device according to the invention is designed and / or configured accordingly in a further development; for example, it can comprise at least one corresponding device or module, which can also be provided by software or a combination of hardware and software.

[0076] This ensures particularly high accuracy. During digitization, sampling points across the entire range of the common response signal, such as wavelets, are preferably obtained.

[0077] Another particularly useful embodiment is characterized in that one or more sampling points or sampling values ​​of the common response signal are stored. The readout device according to the invention can be designed accordingly, in particular comprising at least one pipeline or at least one memory for (temporarily) storing sampling points or sampling values. The (temporarily) stored sampling point(s) or sampling values ​​can then be taken into account to obtain the information about the states of the multiple qubits.

[0078] Analysis without prior demodulation can reduce measurement time, as high-frequency, especially GHz, response signals can contain multiple sampling points within a short time span of, for example, a few nanoseconds, which may be sufficient for evaluating / determining the states of all qubits. Processing, especially analysis, can begin after just a few nanoseconds. Signal readout, especially sampling, and processing can be performed in the pipeline.

[0079] A further preferred embodiment is characterized in that, using an analog or digital amplifier and / or filter, a DC signal amplitude of the common response signal is determined, which is suitable for analog-to-digital conversion (ADC). This is particularly true in the case where no demodulation takes place. Digitization can then be performed using at least one analog-to-digital converter, and the aforementioned analysis can then follow.

[0080] The analog or digital amplifier and / or filter can be part of the readout device. The same applies to the at least one analog-to-digital converter.

[0081] A further advantageous embodiment is characterized in that artificial intelligence, for example, at least one neural network, is used for or within the scope of analyzing the common response signal to obtain information about the states of the multiple qubits. The delays can, for example, be in the range of 0.5 to 10 nanoseconds. In order to be able to measure the common response signal, in particular a front obtained by summing the individual response signals, in a particularly suitable manner, an analog-to-digital converter with a frequency of up to 10 GHz is preferably used, or multiple analog-to-digital converters with a lower sampling rate.

[0082] It is possible for the time delay of the response signal, in particular of each qubit, to be smaller than the duration of the particularly pulse-shaped response signal. Purely by way of example, it may be mentioned that the sample signal and / or the response signals of the qubits each have a pulse duration of 100 nanoseconds and 16 qubits are to be read out, whereby the response signal of one qubit is not delayed, that of another qubit by one nanosecond, that of a third qubit by two nanoseconds, that of a fourth qubit by three nanoseconds, ..., and that of the sixteenth qubit by 15 nanoseconds. It is also possible for the delay of the response signal, in particular of each qubit, to be greater than the sample signal (pulse) duration and / or the response signal (pulse) duration.

[0083] The readout device according to the invention can be characterized in a further development in that the time delay of the response signal of each qubit by the at least one delay device is smaller or larger than the duration of the response signal.

[0084] A further particularly advantageous embodiment of the method according to the invention is characterized in that the sample signal is used to trigger the common readout device, in particular an analog-to-digital converter of this or several analog-to-digital converters thereof. In a further development, the readout device according to the invention is designed and / or configured accordingly. For example, a sample signal generating device, which can be a component of a readout device according to the invention or assigned to such a device, can be connected to a common readout device, in particular at least one ADC of such a device, in such a way that a trigger signal can be sent from the sample signal generating device to the common readout device, in particular the at least one ADC.This can be done, for example, simultaneously with the transmission of a sample signal to the qubits, or (in each case) at a predetermined time interval. It is also possible for the sample signal to be sent as a trigger signal to a readout device.

[0085] In other words, a scenario can be used in which a readout device according to the invention transmits the (respective) sample signal and also reads out the response signals or the common response signal itself. The delay between these two events is generally fixed. Each measurement cycle is usually followed by an "idle" period, which is required for bit manipulation. This means that a readout device or at least one analog-to-digital converter (ADC) that is part of it or forms the readout device can be triggered by or as a function of the sample signal.

[0086] A further advantageous embodiment is characterized in that the same clock source, in other words the same clock generator, is used both for generating the sample signal and for the readout device, in particular for an analog-to-digital converter (ADC) thereof. It should be noted that the frequency of the clock for the sample signal and the frequency of the clock for the readout device, in particular for an analog-to-digital converter (ADC) thereof, do not have to match; in other words, the clocks can have different frequencies. However, these are preferably phase-locked. It is particularly preferred that a digital-to-analog converter (DAC) used for sample signal generation and an analog-to-digital converter (ADC) used for reading out the common response signal are clocked by the same clock generator.It can be provided that phase-locked clocks, in particular those generated by the same clock source, are used for a digital-to-analog converter (DAC) used for sample signal generation and for an analog-to-digital converter (ADC) used for reading the common response signal. The readout device according to the invention or a quantum computer with such a device can be designed and / or configured accordingly. In particular, a clock source can be present which is connected to both a digital-to-analog converter (DAC) used for sample signal generation and an analog-to-digital converter (ADC) used for reading the common response signal.

[0087] It is also possible to use a time-stretching method to reduce sampling capacity. For example, multiple analog-to-digital converters with lower sampling rates and phase-shifted clocks can be used.

[0088] It can also be provided that a particularly common readout device, which can be used within the scope of the method according to the invention or which can be a component of a readout device according to the invention, comprises or is provided by at least one domino sampling chip (DSC) or at least one domino sampling chip (DSC) ring. In other words, it is also possible to use a domino sampling chip (DSC) or DSC ring. The structure and functioning of a domino sampling chip or ring, as can be used in the context of the present invention, is described, for example, in the article "Domino Ring Sampler (DRS) Performances in Dual-Readout Calorimetry" by Fabrizio Scuri, IEEE Nuclear Science Symposium & Medical Imaging Conference, Knoxville, TN, USA, 2010, pp. 1711-1717, doi: 10.1109 / NSSMIC.2010.5874067.

[0089] Preferably, the response signals belonging to different qubits have the same frequency components for the same qubit states.

[0090] Furthermore, as noted, the response circuits of the qubits can each comprise their own response resonator, and the response resonators of the different qubits expediently match in terms of their resonant frequency. The resonant frequency of the response resonators is preferably in the range of 5 to 10 GHz. The response resonators are then designed and / or configured accordingly. It is possible for the response resonators of different, in particular all, qubits to be constructed identically.

[0091] The response circuits of the qubits can include further elements or components in addition to a response resonator or can each be provided by a response resonator.

[0092] The invention also relates to a quantum computer comprising at least one readout device according to the invention and a plurality of qubits. It is expedient for a response circuit of the readout device to be connected to a respective qubit. It is further preferred that the quantum computer comprises N (N = 2, 3, 4, 5, 6, ...) qubits, and the readout device has N delay devices or N -1 delay devices. The qubits are usually arranged on a qubit chip. It is then further preferred that the response circuits and the delay device(s) are also located on the qubit chip. Regarding the embodiments of the invention, reference is also made to the dependent claims and to the following description of several exemplary embodiments with reference to the accompanying drawings.

[0093] It shows:

[0094] Figure 1 shows a purely schematic representation of a first embodiment of a quantum computer according to the invention comprising a plurality of qubits and a first embodiment of a readout device according to the invention;

[0095] Figure 2 shows a second embodiment of a quantum computer according to the invention comprising several qubits and a second embodiment of a readout device according to the invention in a purely schematic representation;

[0096] Figure 3 is a purely schematic representation of the time delay of the response signals of several qubits and the analysis of the front of a corresponding common response signal;

[0097] Figure 4 shows the response signals of three different qubits and two corresponding common response signals for different state scenarios;

[0098] Figure 5 is a purely schematic representation of a response signal of a qubit in the form of a wavelet; Figure 6 is an enlarged representation of a common response signal for the case where the duration of the sample pulse is less than the duration of the delays of the response signals (top) and for the case where the duration of the sample pulse exceeds the duration of the delays of the response signals (top); and

[0099] Figure 7 is a purely schematic representation of a variant in which a DSC ring is used, for whose triggering the sample signal is used,

[0100] Identical or similar components are provided with the same reference numerals in the figures.

[0101] Figure 1 shows, in a purely schematic representation, components of a first embodiment of a quantum computer 1 according to the invention, comprising a qubit chip 2 with multiple qubit arrangements 3. Each qubit arrangement 3 comprises a qubit Q1-Q4, meaning that the quantum computer 1 comprises multiple qubits Q1-Q4. The quantum computer 1 is a superconducting quantum computer 1, and the qubits Q1-Q4 are designed as flux qubits, which is to be understood as an example. As can be seen, the qubit chip 2 here comprises four qubit arrangements 3, each with a qubit Q1-Q4. This number is to be understood purely as an example, and there could also be only two or three, or even more than four, qubit arrangements 3, each with a qubit Q1-Q4.

[0102] Each qubit Q1-Q4 is assigned its own response circuit 5, which has a response resonator 4 or is provided by the response resonator 4 and is a component of the respective qubit arrangement 3. The individual qubits Q1-Q4 and associated response circuits 5 with the response resonators 4 are not visible in the schematic Figure 1, but can be seen in Figure 2. This shows components of a second embodiment of a quantum computer 1 according to the invention, and the qubit arrangements 3 are shown enlarged therein with their components. As can be seen in Figure 2, the response resonator 4 of each qubit arrangement 3 has a coil and a capacitor. The response resonators 4 of all qubit arrangements 3 are characterized by the same resonant frequency. The response resonators 4 are each connected via a capacitance c g connected to the qubit Q1-Q4 to which they are assigned. The response resonators 4 are not strongly coupled.

[0103] Also visible in Figure 1 is a microwave source 6 for generating a sample signal 7, in other words a sample signal generating device. An arrow shown next to the sample signal 7 illustrates that the sample signal 7 is transmitted in the direction of the qubit chip 2. The sample signal 7, which in the illustrated embodiment is given by a wavelet, is fed to the qubits Q1-Q4 via a common sample line 8. This can lead to several branch lines, each extending to a qubit arrangement 3 or a qubit Q1-Q4, via which branch lines the sample signal 7 can then be fed to each qubit arrangement 3 or each qubit Q1-Q4 (cf. Figure 2). The path that the sample signal 7 takes from the microwave source 6 to the qubits Q1-Q4 orto the response resonators 4 is the same length for all qubits Q1 to Q4, so that a sample signal 7 emitted by the microwave source 6 arrives simultaneously at all qubits Q1 to Q, in particular their response resonators 4. Here, the branch lines leading to the individual qubits Q1 to Q4 (not shown in Figure 1), which all branch off from the common sample line 8 at the same point, are the same length to ensure this. The lines that each connect a qubit Q1 to Q4 with its associated response resonator 4 are also the same length for all qubits Q1 to Q4.

[0104] It is of course also possible for branch lines to branch off from different positions from the common sample line 8 and to have different lengths, whereby overall it is again the case that the transmission path for the sample signal 7 from the source 6 to the qubits Q1 to Q4 or response resonators 4 is of the same length.

[0105] Furthermore, a clock generator is shown, in particular in the form of a clock tree 9, by which the microwave source 6 is clocked, in other words clocked, and for this purpose is connected to the clock tree 9 via a line.

[0106] Also shown are attenuation elements 10, each capable of attenuating the signal by -20 dB. This occurs before the sample signal 7 reaches the qubit chip 2. Downstream of the qubit chip 2 are cryogenic circulators 11, each providing an isolation of 20 dB (abbreviated as 20 dB in Figure 1), a bandpass filter 12, e.g., with a bandwidth of approximately 10 MHz, and amplifier stages 13, 14.

[0107] A module for downconversion or demodulating, which also has a low-pass filter, is designated by reference numeral 15. This is shown with a dashed line, which will be discussed in more detail below. Module 15 is followed by an ADC 16 and a control and digital signal processing module 17, both of which are also connected to clock tree 9. ADC 16 can, for example, have a sampling rate in the range of 1 to 4 GSPS (giga samples per second). Module 17 can output trigger 18 to start sample signal generation by microwave source 6. Control module 17 can also start digital signal processing, in particular with ADC 16.

[0108] Also shown in Figure 1 are the prevailing temperatures in Kelvin. As can be seen, qubit chip 2 operates at a temperature of 30 millikelvin. Generation of sample signal 7 with source 6 and digital signal processing with components 15, 16, 17, and 9 take place at 300 K.

[0109] The quantum computer 1 or its qubit chip 2 further comprises—in contrast to conventional quantum computers—several delay devices 19, here one for each qubit Q1-Q4, thus a total of four (N=4) delay devices 19. Each delay device 19 is assigned to and connected downstream of a qubit Q1-Q4 or its response circuit 5. This is again only visible in Figure 2.

[0110] In the illustrated embodiment, each of the four delay devices 19 is provided by a conductor track 19, with the lengths of the four conductor tracks 19 differing from one another. No two of the four conductor tracks 19 have the same length.

[0111] With the quantum computer 1 of Figure 1, an embodiment of the method according to the invention for parallel reading of the states of several qubits Q1-Q4 can be carried out.

[0112] This involves a dispersive readout of the flux qubits Q1-Q4.

[0113] According to the invention, time multiplexing is carried out using the delay devices 19 provided for this purpose. Specifically, the same sample signal 7 is supplied to the qubits Q1-Q4 via the common sample line 8 and in particular branch lines to the individual qubits Q1-Q4 in order to read out their states.

[0114] The sample signal 7 is a comparatively narrow-bandwidth microwave signal generated by the microwave source 6. It is preferably characterized by a bandwidth of only a few MHz, for example, 5 to 10 MHz (corresponding to pulse durations of 200 to 100 ns). In contrast to a sample signal such as that used in the frequency division multiplexing (FDM) approach described above for state readout, which is known from the prior art, the sample signal 7 has only one microwave tone f1 for all qubits Q1-Q4 and not a different microwave tone for each of the qubits Q1-Q4 (see also Figure 3, which will be discussed in more detail below). In further contrast to the FDM approach, the response resonators 4 of all four qubits Q1-Q4 are characterized by the same resonant frequency, as noted above. They can be of identical construction.

[0115] In response to the sample signal 7 supplied to the respective qubit Q1-Q4 and simultaneously arriving at the qubits Q1 to Q4, a response signal 20 containing information about the state of the respective qubit Q1-Q4 is output via the response circuit 5 of the respective qubit Q1-Q4 (see Figure 2). The response signals 20 of the qubits exhibit a temporally varying profile. One can also say that they are time-variable.

[0116] The response signals 20 associated with the various qubits Q1-Q4 exhibit the same frequency components for identical qubit states. This, in turn, is in contrast to the FDM approach. According to the invention, the received response signals 20 each pass through the delay devices 19 connected downstream of the qubit arrangements 3. Since the delay devices 19 are formed by conductor tracks of different lengths, the response signals 20 have different propagation or transmission paths and are delayed to different degrees. All response signals 20 are delayed to different degrees.The lengths of the conductor tracks 19 can, for example, be selected such that the response signal 20 originating from the qubit Q1 is delayed by one nanosecond, the response signal 20 originating from the qubit Q2 by two nanoseconds, the response signal 20 originating from the qubit Q3 by three nanoseconds, and the response signal 20 originating from the qubit Q4 by four nanoseconds, compared to a scenario without the delay devices 19.

[0117] By using conductor tracks of different lengths as delay devices 19, the response signals can be delayed while maintaining their temporal progression. After passing through the conductor tracks serving as delay devices 19, time-variable response signals 20 are still present, which have merely been delayed to different degrees.

[0118] The differently delayed response signals 20 are then combined, in particular summed, to obtain a common response signal 21, here within the qubit chip 2 which also includes the qubits Q1-Q4 and using a passive circuit 22 or an active low-power circuit 22 (only visible in Figure 2).

[0119] In the example shown in Figure 1, the common response signal 21 passes through the elements 11, 12, 13 and 14 connected downstream of the qubit chip 2, in other words several cryogenic circulators 11, a bandpass filter 12 and two amplification stages 13, 14. The module 15 demodulates the common response signal 21 and it is digitized with the ADC 16.

[0120] It should be noted that the embodiment shown here is a highly, one could also say "hard," synchronized system. The sample signal generator 6, the ADC 16, and the module 17 for control and digital signal processing are all clearly clocked by the clock tree 9. The delay between the start of sample pulse generation and the readout of the response is fixed.

[0121] The same clock source, in other words, the same clock generator 9, is used both for generating the sample signal 7 and for the readout device, in particular for the analog-to-digital converter 16 thereof. It should be noted that the clock frequency for the sample signal 7 and the clock frequency for the readout device, in particular for an analog-to-digital converter 16 thereof, do not have to match; in other words, the clocks can have different frequencies. However, these are phase-locked.

[0122] The (digitized) common response signal 21 can be analyzed to obtain the state information about the multiple qubits G1-G4. It is also possible for only a portion of the common response signal 21 to be analyzed or used to obtain or extract information about the states of the multiple qubits Q1-Q4. Purely by way of example, only a (first) rising edge of the common response signal 21, in particular its front, is used for this purpose. It is also possible to analyze the entire profile of the common response signal 21 to obtain information about the states of multiple qubits.

[0123] The front of the digital signal obtained by digitization by means of the ADC 16 can, for example, be analyzed to separate the state information of the individual qubits Q1-Q4 and to recognize or determine the states “1” or “0” for each qubit Q1-Q4.

[0124] This is illustrated – purely schematically – in Figure 3. In this figure, the sample signal 7 with the single microwave tone f1 for all qubits Q1-Q4 can be seen on the far left. This is fed to the multiple qubits Q1-Q4 (not shown again in the figure), and the response signals 20 pass through the delay devices 19, which can be seen in Figure 3. Figure 3 shows a scenario for n (n = 2, 3, 4, ...) qubits. It should be noted that, according to Figure 3 – in contrast to Figure 1 – no delay element 19 is provided for the first qubit. The same applies to qubit Q1 from Figure 2. After passing through the narrowband amplifier or lock-in 16, low-pass filter 17, and ADC 18, the front can be analyzed, which is schematically indicated in the box at the bottom right of Figure 3.

[0125] Shown here is the front or rising edge 23 of the common response signal 21 for a first case, shown in the box above, and a second case, shown in the box below. Also represented by small circles on the front 23 are sampling values ​​obtained by digitization, which are to be understood as examples. Schematically shown below the front 23 of the common response signal 21 as offset bars are the individual, delayed response signals 20 of the qubits Q1-Qn for the case of a specific one of the two possible states, in particular "1". No bar is shown if the corresponding qubit Q1-Qn was in the other state, in particular "0". As can be seen, the front 23 has a stepped profile, whereby if a qubit Q1-Qn was in the state "0", the front 23 is shifted at the corresponding location (frequency shift relative to f2 due to the state "0").From the course of the front 23 - in other words from the shape of the front 23 - the states of the individual qubits Q1-Qn can be derived.

[0126] Time-domain processing also makes it possible, in principle, to analyze the joint response signal 21 without prior demodulation to obtain information about the states of the two or more qubits Q1-Qn. In this case, module 15 from Figure 1 would not be used for demodulation, which is why it is shown there with a dashed line.

[0127] The analysis without prior demodulation is shown purely schematically and as an example in Figure 4. In the embodiment shown here, the response signals 20 are represented by wavelets. One such wavelet is shown again in an enlarged form in Figure 5.

[0128] Figure 4 shows individual response signals in sections – here, for example, for three qubits Q1 to Q3. For all three qubits Q1-Q3, the response signal for the state "1" is shown, and for qubit Q3, its response signal for the state "0" is also shown. The response signal of qubit Q3 for the state "1" is labeled Q3, st. 1 in Figure 4, and for the state "0" it is labeled Q3, st. 0. For qubits Q1 and Q2, the designation for the state "1" is analogous, i.e., Q1, st. 1 and Q2, st. 1, respectively.

[0129] Again, the response signals of the three qubits Q1 to Q3 are delayed to varying degrees. This can be seen from their offset from one another along the x-axis, which represents time (without a unit). The delay can be achieved using the delay devices 19 shown in Figures 1 and 2. There is a time lag of 0.2 T between each two consecutive response signals, where T is the central frequency of the spectrum of the response signals. This delay is purely exemplary, and other values ​​are possible.

[0130] It should be noted that Figure 4 only shows enlarged sections of the response signals, so that only a few of the total number of wave antinodes of the respective wavelet (cf. Figure 5) can be seen.

[0131] Figure 4 also shows the joint response signal obtained by summing the response signals of all three qubits Q1 to Q3, once for the case that all three qubits Q1-Q3 are or were in the state “1” and once for the case that qubits Q1 and Q2 are or were in the state “1” while qubit Q3 is in the state “0”. The joint response signal is labeled tr, Q3, st. 1 for the case of state combination 111 (Q1, Q2, Q3) and tr, Q3, st. 0 for the case of state combination 110 (Q1, Q2, Q3) (the abbreviation “tr” stands for “total response”). The joint response signals are represented by sampling points, which are circles in the case of tr, Q3, st. 0 and circles in the case of tr, Q3, st. 1 are drawn as rectangles. The sampling points are connected by straight lines.

[0132] As can be seen, the two common response signals tr, Q3, st. 1 and tr, Q3, st. 0 for the two different state combinations 111 and 110 differ from one another. This is particularly true with regard to their course and timing. For example, the common response signal tr, Q3, st. 0 occurs earlier than the common response signal tr, Q3, st. 1. This is because the lower amplitude of the response signal from qubit Q3 in the case of state "0", i.e. Q3, st. 0, leads to a shift of the common response signal to the left in Figure 4. If, for example, qubit Q1 were in state "0", it would be shifted to the right compared to tr, Q3, st. 1; if Q2 were in state "0", there would be no shift compared to tr, Q3, st. 1 , but there would be a lower amplitude, and so on.

[0133] This—together with the knowledge of the response signal of each qubit Q1 to Q3, and how much it is delayed—in other words, the relative timing of the individual response signals—makes it possible to infer the states of all three qubits Q1 to Q3 from the course of the combined response signal. This applies to all possible state combinations.

[0134] It should be emphasized that the number of three qubits is again only an example and the concept can equally be applied to a different number of qubits.

[0135] One can also say that every point on the common response signal, in particular every sampling point of it, is represented by the current state of all n qubits with 2 n possible values. For N sampling points, you can create an array with N*2 n possible values.

[0136] In principle, it is possible to use various features of the common response signal to determine the state. Purely as an example, the amplitude at the highest point of the positive peak on the far left in Figure 4 (the downward-opening wave antinode on the far left in Figure 4) is determined, and this amplitude value is used to determine the state of the three qubits. Of course, the amplitudes at the highest / lowest points of several peaks can also be determined and used for this purpose.

[0137] Alternatively or additionally, one or more zero crossings (rising and / or falling edges) of the common response signal can be used, in particular the timing of one or more zero crossings. In Figure 4, purely as an example, six zero crossings (of the respective rising edges) of the common response signal tr, Q3, st. 1 and of the common response signal tr, Q3, st. 0 are marked with diagonal lines. Two of the six zero crossings are shown as examples in zc 110 (i.e., belonging to tr, Q3, st. 0) and zc 111 (i.e., belonging to tr, Q3, st. 1). As can be seen, the two zero crossings of the rising edges for the two state combinations 110 and 111 differ in terms of their timing, i.e., their position on the X-axis.

[0138] In particular, suitable sampling rates can be selected for the determination.

[0139] It is also possible to measure only a limited number of defined sampling points at a time. This is particularly true when using a highly synchronized variant in which a common readout device for capturing the common response signal, e.g., an ADC, is synchronized, particularly triggered, with sample pulse 7 or in response to it (see also Figure 7, which will be discussed in more detail below).

[0140] For example, a recorded common response signal is present, for example, in the form of the values ​​of N sampling points. These N sampling points can then, for example, also be combined with other possible combinations of an N*2 n Arrays are compared and the qubit state combination is determined using best-fit methods.

[0141] It is also possible that an artificial intelligence, for example at least one neural network, is used for or in the context of the analysis of a common response signal 21 to obtain the information about the states of the several qubits Q1-Q4.

[0142] It should be noted that it is fundamentally possible for the delays imposed on the response signals 20, or the delay between two consecutive response signals 20, to be smaller than the duration of the sample signal 7 or the response signals 20, or vice versa. Both are highly simplified and depicted purely schematically in Figure 6. Shown are response signals 20 with varying delays, originating from different qubits Q1-Qn, and the summed common response signal 21. At the top, this is the case where the delay between consecutive response signals 20 exceeds the duration of the sample signal 7 or response signals 20, and at the bottom, this is the case where the delay is smaller or shorter.

[0143] Figure 2 shows, as noted above, a second embodiment of a quantum computer 1 according to the invention, with which the method according to the invention can be carried out. The quantum computer 1 in Figure 2 largely corresponds to the example in Figure 1.

[0144] One difference is that no delay device 19 is assigned to the topmost qubit Q1 in Figure 2. In other words, one is not provided for each of the four qubits Q1-Q4, but only for qubits Q2, Q3, and Q4. This is because a response signal 20 can, in principle, remain undelayed (see also Figure 3). A further difference in the exemplary embodiment according to Figure 2 is that at least one of the delay devices 19 is used to delay the response signals 20 from several qubits Q1-Q4. As can be seen in the figure, this applies both to the upper delay device 19, which is assigned to qubit Q2 and immediately downstream of its response circuit 5, and to the middle delay device 19, which is assigned to and immediately downstream of the response circuit 5 of the third qubit Q3.Response signals 20 originating from qubit Q4 pass through all three delay devices 19 one after the other. Response signals 20 from qubit Q3 pass through only the middle and upper delay devices 19, and response signals from qubit Q2 pass through only the upper delay devices 19. The arrangement is made accordingly, or the circuit is designed accordingly. One could also say that the delay devices 19 are arranged in a kind of cascade. Response signals from qubit Q1 do not pass through any of the three delay devices 19.

[0145] If the response signals 20 each pass through a different number of delay devices 19 (0, 1, 2, or 3 in Figure 2), the delay devices 19 can also be designed to each cause the same delay. Purely by way of example, each of the delay devices 19 can cause a delay of half a nanosecond or one nanosecond, particularly due to the signal path through them. The delay devices 19 can, for example, all be provided by conductor tracks of the same length. The delays can be the same, since the difference results from the different number.

[0146] It has also proven particularly advantageous if synchronization takes place between the transmission of the sample pulse 7 and the reading of the response signals 20 or the common response signal 21. The delay between these two events is fixed. Each measurement cycle is followed by an idle period for bit manipulation. This means that a common readout device used to read out the common response signal 21, for example at least one ADC of such a device, can be triggered by the system. It is then particularly possible for the sampling points on the common response signal (cf. the sampling points in Figures 3 and 4) to be positioned not randomly, but always with the same time offset with respect to the start of the common response signal. This means that the sampling rate can be much lower, and the sampling period can in particular increase to, for example, 1 ns.

[0147] It is also possible to use a time stretching method within the scope of the invention to reduce the sampling capacities.

[0148] It can also be provided that at least one domino sampling chip (DSC) or at least one domino sampling chip (DSC) ring 24 is used, as indicated purely schematically in Figure 7. Such a DSC 24 can be part of a common readout device or form such a device. This device can also receive a trigger T as a function of the sample signal 7, as indicated in the figure. Reference number 25 in Figure 7 denotes an analog memory start of the DCS ring 24. Also visible in this figure is the qubit chip 2 and the common response signal 21, which is fed to the triggered DSC ring 24.

[0149] Due to the time-division multiplexing provided according to the invention with the delay devices 19, it is possible to dispense with the use of different frequencies for different qubits Q1-Qn and response resonators 4 of different resonance frequencies for the different qubits Q1-Qn. A common sample signal 7 can be used for the multiple qubits Q1-Qn, which is significantly narrower in bandwidth than the sample signal required within the FDM-based approach. A single microwave tone f1 or the same narrow spectrum can be used for all qubits Q1-Qn. According to the invention, the differentiation of the response signals 20 according to the individual qubits Q1-Qn is not achieved by means of different frequencies, but rather by time-division multiplexing.

Claims

CLAIMS 1. Method for reading out the states of a plurality of qubits (Q1-Qn), in particular superconducting qubits and / or spin qubits, wherein the same sample signal (7) is supplied to the qubits (Q1-Qn) for reading out the states via a common sample line (8), and wherein each qubit (Q1-Qn) is assigned its own response circuit (5), preferably having a response resonator (4), and wherein, in response to the supplied sample signal (7), a response signal (20) with information about the state of the respective qubit (Q1-Qn) is output via the respective response circuit (5), characterized in that the response signal (20) of at least one qubit (Q1-Qn) is delayed compared to the response signal (20) of at least one further qubit (Q1-Qn).

2. Method according to claim 1, characterized in that the response signals (20) of the qubits (Q1-Qn) are time-variable and the delay of the response signal of the at least one qubit (Q1-Qn) takes place while maintaining the time-variable character.

3. Method according to claim 1 or 2, characterized in that the delay of the response signal (20) of the at least one qubit (Q1-Qn) is achieved with at least one delay device (19) associated with and / or in particular directly connected downstream of the response circuit (5) of the at least one qubit (Q1-Qn).

4. Method according to one of claims 1 to 3, characterized in that all response signals (20) are delayed to different degrees.

5. Method according to one of claims 1 to 3, characterized in that exactly one response signal (20) is not delayed and the remaining response signals (20) are delayed to different degrees.

6. Method according to one of the preceding claims, characterized in that response signals (20) originating from different qubits (Q1-Qn) pass through different numbers of delay devices (19).

7. Method according to one of the preceding claims, characterized in that at least one of the delay devices (19) is used to delay the response signals (20) of several qubits (Q1-Qn).

8. Method according to one of the preceding claims, characterized in that the response signals (20) of the plurality of qubits (Q1-Qn) are combined, in particular summed, to obtain a common response signal (21), preferably within a qubit chip (2) also comprising the qubits (Q1-Qn) and / or using a passive or active circuit.

9. Method according to claim 8, characterized in that the common response signal (21) is fed to a common readout device for further processing, preferably via a common transmission line, and / or that the common response signal (21) is evaluated in the time domain.

10. The method according to claim 8 or 9, characterized in that the common response signal (21) is analyzed to obtain information about the states of the plurality of qubits (Q1-Qn).

11. The method according to claim 10, characterized in that a particularly digitized front (23) of the common response signal (21) is analyzed in order to obtain the information about the states of the plurality of qubits (Q1-Qn).

12. The method according to claim 10 or 11, characterized in that at least one amplitude and / or at least one zero crossing of the common response signal (21), in particular the time position of at least one zero crossing of the common response signal, and / or the time position of at least one peak contained in the common response signal (21) is determined in order to obtain the information about the states of the plurality of qubits (Q1-Qn).

13. Method according to claim 9 or one of claims 10 to 12, as far as dependent on claim 8, characterized in that the sample signal (7) is used for triggering the common readout device.

14. Method according to one of the preceding claims, characterized in that the same clock source is used for the generation of the sample signal and for the readout device, in particular for an analog-to-digital converter thereof.

15. Method according to one of the preceding claims, characterized in that the response signals (20) belonging to different qubits (Q1-Qn) have the same frequency components for the same qubit states.

16. Method according to one of the preceding claims, characterized in that the response circuits (5) of the qubits (Q1-Qn) each comprise a response resonator (4), in particular, wherein the response resonators (4) of the different qubits (Q1-Qn) match with regard to their resonance frequency, preferably, wherein the response resonators (4) of different qubits (Q1-Qn) are of identical construction.

17. Method according to one of the preceding claims, characterized in that the response signal (20) of at least one qubit (Q1-Qn) is delayed by 0.5 ns to 10 ns compared to the response signal (20) of at least one further qubit (Q1-Qn).

18. Readout device for carrying out the method according to one of claims 1 to 17, comprising a plurality of response circuits (5), preferably having a response resonator (4), which are each connected or connectable to a qubit (Q1-Qn), and at least one delay device (19) which is assigned to at least one response circuit (5) and / or in particular is connected directly downstream and can delay a response signal (20) output by the at least one response circuit (5), which contains information about the state of a qubit (Q1-Qn).

19. Read-out device according to claim 18, characterized in that the at least one delay device (19) is designed and / or arranged such that it can delay a time-variable response signal (20) while maintaining its time-variable character, and / or that the at least one delay device (19) is designed and / or arranged to effect a fixed delay.

20. Read-out device according to claim 18 or 19, characterized in that several delay devices (19) are provided, preferably, wherein different delay devices (19) have different can cause long delays of qubit response signals (20), and / or wherein the readout device is designed such that response signals (20) originating from different qubits (Q1-Qn) pass through a different number of delay devices (19), and / or that the readout device is designed such that the response signals (20) output by at least two different response circuits (5) and belonging to at least two different qubits (Q1-Qn) are supplied to at least one of the delay devices (19).

21. Read-out device according to one of claims 18 to 20, characterized in that the response circuits (5) each have a response resonator (4), in particular, wherein the response resonators (4) of different, preferably all, response circuits (5) are identical in terms of their resonance frequency, preferably, wherein the response resonators (4) of different, preferably all, response circuits (5) are of identical construction.

22. Quantum computer (1) comprising at least one readout device according to one of claims 18 to 21 and a plurality of qubits (Q1-Qn), in particular superconducting qubits and / or spin qubits.

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