Secure Memory

By dividing memory into distinct groups for secure and non-secure data access, the system ensures secure data storage in a single memory, addressing space inefficiencies and security concerns in electronic devices.

FR3161979B1Active Publication Date: 2026-06-26STMICROELECTRONICS INT NV

Patent Information

Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
STMICROELECTRONICS INT NV
Filing Date
2024-05-03
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

Existing electronic devices face challenges in securely storing sensitive and non-sensitive data in the same memory without compromising security or requiring multiple memory units, which can be space inefficient.

Method used

A memory system is divided into distinct groups of columns, where sensitive data is accessible only by a secure module and non-sensitive data is accessible only by an insecure module, with independent wiring systems and a logical interface managing data storage, ensuring secure separation and efficient use of a single memory.

Benefits of technology

This approach enhances data security by preventing unauthorized access between data types while reducing memory footprint by using a single memory unit, optimizing space utilization.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

Secure Memory This description relates to an electronic device comprising a memory (101), in which: - first data (Data103) which is accessible only by a first module (103) is stored in a first group of memory cell columns of said memory (101); and - second data (Data104) which is accessible only by a second module (104), different from the first module (103), is stored in a second group of memory cell columns of said memory (101), said first and second groups being distinct. Figure for the abbreviation: Fig. 1
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Description

Title of the invention: Secure memory technical field

[0001] This description relates generally to electronic devices and systems and their security. More specifically, this description relates to a secure method of storing sensitive and non-sensitive data in the same memory. Previous technique

[0002] As a matter of course, many electronic devices and systems may use sensitive and non-sensitive data and, to do so, may sometimes need to store them in memory. For security reasons, it is important to store this sensitive and non-sensitive data separately.

[0003] It would be desirable to be able to improve, at least partially, certain aspects of the storage of sensitive and non-sensitive data in an electronic system. Summary of the invention

[0004] There is a need for a more secure way of storing sensitive and non-sensitive data.

[0005] There is a need for a more secure way of storing sensitive and non-sensitive data in the same memory.

[0006] There is a need for a more secure way of storing first data that is accessible only by a first module and second data that is accessible only by a second module in the same memory.

[0007] There is a need for a device that is more compact.

[0008] There is a need for a device that includes a single memory instead of several memoirs.

[0009] An embodiment overcomes all or part of the disadvantages of known methods of storing data in an electronic device.

[0010] An embodiment overcomes all or part of the disadvantages of known systems capable of storing data.

[0011] An embodiment resolves all or part of the drawbacks of known methods of storing data in an electronic device.

[0012] An embodiment resolves all or part of the drawbacks of known electronic devices capable of storing data.

[0013] One embodiment provides an electronic device comprising a memory, in which: - Initial data, accessible only by a first module, is stored in a first group of memory cell columns within said memory; and - Second data items, accessible only by a second module different from the first module, are stored in a second group of memory cell columns within said memory. the aforementioned first and second groups being distinct.

[0014] Another embodiment provides for a method of storing, in a memory of an electronic device, first data which are accessible only by a first module and second data which are accessible only by a second module, different from the first module, in which: - said initial data is stored in a first group of memory cell columns of said memory, and - said second data is stored in a second group of memory cell columns in said memory, the aforementioned first and second groups being distinct.

[0015] According to one embodiment, said first module is only capable of accessing said first group of columns.

[0016] According to one embodiment, said second module is only capable of accessing said second group of columns.

[0017] According to one embodiment, said first data are sensitive data and the first module is a secure module.

[0018] According to one embodiment, said second data are non-sensitive data and the second module is an insecure module.

[0019] According to one embodiment, said device includes a logical interface capable of managing the storage of said first and second data in said first and second groups.

[0020] According to one embodiment, at least third data that are accessible only by at least one third module are stored in at least one third group of memory cell columns of said memory, said first, second and third groups being distinct.

[0021] According to one embodiment, said at least a third module is only capable of communicating with said at least a third group of columns.

[0022] According to one embodiment, said memory is selected from the group comprising: volatile memory, non-volatile memory, random access memory, read-only memory, flash memory, fuse memory.

[0023] According to one embodiment, said memory is a fuse memory.

[0024] According to one embodiment, said first and second groups are physically distinct.

[0025] According to one embodiment, said first and second groups each have their own independent wiring system.

[0026] According to one embodiment, there is no connection between the independent wiring systems.

[0027] Another embodiment provides for a memory configured to be the memory of an electronic device as described above. Brief description of the drawings

[0028] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0029] [Fig.1] represents, in block form, an embodiment of an electronic device;

[0030] [Fig.2] represents, in block form, a memory of the embodiment of [Fig.1]; and

[0031] [Fig.3] represents, in block form, another embodiment of an electronic device. Description of the implementation methods

[0032] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0033] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0034] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0035] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0036] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0037] The embodiments described above relate to data storage in a memory of an electronic device and, more particularly, to the storage of initial data accessible only by a first module and second data accessible only by a second module in the same main memory. In order to prevent the second module from accessing the initial data and vice versa, the main memory is divided into two secondary memories, each secondary memory corresponding to a group of memory cell columns in the main memory. Such an embodiment is described with reference to Figures 1 and 2. Another embodiment in which the memory stores data from more than two (2) modules is described with reference to [Fig. 3].

[0038] Furthermore, the embodiments described above are particularly suitable for use in all types of industrial fields where data storage is required. More specifically, such electronic devices and storage methods can be used to: - the automotive industry, for example in the field of car electrification or the field of advanced driver assistance systems (ADAS); - the industrial sector, for example in the field of green energy, in the field of infrastructure electrification, the Internet of Things (IoT) and connected homes, in which power supply and energy consumption and data exchange are an essential element; - the personal electronics industry, for example in the field of mobile phones and the Internet of Things (IoT) and in the field of high-speed interfaces; and - the communications equipment, computer and peripherals industry, for example in the field of infrastructure and data centers and in the field of low Earth orbit satellites.

[0039] Moreover, the embodiments described above are particularly suited to the automotive industry and the industrial market.

[0040] Fig. 1 represents schematically and in block form an embodiment of an electronic device 100 (DEVICE).

[0041] In one embodiment, the electronic device 100 comprises a memory 101 (MEM) capable of storing data. For example, the memory 101 may be of any type of memory, such as volatile memory, non-volatile memory, random access memory (RAM), read-only memory (ROM), or flash memory. In a preferred embodiment, the memory 101 is a fuse memory.

[0042] According to one example, the electronic device 100 further comprises a logic interface 102 (LOGIC) associated with the memory 101. The logic interface 102 can provide data to, and receive data from, the memory 101 by means of a secure connection. In other words, only the logical interface 102 can provide data to, and receive data from, memory 101.

[0043] According to one embodiment, the electronic device 100 further comprises two modules 103 (SC) and 104 (Non-SC) which can store data in the memory 101 via the logic interface 102. More specifically, modules 103 and 104 are completely independent. According to one embodiment, module 103 can store and access Data 103 within the memory 101 via the interface 102. According to another embodiment, module 104 can store and access Data 104 within the memory 101 via the interface 102.

[0044] According to one embodiment, the data Datal03 and Datal04 are stored in two different parts of the memory 101. A first part of the memory 101 is defined by a first group of memory cell columns and is referred to hereafter as the first secondary memory. A second part of the memory 101 is defined by a second group of memory cell columns and is referred to hereafter as the second secondary memory. According to one embodiment, the first and second groups of columns are distinct, i.e., they have no columns in common. According to another embodiment, the first and second groups of columns may both be the same size, meaning they have the same number of columns, or different in size, meaning they have a different number of columns.According to one embodiment, each group of columns may include columns that are adjacent, but, according to another variant, each group of columns may include one or more columns that are not adjacent.

[0045] According to one embodiment, the logic interface 102 comprises two communication links that can supply data to, and receive data from, modules 103 and 104. More specifically, the logic interface 102 can receive and transfer Data 103 to and from module 103 via a first communication link and can receive and transfer Data 104 to and from module 104 via a second communication link. Modules 103 and 104 only have the capacity to supply data to and receive data from the logic interface 102. The storage of data in memory 101 by the logic interface 102 will be described in more detail with reference to [Fig. 2].

[0046] According to one embodiment, a method for storing in a single memory two sets of data which are each accessible by a single module is as follows.

[0047] Module 103 stores Datal03 data in the first column group of said memory. Module 104 stores Data 104 data in the first group of columns of said memory. These storage operations are executed via logical interface 102.

[0048] According to a preferred embodiment, module 103 can be a secure module, i.e., a module capable of handling sensitive data, and module 104 can be an unsecure module, i.e., a module not authorized to handle sensitive data. In this case, the logical interface 102 ensures secure storage of sensitive and unsensitive data in the same memory.

[0049] One advantage of this embodiment is the use of a single memory instead of two. This is indeed an advantage because, in some cases, having two memories takes up more space on a chip than having one, due to the numerous circuits associated with each memory. This is particularly true when memory 101 is a fuse memory. Using two fuse memories does indeed take up more space than using a single fuse memory with the same storage capacity as two fuse memories, because of the circuits associated with the fuse memories.

[0050] [Fig.2] represents, schematically and in block form, an example of memory 200 of the type of memory 101 described in relation to [Fig.1].

[0051] As previously described, the memory 200 can be any type of memory, for example, volatile memory, non-volatile memory, random access memory, read-only memory, or flash memory. In a preferred embodiment, the memory 200 is a fuse memory. The memory 200 comprises memory cells arranged in a matrix comprising N rows referenced WL0, WL1, ..., WLN-1, where N is an integer, and P columns, where P is an integer.

[0052] As previously described, the memory 200 is divided into two separate parts, which constitute two secondary memories. The first part of the memory 200 is defined by a first group of columns, COL201, and can be referred to hereafter as the first secondary memory. The second part of the memory 200 is defined by a second group of columns, COL202, and can be referred to hereafter as the second secondary memory. The first group of columns, COL201, is used to store data from a first electronic module, and the second group of columns, COL202, is used to store data from a second electronic module, which is different from the first electronic module.

[0053] It is commonly said that a memory row stores a data word. In the case of memory 200, each row WL0, WL1, ..., WLN-1 is considered to store two data words Word201-0, ..., Word201-N-1, and Word202-0, ..., Word202- Nl. A first data word Word201-0, ..Word201-N-1 is stored in the first column group COL201 and the second data word Word202-0, ..Word202-N-1 is stored in the second column group COL202. According to one embodiment, the first module only has access to the first word Word201-0, ..Word201-N-1 and the second module only has access to the second word Word202-0, ..., Word202-N-1.

[0054] In one embodiment, the two secondary memories of memory 200 are physically separate within memory 200 to prevent data leakage between the two secondary memories. In another embodiment, each secondary memory can have its own independent wiring system to prevent data leakage, such that there is no physical wired data path connecting the data of column group COL1 to anything other than module 103, and no physical wired data path connecting the data of column group COL2 to anything other than module 104. In other words, there is no connection between the independent wiring systems. In another example, the logical interface can also have multiple independent wiring systems for each secondary memory.

[0055] According to one example, a logic interface, of the type of the logic interface 102 described in relation to [Fig.2], can manage the storage of data in memory 200. When data from a first module is received by the logic interface, it can store and access this data in the correct part of memory.

[0056] Fig. 3 represents schematically in block form another embodiment of an electronic device 300 (DEVICE).

[0057] The electronic device 300 is similar to the electronic device 100 described in relation to [Fig. 1]. The elements and characteristics common to devices 100 and 300 are not detailed again here. Only the differences between devices 100 and 300 are highlighted.

[0058] More specifically, similarly to device 100, device 300 comprises: - a memory 301 of the type of memory 101; and - a logic interface 302 of the type of logic interface 102.

[0059] Furthermore, the device 300 comprises more than two electronic modules capable of storing data in the memory 301 via the logic interface 302. More specifically, the device 300 comprises K electronic modules 303-1 (Agent 1), 303-2 (Agent 2), ..., 303-K (Agent K), where K is an integer greater than two. In one embodiment, modules 303-1 to 303-K are completely independent of each other. In another embodiment, each module 303-K, k being an integer between 1 and K, can store and access Data303-k data in memory 301 via interface 302.

[0060] In one embodiment, the data Data303-1, Data303-2, ..., and Data303-K are stored in K different parts of memory 301. Each part of memory is defined by a group of columns of memory cells. In one embodiment, all K groups of columns are distinct, i.e., they have no columns in common. In another embodiment, all the groups of columns may be the same size, i.e., they have the same number of columns, or different sizes, i.e., they have a different number of columns. In one embodiment, each group of columns may include columns that are adjacent, but, in another variant, each group of columns may have one or more columns that are not adjacent.

[0061] According to one embodiment, the logic interface 302 comprises K communication links that can provide data to, and receive data from, the modules 303-1 to 303-K. The modules 303-1 to 303-K only have the capacity to provide data to, and receive data from, the logic interface 302.

[0062] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0063] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Electronic device comprising a memory (101; 200; 301), wherein: - first data (Data103, Data303-k) which are accessible only by a first module (103; 303-k) are stored in a first group (COL201) of memory cell columns of said memory (101; 200; 301); and - second data (Data104, Data303-k) which are accessible only by a second module (104; 303-k), different from the first module (103; 303-k), are stored in a second group (COL202) of memory cell columns of said memory (101; 200; 301), said first and second groups (COL1; COL2) being distinct, and said first and second groups (COL1; COL2) each having their own independent wiring system.

2. Device according to claim 1, wherein said first module (103; 303-k) is capable only of accessing said first group (COL201) of columns.

3. Device according to claim 1 or 2, wherein said second module (104; 303-k) is capable only of accessing said second group of columns (COL202).

4. Device according to claim 1 to 3, wherein said first data (Datal03, Data303-k) are sensitive data and the first module (103; 303-k) is a secure module.

5. Device according to any one of claims 1 to 4, wherein said second data (Datal04, Data303-k) are non-sensitive data and the second module (104; 303-k) is an insecure module.

6. Device according to any one of claims 1 to 5, wherein said device includes a logic interface (102) capable of managing the storage of said first and second data in said first and second groups.

7. A device according to any one of claims 1 to 6, wherein at least third data (Data303-k) that are accessible only by at least one third module (303-k) are stored in at least one third column group of memory cells of said memory (301), said first, second and third groups being distinct.

8. Device according to claim 7, wherein said at least one third module (303-k) is only capable of communicating with said at least one third group of columns.

9. Device according to any one of claims 1 to 8, wherein said memory (101; 200; 301) is selected from the group comprising: volatile memory, non-volatile memory, random access memory, read-only memory, flash memory, fuse memory.

10. Device according to claim 9, wherein said memory (101; 200; 301) is a fuse memory.

11. Device according to any one of claims 1 to 10, wherein said first and second groups (COL1; COL2) are physically distinct.

12. Device according to any one of claims 1 to 11, wherein there is no connection between the independent wiring systems.

13. Memory configured to be the memory of an electronic device according to any one of claims 1 to 12.

14. A method of storing, in a memory of an electronic device, first data (Data103, Data303-k) which are accessible only by a first module (103; 303-k) and second data (Data104, Data303-k) which are accessible only by a second module (104; 303-k), different from the first module (103; 303-k), in which: - said first data are stored in a first group (COL201) of memory cell columns of said memory (101; 200; 301), and - said second data are stored in a second group (COL202) of memory cell columns of said memory (101; 200; 301), said first and second groups (COL1; COL2) being distinct, said first and second groups (COL1; COL2) each having their own independent wiring system.