Display device

Abstract

To provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics, and to manufacture the highly reliable semiconductor device with high productivity and at a low cost.SOLUTION: In a manufacturing method of a semiconductor device comprising a thin film transistor in which a semiconductor layer including a channel formation region, a source region, and a drain region are formed by using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) for increasing purity of the oxide semiconductor layer and reducing impurities such as moisture is performed. Also, the heat-treated oxide semiconductor layers are slowly cooled under an oxygen atmosphere.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor device using an oxide semiconductor. [Background technology]

[0002] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used The technology of constructing thin film transistors (TFTs) is attracting attention. It is widely used in electronic devices such as C and electro-optical devices, especially in switching of image display devices. Development of this technology as a sensing element is being rushed.

[0003] Metal oxides exist in a wide variety of forms and are used for a variety of purposes. Indium oxide is well known. It is a material that has been used as a transparent electrode material in liquid crystal displays and other devices. do.

[0004] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include For example, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Thin-film transistors that use metal oxides as channel formation regions and that exhibit excellent semiconductor properties are already known. (See Patent Documents 1 to 4 and Non-Patent Document 1.)

[0005] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO)m (m: natural number) has a homologous phase and is composed of In, Ga and Zn. It is known as a multi-component oxide semiconductor having the above structure (see Non-Patent Documents 2 to 4).

[0006] Then, the oxide semiconductor composed of the above-mentioned In-Ga-Zn-based oxide is used as a thin film transistor. It has been confirmed that it is applicable as a channel layer of a resistor (see Patent Document 5, Non-Patent Documents 5 and 6). (See Patent Document 5, Non-Patent Documents 5 and 6).

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Non-Patent Documents

[0008]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

[0009] To manufacture a highly reliable semiconductor device having a thin film transistor with stable electrical characteristics. One of our objectives is to provide [Means for solving the problem]

[0010] A semiconductor layer including a channel formation region, a source region, and a drain region are formed as oxide semiconductor layers. In a method for manufacturing a semiconductor device having a thin film transistor, the purity of an oxide semiconductor layer is increased. Heat treatment to reduce impurities such as moisture (heat treatment for dehydration or dehydrogenation) In addition, impurities such as moisture that are present not only in the oxide semiconductor layer but also in the gate insulating layer are removed. In order to reduce impurities such as moisture that exist at the interface between the oxide semiconductor layer and the films that are in contact with each other above and below, Reduce the pure matter.

[0011] In this specification, an oxide semiconductor film used for a semiconductor layer including a channel formation region is a first oxide The oxide semiconductor film (first oxide semiconductor layer), the oxide semiconductor used in the source region and the drain region The conductive film is referred to as a second oxide semiconductor film (second oxide semiconductor layer).

[0012] In order to reduce impurities such as moisture, a first oxide semiconductor film and a second oxide semiconductor film are formed. After the formation of the oxide semiconductor film, nitrogen or rare earth metal is introduced into the first oxide semiconductor film and the second oxide semiconductor film in an exposed state. 200℃ or higher under inert gas atmosphere (argon, helium, etc.) or reduced pressure Heat treatment is preferably performed at a temperature higher than or equal to 400° C. and lower than or equal to 600° C., and the first oxide semiconductor film and After heating, the oxide semiconductor film is heated at room temperature or higher but not exceeding 100°C in an oxygen atmosphere. Cool slowly until the temperature reaches 50°C.

[0013] The film is formed by heat treatment under an inert gas atmosphere such as nitrogen or argon, or under reduced pressure. A thin oxide semiconductor film is formed by using a first oxide semiconductor film and a second oxide semiconductor film in which moisture content is reduced. The electrical properties of thin-film transistors have been improved, and the thin-film transistors that are both mass-producible and high-performance have been developed. To realize a transistor.

[0014] The heating temperature conditions were varied, and multiple samples were heat-treated under a nitrogen atmosphere using a thermal desorption analyzer. Measured by TDS (Thermal Desorption Spectroscopy) The results are shown in FIG.

[0015] The thermal desorption analyzer measures the gas components that are desorbed and generated from a sample while the sample is heated and heated in a high vacuum. This is an instrument that detects and identifies gases and gases that desorb from the surface and interior of a sample using a quadrupole mass spectrometer. Molecules can be observed using a thermal desorption analyzer manufactured by Electronic Science Corporation (product name: EMD-WA10 00S) was used, and the measurement conditions were a temperature rise of about 10°C / min, and a temperature of about 1×10 -7 (Pa) The vacuum level was 1500 V and the dwell time was 0.2 [sec] and the number of channels used is 23. Note that the ionization coefficient of H2O is 1.0 , H2O fragmentation coefficient of 0.805, H2O through-pass coefficient of 1.56 , the pumping rate of H2O is 1.0.

[0016] FIG. 29 shows a 50 nm thick In-Ga-Zn-O non-single crystal film formed on a glass substrate. The specimen (sample 1) was heated at 250°C in a nitrogen atmosphere for 1 hour. The sample (sample 3) was heated at 350°C for 1 hour in a nitrogen atmosphere. The sample (sample 2) was heated at 450°C for 1 hour in a nitrogen atmosphere. The treated sample (sample 4) was heated at 350°C for 10 hours in a nitrogen atmosphere. This is a comparison with the sample (sample 5) that was heat-treated in the above manner. 29 is a graph showing the results of S measurement. From the results of FIG. 29, when the heating temperature in a nitrogen atmosphere is high, The higher the value, the greater the amount of impurities such as moisture (H2O) that are desorbed from the In-Ga-Zn-O non-single crystal film. It is clear that the amount of material has been reduced.

[0017] In addition, from the graph in Figure 29, moisture (H2O) and other substances can be confirmed at temperatures between 200℃ and 250℃. The first peak indicates the desorption of impurities, and the second peak indicates the desorption of impurities such as moisture (H2O) at 300°C or higher. A second peak can be seen, indicating that the substance has been desorbed.

[0018] The samples that were heat-treated at 450°C in a nitrogen atmosphere were then left in the air at room temperature for one week. Even after leaving it for about a few hours, no moisture was observed to desorb at temperatures above 200°C. It has been found that Ga-Zn-O based non-single crystal films are stabilized.

[0019] In addition, TDS measurements revealed that in addition to H2O, H, O, OH, H2, O2, N, N2, and Ar When measurements were performed for each of these, H2O, H, O, and OH showed clear peaks. Peaks were observed for H2, O2, N, N2, and Ar, but no peaks were observed for the sample. The substrate used was a glass substrate with a 50 nm thick In-Ga-Zn-O non-single crystal film. The heating conditions were 250°C for 1 hour in a nitrogen atmosphere, 350°C for 1 hour in a nitrogen atmosphere, and Heat treatment was performed at 350°C for 10 hours in a nitrogen atmosphere and at 450°C for 1 hour as a comparative example. The In-Ga-Zn-O based non-single crystal film without the substrate and the glass substrate alone were measured. Figure 30 shows the TDS results for H, Figure 31 shows the TDS results for O, and Figure 32 shows the TDS results for OH. Figure 33 shows the TDS result of H2. Note that the oxygen in the nitrogen atmosphere under the above heating conditions was The concentration is below 20 ppm.

[0020] From the above results, by heat treatment of the In-Ga-Zn-O system non-single crystal film, In other words, the In-Ga-Zn-O system The main cause of this is the desorption of water (H2O) from the non-single crystal film, as shown in H in FIG. 30 and in FIG. 31. The measured TDS values ​​for O and OH shown in Figure 32 are affected by substances generated by the decomposition of water molecules. It is believed that hydrogen and OH are also contained in the In-Ga-Zn-O non-single crystal film. Therefore, these are also released concomitantly by the heat treatment.

[0021] In this specification, under an inert gas atmosphere of nitrogen or rare gas (argon, helium, etc.), Alternatively, the heat treatment under reduced pressure is called a heat treatment for dehydration or dehydrogenation. The term "dehydrogenation" refers only to the process of desorption of hydrogen as H2 by this heat treatment. Not only that, but also the dehydration or dehydrogenation includes the elimination of impurities including H, OH, etc. We will call them that for convenience.

[0022] By performing heat treatment under an inert gas atmosphere, impurities (H After reducing the amount of oxygen (O, H, OH, etc.) to increase the carrier concentration, the material is slowly cooled in an oxygen atmosphere. After the substrate is cooled slowly, an oxide insulating film is formed in contact with the oxide semiconductor layer to form an oxide semiconductor. Reducing the carrier concentration in the semiconductor layer leads to improved reliability.

[0023] The first oxide semiconductor film and the second oxide semiconductor film are formed by heat treatment in a nitrogen atmosphere. The resistance is reduced (the carrier concentration is increased, preferably 1×10 18 / cm 3 (or more) and low resistance The first oxide semiconductor film and the second oxide semiconductor film can be made to have low resistance. The first oxide semiconductor film and the second oxide semiconductor film are processed by an etching process. A first oxide semiconductor layer and a second oxide semiconductor layer are formed, and then an etching process is performed to form the first oxide semiconductor layer and the second oxide semiconductor layer. Processing is performed to form a semiconductor layer, a source region, and a drain region.

[0024] Then, an oxide insulating film is formed in contact with the first oxide semiconductor layer having a low resistance. At least a region of the first oxide semiconductor layer that is in contact with the oxide insulating film is made to have a high resistance ( The carrier concentration is reduced, preferably to 1×10 18 / cm 3 (less than 10000 times) and high resistance oxide semiconductor During the manufacturing process of the semiconductor device, the semiconductor device is exposed to an inert gas atmosphere (or The first oxide is formed by heating under reduced pressure, slowly cooling in an oxygen atmosphere, and forming an oxide insulating film. It is important to increase or decrease the carrier concentration in the first oxide semiconductor film and the second oxide semiconductor film. In addition, the first oxide semiconductor film and the second oxide semiconductor film, which were I-type, were dehydrated or dehydrated. By performing the heat treatment for oxidation, the first oxide semiconductor film and the second oxide semiconductor film are It becomes a deficient type and becomes N type (N - , N + Then, an oxide insulating film is formed. In other words, the first oxide semiconductor layer is made to have an i-type structure by being in an oxygen-excess state. This makes it possible to fabricate a semiconductor device having a thin film transistor with good electrical characteristics and high reliability. It will be possible to manufacture and provide

[0025] Note that the oxide insulating film formed in contact with the first oxide semiconductor layer having low resistance is resistant to moisture and water. Elementary ions and OH - In particular, an inorganic insulating film made of silicon oxide is used to block impurities such as silicon dioxide. A silicon nitride oxide film or a silicon oxynitride film is used.

[0026] Furthermore, an oxide insulating film is formed as a protective film on the semiconductor layer, the source region, and the drain region. A second heating may be performed after the first heating. After forming the oxide insulating film that will become the thin film, the second heating is performed. The variation in characteristics can be reduced.

[0027] In one embodiment of the present invention, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. A gate insulating layer is formed, a first oxide semiconductor film is formed over the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The membrane is heated to dehydrate or dehydrogenate, then cooled slowly in an oxygen atmosphere, and then cooled in an oxygen atmosphere. The first oxide semiconductor film and the second oxide semiconductor film are slowly cooled and selectively etched to form a first oxide semiconductor film. A first oxide semiconductor layer and a second oxide semiconductor layer are formed, a conductive film is formed over the first oxide semiconductor layer, a second oxide semiconductor layer, The conductive film is selectively etched to form a semiconductor layer, a source region, a drain region, a source electrode layer, and A gate insulating layer, a semiconductor layer, a source region, a drain region, a source electrode layer, and a drain electrode layer are formed. An oxide insulating film is formed on the source electrode layer and the drain electrode layer so as to be in contact with a part of the semiconductor layer. Reduce rear concentration.

[0028] In one embodiment of the present invention, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. A gate insulating layer is formed, a first oxide semiconductor film is formed over the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The film is heated in an inert atmosphere to increase the carrier concentration, and then cooled slowly in an oxygen atmosphere. The first oxide semiconductor film and the second oxide semiconductor film are slowly cooled in an oxygen atmosphere. A first oxide semiconductor layer and a second oxide semiconductor layer are formed by etching the first oxide semiconductor layer. A conductive film is formed over the conductive layer and the second oxide semiconductor layer. The semiconductor layer, the source region, the drain region, A source electrode layer and a drain electrode layer are formed, and a gate insulating layer, a semiconductor layer, a source region, a drain region, and a an oxide insulating film in contact with a part of the semiconductor layer on the in-region, the source electrode layer, and the drain electrode layer; to reduce the carrier concentration.

[0029] In one embodiment of the present invention, a gate electrode layer is formed, and a gate insulating film is formed on the gate electrode layer. A gate insulating layer is formed, a first oxide semiconductor film is formed over the gate insulating layer, and the first oxide semiconductor A second oxide semiconductor film is formed on the conductive film, and the first oxide semiconductor film and the second oxide semiconductor film are The film was heated under reduced pressure to increase the carrier concentration, then cooled slowly in an oxygen atmosphere. The first oxide semiconductor film and the second oxide semiconductor film are slowly cooled in air and then selectively etched. A first oxide semiconductor layer and a second oxide semiconductor layer are formed by the above-mentioned method. a conductive film is formed over the first oxide semiconductor layer and the second oxide semiconductor layer; The semiconductor layer, the source region, the drain region, the source potential, and the conductive film are selectively etched. A gate insulating layer, a semiconductor layer, a source region, a drain region, and a drain electrode layer are formed. An oxide insulating film is formed over the source electrode layer and the drain electrode layer so as to be in contact with a part of the semiconductor layer. This reduces the carrier concentration.

[0030] As an oxide semiconductor layer that can be used as a semiconductor layer, a source region, and a drain region, For the ZnO, an oxide material with semiconductor properties can be used. For example, InMO3(ZnO) m ( m>0), and the thin film is used as a semiconductor layer, a source region, and a drain region. A thin film transistor was fabricated using the above-mentioned metal oxides. M is Ga, Fe, Ni, Mn, and C. o represents one or more metal elements selected from the above. For example, M is Ga. In addition, when the above metal elements other than Ga are included, such as Ga and Ni or Ga and Fe, In addition, in the above oxide semiconductor, impurity elements other than the metal element contained as M are also included. The element contains Fe, Ni, or other transition metal elements, or oxides of said transition metals. In this specification, InMO3(ZnO) m The structure represented by (m>0) Among oxide semiconductors, oxide semiconductors with a structure containing Ga as M are called In-Ga-Zn-O system This is called an oxide semiconductor, and its thin film is also called an In-Ga-Zn-O non-single crystal film.

[0031] In addition to the above, In-Sn-Zn- O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, S n-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In In addition, the above-mentioned oxide semiconductors can be used. The oxide semiconductor layer may contain silicon oxide. By including SiOx (X>0), the formation of an oxide semiconductor layer during the manufacturing process When the oxide semiconductor is subsequently subjected to a heat treatment, crystallization can be suppressed. The conductor layer is preferably in an amorphous state, and may be partially crystallized.

[0032] The oxide semiconductor is preferably an oxide semiconductor containing In, more preferably an oxide semiconductor containing In and In order to make the oxide semiconductor layer i-type (intrinsic), Hydrogenation or dehydrogenation is effective.

[0033] The source and drain regions of the thin film transistor (n + layer, also called buffer layer) The oxide semiconductor layer used has a higher electrical conductivity than the oxide semiconductor layer used as a channel formation region. (electrical conductivity).

[0034] In addition, since thin-film transistors are easily damaged by static electricity, etc., It is preferable to provide a protection circuit for protecting the driver circuit on the same substrate as the line. is preferably configured using a nonlinear element using an oxide semiconductor.

[0035] In addition, the gate insulating layer, the first oxide semiconductor film, and the second oxide semiconductor film are exposed to air. Continuous processing without any need for in-situ processing (also known as continuous processing, in-situ process, or continuous film formation) By performing the process continuously without exposing the gate insulating layer and the first The interface between the first oxide semiconductor film and the second oxide semiconductor film is preferably free of large amounts of water or hydrocarbons. The interfaces of each layer can be formed without being contaminated by gas components or impurity elements floating in the air. Therefore, the variation in the characteristics of the thin film transistors can be reduced.

[0036] In this specification, the term "continuous processing" refers to a process that starts with the first processing step performed by the PCVD method or the sputtering method and ends with the PC During the series of processes up to the second processing step performed by the VD method or sputtering method, the substrate to be processed is placed The atmosphere is always in a vacuum or inert gas without coming into contact with contaminated atmosphere such as air. This refers to the atmosphere (nitrogen or rare gas) being controlled. Continuous processing is performed. This allows the cleaned substrate to be treated without re-adhering moisture and other impurities, and allows the substrate to be treated in a film-forming or other similar manner. It is possible.

[0037] To carry out a series of processes from the first processing step to the second processing step in the same chamber is considered to be within the scope of continuous processing in this specification.

[0038] In addition, a series of processes from the first process to the second process are carried out in different chambers. In this case, after the first processing step is completed, the substrate is transported between chambers without being exposed to the atmosphere. The application of a second treatment is also considered to be within the scope of the continuous treatment in this specification.

[0039] Between the first and second processing steps, a substrate transfer step, an alignment step, and a slow cooling step are performed. or a step of heating or cooling the substrate to a temperature required for the second step. However, such a process is considered to be within the scope of the continuous process in this specification.

[0040] However, the first step is to use liquids in the cleaning process, wet etching, and resist formation. If the first processing step is between the second processing step, it does not fall within the scope of continuous processing as used herein. Let's say that's not the case.

[0041] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the specific names used in this specification are not intended to identify the invention. This does not indicate the

[0042] In addition to liquid crystal display devices, display devices having a driving circuit include light-emitting devices using light-emitting elements. display devices, and display devices also called electronic paper using electrophoretic display elements. .

[0043] In a light-emitting display device using a light-emitting element, a pixel portion has a plurality of thin film transistors. In the elemental portion, the gate electrode of a thin film transistor and the source wiring of another transistor, The light emitting device has a portion for connecting a drain wiring. In the driving circuit, the gate electrode of the thin film transistor and the source The semiconductor device has a portion for connecting a wiring or a drain wiring.

[0044] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. Effect of the Invention

[0045] A thin film transistor having stable electrical characteristics can be manufactured and provided. It is possible to provide a semiconductor device having a thin film transistor with good electrical characteristics and high reliability. Cut. [Brief description of the drawings]

[0046] [Figure 1]1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 2] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 3] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 8] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 9] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 10] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 11] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 12] 1A and 1B are diagrams illustrating a pixel equivalent circuit of a semiconductor device. [Figure 13] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 14] FIG. 1 is a block diagram illustrating a semiconductor device. [Figure 15] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 16] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 17] 4 is a timing chart illustrating the operation of the signal line driver circuit. [Figure 18] FIG. 2 is a diagram illustrating a configuration of a shift register. [Figure 19] 19 is a diagram for explaining a connection configuration of the flip-flop shown in FIG. 18 . [Figure 20] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 21] 13A to 13C are diagrams illustrating calculation results of oxygen concentrations in oxide semiconductor layers. [Figure 22] FIG. 1 is an external view showing an example of an electronic book. [Diagram 23] FIG. 1 is an external view showing an example of a television device and a digital photo frame. [Figure 24]FIG. 1 is an external view showing an example of a gaming machine. [Diagram 25] FIG. 1 is an external view showing an example of a portable computer and a mobile phone. [Figure 26] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 27] 1A to 1C are diagrams illustrating a semiconductor device. [Figure 28] FIG. [Figure 29] 1 is a graph showing the results of TDS measurement. [Diagram 30] 1 is a graph showing the TDS results of H. [Diagram 31] 1 is a graph showing the TDS results of O. [Diagram 32] 1 is a graph showing the TDS results of OH. [Diagram 33] 1 is a graph showing the TDS results of H2. [Diagram 34] 1A and 1B are diagrams illustrating a structure of an oxide semiconductor layer used in calculations. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0047] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. It is understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should be interpreted as being limited to the following description of the embodiment. In the configuration described below, parts having the same parts or similar functions are not included. The same reference numerals are used in common between different drawings for the corresponding parts, and the repeated explanations will be omitted.

[0048] (Embodiment 1) A semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIGS.

[0049] FIG. 3A is a plan view of a thin film transistor 470 included in the semiconductor device, and FIG. 3(A). The thin film transistor 470 is an inverted staggered type. The thin film transistor is a gate electrode layer on a substrate 400 having an insulating surface. 401, a gate insulating layer 402, a semiconductor layer 403, a source region or drain region 404a, 404b, and source or drain electrode layers 405a and 405b. An oxide insulating film 407 is provided to cover the transistor 470 and to be in contact with the semiconductor layer 403. do.

[0050] The semiconductor layer 403 and the source or drain regions 404a, 404b are at least After the first oxide semiconductor film and the second oxide semiconductor film are formed, moisture or the like that is an impurity is reduced. Heat treatment for dehydration or dehydrogenation is performed to reduce the resistance (carrier concentration). degree is increased, preferably 1×10 18 / cm 3 After the above steps, the first oxide semiconductor layer By forming the oxide insulating film 407 in contact with the substrate, the resistance is increased (the carrier concentration is decreased, which is preferable). Preferably 1×10 18 / cm 3 less than 1×10 14 / cm 3 (See below) The first oxide semiconductor layer can be used as a channel formation region.

[0051] In addition, impurities such as water (H2O) are removed by heat treatment for dehydration or dehydrogenation. After the desorption process, it is preferable to slowly cool the mixture in an oxygen atmosphere. After heat treatment for oxidation and gradual cooling in an oxygen atmosphere, and forming an oxide insulating film or the like to reduce the carrier concentration of the first oxide semiconductor layer. This leads to an improvement in the reliability of the thin film transistor 470.

[0052] In addition, not only in the semiconductor layer 403 and the source or drain regions 404a and 404b, , in the gate insulating layer 402, and in contact with the upper and lower surfaces thereof, and a semiconductor layer made of an oxide semiconductor 403, specifically, the interface between the gate insulating layer 402 and the semiconductor layer 403, and the oxide insulating layer Impurities such as moisture present at the interface between the film 407 and the semiconductor layer 403 are reduced.

[0053] Note that the semiconductor layer 403, which is an oxide semiconductor layer, the source region and the drain region 404a, The source and drain electrode layers 405a and 405b in contact with each other are made of titanium, alumina, Aluminum, manganese, magnesium, zirconium, beryllium, or thorium The material may be one or more selected from the above elements. In addition, an alloy film made up of the above elements may be used. may be laminated.

[0054] A semiconductor layer 403 including a channel formation region and a source or drain region 404a, For 4b, an oxide material having semiconductor properties may be used. For example, InMO3(Z nO) m In particular, an oxide semiconductor having a structure represented by In- It is preferable to use a Ga-Zn-O-based oxide semiconductor. M is gallium (Ga), One selected from iron (Fe), nickel (Ni), manganese (Mn) and cobalt (Co). It indicates a metal element or elements of the metal. For example, M can be Ga, or G In some cases, the above metal elements other than Ga may be included, such as a and Ni or Ga and Fe. In the oxide semiconductor, in addition to the metal element M, Fe, N are also included as impurity elements. Other transition metal elements such as i, or oxides of said transition metals are included. In the book, InMO3(ZnO) m (m>0) Among them, oxide semiconductors with a structure containing at least Ga as M are called In-Ga-Zn-O oxides. The thin film is also called an In-Ga-Zn-O based non-single crystal film.

[0055] In addition to the above, In-Sn-Zn- O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, S n-Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In In addition, the above-mentioned oxide semiconductors can be used. The semiconductor material may contain silicon oxide.

[0056] A source region is provided between a semiconductor layer (also referred to as a first oxide semiconductor layer) and a source electrode layer. The drain region is provided between the source region and the drain electrode layer. An oxide semiconductor layer exhibiting a conductivity type of 0.1 to 0.2 (also referred to as a second oxide semiconductor layer) can be used. do.

[0057] Also, it is used as the source region or drain region 404a, 404b of the thin film transistor. The second oxide semiconductor layer is formed to have a thickness larger than that of the first oxide semiconductor layer used as a channel formation region. It is preferable that the thickness of the conductive layer is thinner than that of the conductive layer, and that the conductive layer has a higher electrical conductivity.

[0058] The first oxide semiconductor layer used as the channel forming region has an amorphous structure, and the source region The second oxide semiconductor layer used as the drain region has an amorphous structure with crystal grains (nanocrysts). The second oxide used as the source and drain regions may include a silicon nitride film. The crystal grains (nanocrystals) in the semiconductor layer have a diameter of 1 nm to 10 nm, typically 2 nm to It is about 4nm.

[0059] In this embodiment, the semiconductor layer 403 including the channel formation region and the source or drain region n area (n + In-Ga-Zn-O A non-single crystal film based on the GaN-based ...

[0060] 1 and 2 show cross-sectional views of a manufacturing process of a thin film transistor 470. FIG.

[0061] A gate electrode layer 401 is provided over a substrate 400 having an insulating surface. An insulating film may be provided between the substrate 400 and the gate electrode layer 401. These films have the function of preventing the diffusion of impurity elements, and are used in silicon nitride films, silicon oxide films, and silicon oxynitride films. or a silicon oxynitride film. The material of the gate electrode layer 401 is molybdenum, titanium, chromium, tantalum, tungsten, etc. Metallic materials such as stainless steel, aluminum, copper, neodymium, scandium, etc., or materials that contain these as their main components The insulating film 10 can be formed as a single layer or a laminated layer using an alloy material.

[0062] For example, the gate electrode layer 401 may have a two-layer laminate structure of molybdenum on an aluminum layer. A two-layer structure with a layer of molybdenum laminated on a copper layer, or a two-layer structure with a layer of molybdenum laminated on a copper layer, or The titanium nitride layer and the tantalum nitride layer are laminated on the copper layer. It is preferable to use a two-layer structure in which a tungsten layer is laminated with a tungsten layer. A tungsten layer or a tungsten nitride layer and an aluminum-silicon alloy layer or an aluminum It is preferable to use a laminate of a titanium-titanium alloy layer and a titanium nitride layer or a titanium layer. It is nice.

[0063] A gate insulating layer 402 is formed on the gate electrode layer 401 .

[0064] The gate insulating layer 402 is a silicon oxide layer formed by using a plasma CVD method, a sputtering method, or the like. A silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer may be formed as a single layer or a stacked layer. For example, the deposition gas can be SiH4, oxygen, and nitrogen, and the plasma CVD method can be used. A silicon oxynitride layer may be formed.

[0065] A first oxide semiconductor film 430 and a second oxide semiconductor film 433 are formed over the gate insulating layer 402. The first oxide semiconductor film 430 is a channel forming film. The second oxide semiconductor film 433 is a semiconductor layer that functions as a source region and a drain region. It becomes an area.

[0066] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced to the plasma Reverse sputtering is performed to generate ions, and dust adhering to the surface of the gate insulating layer 402 is removed. In reverse sputtering, the target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power source under atmospheric pressure to form plasma near the substrate and modify the surface. It is to be noted that nitrogen, helium, or the like may be used in place of the argon atmosphere. Alternatively, the treatment may be performed in an atmosphere in which oxygen, N2O, etc., has been added to the argon atmosphere. Alternatively, the treatment may be performed in an atmosphere containing Cl2, CF4, etc.

[0067] An In-Ga-Zn-O based non-single crystal film is used as the oxide semiconductor film. The film is formed by sputtering using an In-Ga-Zn-O oxide semiconductor target. In addition, the oxide semiconductor film is heated under a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a rare It can be formed by sputtering in an atmosphere of gas (typically argon) and oxygen. can.

[0068] The gate insulating layer 402, the first oxide semiconductor film 430, and the second oxide semiconductor film 433 are The layers may be successively formed without being exposed to the atmosphere. By doing so, the interface is free from atmospheric components such as water and hydrocarbons, as well as impurities suspended in the air. Since each layer interface can be formed without being contaminated by elements, thin film transistors, in particular, This can reduce the variation in quality.

[0069] The first oxide semiconductor film 430 and the second oxide semiconductor film 433 are placed in an inert gas atmosphere (nitrogen or helium, neon, argon, etc.) or under reduced pressure, The first oxide semiconductor film 430 and the second oxide semiconductor film 440 are cooled slowly in an oxygen atmosphere (see FIG. 1B). The oxide semiconductor film 433 is subjected to heat treatment under the above atmosphere to obtain the first oxide semiconductor film 4 Impurities such as hydrogen and water contained in the oxide semiconductor film 30 and the second oxide semiconductor film 433 are removed. can be done.

[0070] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen gas introduced into the heat treatment device does not contain impurities such as hydrogen. or rare gases such as helium, neon, argon, etc., with a purity of 6N (99.9999%) or more Preferably, the concentration of impurities is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to set the concentration to 0.1 ppm or less.

[0071] Heat treatment can be performed using an electric furnace or a GRTA (Gas-Reactor-Atomic-Tapered Atomic) method. Rapid Thermal Annealing (LRTA) using lamp light (La Use instantaneous heating methods such as the mp Rapid Thermal Anneal method. It is possible.

[0072] Here, one type of heat treatment of the first oxide semiconductor film 430 and the second oxide semiconductor film 433 is As an embodiment, a heating method using an electric furnace 601 will be described with reference to FIG.

[0073] FIG. 28 is a schematic diagram of an electric furnace 601. A heater 603 is installed on the outside of a chamber 602. The chamber 602 is provided with a heating element for heating the chamber 602. A susceptor 605 for mounting a substrate 604 is provided in the chamber 602. The chamber 602 is provided with a gas supply means 606 and an exhaust means 60 7 is provided. Gas is introduced into the chamber 602 by a gas supply means 606. In addition, the inside of the chamber 602 is evacuated by the exhaust means 607, or the chamber 602 is evacuated. The inside of the electric furnace 601 is decompressed. The temperature rise characteristic of the electric furnace 601 is set to 0.1°C / min or more and 20°C / min or less. It is preferable that the temperature drop rate of the electric furnace 601 is 0.1° C. / min or more and 15 It is preferable to set the rate to .degree. C. / min or less.

[0074] The gas supply means 606 includes a gas supply source 611a, a gas supply source 611b, and a pressure regulating valve 612a. , pressure regulating valve 612b, refiner 613a, refiner 613b, mass flow controller 61 4a, mass flow controller 614b, stop valve 615a, stop valve 61 In this embodiment, the gas supply source 611a, the gas supply source 611b, and the chamber It is preferable to provide a purifier 613a and a purifier 613b between the purifier 602 and the purifier 613. a, purifier 613b, the gas supply source 611a, the gas supply source 611b are provided. The purifier 613a purifies impurities such as water and hydrogen from the gas introduced into the chamber 602. By removing the gas using the purifier 613b, water, hydrogen, etc. are prevented from entering the chamber 602. can be reduced.

[0075] In this embodiment, nitrogen or a rare gas is supplied from a gas supply source 611a and a gas supply source 611b. The chamber is filled with nitrogen or rare gas and heated to 200° C. or higher. In a chamber 602 heated to 600° C. or less, preferably 400° C. to 450° C. In this case, the first oxide semiconductor film 430 and the second oxide semiconductor film 431 are formed on a substrate 604. The first oxide semiconductor film 430 and the second oxide semiconductor film 433 are heated. The above can be subjected to dehydration or dehydrogenation.

[0076] Alternatively, the temperature is increased by 200° C. to 600° C., preferably 400° C. or higher, under reduced pressure by an exhaust means. In a chamber 602 heated to 450° C. or less, a first The oxide semiconductor film 430 and the second oxide semiconductor film 433 are heated to form the first oxide semiconductor film 430 and the second oxide semiconductor film 433. The semiconductor film 430 and the second oxide semiconductor film 433 can be dehydrated or dehydrogenated. Cut.

[0077] Next, the introduction of nitrogen or rare gas from the gas supply source 611a into the chamber 602 is stopped. Next, oxygen is supplied from the gas supply source 611b to the chamber 60. 2, and the chamber 602 of the heating device is gradually cooled. The inside of the chamber is filled with oxygen and the substrate 604 is gradually cooled. It is preferable that the oxygen introduced into the chamber 602 does not contain impurities such as water and hydrogen. Alternatively, the purity of oxygen introduced into the chamber 602 from the gas supply source 611b is set to 6N ( 99.9999%) or more, preferably 7N (99.99999%) or more (i.e., in oxygen It is preferable to keep the impurity concentration of the acid below 1 ppm, preferably below 0.1 ppm. The resistance of the nitride semiconductor film is reduced by heat treatment in an inert gas atmosphere or under reduced pressure. The carrier concentration is increased, preferably 1×10 18 / cm 3 The first low-resistance The oxide semiconductor film 434 and the second oxide semiconductor film 435 can be formed.

[0078] As a result, the reliability of the thin film transistor to be formed later can be improved.

[0079] In addition, when the heat treatment is performed under reduced pressure, oxygen is flowed into the chamber 602 after the heat treatment. The pressure can then be returned to atmospheric pressure and cooled.

[0080] Also, oxygen is introduced into the chamber 602 from the gas supply source 611b, and at the same time, helium, Introduce one or both of a rare gas such as neon or argon and nitrogen into the chamber 602. You may do so.

[0081] After the substrate 604 in the chamber 602 of the heating device was cooled to 300° C., 4 may be moved to a room temperature atmosphere. This can reduce the cooling time of the substrate 604. can.

[0082] In addition, if the heating device is a multi-chamber device, the heating process and the cooling process are performed in different chambers. Typically, nitrogen or a rare gas is filled and the temperature is 200°C to 600°C. In the first chamber, which is preferably heated to 400° C. or higher and 450° C. or lower, The oxide semiconductor film on the plate is heated. Then, the plate is transferred to a transfer chamber into which nitrogen or a rare gas is introduced. The above-mentioned oxidizing agent is placed in a second chamber which is filled with oxygen and is at a temperature of 100° C. or less, preferably at room temperature. The heat-treated substrate is then moved and cooled. Through these steps, throughput is improved. It is possible to do so.

[0083] After heat treatment under an inert gas atmosphere or reduced pressure, the mixture is heated at room temperature or above 100 The temperature was gradually reduced to below 0.degree. C., and the first oxide semiconductor film 434 and the second oxide semiconductor film 435 were The substrate with the provided structure is removed from the heating apparatus and a photolithography process is performed.

[0084] The first oxide semiconductor film 434 and the first oxide semiconductor film 435 after heat treatment under an inert gas atmosphere or reduced pressure The second oxide semiconductor film 435 is preferably in an amorphous state. It may be possible to convert it into

[0085] The first oxide semiconductor film 434 and the second oxide semiconductor film 435 are formed by a photolithography process. As a result, the first oxide semiconductor layer 431 and the second oxide semiconductor layer Process it into 436 (see Figure 1(C)).

[0086] Over the gate insulating layer 402, the first oxide semiconductor layer 431, and the second oxide semiconductor layer 436 A conductive film is formed on the substrate.

[0087] The conductive film material is an element selected from Al, Cr, Ta, Ti, Mo, and W, or Examples of the thin film include an alloy containing the above-mentioned elements as components, and an alloy film of a combination of the above-mentioned elements.

[0088] In addition, when a heat treatment is performed after the formation of the conductive film, the conductive film is required to have heat resistance capable of withstanding the heat treatment. Aluminum alone has problems such as poor heat resistance and susceptibility to corrosion. Therefore, it is formed by combining it with a heat-resistant conductive material. Heat-resistant conductive material combined with Al The materials are titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (M o), chromium (Cr), Nd (neodymium), Sc (scandium), or or an alloy film containing the above-mentioned elements as components, or an alloy film of a combination of the above-mentioned elements, It is formed of a nitride containing the selected elements.

[0089] The first oxide semiconductor layer 431, the second oxide semiconductor layer 436, and the conductive film are subjected to an etching process. The first oxide semiconductor layer 432 and the source or drain region are etched by the etching process. 404a, 404b, and the source electrode layer or drain electrode layer 405a, 405b are formed. Note that the first oxide semiconductor layer 431 is only partly etched (see FIG. 2A). This results in a first oxide semiconductor layer 432 having a groove (a depression).

[0090] A silicon oxide film is formed on the first oxide semiconductor layer 432 by sputtering to form an oxide insulating film 407. The oxide insulating film 407 formed in contact with the low-resistance oxide semiconductor layer is Water, hydrogen ions, and OH - It does not contain impurities such as these, and prevents them from entering from the outside. A blocking inorganic insulating film is used, specifically a silicon oxide film or a silicon oxynitride film. .

[0091] In this embodiment, a silicon oxide film is formed as the oxide insulating film 407 to a thickness of 300 nm. The substrate temperature during film formation may be from room temperature to 300° C., and in this embodiment, it is set to 100° C. The silicon oxide film is formed by sputtering in a rare gas (typically argon) atmosphere. It can be carried out under an oxygen atmosphere or under an atmosphere of rare gas (typically argon) and oxygen. In addition, it is possible to use a silicon oxide target or a silicon target. For example, a silicon target may be used to perform sputtering in an oxygen and nitrogen atmosphere. A silicon nitride film can be formed.

[0092] A thin film is formed on the first oxide semiconductor layer 432 having a low resistance by a sputtering method, a PCVD method, or the like. When the oxide insulating film 407 is formed, the resistance of the first oxide semiconductor layer 432 is reduced. At least the region in contact with the oxide insulating film 407 is made to have a high resistance (the carrier concentration is reduced, preferably 1×10 18 / cm 3 less than 1×10 14 / cm 3 (below) and high resistance During the manufacturing process of the semiconductor device, an inert gas atmosphere is used. Heating under atmospheric pressure (or reduced pressure), slow cooling in an oxygen atmosphere, and formation of oxide insulating film Therefore, it is important to increase or decrease the carrier concentration in the oxide semiconductor layer. The oxide semiconductor layer 432 becomes the semiconductor layer 403 having a high resistance oxide semiconductor region, and serves as a thin-film transistor. A star 470 can be fabricated (see FIG. 2(B)).

[0093] The heat treatment for the dehydration or dehydrogenation is performed to form a first oxide semiconductor Impurities (such as HO, H, and OH) contained in the first oxide semiconductor film and the second oxide semiconductor film are reduced. After increasing the rear concentration, the first oxide semiconductor is gradually cooled in an oxygen atmosphere. The insulating film is processed into an island-shaped first oxide semiconductor layer, and an oxide insulating film is formed in contact with the first oxide semiconductor layer. The carrier concentration of the first oxide semiconductor layer is reduced by forming a film or the like, and the first oxide semiconductor layer is used as a semiconductor layer. This can improve the reliability of the thin film transistor 470.

[0094] After the oxide insulating film 407 is formed, Then, the thin film transistor 470 is subjected to a heat treatment (preferably at 150° C. or higher and lower than 350° C.). For example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. Then, the semiconductor layer 403 is heated in contact with the oxide insulating film 407. This heat treatment (preferably The heating temperature is not particularly limited as long as it is after the oxide insulating film 407 is formed. In other processes, such as the heat treatment during resin film formation and the process for reducing the resistance of the transparent conductive film, By combining this with the heat treatment, it is possible to perform this without increasing the number of steps.

[0095] (Embodiment 2) A semiconductor device and a manufacturing method thereof will be described with reference to FIG. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1, A repeated explanation will be omitted.

[0096] The thin film transistor 471 shown in FIG. In this example, a conductive layer 408 is provided so as to overlap with the insulating film.

[0097] 26 is a cross-sectional view of a thin film transistor 471 included in the semiconductor device. 471 is a bottom gate type thin film transistor, and 472 is a substrate having an insulating surface. 00, a gate electrode layer 401, a gate insulating layer 402, a semiconductor layer 403, a source region or Drain regions 404a, 404b and source or drain electrode layers 405a, 40 5b includes a conductive layer 408. The conductive layer 408 is oxidized so as to overlap the gate electrode layer 401. It is provided on the insulating film 407 .

[0098] The conductive layer 408 is a gate electrode layer 401, a source electrode layer or a drain electrode layer 405a, It can be formed by using the same material and method as 5b. When a pixel electrode layer is provided, The conductive layer 408 may be formed using the same material and method as the electrode layer. A stack of a titanium film, an aluminum film, and a titanium film is used as the insulating film.

[0099] The conductive layer 408 may have a potential equal to or different from that of the gate electrode layer 401. The conductive layer 408 can also function as a gate electrode layer of the floating gate electrode 404. It may be in a state.

[0100] By providing the conductive layer 408 in a position overlapping with the semiconductor layer 403, In the bias-thermal stress test (hereinafter referred to as BT test) to check the reliability, The change in the threshold voltage of the thin film transistor 471 before and after the T test can be reduced. In particular, after the substrate temperature is raised to 150°C, the voltage applied to the gate is set to -20V. This makes it possible to suppress the fluctuation of the threshold voltage in the BT test.

[0101] This embodiment mode can be implemented in appropriate combination with the first embodiment mode.

[0102] (Embodiment 3) A semiconductor device and a manufacturing method thereof will be described with reference to FIG. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1, A repeated explanation will be omitted.

[0103] The thin film transistor 472 shown in FIG. 27 has a gate electrode layer 401 and a channel of a semiconductor layer 403. A conductive layer 409 is provided so as to overlap with the insulating region with an oxide insulating film 407 and an insulating layer 410 interposed therebetween. This is an example.

[0104] 27 is a cross-sectional view of a thin film transistor 472 included in the semiconductor device. 472 is a bottom gate type thin film transistor, and 473 is a substrate having an insulating surface. 00, a gate electrode layer 401, a gate insulating layer 402, a semiconductor layer 403, a source region or Drain regions 404a, 404b and source or drain electrode layers 405a, 40 5b includes a conductive layer 409. The conductive layer 409 is oxidized so as to overlap the gate electrode layer 401. It is provided on the insulating film 407 and the insulating layer 410 .

[0105] In this embodiment, an insulating layer 410 functioning as a planarizing film is stacked over the oxide insulating film 407. The oxide insulating film 407 and the insulating layer 410 are formed on the source or drain electrode layer 405b. The opening and the insulating layer 410 are formed in the oxide insulating film 407 and the insulating layer 410. A conductive film is formed over the layer 410 and etched into a desired shape. In this manner, in the process of forming the pixel electrode layer 411, the same materials and methods are used. The conductive layer 409 can be formed using the above-mentioned. In this embodiment mode, The conductive layer 409 is made of an indium oxide tin oxide alloy containing silicon oxide (In- Sn-O oxide) is used.

[0106] The conductive layer 409 is formed on the gate electrode layer 401 and the source or drain electrode layer 405a. , 405b may be formed using the same material and method.

[0107] The conductive layer 409 may have a potential equal to or different from that of the gate electrode layer 401. The conductive layer 409 can also function as a gate electrode layer of the floating gate electrode 402. It may be in a state.

[0108] By providing the conductive layer 409 in a position overlapping with the semiconductor layer 403, In the bias-thermal stress test (hereinafter referred to as BT test) to check the reliability, The change in the threshold voltage of the thin film transistor 472 before and after the T test can be reduced. Cut.

[0109] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0110] (Embodiment 4) A manufacturing process of a semiconductor device including a thin film transistor will be described with reference to FIGS. .

[0111] In FIG. 4A, a light-transmitting substrate 100 is made of barium borosilicate glass or aluminum. A glass substrate such as borosilicate glass can be used.

[0112] Next, a conductive layer is formed on the entire surface of the substrate 100, and then a first photolithography process is performed. A resist mask is formed, and unnecessary parts are removed by etching to form wiring and electrodes (gate A gate wiring including an electrode layer 101, a capacitance wiring 108, and a first terminal 121) are formed. At this time, etching is performed so that at least the end of the gate electrode layer 101 is tapered. do.

[0113] The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 of the terminal portion are Heat-resistant conductive materials such as titanium (Ti), tantalum (Ta), tungsten (W), and molybdenum (Mo). Selected from Butan (Mo), Chromium (Cr), Nd (Neodymium), and Scandium (Sc). an alloy film containing the above elements or a combination of the above elements; Alternatively, it is preferable to form the insulating layer from a nitride containing the above-mentioned elements. When forming the film using low-resistance conductive materials such as (Al) or copper (Cu), use only Al or Cu. When used alone, it has problems such as poor heat resistance and susceptibility to corrosion, so it is used in combination with the above heat-resistant conductive materials. Combine and form.

[0114] Next, a gate insulating layer 102 is formed over the entire surface of the gate electrode layer 101 (see FIG. 4A). The gate insulating layer 102 is formed by sputtering, PCVD, or the like, and has a thickness of 50 to 250 nm. Let m.

[0115] For example, a silicon oxide film is formed as the gate insulating layer 102 by sputtering to a thickness of 100 nm. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film. Other insulating films such as silicon oxynitride film, silicon nitride film, aluminum oxide film, and tantalum oxide film are also used. Films may be used and may be formed as single layer or laminate structures made of these materials.

[0116] Next, a first oxide semiconductor film 131 (first In—Ga—Zn After the plasma treatment, the first oxide semiconductor is formed without being exposed to the atmosphere. By forming the semiconductor film 131, dust and moisture do not adhere to the interface between the gate insulating layer and the semiconductor film. Here, an oxide semiconductor containing In, Ga, and Zn with a diameter of 8 inches is used. The substrate and the target were aligned using a target (In2O3:Ga2O3:ZnO=1:1:1). The distance between the nozzles was 170 mm, the pressure was 0.4 Pa, the DC power supply was 0.5 kW, and the gas was argon. Alternatively, the film is formed in an oxygen atmosphere. If a pulsed direct current (DC) power supply is used, dust can be reduced. In this case, the thickness distribution of the first oxide semiconductor film 131 is preferably uniform. The first oxide semiconductor film 131 is an In—Ga—Zn—O-based oxide semiconductor film. A 50 nm thick In-Ga-Zn-O system was sputtered using a ZnO semiconductor target. A non-single crystal film is deposited.

[0117] Next, without exposing the second oxide semiconductor film 136 (second In-Ga-Zn- In this example, In2O3 The film was formed using a target of Ga2O3:ZnO=1:1:1 under the following conditions: pressure of 0.4 The pressure was set to 500 Pa, the power was set to 500 W, the deposition temperature was set to room temperature, and the argon gas flow rate was set to 40 sccm. The substrate is then introduced for sputtering. Even though a target was used, the I film immediately after deposition contained crystal grains with sizes of 1 nm to 10 nm. In some cases, a non-single crystal film of n-Ga-Zn-O system may be formed. Film forming pressure (0.1 Pa to 2.0 Pa), power (250 W to 3000 W: 8 inch diameter), temperature By appropriately adjusting the temperature (room temperature to 100°C) and reactive sputtering deposition conditions, the effectiveness of the crystal grains can be improved. The density and diameter of the crystal grains can be adjusted in the range of 1 nm to 10 nm. The thickness of the second In-Ga-Zn-O based non-single crystal film is 5 nm to 20 nm. When crystal grains are contained in the film, the size of the crystal grains contained therein does not exceed the film thickness. The thickness of the second In-Ga-Zn-O based non-single crystal film is set to 5 nm.

[0118] The first In-Ga-Zn-O based non-single crystal film is a second In-Ga-Zn-O based non-single crystal film For example, the deposition conditions for the second In-Ga-Zn-O-based non-single crystal film are different from those for the first In-Ga-Zn-O-based non-single crystal film. The ratio of the oxygen gas flow rate to the argon gas flow rate in the first In-Ga-Zn-O system non-monocrystalline The ratio of the oxygen gas flow rate to the total film forming conditions is set to be high. The deposition conditions for the In-Ga-Zn-O non-single crystal film in 2 are rare gas (argon or helium) etc.) atmosphere (or oxygen gas 10% or less, argon gas 90% or more), and the first I The conditions for forming the n-Ga-Zn-O non-single crystal film were an oxygen mixed atmosphere (oxygen gas flow rate was 100% of rare gas). (greater than the gas flow rate).

[0119] The second In-Ga-Zn-O non-single crystal film was deposited in the same chamber as the previous reverse sputtering. The same chamber may be used for the reverse sputtering, or a different chamber may be used for the reverse sputtering. The film may be formed using a bar.

[0120] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and DC sputtering. There is also the pulsed DC sputtering method, which applies a pulsed bias. The DC sputtering method is mainly used for depositing insulating films, while the DC sputtering method is mainly used for depositing metal films. It is used in.

[0121] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0122] Also, a sputtering apparatus using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and ECR sputtering using plasma generated by microwaves without glow discharge. There is a sputtering apparatus that uses this method.

[0123] In addition, in a film formation method using a sputtering method, a target material and a sputtering gas component are mixed during film formation. Reactive sputtering is a method of forming thin films of compounds by chemically reacting them with each other, and There is also a bias sputtering method in which a voltage is also applied to the substrate.

[0124] Next, the first oxide semiconductor film 131 and the second oxide semiconductor film 136 are subjected to dehydration or dehydration. Heat treatment is performed for oxidation. 36 under an inert gas atmosphere (nitrogen, helium, neon, argon, etc.) or reduced pressure After the heat treatment is performed at , the mixture is slowly cooled in an oxygen atmosphere.

[0125] Heat treatment is preferably performed at 200°C or higher. For example, heating at 450°C for 1 hour in a nitrogen atmosphere is recommended. By this heat treatment in a nitrogen atmosphere, the first oxide semiconductor film 131 and The oxide semiconductor film 136 in No. 2 has a low resistance (high carrier concentration, preferably 1×10 1 8 / cm 3 As a result, the first oxide semiconductor film 133 and A first oxide semiconductor film 137 and a second oxide semiconductor film 138 are formed (see FIG. 4C). The electrical conductivity of the film 133 and the second oxide semiconductor film 137 is 1×10 -1 S / cm or more 1× 10 2 S / cm or less is preferable.

[0126] Next, a second photolithography process is performed to form a resist mask, and the first oxide semiconductor The conductive film 133 and the second oxide semiconductor film 137 are etched using, for example, phosphoric acid, acetic acid, and nitric acid. Wet etching with an acid solution removes the unwanted parts and leaves the first oxide. The semiconductor layer 134 and the second oxide semiconductor layer 138 are formed. The etching is not limited to wet etching, and dry etching may be used.

[0127] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, e.g. For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0128] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0129] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were set so that The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0130] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0131] In addition, the etching solution after wet etching is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium, etc. contained in the oxide semiconductor layer may be reused from the waste liquid after the etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0132] In order to etch the desired shape, the etching conditions (etching Adjust the etching conditions (liquid, etching time, temperature, etc.) as appropriate.

[0133] Next, a metal material is deposited on the first oxide semiconductor layer 134 and the second oxide semiconductor layer 138. A conductive film 132 is formed by sputtering or vacuum deposition (see FIG. 5(B)).

[0134] The material of the conductive film 132 is an element selected from Al, Cr, Ta, Ti, Mo, and W, or or an alloy film containing the above elements or a combination of the above elements. do.

[0135] When a heat treatment is performed after the formation of the conductive film 132, the conductive film should have heat resistance to withstand the heat treatment. It is preferable to have it.

[0136] Next, a third photolithography process is performed to form a resist mask and to form a The unnecessary portions are removed to form the source electrode layer 105a, the drain electrode layer 105b, and the first oxide The nitride semiconductor layer 135, the source or drain regions 104a, 104b, and the second terminal 122 is formed (see FIG. 5(C)). The etching method used here is wet etching. For example, the conductive film 132 is an aluminum film, When using an aluminum alloy film, wet etching is performed using a solution of phosphoric acid, acetic acid, and nitric acid. In addition, ammonia hydrogen peroxide (hydrogen peroxide: ammonia: water = 50%) can be used. The conductive film 132 is etched by wet etching using a SiO 2 ... In this etching process, a gate electrode layer 105a and a drain electrode layer 105b may be formed. The exposed area of ​​the first oxide semiconductor layer 134 is also partially etched, and the first oxide semiconductor Therefore, the third insulating layer 135 between the source electrode layer or the drain electrode layer 105a, 105b is formed. In FIG. 5C, the oxide semiconductor layer 135 of the first embodiment is a thin region. the drain electrode layers 105a and 105b, the first oxide semiconductor layer 135, the source region The drain regions 104a and 104b are etched at once by dry etching. Therefore, the source electrode layer or drain electrode layer 105a, 105b, the first oxide semiconductor layer 13 5, and the ends of the source region or drain region 104a, 104b are aligned and have a continuous structure. It is as follows.

[0137] In addition, in this third photolithography process, the source electrode layer or the drain electrode layer 1 The second terminal 122 made of the same material as the terminals 105a and 105b is left in the terminal portion. 122 is a source wiring (a source electrode layer including the source and drain electrode layers 105a and 105b). The power supply is electrically connected to the power supply wiring.

[0138] Also, a resist having regions of multiple thicknesses (typically two types) formed by a multi-tone mask is used. By using a photomask, the number of resist masks can be reduced, simplifying the process and reducing costs. Cost reduction is possible.

[0139] Next, the resist mask is removed, and the gate insulating layer 102, the first oxide semiconductor layer 135, and the silicon source or drain regions 104a, 104b, a source or drain electrode layer 105 A protective insulating layer 107 is formed to cover the layers 105a and 105b. The protective insulating layer 107 is formed by a PCVD method. The source and drain electrode layers 105a and 105b are formed using a silicon oxynitride film. The exposed region of the first oxide semiconductor layer 135 and the oxide semiconductor layer 107 that is the protective insulating layer 107 are provided between the first oxide semiconductor layer 135 and the protective insulating layer 107. The silicon nitride film is provided in contact with the first oxide semiconductor layer 107. The region of the conductor layer 135 becomes highly resistive (the carrier concentration decreases, preferably by 1×10 18 / cm 3 less than 1×10 14 / cm 3 (See below) and the high-resistance channel formation region A semiconductor layer 103 having a region can be formed.

[0140] Through the above steps, a thin film transistor 170 can be fabricated. A plan view at this stage is shown in FIG. Equivalent.

[0141] Next, a fourth photolithography process is performed to form a resist mask, and a protective insulating layer 10 7 and the gate insulating layer 102 are etched to form the source electrode layer or the drain electrode layer 105b A contact hole 125 is formed that reaches the second end by etching. A contact hole 127 reaching the first terminal 122, a contact hole A cross-sectional view at this stage is shown in FIG.

[0142] Next, the resist mask is removed, and then a transparent conductive film is formed. Indium oxide (In2O3) and indium tin oxide alloy (In2O3-SnO 2, ITO) is formed using a sputtering method or a vacuum deposition method. Etching of such materials is done with a hydrochloric acid based solution. However, etching of ITO in particular Residues are easily generated, so indium oxide zinc oxide alloy is used to improve etching processability. Gold (In2O3-ZnO) may also be used. Indium oxide containing silicon oxide is also used. Alternatively, a zinc alloy (In--Sn--O-based oxide containing silicon oxide) may be used.

[0143] When a reflective electrode layer is used as the pixel electrode layer, tungsten (W), molybdenum (Mo), etc. Mo, Zirconium (Zr), Hafnium (Hf), Vanadium (V), Niobium ( Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Metals such as tungsten (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag) , or its alloy, or its metal nitride. can.

[0144] Next, a fifth photolithography process is performed to form a resist mask and to form a Then, unnecessary portions are removed to form the pixel electrode layer 110.

[0145] In addition, in this fifth photolithography process, the gate insulating layer 102 in the capacitance section The protective insulating layer 107 serves as a dielectric, and the capacitance wiring 108 and the pixel electrode layer 110 form a storage capacitance. is formed.

[0146] In the fifth photolithography process, the first terminal 121 and the second terminal 1 22 is covered with a resist mask, leaving the transparent conductive films 128 and 129 formed on the terminal portions. The conductive films 128 and 129 serve as electrodes or wiring for connection to an FPC. The transparent conductive film 128 formed on the gate electrode 121 is a connection electrode that functions as an input terminal of the gate wiring. The transparent conductive film 129 formed on the second terminal 122 serves as a terminal electrode of the source line. This is a connection terminal electrode that functions as an input terminal.

[0147] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG.

[0148] Next, after forming the protective insulating layer 107 or the pixel electrode layer 110, a heat treatment may be performed. Heat treatment should be performed in air or nitrogen at a temperature between 150℃ and 350℃. When the heat treatment is performed, the semiconductor layer 103 is heated while being in contact with the protective insulating layer 107. This heats up the semiconductor layer 103, which in turn increases the resistance of the semiconductor layer 103 and improves the electrical characteristics of the transistor. This heat treatment (preferably 1 The temperature is not particularly limited as long as it is after the protective insulating layer 107 is formed, and other For example, a heat treatment for forming a resin film or a heat treatment for reducing the resistance of a transparent conductive film. By combining these functions, the number of steps can be reduced.

[0149] 8(A1) and 8(A2) are a cross-sectional view and a plan view of the gate line terminal portion at this stage. FIG. 8(A1) is a cross-section taken along line E1-E2 in FIG. 8(A2). In FIG. 8(A1), a transparent conductive film 15 is formed on a protective insulating film 154. 5 is a terminal electrode for connection that functions as an input terminal. In the terminal section, a first terminal 151 made of the same material as the gate wiring and a second terminal 152 made of the same material as the source wiring are provided. The connection electrode layer 153 formed of a transparent conductive film is overlapped with the gate insulating layer 152 via the gate insulating layer 152. The transparent conductive film 128 and the first terminal 155 shown in FIG. The portion where the transparent conductive film 155 and the first terminal 151 in FIG. 8(A1) are in contact with each other is the portion where the transparent conductive film 155 and the first terminal 151 in FIG. It corresponds to the part you are touching.

[0150] Also, FIG. 8(B1) and FIG. 8(B2) show a source line terminal portion different from that shown in FIG. 6(B). 8(B1) shows a cross-sectional view and a plan view of the source wiring terminal portion. This corresponds to a cross-sectional view taken along the line F1-F2 in FIG. The transparent conductive film 155 formed on the insulating film 154 is a connection terminal that functions as an input terminal. In FIG. 8B1, the terminal portion is formed of the same material as the gate wiring. The electrode layer 156 is disposed under the second terminal 150 which is electrically connected to the source line. The electrode layer 156 is electrically connected to the second terminal 150. The electrode layer 156 may be set to a potential different from that of the second terminal 150, for example, floating, GND, If you set it to 0V, it will form a capacitance for noise prevention or static electricity prevention. The second terminal 150 is connected to the transparent conductive film 15 via a protective insulating film 154. 5 is electrically connected.

[0151] A plurality of gate lines, source lines, and capacitance lines are provided according to the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, The terminal 2 and the third terminal of the same potential as the capacitance wiring are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0152] In this way, five photolithography steps were performed using five photomasks to produce the bottom A pixel thin film having a thin film transistor 170 which is a gate-type staggered thin film transistor. The film transistor and storage capacitor can then be completed. By forming a pixel section by correspondingly arranging them in a matrix, an active matrix type It can be one of the substrates for manufacturing a display device. Such a substrate is called an active matrix substrate.

[0153] When manufacturing an active matrix type liquid crystal display device, an active matrix substrate A liquid crystal layer is provided between the active matrix substrate and a counter substrate having a counter electrode. The counter electrode is fixed to the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for

[0154] In addition, the capacitance wiring is not provided, and the pixel electrode is connected to the gate wiring, the protective insulating film, and the gate A storage capacitor may be formed by stacking the layers with an insulating layer interposed therebetween.

[0155] In an active matrix type liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the pixel electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0156] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, resulting in image retention. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0157] In addition, the video characteristics can be improved by increasing the normal vertical sync frequency by 1.5 or 2 times or more. A driving technique called double speed driving may be used.

[0158] In addition, in order to improve the video characteristics of liquid crystal display devices, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. In addition, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched according to the timing of the optical modulation of the liquid crystal layer. The timing of the LEDs can also be synchronized. This is particularly useful when displaying images with a large proportion of black areas occupying the entire screen. This has the effect of reducing power consumption.

[0159] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the conventional method.

[0160] The n-channel transistor disclosed in this specification has an oxide semiconductor film as a channel formation region. These drive technologies can be combined due to their good dynamic characteristics. do.

[0161] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of the organic light-emitting element is In order to set the low power supply potential, for example GND or 0V, the cathode is connected to the terminal. A fourth terminal is provided for setting the voltage level, for example, GND, 0V, etc. When manufacturing a device, a power supply line is provided in addition to a source line and a gate line. Therefore, the terminal section is provided with a fifth terminal that is electrically connected to the power supply line.

[0162] In addition, when manufacturing a light-emitting display device, a partition using an organic resin layer is provided between each of the organic light-emitting elements. In that case, the organic resin layer is heated, so the semiconductor layer 103 is turned into a high resistance layer. This heat treatment improves the electrical characteristics of the transistor and reduces the variation in electrical characteristics. Can cum.

[0163] By forming the thin film transistor using an oxide semiconductor, the manufacturing cost can be reduced. In particular, the heat treatment for dehydration or dehydrogenation removes the moisture, which is an impurity, In order to reduce these and increase the purity of the oxide semiconductor film, the dew point in the film formation chamber has been lowered. Excellent electrical properties without using special sputtering equipment or ultra-high purity oxide semiconductor targets Therefore, a semiconductor device having a highly reliable thin film transistor can be manufactured.

[0164] Since the semiconductor layer in the channel formation region is a high resistance region, the electrical characteristics of the thin film transistor are This stabilizes the device and prevents an increase in the off-state current. This results in good electrical characteristics and reliability. It is possible to provide a semiconductor device having a thin film transistor with good performance.

[0165] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0166] (Embodiment 5) In a display device, which is an example of a semiconductor device, at least a part of a driver circuit and a An example of manufacturing a thin film transistor disposed in a pixel portion will be described below.

[0167] The thin film transistor disposed in the pixel portion is formed according to any one of the first to fourth embodiments. Since the thin film transistors shown in the first to fourth embodiments are n-channel TFTs, the driver circuit Of these, a part of the driver circuit that can be configured with n-channel TFTs is a thin-film transistor in the pixel area. It is formed on the same substrate as the resistor.

[0168] FIG. 1 is a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device. The display device shown in FIG. 14(A) is a display device having a display element on a substrate 5300. A pixel portion 5301 having a plurality of pixels, a scanning line driver circuit 5302 for selecting each pixel, and a signal line driver circuit 5303 for controlling input of a video signal to the pixel.

[0169] The pixel portion 5301 includes a signal line driver circuit 5303 and a plurality of signal lines arranged in a column direction. The signal line driver circuit 5303 is connected to the signal line driver circuit 5303 by lines S1 to Sm (not shown). A plurality of scanning lines G1 to Gn (not shown) are arranged extending from 5302 in the row direction. The scanning line driver circuit 5302 is connected to the signal lines S1 to Sm and the scanning lines G1 to Gn. The image sensor has a plurality of pixels (not shown) arranged in a matrix. Signal line Sj (any one of signal lines S1 to Sm), scanning line Gi (any one of scanning lines G1 to Gn) Either one of them is connected.

[0170] The thin film transistors described in any of the embodiments 1 to 4 are n-channel TFTs. A signal line driver circuit configured with a channel type TFT will be described with reference to FIG.

[0171] The signal line driver circuit shown in FIG. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0172] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are a first wiring 5611, a second wiring 5612, a third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (any one of the wirings 5621_1 to 5621_M) is a switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S j+1 is connected to

[0173] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0174] It is preferable that the driver IC 5601 is formed on a single crystal substrate. The switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0175] Next, the operation of the signal line driver circuit shown in FIG. 15 will be described with reference to the timing chart of FIG. The timing chart of FIG. 16 is explained with reference to the timing chart when the i-th scanning line Gi is selected. Further, during the selection period of the i-th scanning line Gi, is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driver circuit of FIG. In this case, the same operation as in FIG. 16 is performed.

[0176] In the timing chart of FIG. 16, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-1, signal line Sj, and signal line Sj+1 via 3c It shows.

[0177] In the timing chart of FIG. 16, the timing when the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the wiring 5621_J of the Jth row. 5 shows signal 5721_J.

[0178] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the line 5621 is connected to the line Sj during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. In the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0179] As shown in FIG. 16, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a is turned on. and the third thin film transistor 5603c are turned off. At this time, the input The Data_j to be output is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 56 03c and input to the signal line Sj+1.

[0180] From the above, the signal line driver circuit in FIG. 15 can achieve the following by dividing one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the pixel area is formed and the substrate on which the pixel area is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0181] As shown in FIG. 15, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, the arrangement, number, driving method, etc. of the thin film transistors are not limited.

[0182] For example, three or more signal lines are connected to one wiring during each of three or more sub-selection periods. When a video signal is input to each of them, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two or It is preferably divided into three sub-selection periods.

[0183] As another example, as shown in the timing chart of FIG. 17, one gate selection period is precharged. A page period Tp, a first sub-selection period T1, a second sub-selection period T2, a third sub-selection period In addition, the timing chart of FIG. 17 shows that the i-th scanning line Gi The selected timing, the on / off timing of the first thin film transistor 5603a 803a, the on / off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the thin film transistor 5603c of No. 3 and the wiring of the Jth column 17 shows a signal 5821_J input to the pre-amplifier 5621_J. During the charge period Tp, the first thin film transistor 5603a and the second thin film transistor 5 603b and the third thin film transistor 5603c are turned on. The precharge voltage Vp input to J is applied to the first thin film transistor 5603a, the second thin film The signal line Sj-1, signal line Sj, and signal line Sj+1. The first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and At this time, the third thin film transistor 5603c is turned off. Data_j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first The first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j input to the wiring 5621_J is input to the second thin film transistor 560 In the third sub-selection period T3, the third thin-film transistor The transistor 5603c is turned on, and the first thin film transistor 5603a and the second thin film transistor At this time, the data signal Data_j+1 input to the wiring 5621_J is is input to the signal line Sj+1 via the third thin film transistor 5603c.

[0184] From the above, the signal line driver circuit of FIG. 15 to which the timing chart of FIG. 17 is applied By providing a precharge period before the selection period, the signal line can be precharged. Therefore, the video signal can be written to the pixel at high speed. 16 are shown with the same reference numerals, and the same parts or parts having similar functions are shown. A detailed description of the relevant parts will be omitted.

[0185] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit has a shift register. In some cases, a level shifter or a buffer may be included. In the circuit, a clock signal (CLK) and a start pulse signal (SP ) is input, the selection signal is generated. The generated selection signal is buffered The signal is buffered and amplified in the 10-bit signal line and then fed to the corresponding scan line. The gate electrodes of the transistors are connected. Since they must all be turned on at the same time, the buffer must be capable of passing a large current. Used.

[0186] One form of a shift register used as a part of a scanning line driving circuit will be described with reference to FIGS. 18 and 19. He explains.

[0187] The circuit configuration of the shift register is shown in FIG. 18. The shift register shown in FIG. It is composed of multiple flip-flops 5701_1 to 5701_n. A first clock signal, a second clock signal, a start pulse signal, and a reset signal are input. It works as it is.

[0188] The connection relationship of the shift register in Fig. 18 will be described. The shift register in Fig. 18 has i-stage The first flip-flop 5701_i (flip-flops 5701_1 to 5701_n In either one of them, the first wiring 5501 shown in FIG. 19 is connected to the seventh wiring 5717_i-1. 19 is connected to the seventh wiring 5717_i+1. 19 is connected to the seventh wiring 5717_i, The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0189] In addition, the fourth wiring 5504 shown in FIG. 19 corresponds to the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0190] However, the first wiring 5501 shown in FIG. 19 of the first-stage flip-flop 5701_1 is 19 of the n-th flip-flop 5701_n. The second wiring 5502 is connected to the sixth wiring 5716 .

[0191] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the third power supply line. This may also be called the power line 2.

[0192] Next, the details of the flip-flop shown in FIG. 18 are shown in FIG. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a seventh thin film transistor 5576, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth). When this occurs, the device is in a conductive state.

[0193] Next, the connection configuration of the flip-flop shown in FIG. 19 will be described below.

[0194] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fourth wiring 5504, and a second electrode (source) of the first thin film transistor 5571 is connected to The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0195] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506. A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0196] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0197] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506. The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0198] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0199] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0200] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0201] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5543, a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0202] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 are referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be connected to a first power supply line, and the sixth wiring 5506 may be connected to a second power supply line. It may also be called a line.

[0203] In addition, the signal line driver circuit and the scanning line driver circuit are formed using the n-channel TF The n-channel TFTs shown in the first to fourth embodiments can be fabricated using only T. Since the mobility of the transistor is large, it is possible to increase the driving frequency of the driving circuit. In addition, since the parasitic capacitance of the n-channel TFT shown in any of the first to fourth embodiments is reduced, For example, the n-channel T The scanning line driver circuit using FT can operate at high speed, so the frame frequency can be It is also possible to increase the image quality or to insert a black screen.

[0204] Furthermore, the channel width of the transistor of the scanning line driving circuit is increased, and multiple scanning lines By arranging the driver circuit, it is possible to achieve even higher frame frequencies. When multiple scanning line driving circuits are arranged, a scanning line driving circuit for driving the even-numbered scanning lines is provided. The circuit is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the opposite side. By placing multiple If signals are output to the same scanning line by the scanning line driving circuit, it is advantageous for making the display device larger. do.

[0205] In addition, when an active matrix type light emitting display device, which is an example of a semiconductor device, is manufactured, In order to arrange at least a plurality of thin film transistors in one pixel, a plurality of scanning line driving circuits are arranged. An example of a block diagram of an active matrix type light emitting display device is shown in FIG. 4(B).

[0206] The light-emitting display device shown in FIG. 14B has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401 for selecting each pixel, a first scanning line driver circuit 5402 for selecting each pixel, and a second scanning line driver circuit 5403 for selecting each pixel. A driver circuit 5404 and a signal line driver circuit 5405 for controlling the input of a video signal to a selected pixel 403.

[0207] In the case where a video signal input to a pixel of the light-emitting display device shown in FIG. 14(B) is in a digital format, When a pixel is turned on, the transistor is switched on and off to make it either emitting light or not. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by changing the time when the pixel emits light. This is a driving method that displays gradations by controlling the period during which the liquid crystal display is turned on.

[0208] Light-emitting elements have a higher response speed than liquid crystal elements, so they are more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, the light emitting element of the pixel is divided into sub-frame periods according to the video signal. By dividing the period into multiple subframes, The total length of time that pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0209] In the light-emitting display device shown in FIG. 14B, two switching TFTs are provided for one pixel. When the first scanning line, which is the gate wiring of one of the switching TFTs, is used as the first scanning line, The signal to be outputted is generated by the first scanning line driver circuit 5402 and is applied to the gate of the other switching TFT. A signal input to the second scanning line, which is a wiring, is generated by a second scanning line driver circuit 5404. In this example, the signal input to the first scanning line and the signal input to the second scanning line are Both of these may be generated by a single scanning line driving circuit. The number of switching TFTs in a pixel determines the operation of the switching element. A plurality of scanning lines may be used for each pixel. The signals input to the scanning line driver circuit may all be generated by one scanning line driver circuit, or may be generated by a plurality of scanning line drivers. It may be generated by an automatic circuit.

[0210] In addition, in the light-emitting display device, the driver circuit may be configured with n-channel TFTs. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit are formed by using the n-channel TFTs shown in the embodiments 1 to 4. It is also possible to produce it using only FT.

[0211] Through the above steps, a display device with high reliability as a semiconductor device can be manufactured.

[0212] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0213] (Embodiment 6) A thin film transistor is manufactured, and the thin film transistor is used in a pixel portion and further in a driver circuit. It is possible to manufacture a semiconductor device (also called a display device) having a display function. A part or the whole of the driver circuit is formed on the same substrate as the pixel portion by using transistors, A stem-on panel can be formed.

[0214] The display device includes a display element. The display element may be a liquid crystal element (also called a liquid crystal display element), a light-emitting A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element is a light-emitting element that emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. These include organic EL elements, electronic inks, etc. A display medium whose contrast changes due to an electrical effect, such as a liquid crystal display, can also be used.

[0215] The display device includes a panel in which a display element is sealed, and a controller for the panel. and a module in which an IC or the like including the above-mentioned is mounted. Regarding the element substrate, which corresponds to one form before the display element is completed in the process of manufacturing a display device The element substrate includes a means for supplying a current to each of the plurality of pixels. Specifically, the substrate may be in a state where only pixel electrodes of the display element are formed, or the substrate may be in a state where only pixel electrodes of the display element are formed. After the conductive film that will become the electrode is formed, but before etching is performed to form the pixel electrode. It's fine to have one, and any form is acceptable.

[0216] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to connectors, such as FPC (Flexible Printed Circuit). inted circuit) or TAB (Tape Automated Bon ding tape or TCP (Tape Carrier Package) is used. Modules with printed wiring boards attached to the ends of TAB tape or TCP or the display element is mounted with an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which a display circuit (or other circuit) is directly mounted.

[0217] The appearance and cross section of a liquid crystal display panel, which is one embodiment of a semiconductor device, will be described with reference to FIG. 10(A1) and 10(A2) show the fourth embodiment formed on a first substrate 4001. The highly reliable thin film transistors 4010 and 4011 each including an oxide semiconductor layer as shown in FIG. 4006 and a liquid crystal element 4013 are disposed between the first substrate 4001 and the second substrate 4006 by a sealant. FIG. 10(B) is a plan view of the panel sealed with 4005. A2) corresponds to the cross-sectional view at MN.

[0218] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this manner, a sealant 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealant 4005, and a second substrate 4006. The liquid crystal layer 4008 is sealed together with the first substrate 4001. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0219] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, A wire bonding method, a TAB method, or the like can be used. FIG. 10A shows an example of mounting a signal line driver circuit 4003 by the COG method. This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0220] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In FIG. 10B, the thin film transistor included in the pixel portion 4002 is A transistor 4010 and a thin film transistor 4011 included in the scanning line driver circuit 4004 Insulating layers 4020 and 4021 are formed on the thin film transistors 4010 and 4011. 1 is provided.

[0221] The thin film transistors 4010 and 4011 each include an oxide semiconductor layer as described in Embodiment 4. In addition, a highly reliable thin film transistor including the above-mentioned structure can be applied. In this embodiment, the thin film transistor shown in the third embodiment may be used. The transistors 4010 and 4011 are n-channel thin film transistors.

[0222] In addition, a pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. A pixel electrode layer 4030, a counter electrode layer 4031, and a liquid crystal layer 4008 are formed on the liquid crystal layer 4006. The overlapping portion corresponds to a liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0223] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film or acrylic resin film Alternatively, you can use aluminum foil with a PVF film or polyester film. A sheet having a structure sandwiched between films can also be used.

[0224] Also, 4035 is a columnar spacer obtained by selectively etching the insulating film. In order to control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 A spherical spacer may be used. is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the counter electrode layer 40 to the conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 40 to the common potential line. Included in 05.

[0225] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 1 msec. Since the liquid crystal display is optically isotropic, no alignment treatment is required, and the viewing angle dependency is small.

[0226] In addition to the transmissive LCD, the present invention can also be applied to reflective and semi-transmissive LCDs. can.

[0227] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (the viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In the example shown, the polarizing plate is disposed on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the coloring layer is not limited to the present embodiment, and the materials and The conditions may be appropriately set according to the manufacturing process conditions. A light film may also be provided.

[0228] The thin film transistors 4010 and 4011 are semiconductor transistors including a channel forming region as a protective insulating film. An insulating layer 4020 is formed in contact with the body layer. The insulating film 407 may be formed using a material and a method similar to those of the oxide insulating film 407. In order to reduce surface irregularities, the substrate is covered with an insulating layer 4021 that functions as a planarizing insulating film. There are.

[0229] Here, an insulating layer 4020 having a laminated structure is formed as a protective film. A silicon oxide film is formed by sputtering as the first layer of the 0. Silicon oxide film as a protective film By using the above, it is possible to prevent hillocks in the aluminum film used as the source electrode layer and the drain electrode layer. It is effective in stopping.

[0230] In addition, an insulating layer is formed as the second layer of the protective film. A silicon nitride film is formed by sputtering. Mobile ions such as thorium penetrate into the semiconductor region and change the electrical properties of the TFT. can be suppressed.

[0231] After forming the protective film, the protective film is heated in a nitrogen atmosphere or in air (at 300°C or less). (below) may also be performed.

[0232] In addition, an insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. are used. In addition, by stacking a plurality of insulating films made of these materials, an insulating layer can be formed. 4021 may be formed.

[0233] Siloxane-based resin is a type of Si-OS formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, the organic group may have a fluoro group. That's fine.

[0234] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife The baking process of the insulating layer 4021 and the annealing of the semiconductor layer can be performed by using a fcoater or the like. By using both, a semiconductor device can be manufactured efficiently.

[0235] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material may be used.

[0236] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer. The conductive composition may be used to form the conductive film. The pixel electrode thus fabricated has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity be 0.1 Ω·cm or less.

[0237] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0238] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials are applied to 002 via FPC4018.

[0239] The connection terminal electrode 4015 is made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the source electrode layers of the thin film transistors 4010 and 4011. The drain electrode layer is formed of the same conductive film as the drain electrode layer.

[0240] The connection terminal electrode 4015 is connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. The electrodes are electrically connected to each other.

[0241] In FIG. 10, a signal line driver circuit 4003 is formed separately and mounted on a first substrate 4001. The embodiment is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed. It may be implemented.

[0242] FIG. 20 shows a semiconductor device using a substrate 2600 produced by the production method disclosed herein. 1 shows an example of a liquid crystal display module as a device.

[0243] FIG. 20 shows an example of a liquid crystal display module, in which a substrate 2600 and an opposing substrate 2601 are formed with a sealing material. 2602, and a pixel portion 2603 including a TFT and a display element including a liquid crystal layer are disposed between them. A color layer 2605 is provided to form a display area. - In the case of the RGB method, coloring corresponding to the colors red, green, and blue is required for display. A layer is provided for each pixel. The light source is a cold cathode fluorescent lamp 261. 0 and a reflector 2611, and the circuit board 2612 is a flexible wiring board 260 9 is connected to the wiring circuit section 2608 of the substrate 2600, and a control circuit, a power supply circuit, etc. In addition, a retardation plate is placed between the polarizing plate and the liquid crystal layer. It may be laminated in the form of a single layer.

[0244] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) irefringence mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0245] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0246] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0247] (Embodiment 7) An example of the semiconductor device is electronic paper.

[0248] The semiconductor device may be used for electronic paper. It is also called a dynamic display, and has the same readability as paper and consumes less power than other display devices. It has the advantage that it can be made thin and light.

[0249] Electrophoretic displays can take a variety of forms, but the first particle has a positive charge. A microcapsule containing a negatively charged second particle and a negatively charged second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the capsule are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (colorless). (including

[0250] Thus, electrophoretic displays operate in such a way that materials with high dielectric constants migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. There is no need for polarizing plates, which are required for display devices.

[0251] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0252] In addition, the above microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be achieved by applying an electric field to the cell. An active matrix substrate obtained by using transistors can be used.

[0253] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0254] FIG. 9 shows an active matrix type electronic paper as an example of a semiconductor device. The thin film transistor 581 used in the device is the thin film transistor shown in Embodiment 1. The thin film transistor can be manufactured in the same manner as described above, and has high reliability including an oxide semiconductor layer. The thin film transistors shown in the second to fourth embodiments are also the thin film transistor 58 of this embodiment. It can also be applied as 1.

[0255] The electronic paper in FIG. 9 is an example of a display device that uses the twisting ball display method. The ball display method is an electrode layer that uses spherical particles painted in black and white as display elements. A potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles that are generated.

[0256] The thin film transistor 581 sealed between the substrate 580 and the substrate 596 has a bottom gate structure. The thin film transistor is covered with an insulating film 583 that is in contact with the semiconductor layer. The first electrode layer 587 is formed by the source electrode layer or the drain electrode layer of the transistor 581, and the insulating film The first electrode 583 and the insulating layer 585 are in contact with each other through an opening formed therein and are electrically connected to each other. Between the layer 587 and the second electrode layer 588 are black areas 590a and white areas 590b. A spherical particle 589 is provided that includes a cavity 594 that is filled with liquid therearound. The spherical particles 589 are filled with a filler 595 such as a resin (see FIG. 9). The first electrode layer 587 corresponds to a pixel electrode, and the second electrode layer 588 corresponds to a common electrode. The electrode layer 588 is a common potential line provided on the same substrate 580 as the thin film transistor 581. A common connection is used to electrically connect the substrate 580 and the substrate 596. The second electrode layer 588 and a common potential line can be electrically connected via the conductive particles. .

[0257] Also, instead of the twist ball, an electrophoretic element can be used. and a 10μm to 20μm diameter nanoparticle that contains positively charged white nanoparticles and negatively charged black nanoparticles. Microcapsules with a diameter of about 0 μm are used. When an electric field is applied to the microcapsules by the first and second electrode layers, the microcapsules emit white light. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is the electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display, the image that was displayed can be retained. Therefore, a semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0258] Through the above steps, electronic paper having high reliability as a semiconductor device can be manufactured. .

[0259] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0260] (Embodiment 8) An example of a light-emitting display device is shown as a semiconductor device. is shown using a light-emitting element that uses electroluminescence. The light-emitting element that uses the light-emitting material is classified into two types according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter an inorganic EL element.

[0261] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0262] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0263] FIG. 12 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a semiconductor device. This is a diagram.

[0264] The configuration of a pixel to which digital time gray scale driving can be applied and the operation of the pixel will be described. The figure shows an n-channel transistor that uses an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0265] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, The switching transistor 64 has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0266] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. Note that the low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. In order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or higher than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0267] The capacitor 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. It is also possible to set the gate capacitance of the driving transistor 6402 as follows: A capacitance may be formed between the gate electrode and the second electrode.

[0268] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is The driving transistor 6402 is in two states, either fully on or fully off. A video signal is inputted, that is, the driving transistor 6402 is operated in a linear region. In order to operate the driving transistor 6402 in a linear region, the voltage of the power supply line 6407 must be higher than that of the driving transistor 6402. A high voltage is applied to the gate of the driving transistor 6402. A voltage equal to or higher than (power supply line voltage + Vth of the driving transistor 6402) is applied.

[0269] In addition, when analog gray scale driving is performed instead of digital time gray scale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 12 can be used.

[0270] In the case of performing analog gradation driving, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or higher than the forward voltage of the light emitting element 6401 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and should be at least 100% forward voltage. In addition, the video transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The gate potential of the light emitting element 6402 is set higher than that of the gate of the transistor 6403. Analog gradation drive can be performed by passing a current corresponding to a video signal through 6404.

[0271] Note that the pixel configuration shown in FIG. 12 is not limited to this. For example, A switch, a resistive element, a capacitive element, a transistor, a logic circuit, or the like may be added.

[0272] Next, the configuration of the light emitting element will be described with reference to FIG. 13. Here, the driving TFT is The cross-sectional structure of a pixel will be described using the example of the type shown in Figure 13(A), (B), and (C). The driving TFTs used in the semiconductor device, TFTs 7001, 7011, and 7021, are The thin film transistor can be fabricated in the same manner as in the first embodiment, and has high reliability including an oxide semiconductor layer. In addition, the thin film transistors shown in any of the embodiments 2 to 4 The photodiode can also be applied as TFT7001, 7011, or 7021.

[0273] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. Top emission, bottom emission, and side emission. There are light-emitting elements with a double-sided emission structure that emits light from the side of the pixel. The present invention can also be applied to optical elements.

[0274] A light emitting element having a top emission structure will be described with reference to FIG.

[0275] In FIG. 13A, a TFT 7001 which is a driving TFT is an n-type TFT, and a light emitting element 7002 emits light. FIG. 13(A) shows a cross-sectional view of a pixel when the light incident on the pixel exits the anode 7005 side. A cathode 7003 of a light emitting element 7002 and a TFT 7001 which is a driving TFT are electrically connected. A light-emitting layer 7004 and an anode 7005 are laminated in this order on a cathode 7003. 7003 uses various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, MgAg, AlLi, etc. are preferable. 004 may be composed of a single layer or may be composed of multiple layers stacked together. In the case where the cathode 7003 is composed of multiple layers, an electron injection layer, an electron transport layer, and a The light-transmitting layer, the light-emitting layer, the hole-transporting layer, and the hole-injecting layer are laminated in this order. The anode 7005 is formed using a light-transmitting conductive material. For example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide Lead oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, and silicon oxide are added. A light-transmitting conductive film such as doped indium tin oxide may be used.

[0276] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 constitutes the light-emitting element 7002. In the case of the pixel shown in FIG. 13A, the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as indicated by the mark.

[0277] Next, a light emitting element having a bottom emission structure will be described with reference to FIG. When 011 is an n-type light emitting element and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, FIG. 13B shows a cross-sectional view of a pixel. A cathode 7013 of a light-emitting element 7012 is formed on a light-transmitting conductive film 7017. A light-emitting layer 7014 and an anode 7015 are laminated in this order on the cathode 7013. When the anode 15 has a light-transmitting property, a shielding layer for reflecting or blocking light is provided so as to cover the anode. The cathode 7013 may have a film 7016 formed thereon, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, a 20 nm film An aluminum film having a thickness of 700 nm can be used as the cathode 7013. 13(A), even if it is composed of a single layer, multiple layers are laminated. The anode 7015 does not need to transmit light, but as shown in FIG. As in the case of 13(A), the insulating film 13 can be formed using a conductive material having light-transmitting properties. The shielding film 7016 may be made of, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0278] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 13B, the light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0279] Next, a light emitting element having a dual emission structure will be described with reference to FIG. In this example, a conductive film 7027 having a light-transmitting property and electrically connected to the driving TFT 7021 is formed on the substrate 7022. A cathode 7023 of the light-emitting element 7022 is formed, and a light-emitting layer 7024 is formed on the cathode 7023. The anode 7025 is laminated in order. The cathode 7023 is, as in the case of FIG. Various conductive materials with small thermal coefficients can be used. However, the thickness of the material should be For example, an aluminum film having a thickness of 20 nm is used as the cathode 70. 23. The light-emitting layer 7024 can be formed of a single The layer may be a single layer, or multiple layers may be laminated. The anode 7025 is made of a light-transmitting conductive material, as in FIG. It can be formed by

[0280] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 constitutes the light-emitting element 70. In the case of the pixel shown in FIG. 13C, the light emitted from the light emitting element 7022 is is emitted toward both the anode 7025 side and the cathode 7023 side as indicated by the arrows.

[0281] Although the organic EL element has been described as the light-emitting element here, inorganic EL elements can also be used as the light-emitting element. It is also possible to provide an L element.

[0282] In addition, the thin film transistor (driving TFT) that controls the driving of the light-emitting element and the light-emitting element are electrically However, a current control TFT is connected between the driving TFT and the light emitting element. The configuration may be such that the input / output terminals are connected to each other.

[0283] The semiconductor device is not limited to the configuration shown in FIG. 13, and may be any of the configurations disclosed in this specification. Various modifications based on the technical concept are possible.

[0284] Next, the appearance and structure of a light-emitting display panel (also called a light-emitting panel) which corresponds to one embodiment of a semiconductor device will be described. The cross section will be described with reference to FIG. 11. FIG. 11(A) shows a thin film formed on a first substrate. A panel in which the film transistor and the light emitting element are sealed between the second substrate and the film transistor and the light emitting element by a sealant. 11(B) is a plan view of the above-mentioned embodiment, and FIG. 11(B) is a cross-sectional view taken along line HI of FIG. 11(A).

[0285] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4506. The filling material 4507 is sealed with the sealing material 4507. Highly sealed protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the package in a material such as a film or a cover material.

[0286] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b each have a plurality of thin film transistors. In FIG. 11B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0287] The thin film transistors 4509 and 4510 are the signal transistors including the oxide semiconductor layer described in Embodiment 3. In addition, a highly reliable thin film transistor can be applied. The thin film transistors 4509 and 4510 may be n It is a channel type thin film transistor.

[0288] In addition, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 is The layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light-emitting element 4511 is configured as a first electrode layer 4517, an electroluminescent layer The light emitting element 4512 and the second electrode layer 4513 are stacked together, but the structure is not limited to the one shown in the figure. The configuration of the light emitting element 4511 can be changed appropriately according to the direction of the light extracted from the element 4511. It is possible.

[0289] The partition 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable that the inclined surface is formed so as to have a continuous curvature.

[0290] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers may be laminated. It doesn't matter whether it is done or not.

[0291] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon oxynitride film, DLC film, etc. can be formed.

[0292] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied by b.

[0293] The connection terminal electrode 4515 is formed of the same conductive film as the first electrode layer 4517 of the light-emitting element 4511. The terminal electrode 4516 is formed from the source of the thin film transistors 4509 and 4510. The source electrode layer and the drain electrode layer are formed from the same conductive film.

[0294] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. The electrodes are electrically connected to each other.

[0295] The second substrate 4506 located in the direction in which light is extracted from the light emitting element 4511 must be transparent. In this case, a glass plate, a plastic plate, a polyester film or A light-transmitting material such as an acrylic film is used.

[0296] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's good.

[0297] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0298] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Also, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted, and the configuration is not limited to that of FIG.

[0299] Through the above steps, a highly reliable light-emitting display panel (light-emitting panel) is manufactured as a semiconductor device. It is possible.

[0300] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0301] (Embodiment 9) The semiconductor device disclosed in this specification can be applied as electronic paper. Par can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, train rides, etc. It can be used for in-car advertising, display on various cards such as credit cards, etc. An example of an electronic device is shown in Figure 22.

[0302] FIG. 22 also shows an example of an electronic book 2700. For example, the electronic book 2700 is The device is made up of two housings, a housing 2701 and a housing 2703. The body 2703 is integrated with a shaft portion 2711, and the opening and closing movement is performed around the shaft portion 2711. This configuration allows the device to operate like a paper book. It becomes.

[0303] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display (display 2705 in FIG. 22) and An image can be displayed on the display unit 2707 in FIG.

[0304] FIG. 22 shows an example in which the housing 2701 is provided with an operation unit and the like. 701, a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The configuration may include a touch panel, a touch screen, a pointing device, etc. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables such as a cable, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have a function as an electronic dictionary. This is also fine.

[0305] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. is also possible.

[0306] (Embodiment 10) The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras digital photo frames; mobile phones (also called mobile phones or mobile phone devices); Examples include game machines, mobile information terminals, audio playback devices, and large game machines such as pachinko machines. do.

[0307] FIG. 23A shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In addition, the stand 9605 supports the housing 9601. This shows a configuration in which the above is supported.

[0308] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the display 9603 shows In addition, the remote control unit 9610 can control the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0309] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0310] FIG. 23B shows an example of a digital photo frame 9700. The photo frame 9700 includes a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example images captured by a digital camera. By displaying the image data, it can function like a normal photo frame.

[0311] The Digital Photo Frame 9700 is equipped with an operation unit, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section, etc. These components may be installed on the same surface as the display unit, but they may be installed on the side or back. It is preferable to have one as it improves the design. For example, the Digital Photo Frame 9700 Insert a memory that stores image data taken with a digital camera into the recording medium insertion section of the Image data can be captured and the captured image data can be displayed on the display unit 9703. do.

[0312] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0313] FIG. 24(A) shows a portable gaming machine, which is composed of two housings, a housing 9881 and a housing 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in FIG. 24(A) also includes a speaker unit 9884 and a recording medium insertion unit 988. 6, LED lamp 9890, input means (operation keys 9885, connection terminals 9887, sensors 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration 9889) equipped with a microphone, etc. Of course, the configuration of the portable gaming machine is not limited to the above, and may be at least as described in the present specification. The present invention is not limited to the above, and may be applied to any configuration having the semiconductor device disclosed in the above and other auxiliary equipment. The portable game machine shown in FIG. 24(A) can be used to play a game recorded on a recording medium. The function of reading out the program or data and displaying it on the display unit, and wireless communication with other portable gaming machines The portable gaming machine shown in FIG. 24(A) has the following functions: The functions are not limited to these, and various functions can be provided.

[0314] FIG. 24(B) shows an example of a slot machine 9900, which is a large-scale gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. The Machine 9900 also includes other operating means such as a start lever and stop switch, coin The slot machine 9900 is equipped with a slot slot, a speaker, etc. However, the present invention is not limited to the above, and may be configured to include at least the semiconductor device disclosed in this specification. Other auxiliary equipment may be provided as appropriate.

[0315] FIG. 25A is a perspective view showing an example of a portable computer.

[0316] The portable computer of FIG. 25(A) has an upper housing 9301 and a lower housing 9302 connected to each other. The hinge unit is closed to form an upper housing 9301 having a display unit 9303 and a keyboard. The lower housing 9302 having the base 9304 can be stacked on top of each other, making it easy to carry. This is convenient, and when the user wants to type on the keyboard, the hinge unit needs to be opened. The user can perform input operations by looking at the display portion 9303.

[0317] The lower housing 9302 also includes a keyboard 9304 and a pointing device for inputting data. If the display portion 9303 is a touch input panel, Input operations can be performed by touching the touch panel. The lower housing 9302 has a computing function unit such as a hard disk. It has an external connection port 9305 into which a communication cable conforming to the USB communication standard is inserted. There are.

[0318] The upper housing 9301 further includes a display unit 93 that can be slid and stored inside the upper housing 9301. 07, it is possible to realize a wide display screen. The orientation of the screen of the 9307 can be adjusted by the user. If it is a panel, input operations can be performed by touching a part of the retractable display unit.

[0319] The display unit 9303 or the foldable display unit 9307 may be a liquid crystal display panel, an organic light emitting element, or The display device uses an image display device such as a light-emitting display panel using inorganic light-emitting elements.

[0320] The portable computer shown in FIG. 25A is configured with a receiver and the like, and is also a television. It is possible to receive broadcasts and display images on the display unit. The display unit 9307 is slid while the hinge unit connecting the display unit 9302 to the display body 9302 is kept in the closed state. By adjusting the screen angle, the user can watch TV broadcasts. In this case, the hinge unit is opened to prevent the display unit 9303 from displaying anything. Since the system only activates the circuits that display the TV broadcast, power consumption is kept to a minimum. This is useful in portable computers where battery capacity is limited.

[0321] FIG. 25(B) shows a portable electronic device that can be worn on the user's arm like a wristwatch. FIG. 13 is a perspective view showing an example of a story.

[0322] This mobile phone is a main body having at least a communication device having a telephone function and a battery. A band part 9204 for attaching the body to the arm, and a fastening state of the band part 9204 to the arm are adjusted. The device is made up of an adjustment unit 9205 for adjusting the temperature, a display unit 9201, a speaker 9207, and a microphone 9208. It has been made.

[0323] The main body also has an operation switch 9203, which serves as a power input switch and a display switching switch. In addition to the camera start switch and the image capture start switch, there are also other switches, such as a button that starts an Internet program when pressed. Each function can be assigned using the operation switch 9203. Cut.

[0324] Input operations of this mobile phone are performed by touching the display portion 9201 with a finger or an input pen, or by operating the mobile phone. This is done by operating a switch 9203 or by inputting voice into a microphone 9208. 25(B) shows a display button 9202 displayed on a display unit 9201. Input can be made by touching the screen with a finger or other object.

[0325] The main body also includes an imaging device that converts the subject image formed through the photographic lens into an electronic image signal. The camera unit 9206 has a step. Note that the camera unit does not necessarily have to be provided.

[0326] The mobile phone shown in FIG. 25(B) is configured with a television broadcast receiver and the like. It can receive TV broadcasts and display the images on the display unit 9201, and can also store data in memory, etc. It is possible to record television broadcasts in memory by using a storage device. The mobile phone shown in B) may have a function capable of collecting location information such as GPS.

[0327] The display unit 9201 is a light-emitting display panel such as a liquid crystal display panel, an organic light-emitting element, or an inorganic light-emitting element. The mobile phone shown in FIG. 25(B) is small and lightweight. Therefore, the battery capacity is limited, and the display device used for the display portion 9201 is a low-power display device. It is preferable to use a force actuable panel.

[0328] Although FIG. 25B illustrates an electronic device that is worn on the arm, the electronic device is not limited to this. It is sufficient that the device has a shape that can be carried around. EXAMPLES

[0329] Here, there are regions of high oxygen density (oxygen concentration) and regions of low oxygen density (oxygen concentration). The results of calculations of the change in oxygen density before and after heat treatment in an oxide semiconductor layer are shown in Table 1. The following will be explained with reference to Figs. 34 and 21. Here, the calculation software used is Fujitsu Materials Explorer 5.0 manufactured by Tsushin Co., Ltd. was used.

[0330] FIG. 34 shows a model of the oxide semiconductor layer used in the calculation. Here, the oxide semiconductor layer 70 1 had a structure in which a layer 703 with low oxygen density and a layer 705 with high oxygen density were stacked.

[0331] Here, the layer 703 with low oxygen density is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure was composed of 10 Zn atoms and 54 O atoms.

[0332] The oxygen-rich layer 705 is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure was composed of a Zn atom and 66 O atoms.

[0333] The density of the oxide semiconductor layer 701 is set to 5.9 g / cm3 It was decided.

[0334] Next, the oxide semiconductor layer 701 was aged under the conditions of the NVT ensemble and a temperature of 250° C. A molecular dynamics (MD) calculation was performed. The time step size was set to 0.2 fs, and the total calculation time was 200 ps. In addition, the Born potential was set for the metal-oxygen bond and the oxygen-oxygen bond. A Mayer-Huggins potential was applied to the oxide semiconductor layer 70. The motion of the atoms at the top and bottom of 1 is fixed.

[0335] Next, the calculation results are shown in Figure 21. The area from 0 nm to 1.15 nm on the z-axis coordinate is the layer with low oxygen density. 703, and the region from 1.15 nm to 2.3 nm on the z-axis coordinate is the oxygen-rich layer 705. The oxygen density distribution before the MD calculation is shown by the solid line 707, and the oxygen density distribution after the MD calculation is shown by the dashed line Shown at 709.

[0336] In the solid line 707, the oxygen concentration is increased from the interface between the low oxygen density layer 703 and the high oxygen density layer 705. In the oxygen-rich layer 705, the oxygen density is high. The oxygen density is uniform in the low oxygen density layer 703 and the high oxygen density layer 705. It can be seen that...

[0337] From the above, the layer with low oxygen density 703 and the layer with high oxygen density 705 are stacked as shown in the figure. If there is a bias in the distribution of oxygen density, the oxygen will diffuse from areas with high oxygen density to areas with low oxygen density due to heat treatment. It can be seen that the oxygen density becomes homogenous.

[0338] That is, as described in Embodiment 1, the oxide insulating film 407 is formed over the first oxide semiconductor layer 432. At the interface between the first oxide semiconductor layer 432 and the oxide insulating film 407, Since the oxygen density is increased, the oxygen diffuses to a portion of the first oxide semiconductor layer 432 where the oxygen density is low. As a result, the resistance of the first oxide semiconductor layer 432 becomes high. The reliability of the system can be improved.

Claims

1. A display device having a transistor, a pixel electrode layer, and a terminal portion, The transistor is a first conductive layer having a function as a gate electrode; a gate insulating layer having a region in contact with an upper surface of the first conductive layer; a first oxide semiconductor layer on the gate insulating layer; a second oxide semiconductor layer on the first oxide semiconductor layer; a second conductive layer having a region in contact with the second oxide semiconductor layer and functioning as one of a source electrode and a drain electrode; a third conductive layer having a region in contact with the second oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode; a second insulating layer on the second conductive layer and on the third conductive layer; a third insulating layer on the second insulating layer; a fourth conductive layer provided over the third insulating layer and having a region overlapping with the first conductive layer with the first oxide semiconductor layer and the second oxide semiconductor layer interposed therebetween; the pixel electrode layer is provided on the third insulating layer and is electrically connected to the second conductive layer; the fourth conductive layer has the same material as the pixel electrode layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer has a crystal; the second insulating layer includes silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer; The terminal portion is a fifth conductive layer having the same material as the first conductive layer; a sixth conductive layer having the same material as the second conductive layer; a seventh conductive layer having the same material as the pixel electrode layer; the first insulating layer having a function as the gate insulating layer has a region in contact with an upper surface of the fifth conductive layer, the sixth conductive layer is provided on the first insulating layer and has a region overlapping with the fifth conductive layer; the second insulating layer is provided on the sixth conductive layer; A display device, wherein the seventh conductive layer is provided on the second insulating layer and has a region in contact with the sixth conductive layer.

2. A display device having a transistor, a pixel electrode layer, and a terminal portion, The transistor is a first conductive layer having a function as a gate electrode; a gate insulating layer having a region in contact with an upper surface of the first conductive layer; a first oxide semiconductor layer on the gate insulating layer; a second oxide semiconductor layer on the first oxide semiconductor layer; a second conductive layer having a region in contact with the second oxide semiconductor layer and functioning as one of a source electrode and a drain electrode; a third conductive layer having a region in contact with the second oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode; a second insulating layer on the second conductive layer and on the third conductive layer; a third insulating layer on the second insulating layer; a fourth conductive layer provided over the third insulating layer and having a region overlapping with the first conductive layer with the first oxide semiconductor layer and the second oxide semiconductor layer interposed therebetween; the pixel electrode layer is provided on the third insulating layer and is electrically connected to the second conductive layer; the fourth conductive layer has the same material as the pixel electrode layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer has a crystal; the second insulating layer includes silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer; The terminal portion is a fifth conductive layer having the same material as the first conductive layer; a sixth conductive layer having the same material as the second conductive layer; a seventh conductive layer having the same material as the pixel electrode layer; the first insulating layer having a function as the gate insulating layer has a region in contact with an upper surface of the fifth conductive layer, the sixth conductive layer is provided on the first insulating layer and has a region overlapping with the fifth conductive layer; the second insulating layer is provided on the sixth conductive layer; the seventh conductive layer is provided on the second insulating layer and has a region in contact with the sixth conductive layer; In a plan view, the fifth conductive layer extends in a first direction, both ends of the sixth conductive layer in a second direction perpendicular to the first direction overlap with the fifth conductive layer; A display device, wherein both ends of the fifth conductive layer in the second direction overlap with the seventh conductive layer.

3. A display device having a transistor, a pixel electrode layer, and a terminal portion, The transistor is a first conductive layer having a function as a gate electrode; a gate insulating layer having a region in contact with an upper surface of the first conductive layer; a first oxide semiconductor layer on the gate insulating layer; a second oxide semiconductor layer on the first oxide semiconductor layer; a second conductive layer having a region in contact with the second oxide semiconductor layer and functioning as one of a source electrode and a drain electrode; a third conductive layer having a region in contact with the second oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode; a second insulating layer on the second conductive layer and on the third conductive layer; a third insulating layer on the second insulating layer; a fourth conductive layer provided over the third insulating layer and having a region overlapping with the first conductive layer with the first oxide semiconductor layer and the second oxide semiconductor layer interposed therebetween; the pixel electrode layer is provided on the third insulating layer and is electrically connected to the second conductive layer; the fourth conductive layer has the same material as the pixel electrode layer; each of the first oxide semiconductor layer and the second oxide semiconductor layer has a crystal; the second insulating layer includes silicon oxide and has a region in contact with a top surface of the second oxide semiconductor layer; The terminal portion is a fifth conductive layer having the same material as the first conductive layer; a sixth conductive layer having the same material as the second conductive layer; a seventh conductive layer having the same material as the pixel electrode layer; the first insulating layer having a function as the gate insulating layer has a region in contact with an upper surface of the fifth conductive layer, the sixth conductive layer is provided on the first insulating layer and has a region overlapping with the fifth conductive layer; the second insulating layer is provided on the sixth conductive layer; the seventh conductive layer is provided on the second insulating layer and has a region in contact with the sixth conductive layer; In a plan view, the fifth conductive layer extends in a first direction, one end of the sixth conductive layer in the first direction overlaps with the fifth conductive layer; both ends of the sixth conductive layer in a second direction perpendicular to the first direction overlap with the fifth conductive layer; A display device, wherein both ends of the fifth conductive layer in the second direction overlap with the seventh conductive layer.

4. In any one of claims 1 to 3, The display device, wherein the semiconductor layer comprises In, Ga, and Zn.

Images