Control device
The control device efficiently manages control parameters within quantum bit arrays, addressing power and thermal constraints in quantum computers, thereby improving the practicality and reliability of quantum computing systems.
Patent Information
- Application Number
- JP2023113522
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-11
- Publication Date
- 2025-01-24
AI Technical Summary
Quantum computers operating in extremely low-temperature environments face challenges with strict power consumption conditions, unique thermal conductor restrictions, and reduced transmission speeds due to long wiring distances, necessitating efficient control parameter management for quantum operations.
A control device that includes a command memory storing control commands and a parameter memory for storing control parameters, allowing efficient retention and calibration of control parameters within quantum bit arrays, even in the face of temperature fluctuations and time changes.
Enables efficient retention and calibration of control parameters for quantum bit arrays, enhancing the practicality and reliability of quantum computing systems by minimizing external memory access and adapting to environmental fluctuations.
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Figure 2025011420000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a control device. [Background technology]
[0002] The performance improvement by miniaturization of semiconductor elements, which has supported the progress of computers for more than half a century, is expected to reach its limit in the near future due to the comparison between the process rule and the atomic distance of silicon. Quantum computers are an attempt to overcome this limit by new calculation principles and devices, and quantum operation devices and operation methods using superconducting circuits, ion traps, photons, silicon quantum dots, etc. have been proposed. In addition, as a preliminary step to the future concept of running large-scale practical applications on an error-tolerant general-purpose quantum computer system, at present, proof-of-principle demonstration and algorithm exploration of a system called NISQ (Noisy Intermediate-Scale Quantum Device) is underway, which is based on the concept that the number of qubits is small (about 100) and error correction is not possible.
[0003] To realize a quantum computer system that applies quantum computing devices that operate on the quantum effect that appears at extremely low temperatures, such as single electron spins in silicon quantum dots, it is common to choose a dilution refrigerator as the device to incorporate it into. In this case, the quantum computing device is fixed in thermal contact with the mixing chamber, which is the coldest part of the dilution refrigerator, and signals required to control the operation of the quantum computing device are applied from a signal generator placed outside the dilution refrigerator, and the results of the operation are read out by a measuring device also outside the dilution refrigerator, making it similar to an experimental device. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] Japanese Patent Application Publication No. 01-169655 Summary of the Invention [Problem to be solved by the invention]
[0005] Patent Document 1 discloses a technique for sequentially acquiring command codes stored in different address areas in an external memory and command parameters required for executing the command codes via one external memory access means, in relation to a command acquisition process in a classical data processing device that does not use quantum effects. By using this technique, it is possible to reduce the implementation cost of an access interface to an external memory, particularly in an embedded microcontroller that does not have a built-in read-only memory and is oriented toward low power consumption. Furthermore, when there are multiple identical command parameter values, it is expected to have the effect of reducing the size of the command parameter area in the read-only memory.
[0006] Quantum computers, which are based on the extremely low temperature environment realized by dilution refrigerators, not only have strict power consumption conditions for quantum computing devices, but also have unique constraints that differ from classical computers. Specifically, the wiring connecting the inside and outside of the dilution refrigerator not only transmits power and signals but also serves as a medium for thermal conduction, so only the minimum number of wiring can be laid, determined by the balance between the target temperature of the mixing chamber and the cooling capacity of the dilution refrigerator. In addition, the transmission speed is inevitably limited because the wiring is long distance.
[0007] In addition, quantum computers have discontinuous changes in the characteristics of quantum computing devices due to temperature cycling, and continuous time fluctuations in the control output due to the circuit characteristics or implementation design of the control device that controls the quantum computing device. Due to the influence of these factors, the optimal control parameter values for achieving the desired quantum operation must be experimentally determined prior to the actual quantum operation, and may also change over time. These points are cited as characteristics that are fundamentally different from classical computers.
[0008] The present invention has been made in consideration of the above-mentioned problems, and aims to provide a highly practical quantum bit array control device that can efficiently hold, with a small number of bits, the control parameters required for quantum operations in a quantum bit array in which a plurality of quantum bits are arranged. [Means for solving the problem]
[0009] The control device of the present invention is a control device for controlling quantum operations in a quantum bit array in which multiple quantum bits are arranged in one or two dimensions, and is configured as a control device comprising a command memory for storing multiple control commands, and a parameter memory for storing some or all of the control parameters associated with the control commands, characterized in that the command format of the control commands includes one or more parameter designation fields that specify either the immediate value of the control parameter or a reference to the control parameter stored in the parameter memory. Effect of the Invention
[0010] According to the present invention, control parameters required for quantum operations in a quantum bit array in which a plurality of quantum bits are arranged can be efficiently held with a small number of bits, thereby realizing a highly practical quantum bit array control device. [Brief description of the drawings]
[0011] [Figure 1] 1 is a block diagram showing a configuration of a quantum computing system according to a first embodiment. [Diagram 2] 1 is a diagram showing a command format. [Diagram 3] 1 is a diagram showing an example of command storage in a command memory; [Figure 4] 1 is a diagram showing an example of parameter storage in a parameter memory. [Diagram 5] FIG. 2 is a block diagram showing a configuration of a sequence control unit. [Figure 6]4 is a block diagram showing a configuration of a calibration control unit; FIG. [Figure 7] 11 is a timing chart illustrating an example of a command execution sequence. [Figure 8A] 1 is a diagram showing a calibration process flow. [Figure 8B] 1 is a diagram showing a calibration process flow. [Figure 9] FIG. 11 is a block diagram showing a configuration of a quantum computing system according to a second embodiment. [Figure 10] 13 is a diagram illustrating an example of parameter storage in a calibrated parameter memory. [Figure 11] 13 is a timing chart showing an example of a command execution sequence in the second embodiment. [Figure 12] FIG. 11 is a block diagram showing a configuration of a quantum computing system according to a third embodiment. [Figure 13] 11 is a diagram showing an example of parameter storage in a differential parameter memory. [Figure 14] 11 is a diagram showing an example of offset value storage in an offset register file. [Figure 15] 4 is a block diagram showing a configuration of a calibration control unit; FIG. [Figure 16] 13 is a timing chart showing an example of a command execution sequence in the third embodiment. [Figure 17] 13 is a diagram showing a calibration process flow in the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0012] Hereinafter, the present embodiment will be described with reference to the accompanying drawings. In the accompanying drawings, functionally identical elements may be indicated by the same or corresponding numbers. Note that the accompanying drawings show embodiments and examples according to the principles of the present disclosure, but these are for understanding the present disclosure and are not to be used to interpret the present disclosure in a limiting manner. The description in this specification is merely a typical example and does not limit the scope or application of the present disclosure in any sense.
[0013] In the present embodiment, the description is given in sufficient detail for a person skilled in the art to implement the present disclosure, but it should be understood that other implementations and forms are possible, and that changes in configuration and structure and replacement of various elements are possible without departing from the scope and spirit of the technical ideas of the present disclosure. Therefore, the following description should not be interpreted as being limited thereto.
[0014] In the following, a gate-type quantum computer system, in particular a quantum computing device in which a plurality of single-electron spin quantum bits are arranged, is combined to efficiently set parameters for controlling the generation and application of bias voltages and high frequencies required for the operation of each quantum bit with a small number of bits, and the set values are autonomously calibrated. As an example, a configuration is described that includes a means for efficiently holding control parameters with a small number of bits without referring to an external memory and a means for autonomously calibrating the control parameters according to the characteristic fluctuations of the quantum computing device to be controlled, for quantum computing device control that realizes the target quantum operation sequence and individual quantum operations. With such a configuration, the control parameters required for quantum operations in a quantum bit array in which a plurality of quantum bits are arranged can be efficiently held with a small number of bits. Furthermore, by combining with a calibration function that autonomously calibrates the control parameters according to the time-dependent characteristic fluctuations of the controlled object, a highly practical quantum bit array control device, control method, and quantum computer system can be realized. EXAMPLES
[0015] 1 shows the configuration of a quantum computing system 1 according to a first embodiment of the present invention. This embodiment is a system formed by combining a quantum device 400 that executes quantum operations with a host PC 100 that controls the entire quantum computing sequence, and a control device 200 that generates a control signal for the quantum device 400 based on a command received from the host PC 100 and obtains the computation result.
[0016] The host PC 100 is usually installed in a room temperature environment (e.g., 20°C). On the other hand, the quantum device 400, particularly the quantum operation unit 420, is placed in a cryogenic environment (e.g., minus 272°C) realized by the mixing chamber, which has the lowest temperature in the dilution refrigerator, to enable the operation of quantum bits. The other components are placed between the room temperature environment and the cryogenic environment. In this case, the temperature gradient changes from high to low along the flow of the signal from the host PC 100 to the quantum operation unit 420. For example, the semiconductor chip constituting the quantum device 400 is placed in a cryogenic environment, and the semiconductor chip constituting the control device 200 is placed in an environment that is lower in temperature than the room temperature environment (but not in the cryogenic environment where quantum bits operate). However, if the cooling capacity of the mixing chamber is sufficiently high, the control device 200 and the quantum device 400 may be composed of the same semiconductor chip, and the entire device may be placed in a cryogenic environment.
[0017] The host PC 100 is a general information processing device equipped with a microprocessor, memory, storage device, input device, output device, etc. (not shown), and is assumed to run a system control application that manages the overall control of the quantum operation sequence to be executed in the quantum operation system 1.
[0018] The system control application interprets a specified quantum operation sequence, and supplies commands and various control information required for quantum operations to the control device 200 via a host interface 101, and also acquires quantum operation results read from the quantum device 400. Here, the host interface 101 may be an interface based on standard communication specifications such as USB (trademark), SPI (trademark), I2C (trademark), RS-232C, PCI Express (trademark), Ethernet (trademark), or may be an interface based on a unique specification based on a general-purpose input / output port.
[0019] The control device 200 includes a host interface unit 210, a sequence control unit 220, a command memory 230, a decode unit 240, a parameter memory 250, a quantum device control signal generation unit 320, a calculation result reading unit 330, and a calibration control unit 340. Of these, the sequence control unit 220 will be described in detail with reference to Fig. 5, and the calibration control unit 340 will be described in detail with reference to Fig. 6.
[0020] The host interface unit 210 controls communication with the host PC 100 connected via the host interface 101, and converts various control signals between a control interface 211 that controls the operation of the sequence control unit 220, a control interface 212 that controls access to the command memory 230, a control interface 213 that controls access to the parameter memory 250, and a control interface 217 that controls the operation of the calibration control unit 340 and obtains quantum operation results stored in the calibration control unit 340.
[0021] Prior to starting execution of a quantum operation sequence (command sequence), the host PC 100 stores the command sequence to be executed in the command memory 230 via the control interface 212, and stores all parameters referenced from the command sequence in the parameter memory 250 via the control interface 213. The system control application running on the host PC 100 is responsible for ensuring consistency regarding parameter references.
[0022] When the sequence control unit 220 receives from the control interface 211 a request to execute a quantum operation sequence (command string) stored in advance in the command memory 230, it transitions to a command execution state.
[0023] The sequence control unit 220 in a command execution state issues an instruction to start execution of one command stored in a specific entry in the command memory 230, which is specified by an entry number, via a command memory control signal 222. The sequence control unit 220 acquires, together with the instruction, rate information indicating the execution time of the command to be executed from the command memory 230 via the command memory control signal 222 as a response signal to the instruction. The sequence control unit 220 also acquires, as a part of decoded result information 241, information indicating whether the command to be executed is the end (end command) of the command sequence stored in the command memory 230 or not, from the decode unit 240.
[0024] The sequence control unit 220 waits for the time specified by the rate information until the execution time of the command being executed has elapsed, and if the command being executed is not a terminal command, increments the entry number and again instructs the command memory 230 to start executing the subsequent command via the command memory control signal 222. If the command is a terminal command, there are no more commands to be executed, so the sequence control unit 220 transitions to a command non-execution state. Note that whether the sequence control unit 220 is in a command execution state is constantly notified to the quantum device control signal generation unit 320 by a command execution state signal 221.
[0025] The command memory 230 has a memory structure consisting of multiple entries each identifiable by an entry number, and stores one command per entry. When a command execution request is received from the sequence control unit 220 via the command memory control signal 222, the command memory 230 reads out the command in the entry specified by the entry number. The command memory 230 outputs information specifying the operation content of the read out command to the calculation information 231, rate information to the command memory control signal 222, information specifying the reference source of the control parameter required for command execution (either the immediate value in the command or the parameter memory) to the external parameter selection signal 232, and entry information as a pointer specifying the read position in the parameter memory 250 when the parameter memory 250 is used as the reference source of the control parameter to the external parameter read entry information 233. Note that when the parameter memory 250 is not referenced as a control parameter, the command memory 230 outputs the immediate value of the control parameter from the external parameter read entry information 233.
[0026] The decoding unit 240 interprets the operation information 231 relating to the command being executed, and outputs the decoded result information 241 to the quantum device control signal generation unit 320 and the sequence control unit 220 .
[0027] The parameter memory 250 has a memory structure consisting of multiple entries each identifiable by an entry number, and stores one parameter in one entry or two or more consecutive entries. When the command memory 230 references the parameter memory via the external parameter read entry information 233, the parameter memory 250 reads out a parameter value from an entry specified by the entry number, or from multiple consecutive entries starting from the entry specified by the entry number, and outputs it as parameter memory output data 251.
[0028] Generally, the range (bit width) of a parameter required for command execution is defined for each operation information of the command, so that parameters with different bit widths may be stored in the parameter memory 250. Although not particularly limited, the bit width of the control parameter that can be stored in each entry of the parameter memory 250 may be implemented (for example, implemented with a maximum bit width or more) according to the parameter with the largest bit width among all parameters included in all commands supported by the control device 200 (i.e., all control parameters referenced from each command), or the bit width may be expanded by simultaneously or repeatedly reading the contents of multiple consecutive entries and then concatenating them. In other words, if the bit width of the control parameter that can be stored in each entry of the parameter memory 250 is smaller than the maximum bit width among all control parameters referenced from each command supported by the control device 200, adjacent multiple entries in the parameter memory 250 may be referenced simultaneously. In the former case, the bit efficiency of the memory can be improved by guaranteeing performance with one read, and in the latter case, the memory utilization efficiency can be improved by suppressing the bit width. In the latter case, the control parameter value of the maximum bit width is always read and output to the parameter memory output data 251, and only the valid bit width is extracted and referenced on the side that references the control parameter, i.e., the quantum device control signal generation unit 320.
[0029] In addition, since the number of parameters required for command execution is defined for each calculation information of the command, the number of references to the parameter memory 250 may vary for each command. Although not particularly limited, the number of simultaneous references to the parameter memory 250 may be set to the maximum number of control parameters of all commands supported by the control device 200 to minimize the time required for reference, or the number of simultaneous references may be set to 1, which is the minimum number, by repeating multiple references at different times, thereby reducing the hardware scale. The former may be, for example, equal to or greater than the maximum number of control parameters of each command supported by the control device 200. In addition, the latter may be time-division processing of the reference operation, for example, when the number of references that the parameter memory 250 can simultaneously process is smaller than the maximum number of control parameters of each command supported by the control device 200.
[0030] At least some of the entries in the parameter memory 250 may be configured as a read-only area. When executing a special command in which the control parameter value is deterministic, such as when initializing a quantum bit or setting the quantum arithmetic unit 420 to a special control state for calibrating a control parameter, an error in the setting value can be reduced, and the hardware scale of the parameter memory 250 can be reduced by reducing the number of transistors.
[0031] The control interface 213 is also used when transferring the contents of the entries in the parameter memory 250 updated by the calibration control unit 340 to the host PC 100 side.
[0032] Based on the external parameter selection signal 232, the immediate value / parameter selection unit 310 selects either an immediate value, i.e., the parameter read entry information 233 itself, or a reference, i.e., the parameter memory output data 251, as a control parameter for the command being executed, and outputs it to the quantum device control signal generation unit 320 as an operation parameter 311.
[0033] To avoid complicating the drawing, only one each of the immediate value / parameter selection unit 310 and the computation parameter 311 is shown, but it is preferable to provide the same number of each as the number of simultaneous references to the parameter memory 250. When multiple parameters are referenced in a time-division manner, a latch circuit should be added to the quantum device control signal generation unit 320 side to absorb the arrival time difference between the parameters.
[0034] During the period when the quantum device control signal generation unit 320 is notified by the command execution state signal 221 that it is in the command execution state, the quantum device control signal generation unit 320 outputs the following information and signals in accordance with the decoded result information 241 and the operation parameters 311. Specifically, the quantum device control signal generation unit 320 generates and outputs a quantum device control signal 321 including primitive control information for the quantum bits included in the quantum operation unit 420 and a strobe signal indicating the timing of switching control information, an operation result read control signal 322 that controls the selection and acquisition of operation result read data in the operation result read unit 330, and an operation result storage control signal 323 that controls the arrival of the operation result read data at the calibration control unit 340 and the storage of the data.
[0035] Although not particularly limited, the quantum device control signal generating unit 320 is composed of a bias voltage generating unit consisting of multiple channel voltage sources operating independently, a bias voltage switching control unit that selects the bias voltage applied to the bias voltage control lines provided for each quantum bit in the quantum operation unit 420 and controls the switching of the selection state, an operation high frequency generating unit that generates a high frequency signal that controls the spin rotation of a single electron confined within the quantum bit, and a timing control unit required for time control between various processes.
[0036] The quantum device 400 includes a quantum operation unit control unit 410 and the quantum operation unit 420 .
[0037] The quantum operation control unit 410 temporarily stores at least a part of the control information input from the quantum device control signal generation unit 320 via the quantum device control signal 321. In addition to the temporary storage, the quantum operation control unit 410 switches the application state of the quantum operation unit control signal 411 including the bias voltage control line and the operation high frequency signal, which is a direct control signal for each quantum bit of the quantum operation unit 420, based on a strobe signal included in the quantum device control signal 321, and outputs the same to the quantum operation unit 420.
[0038] The quantum operation unit 420 is a quantum bit array in which a plurality of quantum bits, the characteristics of which can be changed by an applied bias voltage, are connected in a one-dimensional or two-dimensional shape via transfer gates that control the degree of electron transfer and interaction between quantum bits by a bias voltage in the same manner. The quantum operation unit 420 executes a quantum operation based on the applied state of the quantum operation unit control signal 411, and outputs a quantum operation unit output signal 421 including a quantum operation result. Here, the quantum operation result is obtained by observing the spin state of a single electron trapped in a quantum bit and converting it into a binary value that identifies 0 or 1 in a classical computer.
[0039] Although not particularly limited, the quantum operation unit output signal 421 may include a part of the quantum operation unit control signal 411 for the purpose of acquiring data necessary for calibration processing of a control parameter. For example, the quantum operation unit output signal 421, which is an output signal from the quantum bit array, may include a part of a signal that controls the quantum bit array. This allows an efficient calibration function to be realized. In addition, each of the quantum operation unit output signals 421 may be converted into a binary value, or may be an analog value assuming A / D conversion processing in the operation result readout unit 330.
[0040] The operation result readout unit 330 selects one of the signals included in the quantum operation unit output signal 421 based on the operation result readout control signal 322. For example, the operation result readout unit 330 may be configured to selectively acquire the contents of one of the quantum operation unit output signals 421, which are output signals from the quantum bit array, and support the acquired signal as a calibration support command. This allows the calibration process to be executed as part of a sequence. If the selected signal is an analog output, the operation result readout unit 330 executes analog-to-digital conversion and then outputs the latched digital data as operation result readout data 331.
[0041] Based on the calculation result storage control signal 323, the calibration control unit 340 stores the contents of the calculation result read data 331 in a predetermined internal area, and executes a calibration calculation defined by calibration conditions previously set via the control interface 217. When the calibration calculation for the specified number of calculation results is completed, the calibration control unit 340 calibrates the setting values of the control parameters specified as the calibration targets in accordance with predetermined calculation conditions, such as reducing the difference between the calibration calculation result and a target value, and outputs a parameter memory update control signal 341 to write the calibrated control parameters to the entries in the parameter memory 250 in which the control parameters are stored.
[0042] The host PC 100 can refer to the quantum operation results stored in the calibration control unit 340 via the host interface 101 , the host interface 210 , and the control interface 217 .
[0043] 2 shows an example of a command format 500 supported by the control device 200. Each command is stored in one entry of the command memory 230, and is composed of the following fields.
[0044] Rate information designation field (500-1, RATE): This field designates rate information corresponding to the execution time of the command. When an instruction to start command execution is received from the sequence control unit 220, the contents of this field are output to the command memory control signal 222.
[0045] Operation information designation field (500-2, OPR): This is a field for designating the operation content of the command, and when an instruction to start command execution is received from the sequence control unit 220, the content of this field is output to the calculation information 231. Although not particularly limited, examples of the operation content include operations related to each function corresponding to the primitive control signal generated by the quantum device control signal generation unit 320, that is, voltage setting of a bias voltage generation unit consisting of a voltage source of multiple channels operating independently, setting of selection control information of bias voltage applied to each bias voltage control line, setting of a waveform envelope of a high-frequency signal for calculation, switching of the applied state of bias voltage, output gating of a high-frequency signal for calculation, and generation of various strobe signals that instruct the timing of reading out and storing the calculation results. In addition, examples of operations that support sequence control and calibration processing may include operations related to a notification indicating that this is the final command in a quantum operation sequence (command series), an initialization operation for quantum bits or at least a portion of the control signals to the quantum bits, and an operation of selectively connecting a specific bias voltage control line to the quantum operation unit output signal 421 and drawing it out to the outside of the quantum device 400 for the purpose of observing the inside of the quantum bit array as part of a calibration process.
[0046] External parameter selection field (500-3, EXT): This field selects whether the control parameters required for executing the command are to be specified as immediate values within the command, or by referencing the parameter memory 250. When an instruction to start command execution is received from the sequence control unit 220, the contents of this field are output to the external parameter selection signal 232.
[0047] Parameter designation field (500-4, PARAM): This field designates either the immediate value of the control parameter required for executing the command or a reference (entry number) to the control parameter stored in the parameter memory 250, and when an instruction to start command execution is received from the sequence control unit 220, the content of this field is output to the external parameter read entry information 233. Depending on the content of the external parameter selection field 500-3, it is distinguished whether the setting of this field is an immediate value or a reference.
[0048] For the sake of simplicity, the number of control parameters is one in this embodiment, but it may be two or more. In that case, the command format may be extended so that the external parameter selection field 500-3 and the parameter designation field 500-4 can be set in a number that matches the maximum number of control parameters of all commands supported by the control device 200. Also, some control parameters may be set only by immediate values, and the external parameter selection field related to the control parameter may be deleted.
[0049] There are several options for selecting whether to set an immediate value or a reference in the parameter designation field 500-4. The immediate value is characterized by the fact that the value is determined at the time of creating a quantum operation sequence in a process equivalent to compilation in a classical computer, so that there is a low possibility of erroneously updating the value after creation. The reference is characterized by the fact that the value can be updated or calibrated independently of the quantum operation sequence even after the sequence is created. Typically, from the viewpoint of memory utilization efficiency, if the bit width of the control parameter is equal to or less than the bit width of the parameter designation field 500-4, it is preferable to set it as an immediate value, otherwise as a reference. In other words, if the bit width of the control parameter referenced by the command is equal to or less than the bit width specified in the command format of the command, if the calibration frequency required for the control parameter is low to a certain extent, or if the calibration of the control parameter is to be suppressed, the parameter may be set as an immediate value, and otherwise the reference destination in the parameter memory of the control parameter may be set in the command. However, by taking advantage of the aforementioned features, there is also an option to use reference values for control parameters that require frequent calibration during one temperature cycle, and immediate values for control parameters associated with specific commands related to initializing quantum bits or calibrating control parameters.
[0050] Although not particularly limited, the immediate value specified in the parameter specification field 500-4 may be converted to a control parameter value different from the immediate value before the command is executed in each functional block in the quantum device control signal generation unit 320, which is the command execution subject. When the control parameter value of a command is deterministic, that is, when it is certain to a certain extent that the control parameter of the command will be one of a small number of candidate values due to the design of the hardware, it is possible to select one of the candidate values using the immediate value. In other words, when it is certain to a certain extent that the control parameter referred to by the command will be one of a small number of candidate values, by providing a means for selecting one of the candidate values based on the immediate value set in the command before the command is executed, the effort of specifying the control parameter can be greatly simplified and the memory capacity can be reduced.
[0051] 3 shows an example of the contents of the command memory 230. This command memory is composed of a plurality of command designation fields 230-2 each identifiable by an entry number 230-1, and each command designation field stores one command having the command format 500. Although not particularly limited, the quantum operation sequence (command sequence) starts execution from an entry designated as an execution start entry in the sequence control unit 220, and is executed sequentially in ascending order of entry numbers, and ends when a command indicating the end of the quantum operation sequence is executed.
[0052] 4 shows an example of the contents of the parameter memory 250. This parameter memory is composed of a plurality of parameter value designation fields 250-2 each identifiable by an entry number 250-1, and each parameter value designation field stores a setting value of a control parameter referenced by each command in the command memory 230. If the bit width of the control parameter is greater than the bit width of the parameter value designation field 250-2, a fixed number of consecutive entries designated by entry numbers in ascending order may be treated as one entry logically linked from the lower bit to the higher bit, and the control parameter may be stored. Note that the necessity of a function for realizing the linking of a plurality of entries as described above is determined at the time of designing the command specifications of the control device 200.
[0053] 5 shows an example of a detailed configuration of the sequence control unit 220. The sequence control unit 220 includes an execution state control unit 2200, an execution entry number generation unit 2210, and an execution rate control unit 2220.
[0054] When the execution state control unit 2200 receives an execution request for a quantum operation sequence (command sequence) from the host PC 100 via the control interface 211, it transitions the state of the sequence control unit 220 to a command execution state.
[0055] The execution state control unit 2200 in the command execution state instructs the execution entry number generation unit 2210 to start execution of a new command via an execution start request signal 2201, and at the same time instructs the execution rate control unit 2220 to initialize an internal state for execution time management, which is a preparatory task for starting command execution, via an execution start request signal 2202, and waits until it receives a notification that the execution of the command has been completed.
[0056] When the execution rate control unit 2220 notifies the execution completion of a command and information indicating whether or not the command is the end of a command string (end command) by an execution completion notification signal 2221, the execution state control unit 2200 in a command execution state instructs the execution entry number generation unit 2210 and the execution rate control unit 2220 to start executing a new command if the command is not the end command. If the command is the end command, the execution state control unit 2200 determines that the execution of the entire quantum operation sequence (command string) instructed to be executed by the host PC 100 has been completed, and transitions the state of the sequence control unit 220 to a command non-execution state.
[0057] Moreover, the execution state control unit 2200 constantly outputs the command execution state signal 221 indicating whether or not the sequence control unit 220 is in a command execution state to the quantum device control signal generation unit 320.
[0058] The execution entry number generation unit 2210 holds an entry number (command read pointer) indicating the storage location in the command memory 230 of a command to be executed when a new command execution start request is received from the execution start request signal 2201 .
[0059] The execution state control unit 2200, which receives a new command execution start request by the execution start request signal 2201, outputs a command read pointer as the entry to be read to the command memory control signal 222, and increments the value of the pointer.
[0060] Although not particularly limited, it is preferable that the command read pointer be user-settable from the host PC 100 via the control interface 211 so that execution of a command string can be started from any entry in the command memory 230 .
[0061] The execution rate control unit 2220 manages the command execution time, that is, the elapsed time from a command execution start request, based on rate information specified as a part of the command.
[0062] The rate control unit 2220, which has received a new command execution start request by the execution start request signal 2202, initializes an internal state for managing execution time (typically a counter that counts in system clock units) based on the rate information of the command acquired from the command memory control signal 222, and immediately measures the elapsed time from the start of execution. The rate information is expressed as a multiple of a reference time that the control device 200 can handle, such as a system clock.
[0063] In addition, the execution rate control unit 2220 acquires, as a part of the decode result information 241, information indicating whether the command that has started execution is the end of a command sequence (end command).
[0064] When the execution rate control unit 2220 detects that the execution time specified in the rate information has elapsed, it notifies the execution state control unit 2200 via the execution completion notification signal 2221 of the completion of execution of the command and information indicating whether or not the command is a terminal command.
[0065] 6 shows an example of a detailed configuration of the calibration control unit 340. The calibration control unit 340 includes a calibration target setting unit 3400, a calculation result storage unit 3410, a calibration calculation execution unit 3420, and a post-calibration parameter calculation unit 3430.
[0066] The calibration target setting unit 3400 holds various control information that specifies detailed calibration operation conditions, which are set from the host PC 100 via the control interface 217. The calibration target setting unit 3400 outputs information that specifies calibration calculation conditions such as the calibration calculation algorithm and the number of data items to be calculated, to a calibration calculation control signal 3401, and outputs information that specifies the target value of the calibration calculation output and the post-calibration control parameter calculation procedure, and information that specifies the entry number in the parameter memory 250 in which the control parameters to be calibrated are stored, to a calibration target control signal 3402.
[0067] Furthermore, when there is a request from the control interface 217 to refer to the quantum operation result, the calibration target setting unit 3400 notifies the operation result storage unit 3410, in which the quantum operation result is stored, of the request via an operation result read control signal 3404. Furthermore, the calibration target setting unit 3400 outputs the quantum operation result read from the operation result storage unit 3410 to the control interface 217 in response.
[0068] The calculation result storage unit 3410 stores the calculation result read data 331 in a specified memory area built in at the timing indicated by the calculation result storage control signal 323, and outputs the data, i.e., the last piece of data stored, to the calibration calculation execution unit 3420 as accumulated data 3411.
[0069] The calibration calculation execution unit 3420 operates based on the timing specified by the calculation result accumulation control signal 323, and performs a calibration calculation on the accumulated data 3411 in accordance with the calibration calculation control information 3401. Calibration calculation results are accumulated for each calibration calculation, and when the calibration calculation execution unit 3420 completes calibration calculations for the number of pieces of calculation target data specified as part of the calibration calculation control signal 3401, it outputs the calibration calculation result as calibration calculation result information 3421.
[0070] The post-calibration parameter calculation unit 3430 calculates a post-calibration control parameter from the calibration calculation result information 3421 based on the calibration target control signal 3402 , and outputs it as the parameter memory update control signal 341 together with the write destination entry number of the parameter memory 250 .
[0071] 7 is a timing chart showing an example of quantum operation sequence processing by a system control application operating on the host PC 100 in the quantum operation system 1 according to the first embodiment. The timing chart shows an example of quantum operation sequence processing, which is an overview of the command execution control in the control device 200 and the overall control including quantum operations in the quantum device 400, starting from a request to execute a quantum operation sequence (command sequence). Here, the command sequence is stored one by one in three consecutive entries from entry N to entry (N+2) in the command memory 230, the execution entry number generation unit 2210 sets the value N to the command read pointer indicating the execution start entry number of the command memory 220, and the initial state of the sequence control unit 220 is a command non-execution state.
[0072] When the host PC 100 requests execution of a quantum operation sequence (command sequence) via the control interface 211, the execution state control unit 2200 transitions the state of the sequence control unit 220 to a command execution state and requests the start of execution of the first command of the sequence via the execution start request signals 2201 and 2202.
[0073] Upon receiving the execution start request signal 2201, the execution entry number generation unit 2210 outputs the value N of the command read pointer as the read entry number of the command memory 230 in response to the command memory control signal 222. Furthermore, upon receiving the execution start request signal 2202, the execution rate control unit 2220 obtains the content of the rate information designation field 500-1 of the first command of the sequence stored in entry N of the command memory 230 from the command memory control signal 222, and starts measuring the execution time of the command based on the obtained rate information.
[0074] The command memory 230, which has received a command execution request from the command memory control signal 222, outputs the following information in addition to the rate information described above. Specifically, the command memory 230 outputs, of the sequence head command stored in entry N, the content of the operation information designation field 500-2 as the calculation information 231, the content of the external parameter selection field 500-3 as the external parameter selection signal 232, and the content of the parameter designation field 500-4 as the external parameter read entry information 233.
[0075] When the parameter memory 250 is referenced by the external parameter read entry information 233, the parameter memory 250 reads out the parameter value designation fields 250-2 of one entry specified by an entry number, or of a predetermined number of consecutive entries in ascending order from the entry specified by the entry number. In the case of multiple entries, the parameter memory 250 sequentially concatenates the entries from the least significant bit side to the most significant bit side to form a single piece of data, and outputs the concatenated entries as a single piece of parameter memory output data 251.
[0076] The decoding section 240 decodes the operation information 231 relating to the first command of the sequence output from the command memory 230 , and outputs the decoded result as the decoded result information 241 .
[0077] Based on the external parameter selection signal 232 in the first command of the sequence output from the command memory 230, the immediate value / parameter selection unit 310 selects either an immediate value, i.e., the external parameter read entry information 233, or a reference, i.e., the parameter memory output data 251, as a control parameter for command execution and outputs it to the calculation parameter 311.
[0078] The quantum device control signal generation unit 320 executes the operation indicated by the decoded result information 241 for the sequence first command output from the command memory 230 using the control parameters indicated by the operation parameters 311, and generates and outputs the quantum device control signal 321, the operation result read control signal 322, and the operation result storage signal 323.
[0079] The quantum operation control unit 410 generates the quantum operation unit control signal 411 that directly controls a quantum bit included in the quantum operation unit 420, based on the quantum device control signal 321 generated for the sequence head command. The quantum operation unit 420 executes a quantum operation specified by the quantum operation unit control signal 411, and outputs the quantum operation unit output signal 421 that includes a part of the quantum operation unit control signal 411 as data required for calibration processing of a control parameter.
[0080] The operation result readout unit 330 selects one of the signals included in the quantum operation unit output signal 421 based on the operation result readout control signal 322 related to the sequence head command. If the signal is an analog output, the operation result readout unit 330 performs analog-to-digital conversion and outputs the signal as the operation result readout data 331 as a digital value.
[0081] The calibration control unit 340 stores the calculation result read data 331 therein based on the calculation result storage control signal 323 related to the sequence head command, and executes a designated calibration calculation on the stored data.
[0082] When the execution rate control unit 2220, which has been measuring the elapsed time from the start of command execution, detects that the command execution time specified in the rate information has elapsed, it notifies the execution state control unit 2200 of this together with information indicating that the command is not the end of the command sequence via the execution completion notification 2221. Upon receiving the execution completion notification, the execution state control unit 2200 confirms that the command is not the end of the command sequence, and requests the execution of the subsequent command stored in entry (N+1) of the command memory 230 via the execution start request signals 2201 and 2202.
[0083] Thereafter, the control device 220 executes the above-mentioned series of processes one by one in sequence up to the terminal command of the quantum operation sequence (command string).
[0084] When the execution rate control unit 2220 detects that the command execution time specified by the rate information has elapsed for the terminal command of the quantum operation sequence (command string) stored in entry (N+2) of the command memory 230, it notifies the execution state control unit 2200 of this together with information indicating that the command is the terminal of the command string via the execution completion notification 2221. Upon receiving the execution completion notification, the execution state control unit 2220 confirms that the command is the terminal of the command string, and transitions the state of the sequence control unit 220 to a command non-execution state.
[0085] Furthermore, when the calibration calculation for the pre-specified number of pieces of calculation target data is completed, the calibration control unit 340 calculates post-calibration control parameters from the calibration calculation result information 3421, and requests an update of the entry in the parameter memory 250 in which the calibration target control parameters are stored, using the parameter memory update control signal 341.
[0086] The host PC 100, which has been monitoring the status of the sequence control unit 220, upon confirming that the state is a command non-execution state, i.e., that the execution of the quantum operation sequence (command series) that it instructed to execute has been completed, obtains the quantum operation results stored in the operation result storage unit 3410 via the control interface 217.
[0087] 8A and 8B are flowcharts showing a series of steps related to the calibration process of the control parameters in the quantum computing system 1 according to the first embodiment. The calibration process is divided into a process (a) by the host PC 100 (FIG. 8A) and a process (b) by the calibration control unit 340 (FIG. 8B).
[0088] On the host PC 100 side, first, in step S600, a quantum operation sequence (command string) including commands that support sequence control and calibration processing is set in the command memory 230, and all control parameters referenced from the command memory 230 are set in the parameter memory 250.
[0089] Next, in step S 610 , the host PC 100 sets, in the calibration target setting unit 3400 , various control information that defines detailed calibration operation conditions of the calibration control unit 340 .
[0090] When the preparations required for executing the quantum operation sequence (command sequence) are completed, in step S620, the host PC 100 requests the sequence control unit 220 to execute the command sequence.
[0091] The host PC 100, which has requested the execution of a quantum operation sequence (command sequence), monitors the state of the sequence control unit 220 via the control interface 211 (step S630), and spins in a waiting state until it returns to a command non-execution state upon completion of execution of the entire command sequence (step S630, No).
[0092] When execution of the entire command sequence is completed and the sequence control unit 220 detects that the command is not being executed (step S630, Yes), the processing on the host PC 100 side is completed and another process can be performed, such as obtaining the quantum operation results stored in the operation result storage unit 3410.
[0093] On the other hand, in step S700, the calibration control unit 340 first initializes the internal state, such as past calibration operation result information stored in the calibration operation execution unit 3420. It is preferable that the user can select whether to clear the quantum operation result data stored in the operation result storage unit 3410 and initialize the pointer indicating the write position of the quantum operation result data at the same time.
[0094] Next, the calibration control unit 340 monitors (step S710) whether or not there is a calibration calculation instruction among detailed calibration conditions notified from the calibration target setting unit 3400 to the calibration calculation execution unit 3410. If there is no calibration calculation instruction, the calibration control unit 340 goes into spin standby (step S710, No), and if there is an instruction (step S710, Yes), starts the following calibration calculation.
[0095] First, the calibration control unit 340 checks whether there is an instruction to store the calculation result read data by the calculation result storage control signal 323 (step S720), and if there is no instruction to store, spins on standby (step S720, No). If there is an instruction (step S720, Yes), the calibration control unit 340 stores the calculation result read data 331 in the calculation result storage unit 3410 (step S730), and executes a calibration calculation based on preset calibration calculation conditions for the data (step S740).
[0096] The calibration control unit 340 checks whether the calibration calculation for the designated number of calculation target data items has been completed (step S750), and if not completed (step S750, No), waits for an instruction to store new calculation result read data. If completed (step S750, Yes), the calibration control unit 340 calculates post-calibration control parameters for the control parameters to be calibrated based on the set calculation conditions, and requests, via the parameter memory update control signal 341, to update the calibration target control parameters in the parameter memory 250 to the post-calibration control parameter values (step S760).
[0097] According to the first embodiment described above in detail with reference to the drawings, the control parameter designation referred to by each command constituting a quantum operation sequence (command sequence) is separated from the command memory 230 to the control parameter memory 250, and a control parameter calibration function provided by the calibration control unit 340 for updating the contents of the control parameter memory 250 is combined. For example, a control device 200 for controlling quantum operations in a quantum bit array in which quantum bits are arranged one-dimensionally or two-dimensionally includes a command memory 230 for storing a plurality of control commands, and a parameter memory 240 for storing some or all of the control parameters associated with the control commands, and the command format of the control command includes one or more parameter designation fields for designating either the immediate value of the control parameter or a reference to the control parameter stored in the parameter memory. The control device 200 has a calibration control unit 340 for calibrating the control parameter based on an output signal (the calibration operation result information 3421) from the quantum bit array. With such a configuration, a quantum operation system 1 capable of calibrating the control parameter value in accordance with the time change of the characteristics of the quantum bit to be controlled can be realized. Furthermore, even if the number or size of parameters is changed, the sequence description can be reused as is, making it possible to limit the scope of corrections.
[0098] In addition, by defining commands that support the calibration function of the calibration control unit 340 and including them in the quantum operation sequence (command sequence), calibration of control parameters can be performed autonomously in parallel with the original quantum operations, greatly improving the practicality of the quantum operation system 1. EXAMPLES
[0099] Next, a quantum computing system 1A according to a second embodiment of the present invention will be described with reference to Fig. 9. The system configuration of the second embodiment is substantially the same as that of the first embodiment, and therefore a duplicated description will be omitted.
[0100] The configuration of the quantum computing system 1A is different from that of the quantum computing system 1 in the following points. That is, a calibrated parameter memory 260 accessible from the host PC 100 via a control interface 214 is added, and the parameter memory is duplicated by connecting it in parallel with the parameter memory 250, and a path is added for selecting either the parameter memory output data 251 which is the output of the parameter memory 250 or the calibrated parameter memory output data 262 which is the output of the calibrated parameter memory 260 in a calibrated parameter selection unit 300 based on a parameter calibrated flag 261 which is the other output of the calibrated parameter memory 260, and outputting the selected control parameter value as an external parameter 301.
[0101] With the addition of the above-mentioned components, one of the inputs of the immediate value / parameter selection unit 310 is changed from the parameter memory output data 251 before the parameter memory duplication to the external parameter 301. In addition, the connection destination of the parameter memory update control signal 341 is changed from the parameter memory 250 to the calibrated parameter memory 260.
[0102] 10 shows an example of the contents of the calibrated parameter memory 260. This parameter memory is composed of a plurality of parameter value designation fields 260-2 each identifiable by an entry number 260-1, and a parameter calibrated flag field 260-3 indicating the validity of the calibrated parameter value stored in the parameter value designation field 260-2 of the entry. Although not particularly limited, the number of entries of the calibrated parameter memory 260 and the bit width of the parameter value designation field are both the same as those of the parameter memory 250.
[0103] In the initial state, all of the parameter calibrated flag fields 260-3 in the calibrated parameter memory 260 indicate an invalid state. When a write request for a calibrated control parameter is received from the parameter memory update control signal 341, the calibrated parameter memory 260 changes the content of the parameter value designation field 260-2 of the designated entry to the calibrated control parameter value, and changes the parameter calibrated flag field 260-3 to a valid state.
[0104] 11 is a timing chart showing an example of quantum operation sequence processing by a system control application operating on the host PC 100 in the quantum operation system 1A according to the second embodiment. The timing chart shows an example of quantum operation sequence processing, which starts from a request to execute a quantum operation sequence (command string), and shows an overview of the command execution control in the control device 200 and the overall control including quantum operations in the quantum device 400. This timing chart is substantially the same as the first embodiment shown in FIG. 7, so only the parts related to the differences in the components of the quantum operation system will be described.
[0105] As in the first embodiment, the command memory 230 receiving a command execution request from the command memory control signal 222 outputs the contents of the parameter designation field 500 - 4 as the external parameter read entry information 233 .
[0106] When the external parameter read entry information 233 simultaneously refers to the parameter memory 250 and the calibrated parameter memory 260, the parameter memory 250 outputs the control parameter values read from one entry specified by an entry number, or from a predetermined number of consecutive entries in ascending order from the entry specified by the entry number, as the parameter memory output data 251. At the same time, the calibrated parameter memory 260 outputs the control parameter values read from an entry having the same entry number as the parameter memory 250 as the calibrated parameter memory output data 262, and outputs the parameter calibrated flag read from the entry having the same entry number as the parameter memory 250 (the logical product of all flags in the case of multiple entries) as the parameter calibrated flag 261.
[0107] The calibrated parameter selection unit 300 selects the parameter memory output data 251 when the control parameter being referenced is uncalibrated (i.e., invalid) based on the parameter calibrated flag 261, and selects the calibrated parameter memory output data 262 when the control parameter being referenced is calibrated (i.e., valid), and outputs them as the external parameters 301. In other words, the components added in the second embodiment provide a function of selectively overriding an uncalibrated control parameter only when a specific control parameter is calibrated.
[0108] The operation of the decoding unit 240 is the same as that in the first embodiment, that is, it decodes the operation information 231 and outputs the decoded result as the decoding result information 241 .
[0109] The immediate value / parameter selection unit 310 selects either an immediate value, i.e., the external parameter read entry information 233, or a reference, i.e., the external parameter 301 which is a control parameter after override that replaces the parameter memory output data 251 before override, based on the external parameter selection signal 232, and outputs it as the calculation parameter 311.
[0110] The operation of the quantum device control signal generation unit 320, which receives the decoded result information 241 and the computation parameters 311 as input, and each subsequent unit is the same as in the first embodiment, except for whether or not control parameters are overridden.
[0111] In the second embodiment, the hardware scale increases due to the duplication of the parameter memory, but by separating the storage destination of the control parameters into different parameter memories before and after calibration, it becomes possible to perform safe and reliable control parameter updates with reduced impact on the quantum operation sequence being executed.
[0112] Furthermore, it is possible to add an operation scenario in which the control parameter calibration process is executed but the immediate application of the calibrated control parameters is suppressed by adding a means for forcibly invalidating only the state of the parameter calibration flag 261 without changing the contents of the calibrated parameter memory 260. This scenario improves the degree of freedom when using the control device 200, and is suitable for adjustment work, for example, for the calibration operation conditions set in the calibration control unit 340. EXAMPLES
[0113] Next, a quantum computing system 1B according to a third embodiment of the present invention will be described with reference to Fig. 12. The system configuration of the third embodiment is substantially the same as that of the first embodiment, and therefore a duplicated description will be omitted.
[0114] In this embodiment, the control parameters referenced by each command are not stored as is in the parameter memory 250, but are modified so that they can be calculated as the sum of the offset value set in the offset register and the difference value for the offset value set in the parameter memory.
[0115] The configuration of the quantum computing system 1B differs from the configuration of the quantum computing system 1 in the following respects: That is, the parameter memory 250, the control interface 213 which is the input / output thereof, and the parameter memory output data 251 are deleted, and instead, a differential parameter memory 270 which stores the above-mentioned differential value, a control interface 215 which controls access to the differential parameter memory 270, an offset register file 280 which stores the above-mentioned offset value, a control interface 216 which controls access to the offset register file 280, and an offset register number which specifies an offset register in the offset register file 280 which is referred to when a control parameter is calculated from a differential value in the differential parameter memory 270 are added.
[0116] Furthermore, an adder 290 is added which adds the contents of differential parameter memory output data 271 which is the output of the differential parameter memory 270 and offset register file output data 281 which is the output of the offset register file 280, and outputs the addition result as an external parameter 291. In this way, in this embodiment, the control parameter referenced by the command is calculated as the sum of the offset value set in the offset register and the parameter difference value for the offset value set in the differential parameter memory.
[0117] In accordance with the addition of the above-mentioned components, the calibration control unit 340 is replaced with a calibration control unit 340B. The calibration control unit 340B changes the connection destination of the parameter memory update control signal 341 from the parameter memory 250 to the difference parameter memory 270, adds an offset register update control signal 342 that controls the update of the offset register, and connects it to the offset register file 280.
[0118] 13 shows an example of the contents of the differential parameter memory 270. This differential parameter memory is composed of a plurality of parameter difference value designation fields 270-2, each identifiable by an entry number 270-1, and an offset register number designation field 270-3 that designates an offset register number to be referenced when calculating a control parameter from the parameter difference value. Each parameter difference value designation field stores only the difference value from the value set in the offset register designated as the reference destination.
[0119] 14 shows an example of the contents of the offset register file 280. This offset register file is composed of a plurality of offset registers, each of which can be identified by an offset register number 280-1, i.e., offset value designation fields 280-2. Each offset value designation field stores only the offset value to be referenced when calculating a control parameter value from the difference value in the difference parameter memory 270.
[0120] Although not particularly limited, the bit width of the offset value designation field 280-2 is preferably implemented to match the parameter with the largest bit width among all parameters included in all commands supported by the control device 200, and the parameter difference value designation field 270-2 is preferably implemented to have a bit width smaller than that of the parameter value designation field 250-2. In addition, it is desirable to configure the number of offset registers to be smaller than the number of entries in the difference parameter memory 270. With the above-mentioned configuration, particularly when a plurality of control parameters have a distribution in which the control parameters are concentrated near a specific offset value, the plurality of control parameters as a whole can be efficiently stored and handled with a small number of bits.
[0121] Fig. 15 shows an example of a detailed configuration of the calibration control unit 340B. This is a modification of the calibration control unit 340 described with reference to Fig. 6, and unless otherwise specified, the functions of components having the same reference numerals are the same, and therefore duplicated explanations will be omitted.
[0122] The calibration control unit 340B includes a calibration value calculation unit 3440 in addition to the calibration target setting unit 3400, the calculation result storage unit 3410, the calibration calculation execution unit 3420, and the post-calibration parameter calculation unit 3430.
[0123] The calibration target setting unit 3400 holds various control information defining detailed calibration operation conditions set from the host PC 100 via the control interface 217, and outputs information specifying calibration calculation conditions such as the calibration calculation algorithm and the number of data to be calculated to the calibration calculation control signal 3401, and information specifying a target value of the calibration calculation output and a post-calibration control parameter calculation procedure to the calibration target control signal 3402. In addition, the calibration target setting unit 3400 outputs to a calibration target selection signal 3403 the entry number in the differential parameter memory 270 in which the control parameters to be calibrated are stored, the offset register number referenced from the entry, and information specifying the calibration policy.
[0124] Although not particularly limited, the calibration policy includes the maximum fluctuation range of the offset value permitted in one calibration, the selection priority of the calibration target (either the differential parameter value or the offset value), and the allocation of the calibration amount (difference from the current value) for each calibration target.
[0125] Furthermore, similarly to the first embodiment, the calibration target setting unit 3400 controls the reading of the calculation results between the calculation result storage unit 3410 and the calibration target setting unit 3400 via the calculation result read control signal 3404. In this manner, in the calibration control of the control parameter, the calibration target setting unit 3400 sets a policy for calibrating the difference between the control parameter values before and after calibration by dividing it into a calibration amount for the offset value and a calibration amount for the parameter difference value.
[0126] The operation of the calculation result storage unit 3410 and the calibration calculation execution unit 3420 is the same as in the first embodiment, and they store the calculation result read data 331, execute the calibration calculation on that data, and when the calibration calculation for the specified number of data to be calculated is completed, output the calibration calculation result as the calibration calculation result information 3421.
[0127] The post-calibration parameter calculation unit 3430 calculates a post-calibration control parameter 3431 from the calibration calculation result information 3421 based on the calibration target control signal 3402 .
[0128] The calibration value calculation unit 3440 calculates a calibration amount for each calibration target based on the post-calibration control parameter 3431 and the calibration policy set by the calibration target selection signal 3403. The calibration value calculation unit 3440 outputs the parameter memory update control signal 341 for writing a post-calibration differential parameter value obtained by adding a calibration amount to be dealt with by changing a parameter value to a current differential parameter value, among differences (calibration amounts) between control parameters before and after calibration, to the differential parameter memory 270, and the offset register update control signal 342 for writing a post-calibration offset value obtained by adding a calibration amount to be dealt with by changing an offset value to the current offset value to the offset register file 280.
[0129] Here, the variable range of a differential parameter value with a relatively small bit width is restricted, while an offset value with a sufficient bit width can be changed in full scale. However, due to the characteristic that multiple control parameter values that reference the offset value are simultaneously affected, careful allocation of the calibration amount for each calibration target is required.
[0130] For example, a calibration policy that prioritizes the differential parameters is assumed, in which all of the calibration amounts that can be handled by correcting the differential parameter values are handled by the differential parameters, and only the remaining calibration amounts are handled by offset values. For this purpose, for example, the bit width of the offset register is equal to or greater than the maximum bit width of all control parameters referenced by each command supported by the control device, and the bit width of the parameter difference values stored in each entry of the differential parameter memory is smaller than the bit width of the control parameters stored in each entry of the parameter memory.
[0131] On the other hand, a calibration policy that prioritizes the offset side is assumed, in which the maximum fluctuation width of the offset value allowed in one calibration is specified, all calibration amounts below the maximum fluctuation width are handled on the offset side, and only the remaining calibration amounts are handled on the difference parameter side. For this purpose, for example, in the calibration control of the control parameters, the difference between the offset values before and after calibration is limited to the maximum fluctuation width allowed in one calibration. Furthermore, in the latter calibration policy, the calibration may be insufficient due to the variable range constraint of the difference parameter. Therefore, it is desirable that the calibration control unit 340B has the flexibility to realize various calibration policies and further has a means for confirming the success or failure of the calibration.
[0132] 16 is a timing chart showing an example of quantum operation sequence processing by a system control application operating on the host PC 100 in the quantum operation system 1B according to the third embodiment. The timing chart shows an example of quantum operation sequence processing, which starts from a request to execute a quantum operation sequence (command string), and shows an overview of the command execution control in the control device 200 and the overall control including quantum operations in the quantum device 400. This timing chart is substantially the same as the first embodiment shown in FIG. 7, so only the points related to the differences in the components of the quantum operation system will be described.
[0133] As in the first embodiment, the command memory 230 receiving a command execution request from the command memory control signal 222 outputs the contents of the parameter designation field 500 - 4 as the external parameter read entry information 233 .
[0134] When the external parameter read entry information 233 references the differential parameter memory 270, the differential parameter memory 270 outputs the parameter differential value read from the entry specified by the entry number as the differential parameter memory output data 271, and the offset register number of that entry as the offset register number 272.
[0135] The offset register file 280 that receives a reference request based on the offset register number 272 outputs the contents of the offset register specified by the offset register number to the offset register file output data 281 .
[0136] The adder 290 adds the contents of the differential parameter memory output data 271 and the offset register file output data 281 , and outputs the addition result as the external parameter 291 .
[0137] The operation of the decoding unit 240 is the same as that in the first embodiment, that is, it decodes the operation information 231 and outputs the decoded result as the decoding result information 241 .
[0138] Based on the external parameter selection signal 232, the immediate value / parameter selection unit 310 selects either an immediate value, i.e., the external parameter read entry information 233, or a reference, i.e., the external parameter 291 replacing the parameter memory output data 251, and outputs it as the calculation parameter 311.
[0139] As already explained in detail with reference to FIG. 15, the operation of the quantum device control signal generation unit 320, which receives the decoded result information 241 and the calculation parameters 311 as input, and each subsequent unit is the same as in the first embodiment, except that there are two systems of signals related to the writing of post-calibration control parameters, the parameter memory update control signal 341 and the offset register update control signal 342.
[0140] 17 is a flowchart showing a series of steps related to the calibration process of the control parameters in the quantum computing system 1B according to the third embodiment. The calibration process is divided into a process by the host PC 100 (which is the same as (a) in FIG. 8A and will not be illustrated or described) and a process (c) by the calibration control unit 340B (FIG. 17).
[0141] First, in step S800, the calibration control unit 340B performs initialization of an internal state such as past calibration calculation result information stored in the calibration calculation execution unit 3420. It is preferable that the user can select whether to clear the quantum calculation result data stored in the calculation result storage unit 3410 and initialize a pointer indicating the write position of the quantum calculation result data at the same time.
[0142] Next, the calibration control unit 340B monitors (step S810) whether or not there is a calibration calculation instruction among the detailed calibration conditions notified from the calibration target setting unit 3400 to the calibration calculation execution unit 3410. If there is no calibration calculation instruction, the calibration control unit 340B goes into spin standby (step S810, No), and if there is an instruction (step S810, Yes), starts the following calibration calculation.
[0143] First, the calibration control unit 340B checks whether there is an instruction to store the calculation result read data by the calculation result storage control signal 323 (step S820), and if there is no instruction to store, spins on standby (step S820, No). If there is an instruction (step S820, Yes), the calibration control unit 340B stores the calculation result read data 331 in the calculation result storage unit 3410 (step S830), and executes a calibration calculation based on preset calibration calculation conditions for the data (step S840).
[0144] The calibration control unit 340B checks whether the calibration calculation for the specified number of calculation target data has been completed (step S850), and if not completed (step S850, No), waits for an instruction to accumulate new calculation result read data. If completed (step S850, Yes), the calibration control unit 340B calibrates the control parameters specified as the calibration target based on the set post-calibration control parameter calculation procedure from the calibration calculation result information 3421, and calculates the post-calibration parameters 3431 (step S860).
[0145] Next, the calibration control unit 340B judges whether or not it is necessary to update the differential parameter value based on the difference (calibration amount) between the control parameters before and after calibration and the calibration policy (step S870). If an update is necessary (step S870, Yes), the calibration control unit 340B requests an update of the differential parameter memory 270 via the parameter memory update control signal 341 (step S880), and if an update is not necessary, the process is skipped (step S870, No).
[0146] Finally, the calibration control unit 340B judges whether or not the offset value needs to be updated based on the difference (calibration amount) between the control parameters before and after calibration and the calibration policy (step S890). If an update is necessary (step S890, Yes), the calibration control unit 340B requests an update of the offset register file 280 via the offset register update control signal 342 (step S900), and if an update is not necessary, the process is skipped (step S890, No).
[0147] In the third embodiment, a means is provided for efficiently storing and handling all of the control parameters using a small number of bits, particularly when the control parameters have a characteristic distribution, i.e., when the control parameters are concentrated in the vicinity of one or a small number of specific values (offset values).
[0148] In addition, it becomes possible to collectively calibrate a plurality of control parameters that refer to a specific offset value, which is expected to improve the efficiency of the calibration process in the control device 200 and the practicality of the control device 200.
[0149] Although the embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the gist of the invention. These embodiments and their modifications are included within the scope and gist of the invention, and are included in the scope of the invention and its equivalents described in the claims. The components described in the embodiments may be realized by specially designed hardware such as an ASIC (Application Specific Integrated Circuit), or by programmable hardware such as an FPGA (Field-Programmable Gate Array). At least some of the functions may be performed by software running on a host PC.
[0150] According to the above embodiment, a practical quantum computer can be realized, which consumes less energy, reduces carbon emissions, prevents global warming, and contributes to the realization of a sustainable society. [Explanation of symbols]
[0151] 1, 1A, 1B: Quantum computing system 100: Host PC 101: Host interface 200: Control device 210: Host interface unit 211, 212, 213, 214, 215, 216, 217: Control interface 220: Sequence control unit 221: Command execution status signal 222: Command memory control signal 230: Command memory 230-1: Entry number 230-2: Command specification field 231: Calculation information 232: External parameter selection signal 233: External parameter read entry information 240: Decoder 241: Decode result information 250: Parameter memory 250-1: Entry number 250-2: Parameter value specification field 251: Parameter memory output data 260: Calibrated parameter memory 260-1: Entry number 260-2: Parameter value specification field 260-3: Parameter Calibration Flag Field 261: Parameter calibration completed flag 262: Calibrated parameter memory output data 270: Differential parameter memory 270-1: Entry number 270-2: Parameter difference value specification field 270-3: Offset register number specification field 271: Differential parameter memory output data 272: Offset register number 280: Offset register file 280-1: Offset register number 280-2: Offset value specification field 281: Offset register file output data 290: Adder 291: External parameters 300: Calibrated parameter selection section 301: External parameters 310: Immediate value / parameter selection section 311: Calculation parameters 320: Quantum device control signal generator 321: Quantum device control signal 322: Calculation result read control signal 323: Calculation result storage control signal 330: Calculation result reading unit 331: Calculation result read data 340, 340B: Calibration control unit 341: Parameter memory update control signal 342: Offset register update control signal 400:Quantum Devices 410: Quantum operation control unit 411: Quantum operation unit control signal 420: Quantum operation section 421: Quantum operation unit output signal 500: Command format 500-1: Rate information specification field (RATE) 500-2: Operation information specification field (OPR) 500-3: External parameter selection field (EXT) 500-4: Parameter specification field (PARAM) 2200: Execution state control unit 2201, 2202: Execution start request signal 2210: Execution entry number generation unit 2220: Execution rate control unit 2221: Execution completion notification signal 3400: Calibration target setting unit 3401: Calibration operation control signal 3402: Calibration target control signal 3403: Calibration target selection signal 3404: Calculation result read control signal 3410: Operation result storage section 3411: Accumulated data 3420: Calibration calculation execution unit 3421: Calibration calculation result information 3430: Post-calibration parameter calculation unit 3431: Post-calibration parameters 3440: Calibration value calculation unit
Claims
1. A control device for controlling quantum operations in a quantum bit array in which a plurality of quantum bits are arranged one-dimensionally or two-dimensionally, a command memory for storing a plurality of control commands; a parameter memory for storing a part or all of the control parameters associated with the control command; the command format of the control command includes one or more parameter specification fields that specify either an immediate value of the control parameter or a reference to the control parameter stored in the parameter memory; Control device.
2. The control device further comprises a calibration control unit that calibrates the control parameters based on an output signal from the quantum bit array. The control device of claim 1 .
3. A bit width of the control parameters that can be stored in each entry of the parameter memory is equal to or larger than a maximum bit width of all the control parameters referenced by each command supported by the control device. The control device of claim 1 .
4. When the bit width of the control parameters that can be stored in each entry of the parameter memory is smaller than the maximum bit width of all the control parameters referenced by each command supported by the control device, adjacent entries of the parameter memory are simultaneously referenced. The control device of claim 1 .
5. The number of references that can be simultaneously processed by the parameter memory is equal to or greater than the maximum number of control parameters of each command supported by the control device. The control device of claim 1 .
6. When the number of references that can be simultaneously processed by the parameter memory is smaller than the maximum number of control parameters of each command supported by the control device, the reference operation is processed in a time-division manner. The control device of claim 1 .
7. At least a part of the parameter memory is configured as a read-only area. The control device of claim 1 .
8. The output signal from the quantum bit array includes a part of a signal that controls the quantum bit array. The control device of claim 1 .
9. Supporting a calibration support command for selectively acquiring one of the contents of the output signal from the quantum bit array; The control device of claim 1 .
10. When the bit width of the control parameter referenced by the command is equal to or less than the bit width defined by the command format of the command, when the calibration frequency required for the control parameter is relatively low, or when the calibration of the control parameter is to be suppressed, the parameter is treated as an immediate value, Otherwise, a reference destination in the parameter memory of the control parameter is set in the command. The control device of claim 1 .
11. The method further comprises a means for selecting one of a small number of candidate values based on an immediate value set in the command before executing the command when it is certain that the control parameter referred to by the command will be one of a small number of candidate values. The control device of claim 1 .
12. The control parameter referred to by the command is calculated as a sum of an offset value set in an offset register and a parameter difference value for the offset value set in a difference parameter memory. The control device of claim 1 .
13. a bit width of the offset register is equal to or greater than a maximum bit width of all control parameters referenced by each command supported by the control device; a bit width of the parameter difference value stored in each entry of the differential parameter memory is smaller than a bit width of the control parameter stored in each entry of the parameter memory, A control device as claimed in claim 12.
14. A calibration control of the control parameter, A difference between the offset values before and after the calibration is limited to a maximum fluctuation range permitted in one calibration. A control device as claimed in claim 12.
15. A calibration control of the control parameter, The present invention is characterized in that the calibration method includes a means for setting a policy for calibrating a difference between a control parameter value before and after calibration by dividing the difference between the control parameter value before and after calibration into a calibration amount for the offset value and a calibration amount for the parameter difference value. A control device as claimed in claim 12.
Citation Information
Patent Citations
Command acquisition controller
JP1989169655A