Display device and method of manufacturing the same

Abstract

To provide a display device with reduced contact resistance between a circuit component and a pad signal line in a pad portion.SOLUTION: An embodiment discloses a display device comprising an insulating layer disposed on a substrate, first electrodes and contact electrodes arranged on the insulating layer, a plurality of light-emitting devices arranged on the first electrodes, a second electrode disposed on the light-emitting devices, and a passivation layer covering the first electrodes, where the passivation layer includes first opening holes exposing portions of upper surfaces of the first electrodes.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] The embodiments relate to a display device using an inorganic light emitting diode as a light source and a method of manufacturing the same.

Background Art

[0002] Electroluminescent display devices include an organic light emitting display device in which an organic light emitting diode (OLED) is disposed, and an inorganic light emitting display device (hereinafter referred to as an "LED display device") in which an inorganic light emitting diode (Light Emitting Diode: hereinafter referred to as "LED") is disposed.

[0003] Since an electroluminescent display device displays an image using a self-luminous element, a separate light source, for example, a backlight unit, is not required, and thus it can be embodied in a thin and various forms.

[0004] In an organic light emitting display device, an oxidation phenomenon may occur between the organic light emitting layer and the electrode due to the penetration of moisture and oxygen, and thus a design for preventing the penetration of oxygen and moisture is required.

[0005] Recently, as an example of an inorganic light emitting display device, a micro LED display device in which micro LEDs are disposed in pixels has been in the spotlight as a next-generation display device. A micro LED can be an inorganic LED having a size of 100 μm or less. Micro LEDs are manufactured in a separate semiconductor process and transferred to pixel positions on a display panel substrate of a display device and disposed in each sub-pixel for each color.

Summary of the Invention

Problems to be Solved by the Invention

[0006] In the present specification, in a region other than the region overlapping with the light-emitting element, a metal layer having a low adhesive force with the first optical layer and the second optical layer is prevented from contacting the first optical layer and the second optical layer, so as to enhance the adhesive force between the first optical layer and the second optical layer and the insulating layer, and to provide a display device in which the contact resistance between the circuit component and the pad portion signal wiring is reduced in the pad portion.

[0007] The problems to be solved by the present specification are not limited to the problems mentioned above, and other problems not mentioned here will be clearly understood by those skilled in the art from the following description.

Means for Solving the Problems

[0008] The above problems are achieved by a display device including an insulating layer disposed on a substrate; a bank pattern disposed on the insulating layer; a first electrode including a plurality of metal layers disposed on the bank pattern; a first metal layer disposed on the first electrode; a solder pattern disposed on the first metal layer; a light-emitting element disposed on the solder pattern; and a second electrode disposed on the light-emitting element, wherein the first metal layer is disposed only in a region overlapping with the light-emitting element.

[0009] According to the present specification, the first metal layer is formed only in a region overlapping with the light-emitting element 10. Thereby, when the first metal layer is made of indium tin oxide (ITO), since the adhesive force with the first optical layer and / or the second optical layer is weak, it is possible to prevent the phenomenon that the first optical layer and / or the second optical layer floats on the first metal layer ML1. Further, when a circuit component is attached through an adhesive containing a conductive ball such as ACF to a part of the signal wiring in the pad portion, it is possible to prevent the problem that the contact resistance with the first metal layer increases.

[0010] In addition, when wet etching is performed to form an opening of the first metal layer made of indium tin oxide (ITO) disposed on the bank pattern, it is possible to prevent the problem that the crystallized indium tin oxide (ITO) is not etched.

[0011] The various and beneficial advantages and effects of this specification are not limited to the above-described content, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

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Figure 10a

Figure 10b

Figure 11

Figure 12a

Figure 12b

Figure 12c

Figure 12d

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Figure 12g

Mode for Carrying Out the Invention

[0013] The advantages, features, and the methods for achieving them of the present invention will become clear by referring to the embodiments described in detail below together with the accompanying drawings. The present invention is not limited to the embodiments disclosed below and can be embodied in various different forms, provided that the embodiments make the disclosure of the present invention complete and are provided to fully inform those with ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0014] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, so the present invention is not limited to the matters illustrated in the drawings. The same reference numerals throughout the specification refer to substantially the same components. Also, in explaining the present invention, when it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description thereof is omitted.

[0015] When terms such as "comprising", "including", "having", "consisting of", etc. mentioned in this specification are used, other parts can be added as long as "only" is not used. When a component is expressed in the singular, it can be interpreted as plural unless otherwise explicitly stated.

[0016] In interpreting a component, it is interpreted as including an error range even without separate explicit description.

[0017] When the positional relationship and the mutual connection relationship between two components are described, such as "on ~", "above ~", "below ~", "next to ~", "connect or couple (~)", "crossing or intersecting", etc., one or more other components may be interposed between the components unless terms such as "immediately" or "directly" are mentioned.

[0018] When the temporal sequence relationship is described by "after ~", "subsequent to ~", "next to ~", "before ~", etc., it may not be continuous on the time axis unless "immediately" or "directly" is used.

[0019] The first, second, etc. may be used before the name of a component to distinguish components, but the function and structure are not limited by this ordinal number or the name of the component. For the convenience of explanation, the ordinal numbers prefixed to the names of the same components may be different between examples.

[0020] The following examples can be partially or wholly combined or combined with each other, and various linkages and drives are technically possible. Each example may be implemented independently of each other, or may be implemented together in an associated relationship.

[0021] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0022] The display device according to an embodiment of the present specification includes a display panel in which a display area or a screen on which an image is displayed is arranged, and a pixel driving circuit that drives the pixels of the display panel. The display area includes a pixel area in which pixels are arranged. The pixel area includes a plurality of light emitting areas. A light emitting element is arranged in each of the light emitting areas. The pixel driving circuit may be built into the display panel.

[0023] FIG. 1 is a drawing showing a display device according to an embodiment of the present specification. FIG. 2 is a drawing showing an enlarged view of area A in FIG. 1. FIG. 3 is a drawing showing a partial area of a pixel.

[0024] Referring to FIGS. 1 and 2, a display device 100 according to an embodiment of the present specification includes a display panel on which an input video is visually reproduced. The display panel may include a display area AA where the video is displayed and a non-display area NA where the video is not displayed. Various wirings and drive circuits may be mounted in the non-display area NA, and a pad portion PAD to which an integrated circuit, a printed circuit, etc. are connected may be arranged. Here, the display panel may be a panel having a rectangular structure with a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. At this time, the width and length of the display panel may be set to various design values depending on the application field of the display device. And the X-axis direction may mean the width direction, the row direction, or the horizontal direction, the Y-axis direction may mean the longitudinal direction, the column direction, or the vertical direction, and the Z-axis direction may mean the vertical direction or the thickness direction. Also, the X-axis direction, the Y-axis direction, and the Z-axis direction may be perpendicular to each other, but may also mean different directions that are not perpendicular to each other. Thereby, each of the X-axis direction, the Y-axis direction, and the Z-axis direction may be described as any one of a first direction, a second direction, and a third direction. And a plane extending in the X-axis direction and the Y-axis direction may mean a horizontal plane.

[0025] A plurality of light-emitting elements 10 arranged in the display area AA to form pixels PXL may be micro-sized inorganic light-emitting elements. The inorganic light-emitting elements can be grown on a silicon wafer and then attached to the display panel through a transfer process.

[0026] The transfer process of the light-emitting elements 10 may be performed for each pre-divided area. Although FIG. 1 illustrates an example in which the display area AA is divided into nine transfer areas ST, the size and the number of divisions of the transfer areas are not limited thereto. The transfer process may be performed sequentially or simultaneously in the first transfer area ST to the ninth transfer area ST. In each transfer area ST, blue light-emitting elements 10, green light-emitting elements 10, and red light-emitting elements 10 may be transferred sequentially.

[0027] A data driving circuit or a gate driving circuit may be arranged in the non-display area NA, and wirings for supplying control signals for controlling such driving circuits may be arranged. Here, the control signals include various timing signals including a clock signal, an input data enable signal, and a synchronization signal, and may be received through the pad portion PAD.

[0028] The pixel PXL can be driven by a pixel driving circuit. The pixel driving circuit can receive a driving voltage, a video signal (digital signal), a synchronization signal synchronized with the video signal, etc., and output an anode voltage and a cathode voltage of the light emitting element 10 to drive a plurality of pixels. The driving voltage can be a high potential voltage EVDD. The cathode voltage can be a low potential voltage EVSS commonly applied to the pixels. The anode voltage can be a voltage corresponding to the pixel data value of the video signal. The pixel driving circuit may be arranged in the non-display area NA or may be arranged below the display area AA.

[0029] Each of the pixels PXL can include a plurality of sub-pixels having different colors from each other. For example, the plurality of pixels can include a red sub-pixel in which the light emitting element 10 that emits light of a red wavelength is arranged, a green sub-pixel in which the light emitting element 10 that emits light of a green wavelength is arranged, and a blue sub-pixel in which the light emitting element 10 that emits light of a blue wavelength is arranged. The plurality of pixels can further include white pixels.

[0030] Referring to FIGS. 2 to 3, a plurality of pixels PXL can be continuously arranged in a first direction (X-axis direction) and a second direction (Y-axis direction). A plurality of sub-pixels of the same color can be arranged within the pixels of the display area AA. For example, each of the plurality of pixels includes a first red sub-pixel in which a first-1 light-emitting element 11a that emits light of a red wavelength is arranged, a second red sub-pixel in which a first-2 light-emitting element 11b that emits light of a red wavelength is arranged, a first green sub-pixel in which a second-1 light-emitting element 12a that emits light of a green wavelength is arranged, a second green sub-pixel in which a second-2 light-emitting element 12b that emits light of a green wavelength is arranged, a first blue sub-pixel in which a third-1 light-emitting element 13a that emits light of a blue wavelength is arranged, and a second blue sub-pixel in which a third-2 light-emitting element 13b that emits light of a blue wavelength is arranged. The first-1 light-emitting element 11a, the second-1 light-emitting element 12a, and the third-1 light-emitting element 13a can be interpreted as main light-emitting elements. The first-2 light-emitting element 11b, the second-2 light-emitting element 12b, and the third-2 light-emitting element 13b can be interpreted as sub light-emitting elements.

[0031] When one sub-pixel includes at least one or more light-emitting elements and one light-emitting element fails, the brightness of other light-emitting elements can be increased to adjust the brightness of the sub-pixel. However, it is not necessarily limited to this, and one sub-pixel may include only one light-emitting element. A plurality of first electrodes 161 are respectively arranged below the light-emitting elements 10 and can be selectively connected to a plurality of signal wirings TL1 to TL6 by the extension portions 161a. A high-potential voltage can be applied to the pixel driving circuit through the signal wirings TL1 to TL6. The signal wirings TL1 to TL6 and the first electrodes 161 can be formed of an electrode pattern integrated in the electrode pattern process.

[0032] Exemplarily, the first signal wiring TL1 may be connected to the anode electrode of the first red sub-pixel, and the second signal wiring TL2 may be connected to the anode electrode of the second red sub-pixel. The third signal wiring TL3 may be connected to the anode electrode of the first green sub-pixel, and the fourth signal wiring TL4 may be connected to the anode electrode of the second green sub-pixel. The fifth signal wiring TL5 may be connected to the anode electrode of the first blue sub-pixel, and the sixth signal wiring TL6 may be connected to the anode electrode of the second blue sub-pixel. When one sub-pixel includes only one light-emitting element, the number of the signal wirings TL may be reduced by half.

[0033] The second electrode 170 may be an anode electrode that is arranged for each row and applies a cathode voltage to the light-emitting elements 10 continuously arranged in the first direction (X-axis direction). The plurality of second electrodes 170 may be arranged at intervals from each other in the second direction (Y-axis direction). The plurality of second electrodes 170 may be connected to the cathode voltage through the contact electrodes 163. The plurality of second electrodes 170 may be electrically connected to the contact electrodes 163 respectively. However, it is not necessarily limited thereto, and the second electrode 170 may be composed of a single electrode layer without being divided into a plurality of electrodes and function as a common electrode.

[0034] FIG. 4 is a cross-sectional view taken along line I-I' in FIG. 3. FIG. 5 is a cross-sectional view taken along line II-II' in FIG. 3. FIG. 6 is a cross-sectional view taken along line III-III' in FIG. 3. FIG. 7 is a cross-sectional view showing an example in which two light-emitting elements are connected to a pixel driving circuit.

[0035] Referring to FIGS. 3 to 5, the display device according to the embodiment includes a plurality of first electrodes 161 and contact electrodes 163 arranged on the substrate 110, a plurality of light-emitting elements 10 arranged on the plurality of first electrodes 161, a first optical layer 141 arranged between the plurality of light-emitting elements 10, and a second electrode 170 arranged on the plurality of light-emitting elements 10.

[0036] The substrate 110 can be made of a plastic having flexibility. For example, the substrate 110 can be a single-layer or multi-layer substrate made of a material selected from among polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, and cyclic-olefin copolymer, but is not limited thereto. For example, the substrate 110 can be a ceramic substrate or a glass substrate.

[0037] On the substrate 110, the pixel driving circuit 20 can be disposed in the display area AA. The pixel driving circuit 20 can include a plurality of thin film transistors using amorphous silicon semiconductors, polycrystalline room silicon semiconductors, or oxide semiconductors.

[0038] The pixel driving circuit 20 can include at least one driving thin film transistor, at least one switching thin film transistor, and at least one storage capacitor. When the pixel driving circuit 20 includes a plurality of thin film transistors, it can be formed on the substrate 110 by a TFT (Thin Film Transistor) manufacturing process. In an embodiment, the pixel driving circuit 20 can be a concept that collectively refers to a plurality of thin film transistors electrically connected to the light emitting element 10.

[0039] The pixel driving circuit 20 can be a driving driver manufactured using a MOSFET (Metal-oxide-silicon field effect transistor) manufacturing process on a single crystal semiconductor substrate 110. The driving driver can include a plurality of pixel driving circuits to drive a plurality of sub-pixels. When the pixel driving circuit 20 is implemented as a driving driver, after the adhesive layer is disposed on the substrate 110, the driving driver can be mounted on the adhesive layer by a transfer process.

[0040] A buffer layer 121 covering the pixel driving circuit 20 may be disposed on the substrate 110. The buffer layer 121 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto.

[0041] The buffer layer 121 may be formed by laminating an inorganic insulating material, such as silicon nitride (SiNx) or silicon oxide (SiO2), in multiple layers, or by laminating an organic insulating material and an inorganic insulating material in multiple layers.

[0042] An insulating layer 122 may be disposed on the buffer layer 121. The insulating layer 122 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto. Connection wirings RT1 and RT2 may be disposed on the buffer layer 121. The connection wirings may include a number of connection wirings such as a first connection wiring RT1 and a second connection wiring RT2. The connection wirings RT1 and RT2 may be connected to corresponding signal wirings TL1 to TL6. The signal wirings may include, but are not limited to, a first signal wiring TL1 to a sixth signal wiring TL6. The connection wirings RT1 and RT2 may include a plurality of wiring patterns disposed in different layers with one or more insulating layers therebetween. The wiring patterns disposed in different layers may be electrically connected through contact holes penetrating the insulating layer.

[0043] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light-emitting element 10 may be disposed on each bank pattern 130. For example, the first light-emitting element 11 may be disposed on the first bank pattern 130a, the second light-emitting element 12 may be disposed on the second bank pattern 130b, and the third light-emitting element 13 may be disposed on the third bank pattern 130c.

[0044] The bank pattern 130 can be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto. The bank pattern 130 can guide the position where the light-emitting element 10 is attached in the transfer process of the light-emitting element 10. The bank pattern 130 may be omitted.

[0045] A solder pattern 162 can be disposed on the first electrode 161. The solder pattern 162 can be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto.

[0046] A plurality of light-emitting elements 10 can be respectively mounted on the solder pattern 162. One pixel can include light-emitting elements 10 of three hues. The first light-emitting element 11 can be a red light-emitting element, the second light-emitting element 12 can be a green light-emitting element, and the third light-emitting element 13 can be a blue light-emitting element. Two light-emitting elements can be mounted on each sub-pixel.

[0047] The first optical layer 141 can cover the plurality of light-emitting elements 10 and the bank pattern 130. Therefore, the first optical layer 141 can cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The first optical layer 141 extends in the first direction X and is arranged to be separated in the second direction Y so as to separate the pixels arranged separately in the second direction. Thereby, the first optical layer 141 can be separated between the rows of pixels. Here, the row can mean the first direction. And one row of pixels arranged along the first direction can be called a pixel group. Thereby, the display panel can include a plurality of pixel groups arranged to be separated from each other in the second direction. For example, the first optical layer 141 arranged along the first direction is arranged around the pixels, and the plurality of first optical layers 141 arranged corresponding to the plurality of pixel groups are arranged to be separated from each other in the second direction. Therefore, one first optical layer 141 arranged around the pixels forming one row can be separated from another first optical layer 141 arranged around the pixels forming another row.

[0048] The first optical layer 141 can include an organic insulating material in which fine metal particles such as titanium dioxide particles are dispersed. The light emitted from the plurality of light-emitting elements 10 can be scattered by the fine metal particles dispersed in the first optical layer 141 and emitted to the outside.

[0049] The second electrode 170 can be disposed on the plurality of light-emitting elements 10. The second electrode 170 can be commonly connected to the plurality of pixels PXL. The second electrode 170 can be a thin electrode through which light can pass. The second electrode 170 can be a transparent electrode material, for example, indium tin oxide (ITO), but is not necessarily limited thereto.

[0050] The second electrode 170 can extend in the first direction (X-axis direction) and be spaced apart in the second direction (Y-axis direction). For example, one second electrode 170 can be formed to extend in the first direction, and a plurality of second electrodes 170 extending in the first direction can be arranged to be spaced apart from each other along the second direction. At this time, the second electrode 170 can be arranged corresponding to each of the pixels arranged to be spaced apart from each other in the second direction. The second electrode 170 includes a first region 171 disposed on the upper surface of the light-emitting element 10 and the upper surface of the first optical layer 141, a second region 172 that contacts the contact electrode 163 and is electrically connected to the contact electrode 163, and a third region 173 disposed on the side surface of the first optical layer 141 and connecting the first region 171 and the second region 172.

[0051] On the plane, the plurality of second electrodes 170 can overlap the first optical layer 141 respectively, and the third region 173 can cover the outer plane of the first optical layer 141.

[0052] The second optical layer 142 can be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 can be disposed on the insulating layer 122 together with the first optical layer 141. The first optical layer 141 and the second optical layer 142 can include the same material (e.g., siloxane). For example, the first optical layer 141 can be a siloxane containing titanium oxide (TiOx), and the second optical layer 142 can be a siloxane not containing titanium oxide (TiOx). However, it is not necessarily limited thereto, and the first optical layer 141 and the second optical layer 142 may be formed of the same material or different materials from each other.

[0053] According to the embodiment, since the second region 172 of the second electrode 170 is connected to the contact electrode 163 in a state where it is entirely flat, excessive stress is not concentrated at the point where it is connected to the contact electrode 163. Therefore, the occurrence of cracks in the second electrode 170 can be effectively prevented.

[0054] The second optical layer 142 can cover the second region 172 and the third region 173 of the second electrode 170. The upper surface of the second optical layer 142 and the upper surface of the first region 171 of the second electrode 170 can be in the same plane. That is, the first region 171 and the second optical layer 142 can function as a planarization layer. As a result, since there is no step on the surface where the black matrix 190 is formed, the pattern of the black matrix 190 can be easily formed on the first optical layer 141 and the second optical layer 142. However, it is not necessarily limited thereto, and the upper surfaces of the second optical layer 142 and the second electrode 170 may have different heights from each other.

[0055] The black matrix 190 can be an organic insulating material to which a black pigment is added. The second electrode 170 can be in contact with the contact electrode 163 under the black matrix 190. A transmissive hole 191 through which light emitted from the light-emitting element 10 is emitted to the outside can be formed between the patterns of the black matrix 190. The transmissive hole 191 can overlap with the light-emitting element 10 in the Z-axis direction, and a part of the black matrix 190 can overlap with the first optical layer 141 in the Z-axis direction. Here, the Z-axis direction can be called the third direction. Therefore, the black matrix 190 can improve the problem that light emitted from each adjacent light-emitting element 10 is emitted after being mixed by the first optical layer 141.

[0056] The cover layer 180 can be an organic insulating material that covers the black matrix 190 and the second electrode 170. In FIGS. 2 and 3, the configurations of the black matrix 190 and the cover layer 180 are omitted.

[0057] The contact electrode 163 is electrically connected to the first connection wiring RT1 disposed at the lower part, and the first connection wiring RT1 can be connected to the pixel driving circuit 20. Therefore, a cathode voltage can be applied to the second electrode 170 through the contact electrode 163. The first electrode 161 can be electrically connected to the second connection wiring RT2. This will be described later.

[0058] Referring to FIG. 5, the contact electrode 163 and the signal wirings TL1 to TL6 can be arranged on the same plane. The pixel driving circuit 20 can be arranged under the contact electrode 163 and the signal wirings TL1 to TL6. When the pixel driving circuit 20 is a driving driver, a plurality of driving drivers can be arranged in the display panel.

[0059] The passivation layer 133 can expose the contact electrode 163 so that the contact electrode 163 and the second electrode 170 are electrically connected. Also, the passivation layer 133 can insulate the signal wirings TL2 to TL5 and the second electrode 170. Here, the passivation layer 133 can be formed of an inorganic material.

[0060] Referring to FIG. 6, the first electrode 161 may extend to one side surface 131 of the bank pattern 130 via the connection portion 161a and may be electrically connected to the second connection line RT2 disposed on the insulating layer 122.

[0061] Referring to FIG. 6, the connecting portion 161a of the first electrode 161 may extend to the side surface 131 of the bank pattern 130 and may be electrically connected to the connecting wiring RT2 disposed on the insulating layer 122.

[0062] The first electrode 161, the connecting portion 161a, the signal wiring TL and / or the connecting wirings RT1, RT2 may include a single-layer or multi-layer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al).

[0063] The first electrode 161 or the signal wiring TL may be formed to have a metal laminated structure in which a number of metal layers are formed using different metal materials such as material and thickness. At this time, the first electrode 161, the connecting portion 161a, and the signal wiring TL may be formed simultaneously through the same manufacturing process. Here, the thickness may represent the width between one surface and the other surface of the metal layer disposed in the Z direction.

[0064] The first electrode 161 may include a first metal layer ML1 disposed below the solder pattern 162, a second metal layer ML2 disposed below the first metal layer ML1, a third metal layer ML3 disposed below the second metal layer ML2, and a fourth metal layer ML4 disposed below the third metal layer ML3. When the first electrode 161 is formed of the first metal layer ML1, the second metal layer ML2, the third metal layer ML3, and the fourth metal layer ML4, the first electrode 161 may be deposited in the order of the fourth metal layer ML4 -> the third metal layer ML3 -> the second metal layer ML2 -> the first metal layer ML1, and then patterned by performing a photolithography process and an etching process.

[0065] The first metal layer ML1 is disposed to contact the lower part of the solder pattern 162 and may be electrically connected to the solder pattern 162.

[0066] Further, the first metal layer ML1 can include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) that has good adhesiveness, corrosion resistance, and acid resistance. Here, the first metal layer ML1 can be referred to as an adhesive layer.

[0067] The second metal layer ML2 can be formed of a material having a different resistance value from the first metal layer ML1 and the third metal layer ML3. At this time, the second metal layer ML2 can be formed of a material having a lower light reflectance but a higher resistance value than the third metal layer ML3. For example, the second metal layer ML2 can include titanium (Ti) or molybdenum (Mo).

[0068] The third metal layer ML3 can be formed of a material having a higher light reflectance than the first metal layer ML1. At this time, the third metal layer ML3 can be formed of a material having a higher light reflectance than the second metal layer ML2. For example, the third metal layer ML3 can include aluminum (Al) or silver (Ag).

[0069] That is, the light reflectance of the third metal layer ML3 may be greater than the light reflectances of the first metal layer ML1 and the second metal layer ML2.

[0070] The fourth metal layer ML4 can be formed of the same material as the second metal layer ML2. For example, the fourth metal layer ML4 can include titanium (Ti) or molybdenum (Mo).

[0071] After forming up to the fourth metal layer ML4, a reflective opening OP can be formed in the first electrode 161. The reflective opening OP can be an area where the first metal layer ML1 and the second metal layer ML2 are removed to expose only a part of the third metal layer ML3. The reflective opening OP can be in a form that surrounds the solder pattern 162 on the plane, and can be circular, square, etc., but is not limited thereto.

[0072] The light emitted from the light-emitting element 10 can be reflected on the upper surface of the third metal layer ML3 exposed by the reflective opening OP, showing an effect of enhancing the light efficiency of the display device.

[0073] The passivation layer 133 is disposed on the first electrode 161 and the signal wiring TL, and can include an opening hole 133a that exposes the solder pattern 162. Here, the opening hole 133a that exposes the solder pattern 162 can be called the first opening hole. At this time, the reflective opening OP can be formed in a form surrounding the first opening hole.

[0074] The light-emitting element 10 can include a first-conductivity-type semiconductor layer 10-1, an active layer 10-2 disposed on the first-conductivity-type semiconductor layer 10-1, and a second-conductivity-type semiconductor layer 10-3 disposed on the active layer 10-2. A first driving electrode 15 is disposed below the first-conductivity-type semiconductor layer 10-1, and a second driving electrode 14 can be disposed above the second-conductivity-type semiconductor layer 10-3.

[0075] The light-emitting element 10 can be formed on a silicon wafer by using methods such as Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and Sputtering.

[0076] The first-conductivity-type semiconductor layer 10-1 can be embodied by a compound semiconductor such as a III-V group or II-VI group semiconductor, and can be doped with a first dopant. The first-conductivity-type semiconductor layer 10-1 can be formed of any one or more of semiconductor substances having a composition formula of Alx1Iny1Ga(1-x1-y1)N (0≦x1≦1, 0≦y1≦1, 0≦x1 + y1≦1), InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, but is not limited thereto. When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, Te, etc., the first-conductivity-type semiconductor layer 10-1 can be an n-type nitride semiconductor layer. However, when the first dopant is a p-type dopant, the first-conductivity-type semiconductor layer 10-1 can be a p-type nitride semiconductor layer.

[0077] The active layer 10-2 is a layer where electrons (or holes) injected through the first-conductivity-type semiconductor layer 10-1 meet holes (or electrons) injected through the second-conductivity-type semiconductor layer 10-3. The active layer 10-2 can generate light having a corresponding wavelength by electrons and holes recombining and transitioning to a lower energy level.

[0078] The active layer 10-2 can have any one of a single-well structure, a multiple-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the structure of the active layer 10-2 is not limited thereto. The active layer 10-2 can generate light in the visible light wavelength band. Exemplarily, the active layer 10-2 can output light in any one of the wavelength bands of blue, green, and red.

[0079] The second-conductivity-type semiconductor layer 10-3 can be disposed on the active layer 10-2. The second-conductivity-type semiconductor layer 10-3 can be embodied by a compound semiconductor such as a group III-V compound semiconductor or a group II-VI compound semiconductor, and the second-conductivity-type semiconductor layer 10-3 can be doped with a second dopant. The second-conductivity-type semiconductor layer 10-3 can be formed of a semiconductor material having a composition formula of Inx2Aly2Ga1-x2-y2N (0≦x2≦1, 0≦y2≦1, 0≦x2 + y2≦1) or a material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second-conductivity-type semiconductor layer 10-3 doped with the second dopant can be a p-type semiconductor layer. When the second dopant is an n-type dopant, the second-conductivity-type semiconductor layer 10-3 can be an n-type nitride semiconductor layer.

[0080] In the embodiment, the light-emitting structure is described as a vertical structure in which the driving electrodes 14 and 15 are disposed on the upper and lower portions of the light-emitting structure. However, the light-emitting device may have a lateral structure or a flip chip structure in addition to the vertical structure.

[0081] Referring to FIG. 7, the main light-emitting element 12a and the sub-light-emitting element 12b of the sub-pixel can be disposed on the bank pattern 130. The second light-emitting element 12 will be exemplarily described. The first-1 electrode 161-1 connected to the main light-emitting element 12a can be electrically connected to the second-1 connection wiring RT21 disposed at the lower portion and extending to one side surface of the bank pattern 130. The first-2 electrode 161-2 connected to the sub-light-emitting element 12b can be electrically connected to the second-2 connection wiring RT22 disposed at the lower portion and extending to the other side surface of the bank pattern 130.

[0082] The pixel driving circuit 20 can apply an anode voltage to the main light-emitting element 12a through the second-1 connection wiring RT21, and can apply an anode voltage to the sub-light-emitting element 12b through the second-2 connection wiring RT22. The pixel driving circuit 20 can apply a cathode voltage to the main light-emitting element 12a and the sub-light-emitting element 12b through the first connection wiring RT1 and the second electrode 170.

[0083] The pixel driving circuit 20 may drive only the main light-emitting element 12a to adjust the luminance, or may drive the main light-emitting element 12a and the sub-light-emitting element 12b simultaneously to adjust the luminance. If the main light-emitting element 12a is darkened, only the sub-light-emitting element 12b can be driven to adjust the luminance.

[0084] FIG. 8 is a drawing showing a display device according to another embodiment of the present specification. FIG. 9 is a cross-sectional view taken along line IV-IV' in FIG. 8.

[0085] Referring to FIGS. 8 and 9, the second electrode 170 can be electrically connected to the contact electrode 163 through the contact hole TH1 formed in the second optical layer 142. The second optical layer 142 can include a contact hole TH1 that exposes the contact electrode 163. The second electrode 170 inserted into the contact hole TH1 of the second optical layer 142 can be brought into contact with the upper surface of the contact electrode 163. The contact hole TH1 can be formed in the outer peripheral region of the pixel.

[0086] FIG. 10a is a drawing showing a display device according to another embodiment of the present specification. FIG. 10b is an enlarged view of region B in FIG. 10a. FIG. 11 is a cross-sectional view taken along line A-A' in FIG. 10b. FIGS. 12a to 12g are drawings showing the manufacturing process of a display device according to an embodiment of the present specification.

[0087] In the following, the contents of the same configurations as those included in the embodiments described with reference to FIGS. 1 to 9 are omitted because of duplication, and the description will focus on other features.

[0088] Referring to FIGS. 10a and 10b, the display panel can include a display area AA where an image is displayed and a non-display area NA where an image is not displayed. Various wirings and driving circuits can be mounted in the non-display area NA, and a pad portion PC to which an integrated circuit and a printed circuit are connected can be arranged. A bending area BE and a connection wiring area CL can be arranged between the non-display area NA and the pad portion PC.

[0089] A data driving circuit or a gate driving circuit may be arranged in the non-display area NA, and wirings for supplying a control signal for controlling such a driving circuit may be arranged. Here, the control signal includes various timing signals including a clock signal, an input data enable signal, and a synchronization signal, and may be received through the wirings arranged in the connection wiring area CL at the pad portion PC.

[0090] Referring to FIG. 11, it includes a plurality of first electrodes 161 and contact electrodes 163 arranged on a substrate 110, a plurality of light-emitting elements 10 arranged on the plurality of first electrodes 161, a first optical layer 141 arranged between the plurality of light-emitting elements 10, and a second electrode 170 arranged on the plurality of light-emitting elements 10.

[0091] An adhesive layer AD may be arranged on the substrate 110. There may be an area where the adhesive layer AD is removed in the non-display area NA or the bending area BE. This is because the more organic layers there are in the bending area BE, the greater the risk of damage or breakage of the organic layers in the bending area BE. The adhesive layer AD may be selected from, for example, any one of Adhesive polymer, epoxy resist, UV resin, polyimide series, acrylate series, urethane series, and Polydimethylsiloxane (PDMS), but is not limited thereto.

[0092] A pixel driving circuit 20 implemented by a driving driver may be arranged on the adhesive layer AD in the display area AA.

[0093] A protective layer 120 for protecting the pixel driving circuit 20 may be formed on the subsequent layer AD. The protective layer 120 can cover at least a part or the whole of the side surface of the pixel driving circuit 20 and can cover a part of the upper surface of the pixel driving circuit 20. The protective layer 120 can cover the entire substrate 110 and can also cover a part of the pad portion PC. The protective layer 120 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto.

[0094] A buffer layer 121 covering the pixel driving circuit 20 may be disposed on the protective layer 120. When the protective layer 120 covers only up to a part of the pad portion PC, the side surface of the protective layer 120 may be covered by the buffer layer 121.

[0095] An insulating layer 122 may be disposed on the buffer layer 121. A connection wiring RT may be disposed on the buffer layer 121. The connection wiring RT may be connected to the corresponding signal wiring TL. The connection wirings RT1 and RT2 may include a plurality of wiring patterns disposed in different layers with one or more insulating layers therebetween. The wiring patterns disposed in different layers may be electrically connected through contact holes penetrating the insulating layer. The third connection wiring RT3 is disposed on the buffer layer 121, and a signal output from the pad portion PC may be transmitted to the display area AA through the third connection wiring RT3. The signal transmitted through the third connection wiring RT3 may be supplied to the pixel driving circuit 20 through the connection wiring RT and the signal wiring TL.

[0096] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light-emitting element 10 may be disposed on each bank pattern 130. For example, referring to FIG. 3, the first light-emitting element 11 may be disposed on the first bank pattern 130a, the second light-emitting element 12 may be disposed on the second bank pattern 130b, and the third light-emitting element 13 may be disposed on the third bank pattern 130c.

[0097] The first electrode 161 can be disposed on the bank pattern 130. In this embodiment, the first electrode 161 includes a plurality of metal layers ML2, ML3, and ML4 excluding the first metal layer ML1 during the formation process. Separately, the first metal layer ML1 can be disposed only in the region overlapping with the first electrode 161 and the multiple light-emitting elements 10. An opening OP can be disposed in the first electrode 161. In this embodiment, the opening OP can be formed by removing the second metal layer ML2. The first metal layer ML1 may not be disposed in the pad portion PC. Also, the first metal layer ML1 may not be disposed in other regions except for the region overlapping with the light-emitting element 10.

[0098] A solder pattern 162 can be disposed on the first electrode 161. The solder pattern 162 can be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto. The solder pattern 162 can include a first portion 162a and a second portion 162b. The first portion 162a can include indium (In), and the second portion 162b can include gold (Au). After the first portion 162a and the second portion 162b are adhered by pressure when the light-emitting element 10 is transferred, heat can be applied to form a eutectic bond. When the second portion 162b is subjected to pressure, a part of the second portion 162b can cover at least a part or the whole of the side surface of the first portion 162a. In this case, the contact area between the first portion 162a and the second portion 162b can be increased, the adhesive force can be increased, and the transmission of electrical signals can be further improved.

[0099] A plurality of light-emitting elements 10 can be respectively mounted on the solder pattern 162.

[0100] The first optical layer 141a can cover the plurality of light-emitting elements 10 and the bank pattern 130. Therefore, the first optical layer 141a can cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The planar arrangement of the first optical layer 141a is the same as the planar arrangement of the first optical layer 141.

[0101] The second electrode 170 can be disposed on the plurality of light-emitting elements 10. The second electrode 170 can be commonly connected to the plurality of pixels PXL.

[0102] The first to second optical layer 141b can be arranged to overlap the first to first optical layer 141a on the second electrode 170. By arranging the first to second optical layer 141b on the second electrode 170, the amount of light emitted forward can be increased.

[0103] The second optical layer 142 can be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 can be arranged on the insulating layer 122 together with the first optical layer 141. The second optical layer 142 can be arranged on the display area AA.

[0104] The black matrix 190 can be arranged on the first to second optical layer 141b, the second electrode 170, and the second optical layer 142. Transmission holes through which light emitted from the light-emitting element 10 is emitted to the outside can be formed between the patterns of the black matrix 190.

[0105] The cover layer 180 can be an organic insulating material covering the black matrix 190 and the second electrode 170. In FIG. 11, the configuration of the cover layer 180 is omitted.

[0106] The circuit component SB can be arranged on the signal wiring TL7 at the pad portion PC. The circuit component SB can be attached to the pad portion PC in the form of COP or COF.

[0107] As described above, the first metal layer ML1 can be formed only in a region overlapping the light-emitting element 10. When the first metal layer ML1 is made of indium tin oxide (ITO), since the adhesion to the first to first optical layer 141a and / or the second optical layer 142 is weak, a phenomenon in which the first to first optical layer 141a and / or the second optical layer 142 floats on the first metal layer ML1 can be shown.

[0108] Also, when the circuit component SB is attached to the seventh signal wiring TL7 at the pad portion PC through an adhesive containing a conductive ball such as ACF, a problem of an increase in contact resistance with the first metal layer ML1 may occur.

[0109] Also, when wet etching is in progress to form an opening OP of a first metal layer ML1 made of indium tin oxide (ITO) disposed on a bank pattern 130, a problem may occur in that the crystallized indium tin oxide (ITO) is not etched. To prevent such a problem, the first metal layer ML1 can be formed only in a region overlapping with the light-emitting element 10.

[0110] Figs. 12a to 12g are drawings showing a manufacturing process of a display device according to an embodiment of the present invention shown in Fig. 11. The drawings are for explaining the process, and unnecessary components for the explanation, such as a detailed electrode connection structure and a substrate 110, are omitted. Each drawing shows a cross-sectional view of the display device in a display area AA and a pad portion PC. The non-display area NA has the same manufacturing process as the pad portion PC.

[0111] Referring to Fig. 12a, a first electrode 161 is formed on a bank pattern 130 formed on an insulating layer 122 in a display area AA. A signal wiring TL7 is formed on the insulating layer 122 in a pad portion PC. The first electrode 161 and the signal wiring TL7 can be formed in the same process and can include a plurality of metal layers ML2, ML3, ML4 excluding the first metal layer ML1.

[0112] Referring to Fig. 12b, the second metal layer ML2 included in the first electrode 161 in the display area AA is removed using an etching process to form an opening OP.

[0113] Referring to Figs. 12c and 12d, a photoresist PR is applied to the front surface of the substrate 110. Then, the photoresist PR located in a region where the first metal layer ML1 is formed in the display area AA and a partial region of the pad portion PC is patterned. In particular, when exposure is performed with a difference in the degree of curing between the upper surface and the inside during the photolithography process, an anisotropic shape can be created after development.

[0114] The patterned area of the photoresist PR applied to the display area AA can have an inverse step. The patterned area of the photoresist PR applied to the pad portion PC can have a round or concave form. Thereafter, a metal layer having the same component as the first metal layer ML1 is disposed on the front surface. A part of the metal layer having the same component as the first metal layer ML1 is disposed on the first electrode 161 in the area where the photoresist PR is patterned in the display area AA, and this is referred to as the first metal layer ML1. In the pad portion PC, the first metal layer ML1 is disposed on the front surface of the pad portion PC.

[0115] Referring to FIG. 12e, a metal layer having the same component as the first portion 162a of the solder pattern is disposed on the display area AA and the pad portion PC. The first portion 162a of the solder pattern can be disposed on the first metal layer ML1 in the area where the photoresist PR is patterned in the display area AA.

[0116] Referring to FIG. 12f, when the photoresist PR applied on the substrate 110 is removed through a lift-off process, the metal layer having the same component as the first metal layer ML1 disposed on the upper portion of the photoresist PR together with the photoresist PR and the metal layer having the same component as the first portion 162a of the solder pattern can be removed.

[0117] Referring to FIG. 12g, the light-emitting element 10 is transferred onto the first portion 162a of the solder pattern. The second portion 162b of the solder pattern can be disposed under the light-emitting element 10. Pressure is applied when the light-emitting element 10 is transferred. At this time, the first portion 162a can be crimped by this pressure to cover at least a part of the side surface of the first metal layer ML1. According to an embodiment of the present invention shown in FIGS. 12a to 12g, the first metal layer ML1 is disposed on the first electrode 161 in the area overlapping the light-emitting element 10, and may not be disposed in the remaining area.

[0118] The manufacturing method of a display device according to an embodiment of the present disclosure further includes a first optical layer 141a surrounding the light-emitting element 10, disposing a second electrode 170 on the light-emitting element 10 and the first optical layer 141a, and disposing a second optical layer 141b. The second electrode 170 is not shown in FIGS. 12A to 12G.

[0119] In the embodiment, the vertical structure in which the driving electrodes 14 and 15 are disposed above and below the light-emitting structure has been described. However, the light-emitting element may have a lateral structure or a flip chip structure in addition to the vertical structure.

[0120] The display device according to the embodiments of the present specification can be applied to mobile devices, video phones, smart watches, watch phones, wearable apparatuses, foldable apparatuses, rollable apparatuses, bendable apparatuses, flexible apparatuses, curved apparatuses, sliding apparatuses, variable apparatuses, electronic notebooks, electronic books, PMPs (portable multimedia players), PDAs (personal digital assistants), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbook computers, workstations, navigation devices, vehicle display devices, theater display devices, TVs, wallpaper devices, signage devices, game devices, notebook computers, monitors, cameras, video cameras, and household electrical appliances. And the display device according to one or more embodiments of the present specification can be applied to an inorganic light-emitting lighting device.

[0121] The display device according to one or more embodiments of the present specification can be described as follows.

[0122] The display device according to one or more embodiments of the present specification includes an insulating layer disposed on a substrate; a bank pattern disposed on the insulating layer; a first electrode including a plurality of metal layers disposed on the bank pattern; a first metal layer disposed on the first electrode; a solder pattern disposed on the first metal layer; a light-emitting element disposed on the solder pattern; and a second electrode disposed on the light-emitting element, wherein the first metal layer is disposed only in a region overlapping with the light-emitting element.

[0123] The display device may further include a first optical layer surrounding the light-emitting element.

[0124] The plurality of metal layers constituting the first electrode may include a second metal layer, a third metal layer, and a fourth metal layer.

[0125] The solder pattern includes a first portion disposed on a first metal layer and a second portion disposed on the first portion, the first portion covers a side surface of the first metal layer, the first portion contains indium, and the second may contain gold.

[0126] The display device further includes a second optical layer disposed on the second electrode, and the second optical layer may have the same components as the first optical layer.

[0127] The display device includes an adhesive layer disposed between the substrate and the insulating layer; a pixel driving circuit disposed on the adhesive layer; a buffer layer disposed on the pixel driving circuit; and a plurality of connection wirings disposed between the buffer layer and the insulating layer, the pixel driving circuit is connected to the plurality of connection wirings, and the plurality of connection wirings may be electrically connected to the first electrode.

[0128] The opening may be formed in the first electrode at a position that does not overlap with the first metal layer.

[0129] The opening may be arranged in a form surrounding the solder pattern.

[0130] According to the display device of an embodiment of the present disclosure, the first metal layer may include indium tin oxide or indium zinc oxide.

[0131] A method for manufacturing a display device according to one or more embodiments of the present specification includes: arranging an insulating layer on a substrate; arranging a bank pattern on the insulating layer in a display region; arranging a first electrode including a plurality of metal layers on the bank pattern; forming an opening in the first electrode; arranging a first metal layer on the first electrode between the openings; arranging a solder pattern on the first metal layer; arranging a light-emitting element overlapping the first metal layer on the solder pattern; and arranging a second electrode on the light-emitting element.

[0132] This specification may further include arranging a first optical layer surrounding the light-emitting element before arranging the second electrode on the light-emitting element.

[0133] This specification may further include arranging a second optical layer on the second electrode after arranging the second electrode on the light-emitting element.

[0134] The plurality of metal layers may include a second metal layer, a third metal layer, and a fourth metal layer.

[0135] The arrangement of the first metal layer may include a process of forming a photoresist on an insulating layer including the first electrode and the bank pattern, a process of patterning the photoresist so as to expose a portion where the first metal layer is to be formed between the first electrodes, a process of sequentially forming the first metal layer and a solder pattern forming layer on the photoresist and the first electrode, and a process of performing lift-off to remove the first metal forming layer and the solder pattern forming layer on the photoresist together with the photoresist. Here, the first metal forming layer on the first electrode is the first metal layer.

[0136] The opening can be formed in the first electrode at a position that does not overlap with the first metal layer.

[0137] The opening can be formed so as to surround the solder pattern.

[0138] Since the content of the specification describing the problem to be solved, the means for solving the problem, and the effect does not specify the essential features of the claims, the scope of the claims is not limited by the matters described in the content of the specification.

[0139] As described above, the embodiments of the present invention have been described in more detail with reference to the attached drawings. However, the present invention is not necessarily limited to such embodiments, and can be variously modified and implemented without departing from the technical idea of the present invention. Therefore, the embodiments disclosed in the present invention are not for limiting the technical idea of the present invention but for explaining it, and the scope of the technical idea of the present invention is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are illustrative and not restrictive in all respects. The protection scope of the present invention should be interpreted by the scope of the claims, and all technical ideas within the equivalent scope should be construed as being included in the scope of the rights of the present invention.

Explanation of Reference Numerals

[0140] 10: Light-emitting element 20: Pixel driving circuit 110: Substrate 121: Buffer layer 122: Insulating layer 130: Bank pattern 141: First optical layer 142: Second optical layer 161: First electrode 163: Contact electrode 170: Second electrode

Claims

1. an insulating layer disposed on the substrate; a bank pattern disposed on the insulating layer; a first electrode including a plurality of metal layers disposed on the bank pattern; a first metal layer disposed on the first electrode; a solder pattern disposed on the first metal layer; A light emitting element disposed on the solder pattern; and a second electrode disposed on the light emitting element; The display device, wherein the first metal layer is disposed only in an area overlapping the light-emitting element.

2. The display device of claim 1 , further comprising a first optical layer surrounding the light emitting element.

3. The display device according to claim 1 , wherein the plurality of metal layers included in the first electrode include a second metal layer, a third metal layer, and a fourth metal layer, in that order.

4. the solder pattern includes a first portion disposed on a first metal layer and a second portion disposed on the first portion; The first portion covers a side surface of the first metal layer, The display of claim 1 , wherein the first portion comprises indium and the second portion comprises gold.

5. a second optical layer disposed on the second electrode; The display device of claim 2 , wherein the second optical layer has the same components as the first optical layer.

6. an adhesive layer disposed between the substrate and the insulating layer; a pixel driving circuit disposed on the adhesive layer; a buffer layer disposed on the pixel driving circuit; and a plurality of interconnects disposed between the buffer layer and the insulating layer; the pixel driving circuit is connected to the plurality of connecting lines, The display device of claim 1 , wherein the plurality of connecting wires are electrically connected to the first electrodes.

7. The display device according to claim 1 , wherein the opening is formed in the first electrode at a position not overlapping with the first metal layer.

8. The display device according to claim 7 , wherein the opening is disposed in a form surrounding the solder pattern.

9. The display device of claim 1 , wherein the first metal layer comprises indium tin oxide or indium zinc oxide.

10. disposing an insulating layer on a substrate; disposing a bank pattern on the insulating layer in a display area; disposing a first electrode including a plurality of metal layers on the bank pattern; forming an opening in the first electrode; disposing a first metal layer on the first electrode between the openings; disposing a solder pattern on the first metal layer; disposing a light emitting element on the solder pattern so as to overlap the first metal layer; and and disposing a second electrode on the light-emitting element.

11. The method of claim 10 , further comprising disposing a first optical layer surrounding the light emitting element before disposing the second electrode on the light emitting element.

12. The method of claim 11 , further comprising: disposing a second optical layer on the second electrode after disposing the second electrode on the light emitting element.

13. The display device manufacturing method of claim 10 , wherein the plurality of metal layers include a second metal layer, a third metal layer, and a fourth metal layer.

14. Disposing the first metal layer includes: forming a photoresist on the insulating layer including the first electrode and the bank pattern; patterning the photoresist to expose a portion of the first electrode on which a first metal layer is to be formed; forming a first metal forming layer and a solder pattern forming layer in sequence on the photoresist and the first electrode; and performing a lift-off process to remove the photoresist together with the first metal forming layer and the solder pattern forming layer on the photoresist; The method of claim 10 , wherein the first metal forming layer on the first electrode is a first metal layer.

15. The method of claim 10 , wherein the opening is formed in the first electrode at a position that does not overlap the first metal layer.

16. The method of claim 10, wherein the opening is formed to surround the solder pattern.

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