Device, communication method, and integrated circuit

Abstract

To properly place CCEs that make up a CORESET.SOLUTION: In a base station 100, a signal allocation unit 105 allocates a downlink control signal (DCI) to a control channel region (CORESET), which is made up of a plurality of control channel elements (CCEs). A transmitting unit 106 transmits the downlink control signal. The number of resource element groups (REGs) that make up a CCE is a power of 2, and a bundling size, which indicates the number of REGs placed in adjacent resource blocks among the REGs that make up the CCE, is a power of 2.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present disclosure relates to a communication device, a communication method, and an integrated circuit.

Background Art

[0002] A communication system called the fifth-generation mobile communication system (5G) is being studied. In 5G, it is being considered to flexibly provide functions for each use case that requires an increase in communication traffic, an increase in the number of connected terminals, high reliability, and low latency. As typical use cases, there are three: enhanced Mobile Broadband (eMBB), massive Machin Type Communications (mMTC), and Ultra Reliable and Low Latency Communicant (URLLC). The 3rd Generation Partnership Project (3GPP), an international standards organization, is studying the advancement of the communication system from both aspects of the advancement of the LTE system and New Radio Access Technology (RAT) (see, for example, Non-Patent Document 1).

Prior Art Documents

Non-Patent Documents

[0003]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the New RAT, it is being considered to configure a plurality of control resource sets (hereinafter referred to as "CORESET") for a terminal (UE: User Equipment) as an area where a Physical Downlink Control Channel (PDCCH), which is a control signal channel including a Downlink Control Indicator (DCI), is arranged. However, in the New RAT, the arrangement method of Control Channel Elements (CCE) that constitute the search space in the CORESET has not been sufficiently studied.

[0005] One aspect of the present disclosure contributes to providing a base station, a terminal, and a communication method capable of appropriately arranging CCE that constitute the search space in the CORESET.

Means for Solving the Problems

[0006] A base station according to one aspect of the present disclosure includes a circuit that allocates a downlink control signal to a control channel area composed of a plurality of control channel elements (CCE), and a transmitter that transmits the downlink control signal. The number of resource element groups (REG) that constitute the CCE is a power of 2, and among the REG that constitute the CCE, the bundling size indicating the number arranged in adjacent resource blocks is a power of 2.

[0007] A terminal according to one aspect of the present disclosure includes a receiver that receives a downlink control signal in a control channel area composed of a plurality of control channel elements (CCE), and a circuit that decodes the downlink control signal. The number of resource element groups (REG) that constitute the CCE is a power of 2, and among the REG that constitute the CCE, the bundling size indicating the number of REG arranged in adjacent resource blocks is a power of 2.

[0008] A communication method according to an aspect of the present disclosure allocates a downlink control signal to a control channel region composed of a plurality of control channel elements (CCEs), transmits the downlink control signal, the number of resource element groups (REGs) constituting the CCEs is a power of 2, and among the REGs constituting the CCEs, the bundling size indicating the number of REGs arranged in adjacent resource blocks is a power of 2.

[0009] A communication method according to an aspect of the present disclosure receives a downlink control signal in a control channel region composed of a plurality of control channel elements (CCEs), decodes the downlink control signal, the number of resource element groups (REGs) constituting the CCEs is a power of 2, and among the REGs constituting the CCEs, the bundling size indicating the number of REGs arranged in adjacent resource blocks is a power of 2.

[0010] Note that these general or specific aspects may be implemented in a system, apparatus, method, integrated circuit, computer program, or recording medium, or may be implemented in any combination of a system, apparatus, method, integrated circuit, computer program, and recording medium.

Advantages of the Invention

[0011] According to an aspect of the present disclosure, the CCEs constituting the CORESET can be appropriately arranged.

[0012] Further advantages and effects in an aspect of the present disclosure will be clarified from the specification and drawings. Such advantages and / or effects are provided by some embodiments and the features described in the specification and drawings respectively, but it is not necessarily required that all of them are provided in order to obtain one or more of the same features.

Brief Description of the Drawings

[0013]

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MODE FOR CARRYING OUT THE INVENTION

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0015] As described above, in the New RAT, it is considered that a CORESET, which is a region of a control channel including DCI as a control signal, is set for the UE, and the UE monitors (blind decoding) a search space in the set CORESET to detect DCI addressed to itself. Also, it is considered that the search space where DCI is arranged is defined by CCE.

[0016] Here, in the New RAT, as the number of REGs (Resource Element Group) per CCE, a number between 4 and 8 is considered. Also, as the number of symbols in which the CORESET is set, numbers from 1 symbol to all symbols within a slot or subframe are conceivable.

[0017] However, depending on the combination of the number of REGs per CCE and the number of symbols in which the CORESET is configured, the number of REGs per symbol in each CCE may become non-uniform. If the number of REGs between symbols in a CCE is non-uniform, there is a problem that the received SINR (Signal to Interference and Noise Ratio) varies for each symbol, making it difficult to adjust the power between CCEs.

[0018] This will be described in more detail below.

[0019] DCI is transmitted using one or more CCEs. Here, the number of CCEs used for one DCI is called the "Aggregation level". That is, the Aggregation level indicates the amount of resources when transmitting DCI. When DCI is transmitted in the CORESET (PDCCH area), for example, at Aggregation level 1, DCI is transmitted using 1 CCE, and at Aggregation level 2, DCI is transmitted using 2 CCEs.

[0020] Also, as one form of the plurality of REGs that make up a CCE, it has been considered to define one symbol within 1 PRB (Physical Resource Block) as a "REG" (see, for example, FIG. 1A).

[0021] In such a case, as the configuration of the CCE, as shown in FIGS. 1A and 1B, a case where a CCE (sometimes referred to as an NR-CCE) is configured with REGs arranged in the same symbol, and as shown in FIGS. 1C and 1D, a case where a CCE is configured with REGs arranged in a plurality of symbols can be considered.

[0022] When the REGs that make up 1 CCE are arranged with the same symbol, it is called "Frequency first mapping". Frequency first mapping has the advantage of reducing the number of symbols occupied by the CCE and increasing the amount of resources allocated to the PDSCH (Physical Downlink Shared Channel). On the other hand, when the REGs that make up 1 CCE are arranged in multiple symbols, it is called "Time first mapping". Time first mapping has the advantage that when there is a limit on the transmission power available for each symbol, the CCE can be transmitted in multiple symbols, so the transmission power can be improved (see, for example, Non-Patent Document 2).

[0023] Also, in the New RAT, a method called "REG bundling" is also being considered. REG bundling is a method of improving the channel estimation accuracy by arranging multiple REGs that make up the same CCE in adjacent PRBs and sharing the reference signal (DMRS: Demodulation Reference Signal) arranged in the adjacent PRBs among the REGs.

[0024] Figures 2A to 2C show mapping examples (arrangement examples) of REGs when the bundling number (hereinafter referred to as "REG bundling size"), which is the number of REGs arranged in adjacent PRBs, is 2. As shown in Figures 2A to 2C, two of the REGs that make up the same CCE are arranged in adjacent PRBs. As a result, even when multiple DMRSs are not arranged in the time direction (symbol direction), channel estimation can be interpolated in the frequency direction, so the channel estimation accuracy can be improved.

[0025] Here, when the number of REGs per CCE is set to 4 or 8 and the number of symbols of the CORESET is set to 3, it becomes difficult to uniformly arrange the REGs per CCE into 3 symbols. FIG. 3 shows an example of REG mapping when the number of REGs per CCE is 4, the number of symbols of the CORESET is 3, and the REG bundling size is 2. Also, FIG. 4 shows the number of REGs constituting the same DCI per symbol for each Aggregation level (sometimes represented as AL) in the REG mapping example shown in FIG. 3.

[0026] For example, in the case of Aggregation level 1 (AL1) in FIG. 3, that is, when the number of REGs where the DCI is arranged is 4, out of the 3 symbols, 2 REGs are arranged in 2 symbols respectively, and no REG is arranged in the remaining 1 symbol. Also, in the case of Aggregation level 2 (AL2) in FIG. 3, that is, when the number of REGs where the DCI is arranged is 8, out of the 3 symbols, 4 REGs are arranged in 1 symbol (symbol #0 in the example of FIG. 3), and 2 REGs are arranged in the remaining 2 symbols (symbol #1, #2 in the example of FIG. 3) respectively. The same applies to Aggregation level 4, 8 (AL4, AL8).

[0027] That is, as shown in FIG. 4, in AL1, the REGs constituting 1 CCE used for DCI transmission are arranged only in 2 symbols and not in 1 symbol. Also, as shown in FIG. 4, in AL2, AL4, and AL8, the REGs constituting multiple CCEs used for DCI transmission are arranged non-uniformly between symbols. For this reason, since the number of REGs between symbols is non-uniform in one or more CCEs used for DCI transmission, there is a variation in the received SINR for each symbol, and it becomes difficult to adjust the power between CCEs.

[0028] Therefore, hereinafter, a method will be described in which the REGs constituting multiple CCEs used for DCI transmission are arranged uniformly between symbols, thereby suppressing the variation in the received SINR for each symbol and facilitating the adjustment of the power between CCEs.

[0029] (Embodiment 1) [Overview of Communication System] The communication system according to each embodiment of the present disclosure includes a base station 100 and a terminal 200 (UE).

[0030] FIG. 5 is a block diagram showing a partial configuration of the base station 100 according to an embodiment of the present disclosure. In the base station 100 shown in FIG. 5, a signal allocation unit 105 allocates a downlink control signal (DCI) to a control channel region (CORESET) composed of a plurality of control channel elements (CCEs). A transmission unit 106 transmits the downlink control signal.

[0031] FIG. 6 is a block diagram showing a partial configuration of the terminal 200 according to an embodiment of the present disclosure. In the terminal 200 shown in FIG. 6, a reception unit 201 receives a downlink control signal (DCI) in a control channel region (CORESET) composed of a plurality of control channel elements (CCEs). A DCI reception unit 203 decodes (blind decodes) the downlink control signal.

[0032] Here, the number of resource element groups (REGs) constituting a CCE is a power of 2, and the bundling size indicating the number of REGs arranged in adjacent resource blocks among the REGs constituting a CCE is a power of 2.

[0033] [Configuration of Base Station] FIG. 7 is a block diagram showing the configuration of the base station 100 according to the present embodiment. In FIG. 7, the base station 100 includes a CORESET setting unit 101, a DCI generation unit 102, an error correction encoding unit 103, a modulation unit 104, a signal allocation unit 105, a transmission unit 106, a reception unit 107, a signal separation unit 108, a demodulation unit 109, and an error correction decoding unit 110.

[0034] The CORESET setting unit 101 sets a CORESET for each terminal 200 (UE). The setting (definition) of the CORESET includes, for example, the number of PRBs for which each CORESET is set, the PRB numbers, the symbol numbers, the number of symbols, the ID used for scrambling of the CORESET, the mapping method (localized or distributed) of the REG (Resource Element Group), Quasi collocation (QCL), etc. The CORESET setting unit 101 generates upper layer signaling (for example, SIB (System Information Block) or dedicated RRC (Radio Resource Control)) including CORESET setting information indicating the setting of the CORESET. The CORESET setting unit 101 outputs the upper layer signaling to the error correction encoding unit 103 and outputs the CORESET setting information to the signal allocation unit 105.

[0035] The DCI generation unit 102 generates a DCI including resource allocation information (DL allocation information or UL allocation information) of a DL (Downlink) data signal or a UL (Uplink) data signal, and outputs the DCI to the signal allocation unit 105. Also, among the generated DCIs, the DCI generation unit 102 outputs the DL allocation information to the signal allocation unit 105 and outputs the UL allocation information to the signal separation unit 108.

[0036] The error correction encoding unit 103 error correction encodes the transmission data signal (DL data signal) and the upper layer signaling (CORESET setting information) input from the CORESET setting unit 101, and outputs the encoded signal to the modulation unit 104.

[0037] The modulation unit 104 performs modulation processing on the signal received from the error correction encoding unit 103, and outputs the modulated signal to the signal allocation unit 105.

[0038] The signal allocation unit 105 allocates the signals received from the modulation unit 104 (DL data signals, signaling of higher layers) to downlink resources based on the DL allocation information input from the DCI generation unit 102. Also, the signal allocation unit 105 allocates the DCI input from the DCI generation unit 102 to resources (one or more CCEs within the CORESET) according to the CORESET configuration information input from the DCI generation unit 102. For example, the signal allocation unit 105 may change the mapping of REGs or the mapping to the search space of CCEs according to the number of symbols in which the CORESET indicated by the CORESET configuration information is set. In this way, the transmission signal is formed. The formed transmission signal is output to the transmission unit 106.

[0039] The transmission unit 106 performs radio transmission processing such as up-conversion on the transmission signal input from the signal allocation unit 105 and transmits it to the terminal 200 via the antenna.

[0040] The reception unit 107 receives the signal transmitted from the terminal 200 via the antenna, performs radio reception processing such as down-conversion on the received signal, and outputs it to the signal separation unit 108.

[0041] The signal separation unit 108 separates the UL data signal from the received signal received from the reception unit 106 based on the UL allocation information input from the DCI generation unit 102 and outputs it to the demodulation unit 109.

[0042] The demodulation unit 109 performs demodulation processing on the signal input from the signal separation unit 108 and outputs the obtained signal to the error correction decoding unit 110.

[0043] The error correction decoding unit 110 decodes the signal input from the demodulation unit 109 to obtain the received data signal (UL data signal) from the terminal 200.

[0044] [Configuration of the terminal] FIG. 8 is a block diagram showing the configuration of the terminal 200 according to the present embodiment. In FIG. 8, the terminal 200 includes a receiving unit 201, a signal separation unit 202, a DCI receiving unit 203, a demodulation unit 204, an error correction decoding unit 205, a setting information receiving unit 206, an error correction encoding unit 207, a modulation unit 208, a signal allocation unit 209, and a transmitting unit 210.

[0045] The receiving unit 201 receives the received signal via the antenna, performs reception processing such as down-conversion on the received signal, and then outputs the signal to the signal separation unit 202. The received signal includes, for example, a DL data signal, upper layer signaling (including CORESET setting information), or DCI (including resource allocation information, etc.).

[0046] The signal separation unit 202 separates the uplink signal from the received signal and outputs it to the demodulation unit 204. Also, based on the information indicating the setting of the CORESET input from the setting information receiving unit 206, the signal separation unit 202 identifies the resources corresponding to the CORESET (the CORESET to be separated) that the own device should monitor from the received signal received from the receiving unit 201, separates the signals arranged in the resources, and outputs them to the DCI receiving unit 203. Further, based on the DL allocation information input from the DCI receiving unit 203, the signal separation unit 202 separates the DL data signal from the received signal and outputs it to the demodulation unit 204.

[0047] The DCI receiving unit 203 attempts to decode the signal arranged in the resources corresponding to the CORESET input from the signal separation unit 202, and detects (receives) the DCI addressed to the own device. The DCI receiving unit 203 outputs the UL allocation information indicated in the received DCI to the signal allocation unit 209, and outputs the DL allocation information to the signal separation unit 202.

[0048] The demodulation unit 204 demodulates the signal input from the signal separation unit 202, and outputs the demodulated signal to the error correction decoding unit 205.

[0049] The error correction decoding unit 205 decodes the demodulated signal received from the demodulation unit 204, outputs the obtained received data signal, and outputs the obtained upper layer signaling to the setting information receiving unit 206.

[0050] Based on the CORESET setting information included in the upper layer signaling output from the error correction decoding unit 205, the setting information receiving unit 206 specifies the setting of the CORESET for each terminal 200. Then, the setting information receiving unit 206 outputs the specified information to the signal separation unit 202.

[0051] The error correction encoding unit 207 performs error correction encoding on the transmission data signal (UL data signal), and outputs the encoded data signal to the modulation unit 208.

[0052] The modulation unit 208 modulates the data signal input from the error correction encoding unit 207, and outputs the modulated data signal to the signal allocation unit 209.

[0053] Based on the UL allocation information input from the DCI receiving unit 203, the signal allocation unit 209 specifies the resource to which the UL data is allocated. Then, the signal allocation unit 209 allocates the data signal input from the modulation unit 209 to the specified resource, and outputs it to the transmission unit 210.

[0054] The transmission unit 210 performs transmission processing such as up-conversion on the signal input from the signal allocation unit 209, and transmits it via the antenna.

[0055] [Operations of Base Station 100 and Terminal 200] The operations of the base station 100 and the terminal 200 having the above configuration will be described in detail.

[0056] FIG. 9 is a sequence diagram showing the operations of the base station 100 and the terminal 200.

[0057] The base station 100 sets a CORESET for each terminal 200 (ST101). The base station 100 transmits the set CORESET configuration information to the terminal 200 using upper layer signaling (ST102). Next, the base station 100 generates DCI including resource allocation information, etc. (ST103). The base station 100 places the generated DCI in one of the search spaces in the CORESET set in ST101 and transmits it to the terminal 200 (ST104). Details of the mapping method (placement method) of CCEs (REGs) constituting the CORESET will be described later.

[0058] On the other hand, the terminal 200 monitors the CORESET (search space) based on the CORESET configuration information included in the upper layer signaling received in ST102 and detects DCI addressed to itself (ST105).

[0059] Next, details of the mapping method of CCEs (REGs) constituting the CORESET will be described.

[0060] Hereinafter, operation examples 1-1 to 1-3 according to the present embodiment will be described respectively.

[0061] <Operation Example 1-1> In operation example 1-1, regarding the mapping of CCEs and REGs to the CORESET, the number of REGs constituting a CCE (number of REGs per CCE) is a power of 2, and the REG bundling size is a power of 2.

[0062] Furthermore, in operation example 1-1, the number of symbols in which the CORESET is set is a power of 2.

[0063] By doing so, even when the number of symbols of the CORESET set in the terminal 200 is different, the mapping of the REGs constituting the CCEs in the CORESET becomes common, and the mapping of the REGs becomes simple.

[0064] Also, by setting the REG bundling size to a power of 2, it becomes easier to make adjustments when allocating different subcarrier intervals (numerologies) to the same slot or performing interference control between cells.

[0065] Figures 10A to 10C show an example of REG mapping when the number of REGs per CCE is 4 (= 2 2 ) and the REG bundling size is 2 (= 2 1 ).

[0066] In Figures 10A to 10C, the REG mapping is Time first mapping. That is, the REGs constituting one CCE are arranged in units of the REG bundling size, prioritizing the time direction (symbol) over the frequency direction (PRB). Also, in Figures 10A to 10C, the mapping of the CCE to the search space is also Time first mapping. That is, the base station 100 allocates DCI in units of CCE, prioritizing the time direction (symbol) over the frequency direction (PRB). As a result, the REGs constituting the CCE used for DCI transmission are arranged in as many different symbols as possible in units of the REG bundling size.

[0067] Figure 10A shows an example of REG mapping when the number of symbols in the CORESET is 1 (= 2 0 ).

[0068] As shown in Figure 10A, when the number of symbols in the CORESET is 1, all the REGs constituting the CCE are arranged in the same symbol (symbol #0) even with Time first mapping. Therefore, for example, by limiting the number of symbols in the CORESET to 1, it is possible to realize Frequency first mapping while maintaining a design equivalent to Time first mapping without separately defining the mapping of Frequency first mapping.

[0069] In particular, in a high frequency band, for example, the millimeter wave band, it is conceivable to change the beam (precoding) for each symbol. In such a case, the terminal 200 (UE) can easily perform time division multiplexing by monitoring a plurality of CORESETs (FIG. 10A) arranged in one symbol in different symbols. Therefore, in a high frequency band, it is also effective to limit the number of symbols of the CORESET to 1.

[0070] FIG. 10B shows an example of REG mapping when the number of symbols of the CORESET is 2 (= 2 1 ).

[0071] As shown in FIG. 10B, when the number of symbols of the CORESET is 2, two REGs out of the REGs constituting the CCE are arranged in symbol #0, and the remaining two REGs are arranged in symbol #1. That is, the REGs constituting the CCE are arranged in two symbols in units of the REG bundling size, two each.

[0072] FIG. 10C shows an example of REG mapping when the number of symbols of the CORESET is 4 (= 2 2 ).

[0073] As shown in FIG. 10C, when the number of symbols of the CORESET is 4, the REGs constituting one CCE are arranged in two symbols in units of the REG bundling size (2 REGs), respectively. Also, for example, the REGs constituting two CCEs used for transmitting DCI of Aggregation level 2 are arranged in four different symbols, respectively.

[0074] As shown in FIGS. 10B and 10C, by arranging the REGs of each CCE, the REGs constituting one or more CCEs used for transmitting DCI are uniformly arranged for each symbol.

[0075] For example, FIG. 11 shows an example of the number of REGs per symbol for each Aggregation level (AL1, AL2, AL4, AL8) when the number of REGs per CCE is 4, the number of symbols is 2, and the REG bundling number is 2 (see, for example, FIG. 10B). As shown in FIG. 11, it can be seen that at any Aggregation level, the number of REGs per symbol that make up the CCEs used for transmitting the same DCI is equal.

[0076] Further, FIG. 12 shows an example of the number of REGs per symbol for each Aggregation level when the number of REGs per CCE is 4, the number of symbols is 4, and the REG bundling number is 2 (see, for example, FIG. 10C). As shown in FIG. 12, at AL1, the 4 REGs that make up one CCE used for transmitting DCI are evenly arranged in 2 symbols. Also, as shown in FIG. 12, at AL2, AL4, and AL8, it can be seen that at any Aggregation level, the number of REGs per symbol that make up the CCEs used for transmitting the same DCI is equal.

[0077] In this way, by arranging the power-of-2 REGs that make up each CCE in units of the power-of-2 REG bundling size in symbols, the number of REGs that make up the CCEs used for transmitting DCI becomes uniform for each symbol, facilitating power adjustment between CCEs.

[0078] Also, since the mapping of REGs and the mapping to the CCE search space are based on Time first mapping, when the Aggregation level is large, PDCCH (DCI) is arranged in multiple symbols, which has the advantage of facilitating power boosting.

[0079] Also, by setting the REG bundling size to a power of 2, even when there are terminals 200 with different subcarrier intervals, the intervals between PRBs can be aligned in the frequency domain, improving resource utilization efficiency.

[0080] <Operation Example 1-2> In Operation Example 1-1, the case where the number of symbols of the CORESET is a power of 2 was described. In contrast, in Operation Example 1-2, the case where the number of symbols of the CORESET is a value other than a power of 2 will be described.

[0081] For example, when the number of symbols of the CORESET is a number other than a power of 2, the mapping of the REG is set as a reference for the mapping of the REG at the number of symbols of the power of 2 that is larger than the number of symbols of the CORESET.

[0082] Specifically, when the number of symbols of the CORESET is 3, as shown in FIG. 13, in the mapping of the REG with the number of symbols 4 (= 2 2 )(see, for example, FIG. 10C) described in Operation Example 1-1, by puncturing or rate matching the last symbol, the mapping of the REG in the symbols of the CORESET is set.

[0083] By doing so, although the number of actually used REGs is different from the reference REG mapping, when the Aggregation level is 2, 4, or 8, the number of REGs per symbol that constitute the CCE used for transmitting the same DCI becomes equal. In addition, since a design of a common REG mapping can be used for all symbols, there is an advantage that the design becomes simple.

[0084] For example, FIG. 14 shows the number of REGs per symbol for each Aggregation level when the number of REGs per CCE is 4, the number of symbols is 3, and the REG bundling number is 2. FIG. 14 shows the number of REGs per symbol when the final symbol is punctured or rate-matched based on the REG mapping (see, for example, FIGS. 10C and 12) when the number of REGs per CCE is 4, the number of symbols is 4, and the REG bundling number is 2. As shown in FIG. 14, it can be seen that at AL2, AL4, and AL8, for any Aggregation level, the number of REGs per symbol that make up the CCEs used for transmitting the same DCI is equal.

[0085] Also, as shown in FIG. 14, at AL1, there are cases where the REGs that make up one CCE used for DCI transmission are arranged in 2 symbols and cases where they are arranged in 1 symbol. Considering that when the number of symbols in which REGs are arranged at AL1 is 1 symbol, that is, when the number of REGs is half the normal value (4 REGs), sufficient reception quality may not be achievable. Therefore, for AL1, the terminal 200 may be limited to monitoring only the CCEs arranged in 2 symbols.

[0086] Note that the case where symbols are punctured or rate-matched has been described based on the REG mapping design at a symbol number greater than the number of symbols of the CORESET when the number of symbols of the CORESET is not a power of 2. However, when the number of symbols of the CORESET is not a power of 2, the symbols may be repeated based on the REG mapping design at a symbol number less than the number of symbols of the CORESET. For example, when the number of symbols of the CORESET is 5, the mapping of the final symbol (symbol #3) or the first symbol (symbol #0) may be repeated based on the REG mapping (see, for example, FIG. 10C) when the number of symbols of the CORESET is 4, so as to set the REG mapping for the case of 5 symbols.

[0087] According to Operation Example 1-2 in this way, even when the number of symbols of the CORESET is not a power of 2, the number of REGs that make up the CCE used for DCI transmission becomes uniform for each symbol, and it becomes easier to adjust the power between CCEs.

[0088] Note that in Operation Example 1-2, the number of symbols of the CORESET is not limited to 3 or 5.

[0089] <Operation Example 1-3> In Operation Example 1-3, in addition to the above Operation Example 1-1, the REG bundling of the same CCE is arranged in the same PRB. That is, the REGs that make up one CCE are arranged in a plurality of symbols of the same frequency in units of the REG bundling size.

[0090] Also, at this time, the DMRS used for demodulation of the CCE is arranged in the first symbol among the plurality of symbols where the CCE is arranged, and is not arranged in the remaining symbols.

[0091] By doing so, the number of DMRS can be reduced.

[0092] FIG. 15 shows an example of mapping of DMRS and REG when the number of symbols of the COREST is 2, the number of REGs per CCE is 4, and the REG bundling size is 2.

[0093] In FIG. 15, since the REG bundling size is 2, the REGs that make up the same CCE are arranged in two adjacent PRBs. Also, the REGs that make up the same CCE are arranged in two symbols #0 and #1 of the same frequency (2PRB) in units of the REG bundling size.

[0094] At this time, as shown in FIG. 15, the DMRS is arranged in the first symbol #0 among the symbols in which the REGs arranged in the same frequency in units of the REG bundling size are arranged, and constitutes the CCE used for the transmission of the same DCI. That is, as shown in FIG. 15, the DMRS is not arranged in symbol #1. In this case, the terminal 200 performs channel estimation using the DMRS of symbol #0 in which the REGs constituting the same CCE are arranged, at symbol #1.

[0095] Next, FIGS. 16A and 16B show mapping examples of the DMRS and the REG when the number of COREST symbols is 4, the number of REGs per CCE is 4, and the REG bundling size is 2.

[0096] In FIGS. 16A and 16B, similar to FIG. 15, since the REG bundling size is 2, the REGs constituting the same CCE are arranged in two adjacent PRBs.

[0097] In FIG. 16A, the REGs constituting the same CCE are arranged in the same PRB (2PRB) in units of REG bundling.

[0098] At this time, the DMRS is arranged in the first symbol among the symbols in which the REGs arranged in the same frequency in units of the REG bundling size are arranged, and constitutes the CCE used for the transmission of the same DCI.

[0099] For example, in FIG. 16A, in the case of Aggregation level 2, the two CCEs used for the transmission of the same DCI are arranged in the 4 symbols #0 to #3 of the same PRB (for example, refer to PRB#0, #1). In this case, in PRB#0, #1, the DMRS is arranged in the first symbol #0 and is not arranged in the remaining symbols #1 to #3. Therefore, the terminal 200 can use the DMRS of symbol #0 not only for symbol #1 but also for demodulation at symbols #2 and #3 in the PRB (PRB#0, #1 in FIG. 16A) in which the two CCEs used for the DCI of Aggregation level 2 are arranged.

[0100] On the other hand, when the Aggregation level is 1, as in PRB#8, 9 and PRB#12, 13 in FIG. 16A, the DMRS is arranged in the first symbol (symbol #0 or symbol #2 in FIG. 16A) among the symbols in which one CCE (REG) used for transmitting the same DCI is arranged. That is, in the case of Aggregation level 1, the DMRS is arranged in the first symbol among the symbols in which the REGs constituting each CCE are arranged.

[0101] Also, in FIG. 16B, in the case of Aggregation level 2, two CCEs used for transmitting the same DCI are arranged in different PRBs (for example, PRB#0, #1 and PRB#8, #9). In this case, the DMRS is arranged in the first symbol among the symbols in which the REGs constituting these CCEs are arranged for each frequency (2PRB) where the REGs are arranged in units of the REG bundling size. For example, if the two CCEs used for transmitting the same DCI are the CCEs arranged in symbols #0, #1 of PRB#0, #1 and the CCEs arranged in symbols #2, #3 of PRB#8, #9, the DMRS is arranged in the first symbols #0, #2 among the symbols in which the respective CCEs of PRB#0, #1 and PRB#8, #9 are arranged. In this case, the terminal 200 performs channel estimation using the DMRS arranged in symbol #0 for the CCE arranged in symbols #0, #1 in FIG. 16B, and performs channel estimation using the DMRS arranged in symbol #2 for the CCE arranged in symbols #2, #3.

[0102] As described above, according to Operation Examples 1-3, the DMRS is shared among the CCEs arranged in a plurality of symbols of the same PRB. Specifically, since the DMRS is arranged in the first symbol and not in the remaining symbols, the number of DMRSs can be reduced. Also, the terminal 200 can demodulate the DCI arranged in the subsequent symbols at an early stage using the DMRS arranged in the first symbol.

[0103] In addition, when it is determined that DMRS is shared among a plurality of UEs, as shown in FIG. 16B, in the case of Aggregation level 2, even if the two CCEs are arranged in different PRBs, the terminal 200 may perform channel estimation using the DMRS arranged at the first PRB of each CCE. In this way, although the precoding cannot be changed for each CCE, the resource amount of DMRS can be reduced for the DMRS arranged in the subsequent PRBs. Further, when DMRS is multiplexed in space or in code, among the DMRS multiplexed in the first symbol, part of it can be used for the front symbol and the other part can be used for the rear symbol.

[0104] As described above, the operation examples 1-1 to 1-3 have been described.

[0105] In this way, in the present embodiment, regarding the mapping of the CCE and REG arranged in the CORESET, the number of REGs per CCE is a power of 2, and the size of the REG bundling is a power of 2.

[0106] That is, the plurality of REGs constituting the CCE are divided into powers of 2 in units of the REG bundling size. Thereby, the mapping design of the REG becomes simple. For example, by making the number of symbols of the CORESET also a power of 2, in each CCE, the REGs are uniformly arranged in each symbol in units of the REG bundling. Therefore, the number of REGs between symbols becomes uniform in one or a plurality of CCEs used for the transmission of the DCI, the variation in the received SINR for each symbol can be prevented, and the adjustment of the power between the CCEs can be simplified.

[0107] In addition, in this embodiment, based on the mapping setting of the REG when the number of symbols is a power of 2, from the mapping setting of the REG, through symbol puncturing, repetition, or rate matching, it is possible to realize the REG mapping when the number of symbols of the CORESET is not a power of 2. Thereby, even when the number of symbols of the CORESET is not a power of 2, the number of REGs between symbols can be made uniform, the variation in the received SINR for each symbol can be prevented, and the adjustment of the power between CCEs can be simplified.

[0108] From the above, according to this embodiment, the CCEs constituting the CORESET can be appropriately arranged.

[0109] Note that in the above, an example of REG mapping when the number of REGs per CCE is 4 (= 2 2 ), and the REG bundling size is 2 (= 2 1 ) was described. However, the REG bundling size may be 4 (= 2 2 ). In this case, the REGs constituting the CCE are arranged in the same symbol. Also, when the number of REGs constituting the CCE (the number of REGs per CCE) is 8 (= 2 3 ), the REG bundling size can be 2 (= 2 1 ), 4 (= 2 2 ), or 8 (= 2 3 ).

[0110] Note that in the above, the case where the base station 100 notifies the terminal 200 of the setting information of the CORESET to be set by upper layer signaling was described. However, the setting information of the CORESET may be defined between the base station 100 and the terminal 200. In this case, the setting of the CORESET by upper layer signaling does not require notification.

[0111] (Embodiment 2) Since the base station and the terminal according to this embodiment have the same basic configuration as the base station 100 and the terminal 200 according to Embodiment 1, the description will be made by referring to FIGS. 7 and 8.

[0112] In this embodiment, regarding the mapping of CCEs and REGs to the CORESET, the number of REGs per CCE is set to 6, and the size of the REG bundling is changed according to the number of symbols in the CORESET.

[0113] By doing so, even when the number of REGs per CCE is 6, the number of REGs arranged in each symbol can be made uniform for CORESET symbol numbers 2, 3, and 4.

[0114] Hereinafter, the operation example according to this embodiment will be specifically described.

[0115] Note that hereinafter, the number of REGs per CCE is set to 6, the REG bundling size is set to 3 when the number of symbols in the CORESET is a power of 2 (1, 2, 4, 8,...), and the REG bundling size is set to 2 when the number of symbols in the CORESET is 3 or 6. Also, the aggregation level is a power of 2.

[0116] Figs. 17A to 17D show examples of REG mapping according to this embodiment.

[0117] <When the number of symbols in the CORESET is a power of 2> Figs. 17A and 17B show examples of REG mapping when the number of symbols in the CORESET is a power of 2. Specifically, Fig. 17A shows an example of REG mapping when the CORESET has 2 symbols, and Fig. 17B shows an example of REG mapping when the CORESET has 4 symbols.

[0118] As shown in Figs. 17A and 17B, when the number of symbols in the CORESET is a power of 2, the REG bundling size is 3.

[0119] Here, when using Time first mapping, as shown in FIGS. 17A and 17B, each CCE is arranged in 2 symbols. Also, as shown in FIG. 17B, when the CORESET is 4 symbols, at Aggregation level 2, the REGs that constitute the two CCEs used for DCI transmission are arranged 3 by 3 in 4 symbols. Also, although not shown, when the number of symbols of the CORESET is another value that is a power of 2 (1 symbol or 8 symbols), the REG bundling size can be arranged as 3 in the same way.

[0120] <When the number of symbols of the CORESET is 3 or 6> FIG. 17C shows an example of REG mapping when the CORESET is 3 symbols, and FIG. 17D shows an example of REG mapping when the CORESET is 6 symbols.

[0121] As shown in FIGS. 17C and 17D, when the number of symbols of the CORESET is 3 or 6, the REG bundling size is 2.

[0122] Here, when using Time first mapping, as shown in FIGS. 17C and 17D, each CCE is arranged in 3 symbols. Also, as shown in FIG. 17D, when the CORESET is 6 symbols, at Aggregation level 2, the REGs that constitute the two CCEs used for DCI transmission are arranged 2 by 2 in 6 symbols.

[0123] FIGS. 18, 19, 20, and 21 respectively show examples of REG mapping for each Aggregation level (AL1, AL2, AL4, AL8) when the number of REGs per CCE is 6 and the number of symbols of the CORESET is 2, 4, 3, 6 (refer to FIGS. 17A - D).

[0124] For the number of symbols of the CORESET 2 shown in FIG. 18 and the number of symbols of the CORESET 3 shown in FIG. 20, the number of REGs arranged in each symbol is equal at all Aggregation levels.

[0125] Also, in the case of the number of symbols 4 of the CORESET shown in FIG. 19 and the number of symbols 6 of the CORESET shown in FIG. 21, the number of REGs arranged in each symbol at Aggregation level 2 or higher is equal. Also, at Aggregation level 1, in the case of the number of symbols 4 of the CORESET shown in FIG. 19, the REGs constituting the DCI are arranged in 2 symbols, and in the case of the number of symbols 6 of the CORESET shown in FIG. 21, the REGs constituting the DCI are arranged in 3 symbols.

[0126] Thus, in the present embodiment, the number of REGs per CCE is set to 6, and the REG bundling size is changed according to the number of symbols of the CORESET. As a result, in each CCE, the REGs are uniformly arranged in each symbol in units of REG bundling. Therefore, the number of REGs between symbols becomes uniform in one or more CCEs used for transmitting the DCI, the variation in the received SINR for each symbol can be prevented, and the power adjustment between CCEs can be simplified.

[0127] Note that for the number of symbols 5, the number of symbols 7, etc. of the CORESET not shown in the above example, similar to Operation Examples 1-3, based on the mapping design of the number of symbols (for example, the number of symbols 2, 3, 4, 6) close to the actual number of symbols of the CORESET, it may be extended to the actual number of symbols of the CORESET using puncturing, rate matching, or repetition.

[0128] Also, the number of symbols of the CORESET may be limited to the number of symbols 1, 2, 3, 4, 6, 8 that are easy to allocate 6 REGs per CCE.

[0129] The above describes each embodiment of the present disclosure.

[0130] In the above-described embodiment, the physical mapping of the frequency domain (PRB#) was described as an example, but the logical mapping can also be applied. In the case of logical mapping, since it is changed to physical mapping, even if the frequency domain is continuous in the logical mapping, it is physically arranged at a separated position, so that the frequency diversity effect can be obtained.

[0131] In addition, in order to obtain the frequency diversity effect, an example in which the REGs constituting each CCE are arranged in different PRBs for each REG bundling was shown, but the mapping of the REGs constituting each CCE is not limited to this.

[0132] Also, the control resource set (CORESET) may also be called a search space.

[0133] In addition, a plurality of CORESETs may be set for the UE. For example, in the above-described embodiment, symbol #0 is shown as the first symbol where the CORESET is set, but another CORESET may be set from a later symbol.

[0134] Also, the signaling of the upper layer may be replaced with the signaling of the MAC. In the case of MAC signaling, compared with the signaling of the RRC, the frequency of changing the cases set for the UE can be increased.

[0135] Also, the above-described DMRS may be a reference signal with a different name.

[0136] In addition, the above-described Embodiment 1 and Embodiment 2 may be combined. That is, the base station 100 and the terminal 200 may determine the REG bundling size or the number of symbols of the CORESET and set the mapping of the REGs according to the case where the number of REGs per CCE is a power of 2 (Embodiment 1) and the case where the number of REGs per CCE is 6 (Embodiment 2).

[0137] The present disclosure can be implemented by software, hardware, or software in cooperation with hardware. Each functional block used in the description of the above embodiments is realized, partially or wholly, as an LSI which is an integrated circuit, and each process described in the above embodiments may be controlled, partially or wholly, by one LSI or a combination of LSIs. The LSI may be composed of individual chips, or may be composed of one chip so as to include part or all of the functional blocks. The LSI may be provided with data input and output. Depending on the degree of integration, the LSI may also be referred to as an IC, a system LSI, a super LSI, or an ultra LSI. The method of integrating into an integrated circuit is not limited to LSI, and may be realized by a dedicated circuit, a general-purpose processor, or a dedicated processor. Further, after manufacturing the LSI, an FPGA (Field Programmable Gate Array) which can be programmed, or a reconfigurable processor which can reconfigure the connection and setting of circuit cells inside the LSI may be used. The present disclosure may be realized as digital processing or analog processing. Furthermore, if an integrated circuit technology replacing the LSI appears due to the progress of semiconductor technology or another derived technology, of course, the technology may be used to integrate the functional blocks. The application of biotechnology and the like are possible.

[0138] The base station of the present disclosure includes a circuit that allocates a downlink control signal to a control channel region composed of a plurality of control channel elements (CCEs), and a transmitter that transmits the downlink control signal, the number of resource element groups (REGs) constituting the CCEs is a power of 2, and among the REGs constituting the CCEs, the bundling size indicating the number arranged in adjacent resource blocks is a power of 2.

[0139] In the base station of the present disclosure, the number of symbols in which the control channel region is arranged is a power of 2.

[0140] In the base station of the present disclosure, the REGs constituting one of the CCEs are arranged with priority in the time direction rather than in the frequency direction in units of the bundling size.

[0141] In the base station of the present disclosure, the circuit allocates the downlink control signal with priority in the time direction rather than in the frequency direction in units of the CCE.

[0142] In the base station of the present disclosure, the REGs constituting one of the CCEs are arranged in a plurality of symbols of the same frequency in units of the bundling size.

[0143] In the base station of the present disclosure, among the plurality of symbols, a reference signal is arranged in the first symbol, and no reference signal is arranged in the remaining symbols.

[0144] The base station of the present disclosure includes a circuit that allocates a downlink control signal to a control channel region composed of a plurality of control channel elements (CCEs), and a transmitter that transmits the downlink control signal. The number of resource element groups (REGs) constituting the CCE is 6. When the number of symbols in which the control channel region is arranged is a power of 2, the bundling size indicating the number of REGs arranged in adjacent resource blocks among the REGs constituting the CCE is 3. When the number of symbols in which the control channel region is arranged is 3 or 6, the bundling size is 2.

[0145] The terminal of the present disclosure includes a receiver that receives a downlink control signal in a control channel region composed of a plurality of control channel elements (CCEs), and a circuit that decodes the downlink control signal. The number of resource element groups (REGs) constituting the CCE is a power of 2, and the bundling size indicating the number of REGs arranged in adjacent resource blocks among the REGs constituting the CCE is a power of 2.

[0146] The communication method of the present disclosure allocates a downlink control signal to a control channel region composed of a plurality of control channel elements (CCEs), transmits the downlink control signal, the number of resource element groups (REGs) constituting the CCEs is a power of 2, and among the REGs constituting the CCEs, the bundling size indicating the number of REGs arranged in adjacent resource blocks is a power of 2.

[0147] The communication method of the present disclosure receives a downlink control signal in a control channel region composed of a plurality of control channel elements (CCEs), decodes the downlink control signal, the number of resource element groups (REGs) constituting the CCEs is a power of 2, and among the REGs constituting the CCEs, the bundling size indicating the number of REGs arranged in adjacent resource blocks is a power of 2.

Industrial Applicability

[0148] One aspect of the present disclosure is useful for a mobile communication system.

Description of Signs

[0149] 100 Base station 101 CORESET setting unit 102 DCI generation unit 103, 207 Error correction encoding unit 104, 208 Modulation unit 105, 209 Signal allocation unit 106, 210 Transmission unit 107, 201 Reception unit 108, 202 Signal separation unit 109, 204 Demodulation unit 110, 205 Error correction decoding unit 200 Terminal 203 DCI reception unit 206 Setting information reception unit

Claims

1. A control circuit is provided for receiving and decoding a downlink control signal in a control channel region formed of a plurality of control channel elements (CCEs); In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Device.

2. The number of symbols of the CORESET is notified by higher layer signaling.

2. The apparatus of claim 1.

3. The number of symbols in the CORESET represents the duration of the CORESET.

2. The apparatus of claim 1.

4. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; 2. The apparatus of claim 1.

5. A common demodulation reference signal (DMRS) is applied to each of the REG bundles.

2. The apparatus of claim 1.

6. The REGs included in each of the one or more REG bundles are contiguously mapped in the CORESET.

2. The apparatus of claim 1.

7. receiving and decoding a downlink control signal in a control channel region including a plurality of control channel elements (CCEs); In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Communication methods.

8. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; The communication method according to claim 7.

9. receiving and decoding a downlink control signal in a control channel region composed of a plurality of control channel elements (CCEs); In a control resource set (CORESET), each of the plurality of CCEs is composed of six resource element groups (REGs), the six REGs constitute one or more REG bundles, and the size of the one or more REG bundles varies according to the number of symbols of the CORESET; Integrated circuits.

10. The number of REGs arranged in each symbol of the CORESET from the six REGs is the same; 10. The integrated circuit of claim 9.

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