Semiconductor light receiving element, optical line terminal, multilevel intensity modulation transceiver, digital coherent receiver, radio-over-fiber system, spad sensor system, and lidar device

Abstract

To obtain a semiconductor light receiving element that operates in a wide response band and has high receiving sensitivity.SOLUTION: A semiconductor light receiving element 100 according to the present disclosure includes an InP substrate 1, an n-type semiconductor layer 2 formed on the InP substrate 1, an electron transit layer 3 formed on the n-type semiconductor layer 2, and a light absorption layer 5 formed on the electron transit layer 3 and having a carrier concentration of 1×1017 cm-3 or less and having an i-type digital alloy structure in which two types of semiconductor layers composed of any combination of InAs layers and GaAs layers, InAlAs layers and InGaAs layers, or InAlGaAs layers having different composition ratios are alternately stacked in a period of 2 to 6 atomic layers.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present disclosure relates to a semiconductor light receiving element, an optical line terminal device, a multi-value intensity modulation transceiver, a digital coherent receiver, an optical fiber wireless system, a SPAD sensor system, and a lidar device.

Background Art

[0002] With the progress of digital transformation that utilizes digital information, the development of communication networks that communicate digital information with each other and data centers that perform data storage and processing has been remarkable. Optical communication is used for communication networks and in-data center communication. In recent years, optical communication has made remarkable progress in terms of high speed and large capacity. Among the progress of optical communication, as receivers for optical communication, a photodiode (PD) and an avalanche photodiode (APD) that can obtain high reception sensitivity are required.

[0003] In the access network that connects to subscribers of optical communication, a passive optical network (PON) is mainly adopted. In the PON system, it starts with a G(E)-PON system that transmits signals of 1 to 2 Gbps, and in the future, it is expected that 10G-EPON systems and XG-PON systems that transmit signals of 10 Gbps will increase.

[0004] Furthermore, in ITU-T (International Telecommunication Union Telecommunication Standardization Sector), a 50G-PON system, which is a next-generation high-speed PON system, is being studied, and it is expected that transmission at the 50 Gbps level will be put into practical use in the access network in the future.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Non-Patent Document

[0006]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] (1) Problems regarding the optical absorption layer in PD and APD For PD and APD used in high-speed optical communication, InGaAs with a high absorption coefficient in the 1.3μm band and 1.55μm band, which are the optical communication wavelength bands, is used as the optical absorption layer. For example, in the 1.3μm band, a high absorption coefficient of 10000 / cm or more can be obtained.

[0008] In order to broaden the response bandwidth of PD and APD, it is necessary to thin the InGaAs layer constituting the optical absorption layer to shorten the carrier transit time. However, when the layer thickness of the optical absorption layer is thinned, a problem occurs in that the light reception sensitivity decreases.

[0009] When the absorption coefficient of the optical absorption layer is α and the layer thickness of the optical absorption layer is W, the quantum efficiency η (= number of absorbed photons / number of incident photons) is expressed by the following formula (1). η = 1 - exp(-αW) (1)

[0010] In Equation (1), for example, when α = 10000 / cm and W = 1 μm, the quantum efficiency η is 63%. Incidentally, since the photosensitivity S (A / W) is given by S = η·λ (nm) / 1240, in the case of light with a wavelength of 1.3 μm, the photosensitivity is 0.66 A / W.

[0011] On the other hand, the 3 dB bandwidth ftr determined by the time for carriers to travel through optical absorption is expressed by the following Equation (2). ftr = 3.5Vav / (2πW) (2)

[0012] In Equation (2), Vav is the average saturation velocity of electrons and holes. For example, when the optical absorption layer is composed of InGaAs, Vav = 5.35×10 6 cm / s and W = 1 μm, substituting into Equation (2) gives ftr = 29.8 GHz.

[0013] Therefore, when the layer thickness W of the optical absorption layer is made thicker than 1 μm, the quantum efficiency η becomes higher than 63%, but the response bandwidth decreases below 29.8 GHz. In order to improve such a trade-off between the response bandwidth and the quantum efficiency, it is necessary to increase the absorption coefficient of the optical absorption layer.

[0014] (2) Issues Regarding the Multiplication Layer in APD An APD, which is a semiconductor light-receiving element used in a PON system, is composed of layers such as an optical absorption layer (InGaAs), an electric field relaxation layer (InP or InAlAs), and a multiplication layer (InP or InAlAs) as its element structure. A high electric field of about 800 kV / cm is applied to the multiplication layer to multiply, that is, ionize, the electrons and holes generated in the optical absorption layer. The electric field relaxation layer functions to weaken the electric field so that the high electric field of the multiplication layer is not applied to the optical absorption layer. Incidentally, the ionization rate of electrons is denoted as αe, and the ionization rate of holes is denoted as βh.

[0015] In an APD, the larger the ratio of the ionization rates of electrons and holes, the smaller the excess noise generated during multiplication and the higher the reception sensitivity. Furthermore, the larger the ratio of the ionization rates of electrons and holes, the shorter the multiplication time in the multiplication layer, resulting in a wider response bandwidth.

[0016] The ionization rate ratio k of electrons and holes is defined as k = βh / αe. When electrons are injected into the multiplication layer, the performance of the APD improves as the ionization rate ratio k decreases. In the multiplication layer of an APD for optical communication, compound semiconductor materials such as InAlAs or InP are used.

[0017] When InAlAs is selected as the constituent material of the multiplication layer, the difference in the ionization rates of electrons and holes becomes larger than that of InP. In InP, the ionization rate of holes is larger than that of electrons, and the ionization rate of holes is about twice that of electrons. On the other hand, when InAlAs is selected as the constituent material of the multiplication layer, the ionization rate of electrons is larger than that of holes, and the ionization rate of electrons is about five times that of holes. Therefore, when InAlAs is used as the multiplication layer, the reception sensitivity becomes higher. Thus, InAlAs is more suitable than InP as the constituent material of the multiplication layer of the APD.

[0018] In a PON system, as described above, an APD, which is a semiconductor light-receiving element, is required to have a wide response bandwidth and high reception sensitivity. However, unlike a PD, in an APD, the time required for multiplication, that is, the multiplication time, becomes longer as the multiplication factor increases, resulting in a problem that the response bandwidth decreases at a high multiplication factor.

[0019] An APD having a multiplication layer made of InAlAs used in optical communication has a wider response bandwidth than an APD made of other semiconductor materials. However, when the multiplication factor is 6 or more, the response bandwidth remains at about 20 GHz. That is, there is a problem that it is difficult to achieve a wide response bandwidth of 37.5 GHz or more required for a 50G-PON system when using a conventional APD.

[0020] As described above, PDs and APDs, which are semiconductor light-receiving elements used in optical communication, are required to operate in an even broader response band. Although a superlattice-based APD is described in Patent Document 1, the superlattice is applied to the multiplication layer and the electric field relaxation layer instead of the electron traveling layer, and since the layer thickness of each layer is 5 to 10 nm, it acts as a quantum well reflecting the band gap of each layer. When the layer thickness of each stacked layer becomes several nm or more, unevenness in energy reflecting the band gap of each layer is formed, which inhibits the travel of carriers and causes a problem that the travel speed decreases.

[0021] In a 50G-PON system, the response band of the semiconductor light-emitting element and the semiconductor light-receiving element, the optical output of the semiconductor light-emitting element, and the reception sensitivity of the semiconductor light-receiving element are insufficient. For this reason, it is considered to provide a digital band compensation circuit by a Digital Signal Processor (DSP) at the subsequent stage of the APD in an Optical Network Unit (ONU), that is, a receiving device on the subscriber side.

[0022] In addition, in an Optical Line Terminal (OLT), that is, a receiving device on the central office side, a Semiconductor Optical Amplifier (SOA) is required to compensate for the insufficient reception sensitivity of the semiconductor light-receiving element, or an SOA is integrated with an Electro-absorption Modulated Laser Diode (EML) on the transmission side of the ONU to increase the optical output.

[0023] However, since DSPs and SOAs consume extremely large amounts of power and are factors contributing to cost increases, there is a concern that the replacement from existing PON systems to 50G-PON systems will not progress.

[0024] Even in existing PON systems other than next-generation high-speed PON systems, increasing the number of branches of the optical signal output from the OLT has been considered in order to reduce costs. However, also in this case, it is necessary to integrate an SOA into the EML on the transmission side of the OLT and ONU to increase the optical output, and there is a problem that the power consumption of the transmitter increases and the cost increases.

[0025] As described above, in order to compensate for the limitations of the reception sensitivity and response bandwidth of the semiconductor light-receiving element, a transceiver design incorporating expensive and high-power-consuming DSPs and SOAs into ONUs and OLTs has been made, but there is a problem that the power consumption increases and the cost increases.

[0026] This disclosure has been made to solve the above problems, and an object thereof is to obtain a semiconductor light-receiving element that operates in a wide response bandwidth and has high reception sensitivity.

Means for Solving the Problems

[0027] The semiconductor light-receiving element according to the present disclosure is an InP substrate, an n-type semiconductor layer formed on the InP substrate, an electron traveling layer formed on the n-type semiconductor layer, formed on the electron traveling layer, with a carrier concentration of 1×10 17 cm -3 or less, and a light absorption layer having an i-type digital alloy structure in which two types of semiconductor layers each composed of any combination of an InAs layer and a GaAs layer, an InAlAs layer and an InGaAs layer, or InAlGaAs layers having different composition ratios are alternately laminated at a period of 2 to 6 atomic layers.

[0028] The optical line termination device according to the present disclosure is the above-described semiconductor light-receiving element, an optical multiplexer / demultiplexer that makes an optical signal incident on the semiconductor light-receiving element, an amplifier circuit that amplifies the electrical signal output from the semiconductor light-receiving element, A clock / data reproduction circuit connected to the amplification circuit and reproducing clock / data from the amplified electrical signal; A forward error correction circuit connected to the clock / data reproduction circuit and correcting errors in the clock / data.

[0029] The multi-valued intensity modulation transceiver according to the present disclosure The above-described semiconductor light receiving element that receives an optical signal intensity-modulated to a multi-value; An amplification circuit that amplifies the electrical signal output from the semiconductor light receiving element; An analog / digital conversion circuit connected to the amplification circuit and converting the amplified electrical signal into a digital signal; A digital signal processing circuit connected to the analog / digital conversion circuit and processing the digital signal.

[0030] The optical fiber wireless system according to the present disclosure A light source that emits an analog-modulated optical signal; The above-described semiconductor light receiving element that receives the analog-modulated optical signal; A transmission line that transmits the analog electrical signal output from the semiconductor light receiving element to an antenna; An antenna connected to the transmission line and radiating the analog electrical signal as a radio wave signal.

[0031] The digital coherent receiver according to the present disclosure The above-described semiconductor light receiving element; A polarization separator that separates the polarization of a polarization multiplexed optical signal whose intensity and phase are modulated; A 90-degree hybrid that demultiplexes and combines the optical signals output from the polarization separator; A digital signal processing circuit connected to the 90-degree hybrid and processing digital signals.

[0032] The SPAD (Single Photon Avalanche Diode) sensor system according to the present disclosure An SPAD sensor configured by the above semiconductor light receiving element, and a quenching circuit that repeatedly applies a voltage equal to or higher than the breakdown voltage and a voltage lower than the breakdown voltage to the SPAD sensor, and a photoelectron measurement circuit that measures an electrical signal output from the SPAD sensor.

[0033] The lidar device according to the present disclosure includes a light source that emits light in pulses, and the above semiconductor light receiving element that receives light reflected from an object after being emitted from the light source, and an amplification circuit that amplifies an electrical signal output from the semiconductor light receiving element, and a distance measurement circuit that calculates a distance based on the electrical signal amplified by the amplification circuit.

Advantages of the Invention

[0034] According to the semiconductor light receiving element of the present disclosure, since at least the light absorption layer is configured in a digital alloy structure, there is an effect that a semiconductor light receiving element that operates in a wide response band and has high reception sensitivity can be obtained.

[0035] According to the optical line termination device, multi-value intensity modulation transceiver, digital coherent receiver, optical fiber radio system, SPAD sensor system, and lidar device according to the present disclosure, since the semiconductor light receiving element of the present disclosure is used as the semiconductor light receiving element, there is an effect that each device and each system having excellent performance can be obtained.

Brief Description of the Drawings

[0036]

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Embodiments for Carrying Out the Invention

[0037] Embodiment 1. <Features of the semiconductor light receiving element (PD) according to Embodiment 1> Before explaining the specific structure of the semiconductor light receiving element according to Embodiment 1, first, the digital alloy structured light absorption layer, which is a structural feature of the semiconductor light receiving element according to Embodiment 1, will be described below. Note that although the semiconductor light receiving element according to Embodiment 1 is a PD, both this and the APD, which is a semiconductor light receiving element described in Embodiments 2 and later, will be described together.

[0038] The inventors found that an InAs / AlAs digital alloy structure (also called an atomic layer superlattice; ALSL: Atomic Layer Super Lattice, Non-Patent Document 1) in which a 2-atomic-layer InAs layer and a 2-atomic-layer AlAs layer are repeatedly stacked has an absorption coefficient of the light absorption layer that increases compared to a random alloy structure composed of In 0.52 Al 0.48 As. Hereinafter, In 0.52 Al 0.48 As will be simply denoted as InAlAs.

[0039] Fig. 1 shows the light absorption spectra of the InAs / AlAs digital alloy structure and the InAlAs random alloy structure, respectively. The InAs / AlAs digital alloy structure has a steeper rise in the absorption coefficient at the absorption edge around 850 nm compared to the InAlAs random alloy structure.

[0040] Also, the InAs / AlAs digital alloy structure has peaks in the absorption coefficient around 800 nm and around 650 nm, and it was found that the absorption coefficient increases by 1.5 times. On the other hand, a decrease in the absorption coefficient is observed around 720 nm. This is considered to be due to the change in the band structure based on the periodicity of the InAs layer / AlAs layer even though the overall composition ratio is almost the same, resulting in periodicity in the wavelength dependence of the light absorption coefficient.

[0041] Thus, it has been found that even with substantially the same composition, by changing the random alloy structure to a digital alloy structure, it is possible to increase the absorption coefficient. The inventors utilized this phenomenon and considered applying the InAs / GaAs digital alloy structure to the InGaAs random alloy structure light absorption layer of a PD or APD for optical communication. Hereinafter, InGaAs will be simply denoted as InGaAs. 0.53 Ga 0.47 As, the inventors considered applying the InAs / GaAs digital alloy structure to the InGaAs random alloy structure light absorption layer as well. Hereinafter, InGaAs will be simply denoted as InGaAs. 0.53 Ga 0.47 As will be simply denoted as InGaAs.

[0042] Figure 2 is a diagram showing the relationship between the lattice constants of each constituent material and the strain amount with respect to InP. As shown in Figure 2, similar to the fact that the composition ratios of the InAlAs random alloy structure and the InAs / AlAs digital alloy structure are substantially the same, the composition ratio of the InGaAs random alloy structure is substantially the same as that of the InAs / GaAs digital alloy structure. That is, it is considered that by changing the InGaAs random alloy structure to the InAs / GaAs digital alloy structure, it is possible to increase the absorption coefficient.

[0043] Figure 3 is a diagram showing the result of estimating the effects on the optical absorption spectra of the InAs / GaAs digital alloy structure and the InGaAs random alloy structure by calculation. Line A in Figure 3 is obtained by multiplying the wavelength on the horizontal axis of the InAlAs random alloy structure in Figure 1 by 1.92 times (=1.46 / 0.76), which is the bandgap ratio of InAlAs (Eg = 1.46 eV) and InGaAs (Eg = 0.76 eV). Further, the value on the vertical axis of line A in Figure 3, that is, the absorption coefficient, is set to 0.37 times so that the absorption coefficient of the InGaAs random alloy structure measured at a wavelength of 1.3 μm (12716 / cm) coincides with the value of the absorption coefficient of line A in Figure 3 at 1.3 μm.

[0044] Line B in Fig. 3, similar to line A, has the wavelength on the horizontal axis of the InAs / GaAs digital alloy structure in Fig. 1 multiplied by 1.92 and the absorption coefficient on the vertical axis multiplied by 0.37. As shown in Fig. 3, for line B compared to line A, an increase in the absorption coefficient can be expected at the 1.3 μm and 1.55 μm wavelengths used in optical communication. Considering that line B represents the predicted value of the absorption spectrum of the InAs / GaAs digital alloy structure, improving the light reception sensitivity is expected by using a digital alloy structure for the light absorption layer.

[0045] As shown in Fig. 3, in the InAs / GaAs digital alloy structure, an increase in the absorption coefficient by a factor of 1.5 is expected at the 1.55 μm wavelength compared to the InGaAs random alloy structure. When the absorption coefficient becomes 1.5 times, from Equation (1), the layer thickness of the light absorption layer required to obtain the same quantum efficiency is reduced to 67% (= 1 / 1.5). When the layer thickness of the light absorption layer of the InAs / GaAs digital alloy structure is 67% of the layer thickness of the light absorption layer of the InGaAs random alloy structure, from Equation (2), the 3 dB bandwidth ftr determined by the time for carriers to travel through the light absorption layer can be made 1.5 times. That is, by applying the light absorption layer of the InGaAs random alloy structure, the 3 dB bandwidth ftr is improved by a factor of 1.5 compared to the case of the conventional light absorption layer of the InGaAs random alloy structure.

[0046] On the other hand, when the layer thickness of the light absorption layer is fixed at 1 μm, the InAs / GaAs digital alloy structure and the InGaAs random alloy structure have the same ftr. However, by using the InAs / GaAs digital alloy structure, the quantum efficiency improves from 43% to 57% of the InAs / GaAs digital alloy structure. Here, the layer thickness of the light absorption layer is 1 μm, the absorption coefficient of the InGaAs random alloy structure at a wavelength of 1.55 μm is 5578 / cm shown in Fig. 3, and the absorption coefficient of the InAs / GaAs digital alloy structure is also 8530 / cm shown in Fig. 3, which are used respectively.

[0047] As described above, by applying a digital alloy structure to the light absorption layer, it is possible to achieve broadbanding and high efficiency of the response band, that is, high light reception sensitivity.

[0048] <Element structure of the semiconductor light receiving element (PD) according to Embodiment 1> FIG. 4 is a cross-sectional view showing the element structure of a surface incident type PD which is an example of the semiconductor light receiving element 100 according to Embodiment 1. Further, FIG. 5 is a cross-sectional view showing the element structure of an end face incident type PD which is an example of the semiconductor light receiving element 100a according to Embodiment 1.

[0049] A surface incident type PD which is an example of the semiconductor light receiving element 100 according to Embodiment 1 includes an n-type InP substrate 1, and an n-type InP buffer layer 2 having a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1.0 μm, an i-type InP electron traveling layer 3 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 0.1 to 1.0 μm, an i-type InAlGaAs graded layer 4 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 5 to 50 nm, an optical absorption layer composed of a digital alloy structure in which an i-type InAs layer (for example, a layer thickness of 2 atomic layers, about 0.6 nm) and an i-type GaAs layer (for example, a layer thickness of 2 atomic layers, about 0.6 nm) are alternately laminated a plurality of times (hereinafter, referred to as an i-type InAs / GaAs digital alloy structure optical absorption layer 5) having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 50 to 2000 nm, an i-type InAlGaAs / InAlAs graded layer 6 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 5 to 50 nm, a p-type InP window layer 7 having a carrier concentration of 5×10 17 cm -3 or more and a layer thickness of 0.1 to 3.0 μm, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0050] Instead of the p-type InP window layer 7, a p-type InAlAs window layer may be used. Note that the n-type InP buffer layer 2 is also referred to as an n-type semiconductor layer.

[0051] The semiconductor light receiving element 110 according to Embodiment 1 shown in FIG. 5 has the same layer structure as the semiconductor light receiving element 100, and further, an Fe-doped semi-insulating InP buried layer 20 is formed at least on the end face where the incident light 90 is incident.

[0052] As the n-type dopant of the n-type InP buffer layer 2, silicon (Si) is optimal. This is to avoid the diffusion of n-type impurities from the n-type InP buffer layer 2 into the i-type InAs / GaAs digital alloy structure light absorption layer 5 and the disordering (disorder) of the digital alloy structure. Here, disordering refers to the phenomenon in which the compositions of the layers of the digital alloy structure are mixed and become a random alloy structure with an average composition.

[0053] As described above, the i-type InAs / GaAs digital alloy structure light absorption layer 5 is composed of semiconductor layers in which InAs layers (layer thickness: 2 atomic layers, about 0.6 nm) and GaAs layers (layer thickness: 2 atomic layers, about 0.6 nm) are alternately stacked in this order. However, the layer thicknesses of the InAs layer and the GaAs layer may be in the range of 2 atomic layers or more and 6 atomic layers or less. The reason for setting it to 6 atomic layers or less is that it is desirable that the stacked structure of the InAs layer and the GaAs layer does not function as a quantum well structure. That is, the digital alloy structure is composed of two types of semiconductor layers each made of different semiconductor materials, which are alternately stacked with a period of 2 atomic layers to 6 atomic layers.

[0054] Furthermore, the number of atomic layers of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is preferably 2 to 4 atomic layers, and most preferably 2 atomic layers. The reason for this is that the thinner the atomic layer thickness of each layer, the greater the reduction effect of the ionization rate ratio k due to the digital alloy structure. Also, when considering not only the performance as a semiconductor light receiving element but also productivity, a layer thickness of 4 to 6 atomic layers, which results in fewer shutter switching times during crystal growth by molecular beam epitaxy (MBE), is also preferable. Considering the above factors, it can be said that the number of atomic layers of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is preferably in the range of 2 to 6 atomic layer cycles. Similarly, from the perspective of productivity, not all of the light absorption layer needs to be an InAs / GaAs digital alloy structure; a part of the light absorption layer can be an InAs / GaAs digital alloy structure, and the remaining part can be an InGaAs random alloy structure.

[0055] The layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is in the range of 50 to 2000 nm. For example, when the layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is 500 nm, the repetition of InAs layer (2 atomic layers) / GaAs layer (2 atomic layers) is 417 times.

[0056] Considering the affinity with InP that constitutes the n-type InP buffer layer 2, it is preferable to make only the first GaAs layer of the i-type InAs / GaAs digital alloy structured light absorption layer thicker than 3 atomic layers. Alternatively, the i-type InAs / GaAs digital alloy structured light absorption layer 5 may be formed and laminated by alternately forming InAs layers and GaAs layers in this order.

[0057] The conductivity type of the InAs / GaAs digital alloy structured light absorption layer is i-type, and the carrier concentration is 1×10 17 cm -3 The following is an example. However, as the conductivity type of the InAs / GaAs digital alloy structured light absorption layer, a p-type or n-type with a carrier concentration of 5×10 17 cm -3 or less may also be acceptable.

[0058] In addition to the light absorption layer composed of an InAs / GaAs digital alloy structure, as shown in FIG. 2 representing the relationship between the lattice constant of each constituent material and the strain amount based on InP, an InAlGaAs digital alloy structure in which InAlAs / InGaAs, InAlxGa(1-x)As (layer thickness of 2 to 6 atomic layers, Al composition ratio X) and InAlyGa(1-y)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Y) are alternately laminated can also be applied as the light absorption layer of the present disclosure in the same manner. Furthermore, a digital alloy structure composed of InAlAsSb, which is a material system added with antimony (Sb), can also be applied as the light absorption layer of the semiconductor light receiving element of the present disclosure.

[0059] The i-type InAlGaAs graded layer 4 and the i-type InAlGaAs / InAlAs graded layer 6 are layers in which the bandgap is gradually changed by changing the composition of InAlGaAs, and the layer thickness is in the range of 5 to 50 nm respectively. The composition of InAlGaAs may be changed stepwise, and the bandgap is of an intermediate magnitude between the InP layer and the InGaAs layer. The carrier concentration is 5×10 17 cm -3 or less, and if the carrier concentration is low, it may be p-type or n-type. Note that the i-type InAlGaAs graded layer 4 and the i-type InAlGaAs / InAlAs graded layer 6 are not necessarily required and may be omitted.

[0060] In an example of the element structure of the semiconductor light receiving element 100 shown in FIG. 4, an i-type InAlGaAs / InAlAs graded layer 6 is formed by alternately laminating a plurality of two types of i-type InAlGaAs layers having different compositions on the i-type InAs / GaAs digital alloy structure light absorption layer 5.

[0061] <Manufacturing Method of Semiconductor Light Receiving Element According to Embodiment 1> An example of the surface incident type PD which is a semiconductor light receiving element 100 according to Embodiment 1 can be realized on an n-type InP substrate 1 by using, for example, metal organic vapor phase epitaxy (MOVPE) or MBE. A method for manufacturing the semiconductor light receiving element 100 according to Embodiment 1 will be described below.

[0062] Using the MOVPE method or the MBE method, an n-type InP buffer layer 2 having a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1 μm is grown on the n-type InP substrate 1.

[0063] On the n-type InP buffer layer 2, an i-type InP electron traveling layer 3 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 0.1 to 1 μm is grown.

[0064] On the i-type InP electron traveling layer 3, an i-type InAlGaAs graded layer 4 having a layer thickness of 5 nm or more and 50 nm or less and a carrier concentration of 5×10 17 cm -3 or less is grown.

[0065] On the i-type InAlGaAs graded layer 4, an i-type InAs / GaAs digital alloy structured light absorption layer 5 having a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 2000 nm is grown. That is, the i-type InAs / GaAs digital alloy structured light absorption layer 5 is formed by alternately growing GaAs layers (layer thickness: 2 atomic layers, about 0.6 nm) and InAs layers (layer thickness: 2 atomic layers, about 0.6 nm) in this order from above the n-type InP buffer layer 2.

[0066] Furthermore, an i-type InAlGaAs / InAlAs graded layer 6 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 5 to 50 nm, and an i-type InAlGaAs / InAlAs graded layer 6 having a carrier concentration of 5×10 17 cm -3A p-type InP window layer 7 with a layer thickness of 0.1 to 3.0 μm and a p-type InGaAs contact layer 8 are sequentially grown by crystal growth.

[0067] After the crystal growth is completed, a p-type electrode 32 is formed on the surface of the p-type InGaAs contact layer 8, and an n-type electrode 31 is formed on the back surface of the n-type InP substrate 1, respectively. For the p-type electrode 32 of the PD, Ti and Au are used as the metal materials. Note that a voltage is applied to the PD in the reverse direction, and the operating voltage is 0 V to 10 V.

[0068] In the case of the surface incident type PD shown in Fig. 1, incident light 90 is incident from the vertical direction with respect to the i-type InAs / GaAs digital alloy structured light absorption layer 5. When the light receiving portion of the PD is circular, the diameter, or when the light receiving portion of the PD is rectangular, the length of the long side is in the range of 5 μm to 1 mm. An antireflection coating (not shown) is applied to the incident surface of the PD.

[0069] In the case of the end face incident type PD shown in Fig. 5, incident light 90 is incident from the parallel direction with respect to the i-type InAs / GaAs digital alloy structured light absorption layer 5. From the viewpoint of reliability, the end face portion is covered with an insulating film, an organic film, or a semiconductor layer. In the end face incident type PD shown in Fig. 5, an Fe-doped semi-insulating InP buried layer 20 is formed on the end face. The layer thickness of the Fe-doped semi-insulating InP buried layer 20 is in the range of 100 nm to 5 μm with respect to the incident direction.

[0070] <Operation of the semiconductor light receiving element (PD) according to Embodiment 1> A PD, which is an example of the semiconductor light receiving element 100 according to Embodiment 1 shown in Figs. 4 and 5, will be described. Note that the case of the APD from Embodiment 2 and later will also be described together.

[0071] Line A in Fig. 3 represents the InGaAs random alloy structured light absorption layer, and line B represents the i-type InAs / GaAs digital alloy structured light absorption layer. According to Fig. 3, the absorption coefficient at 1.3 μm is 12716 / cm for line A and 16108 / cm for line B. The absorption coefficient at 1.55 μm is 5578 / cm for line A and 8530 / cm for line B.

[0072] When an InAs / GaAs digital alloy structured optical absorption layer is applied as the optical absorption layer of a PD and an APD, particularly remarkable improvement effects can be obtained in the case of high-speed PDs and APDs with speeds of 25 G or higher. In the case of surface incident type PDs and APDs, the optimum value of the layer thickness of the optical absorption layer is 500 to 1000 nm. When the layer thickness of the optical absorption layer is 500 to 1000 nm, the light reception sensitivity in the case of an InGaAs random alloy structured optical absorption layer is 0.49 A / W (quantum efficiency 47%) to 0.75 A / W (quantum efficiency 72%) in the 1.3 μm wavelength band. On the other hand, in the case of an InAs / GaAs digital alloy structured optical absorption layer, it is 0.58 A / W (quantum efficiency 55%) to 0.84 A / W (quantum efficiency 80%), and remarkable improvement effects can be expected.

[0073] Furthermore, in the case of the 1.55 μm wavelength band, in the case of an InGaAs random alloy structured optical absorption layer, it is 0.30 A / W (quantum efficiency 24%) to 0.53 A / W (quantum efficiency 43%), while in the case of an InAs / GaAs digital alloy structured optical absorption layer, it is 0.43 A / W (quantum efficiency 35%) to 0.72 A / W (quantum efficiency 57%), and even greater improvement effects than in the 1.3 μm band can be expected.

[0074] In the case of end face incident type high-speed PDs and APDs with speeds of 25 G or higher, the optimum value of the layer thickness of the optical absorption layer is 200 to 500 nm. In the case of end face incident type high-speed PDs and APDs, since the waveguide length can be shortened as the absorption coefficient increases, it becomes possible to reduce the pn junction capacitance. For example, in the case of the 1.55 μm wavelength band, regarding the absorption coefficient, the absorption coefficient of the InAs / GaAs digital alloy structured optical absorption layer is about 1.5 times larger than that of the InGaAs random alloy structured optical absorption layer. Therefore, the same light reception sensitivity can be obtained with a waveguide length that is about one-fifth of the length, and as a result, the pn junction capacitance can be reduced to about one-fifth. When the pn junction capacitance decreases, it becomes possible to broaden the response band.

[0075] As described above, by applying an InAs / GaAs digital alloy structured light absorption layer as the light absorption layer of a PD and an APD, it becomes possible to increase the sensitivity and broaden the response bandwidth of the PD and the APD. Therefore, it is possible to obtain a PD and an APD having sufficient reception sensitivity even in applications with a response bandwidth of 25 Gbps or more.

[0076] In the InAs / GaAs digital alloy structured light absorption layer of the present disclosure, each layer of the InAs layer and the GaAs layer has an extremely thin layer thickness of 2 to 6 atomic layers (0.6 to 1.8 nm) and is alternately repeated in a laminated structure. Therefore, a quantum well structure is not formed between the InAs layer and the GaAs layer, and the bandgap of the InAs / GaAs digital alloy structure itself is almost equivalent to that of InGaAs.

[0077] For example, when the layer thickness of the InAs layer is several nm or more, the absorption edge becomes a wavelength of 3 μm close to the bandgap wavelength of InAs, and the physical properties become different. Patent Document 1 discloses an example in which a laminated structure of an AlGaAsSb wide-gap layer (layer thickness: about 0.1 μm) and a short-period (m = 1 to 2) superlattice narrow-gap layer (layer thickness: about 0.1 μm) composed of (InAs)m / (GaAs)m is used as the light absorption layer. However, a p layer and an n layer are arranged in the left-right direction of the laminated surface of the light absorption layer, and only electrons travel through the (InAs)m / (GaAs)m layer, which also functions as a multiplication layer.

[0078] When the p layer and the n layer are arranged in the left-right direction of the laminated surface of the light absorption layer as in Patent Document 1, the distance between the two becomes wide, so the electric field becomes weak. Since electrons and holes travel through separate layers, an electric field distribution occurs, and there is a problem that non-linear operation is likely to occur at high light input. In addition, even when an attempt is made to flow a current in the up-down direction of the laminated surface of the light absorption layer, the current does not flow because it is sandwiched between wide-gap layers.

[0079] On the other hand, in the PD and APD according to the present disclosure, since the p-layer and the n-layer are arranged in the vertical direction of the stacking plane of the light absorption layer, in the InAs / GaAs digital alloy structure, electrons and holes travel in the same layer in opposite vertical directions over a short distance, so that linear operation can be ensured.

[0080] In Patent Document 2, a stacked structure of InGaAs and InAlAs is shown. Further, it is described that an InGaAs layer forms a quantum well with a layer thickness of 10 nm, and disorder is caused by heat treatment to change the bandgap wavelength determined by the InGaAs well.

[0081] On the other hand, in the semiconductor light receiving element of the present disclosure, since each layer of the InAs layer and the GaAs layer is composed of a thin film of 2 to 6 atomic layers, a well is not formed as the InGaAs layer. Further, since the bandgap wavelength is the same as that of InAlGaAs in which Al and Ga have the same ratio, the bandgap wavelength does not change even when heat treatment is applied.

[0082] In Patent Document 3, an example is shown in which the bandgap wavelength is changed by changing the layer thickness of the InGaAs layer that functions as a well from 5.5 nm to 8 nm. On the other hand, in the semiconductor light receiving element of the present disclosure, since each layer of the InAs layer and the GaAs layer is a thin film of 2 to 6 atomic layers (0.6 to 1.8 nm), a well is not formed as the InGaAs layer, so the bandgap wavelength does not change.

[0083] When the layer constituting the light absorption layer forms a quantum well structure, the absorption coefficient increases at the wavelength corresponding to the quantum level, but significantly decreases at the wavelengths before and after the wavelength corresponding to the quantum level. Further, since the formation of the quantum well structure also shortens the bandgap wavelength, the absorption coefficient at long wavelengths decreases. Furthermore, polarization dependence of the absorption coefficient occurs, and it becomes difficult for electrons and holes to be ejected from the well. Therefore, it is important to set the layer thickness to several atomic layers and not to form a quantum well structure as in the semiconductor light receiving element of the present disclosure.

[0084] <Effect of Embodiment 1> According to the semiconductor light receiving element according to Embodiment 1 described above, since an i-type InAs / GaAs digital alloy structure light absorption layer is provided, there is an effect that a semiconductor light receiving element that operates in a wide response band and has high reception sensitivity can be obtained.

[0085] Embodiment 2. <Element Structure of Semiconductor Light Receiving Element (APD) According to Embodiment 2> FIG. 6 is a cross-sectional view showing the element structure of a surface incident type APD which is an example of the semiconductor light receiving element 110 according to Embodiment 2. Further, FIG. 7 is a cross-sectional view showing the element structure of an end face incident type APD which is an example of the semiconductor light receiving element 110a according to Embodiment 2.

[0086] The semiconductor light receiving element 110 according to Embodiment 2 includes an n-type InP substrate 1, and an n-type InAlAs buffer layer 2a which is sequentially formed on the n-type InP substrate 1 and has a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1.0 μm, an i-type InAlAs multiplication layer 13 having a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 500 nm, a p-type InP electric field relaxation layer 14 having a carrier concentration of 1×10 16 ~5×10 18 cm -3 and a layer thickness of 10 to 70 nm, an i-type InAs layer (for example, a layer thickness of 2 atomic layers, about 0.6 nm) and an i-type GaAs layer (for example, a layer thickness of 2 atomic layers, about 0.6 nm) which are alternately laminated a plurality of times and have a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 2000 nm, an i-type InAs / GaAs digital alloy structure light absorption layer 5, an i-type InAlGaAs / InAlAs graded layer 6 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 5 to 50 nm, and an i-type InAlGaAs / InAlAs graded layer 6 having a carrier concentration of 5×10 17 cm -3It is composed of a p-type InP window layer 7 with a layer thickness of 0.1 to 3.0 μm, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0087] Instead of the p-type InP window layer 7, a p-type InAlAs window layer may be used. Note that the n-type InAlAs buffer layer 2a is also referred to as an n-type semiconductor layer.

[0088] The semiconductor light-receiving element 110a according to Embodiment 2 shown in FIG. 7 has the same layer structure as the semiconductor light-receiving element 110, but further, an Fe-doped semi-insulating InP buried layer 20 is formed on at least the end face where the incident light 90 is incident.

[0089] Silicon (Si) is optimal as the n-type dopant of the n-type InAlAs buffer layer 2a. The n-type InAlAs buffer layer 2a may have either a random alloy structure or a digital alloy structure.

[0090] The i-type InAs / GaAs digital alloy structure light absorption layer 5 is composed of a semiconductor layer in which InAs layers (layer thickness: 2 atomic layers, about 0.6 nm) and GaAs layers (layer thickness: 2 atomic layers, about 0.6 nm) are alternately stacked in the order described above. However, the layer thicknesses of the InAs layer and the GaAs layer may be in the range of 2 atomic layers or more and 6 atomic layers or less. This is because it is desirable that the stacked structure of the InAs layer and the GaAs layer does not function as a quantum well structure when it is 6 atomic layers or less.

[0091] Furthermore, the number of atomic layers of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is preferably 2 to 4 atomic layers, and most preferably 2 atomic layers. The reason is that the thinner the atomic layer thickness of each layer, the greater the reduction effect of the ionization rate ratio k due to the digital alloy structure. Also, when considering not only the performance as a semiconductor light receiving element but also productivity, a layer thickness of 4 to 6 atomic layers, which reduces the number of shutter switching times during crystal growth by MBE, is also suitable. Considering the above factors, it can be said that the number of atomic layers of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is preferably in the range of 2 to 6 atomic layer cycles.

[0092] The layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is in the range of 50 nm to 2000 nm. For example, when the layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is 500 nm, the repetition of the InAs layer (2 atomic layers) / GaAs layer (2 atomic layers) is 417 times.

[0093] Considering the affinity with InAlAs that constitutes the n-type InAlAs buffer layer 2a, it is preferable to make only the first GaAs layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 thicker than 3 atomic layers. Alternatively, the i-type InAs / GaAs digital alloy structured light absorption layer 5 may be formed and laminated by alternately stacking InAs layers and GaAs layers in this order.

[0094] The conductivity type of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is i-type, and the carrier concentration is 1×10 17 cm -3 The following is an example. However, as the conductivity type of the i-type InAs / GaAs digital alloy structured light absorption layer 5, a p-type or n-type with a carrier concentration of 5×10 17 cm -3 or less may also be acceptable.

[0095] In addition to the light absorption layer composed of an InAs / GaAs digital alloy structure, as shown in FIG. 2 representing the relationship between the lattice constants of each constituent material and the strain amount based on InP, an InAlGaAs digital alloy structure in which InAlAs / InGaAs, InAlxGa(1-x)As (layer thickness of 2 to 6 atomic layers, Al composition ratio X) and InAlyGa(1-y)As (layer thickness of 2 to 6 atomic layers, Al composition ratio Y) are alternately laminated can also be similarly applied as the light absorption layer of the present disclosure. Furthermore, a digital alloy structure made of InAlAsSb, which is a material system added with antimony (Sb), can also be applied as the light absorption layer of the semiconductor light receiving element of the present disclosure.

[0096] The i-type InAlGaAs / InAlAs graded layer 6 is a layer in which the bandgap is gradually changed by changing the composition of InAlGaAs, and the layer thickness is in the range of 5 to 50 nm respectively. The composition of InAlGaAs may be changed stepwise, and the bandgap is of an intermediate magnitude between the InP layer and the InGaAs layer. The carrier concentration is 5×10 17 cm -3 or less, and if the carrier concentration is low, it may be p-type or n-type. Note that the i-type InAlGaAs / InAlAs graded layer 6 is not necessarily required and may be omitted.

[0097] A layer having an intermediate bandgap such as InAlGaAs or InGaAsP with a layer thickness of 0.1 μm or less may be provided between the p-type InP electric field relaxation layer 14 and the i-type InAs / GaAs digital alloy structure light absorption layer 5. This is because it is possible to prevent the accumulation of electrons and holes at the hetero-junction interface.

[0098] In an example of the element structure of the semiconductor light receiving element 110 shown in FIG. 6, an i-type InAlGaAs / InAlAs graded layer 6 is formed by alternately laminating a plurality of times two types of i-type InAlGaAs layers having different compositions on the i-type InAs / GaAs digital alloy structure light absorption layer 5.

[0099] In the p-type electrode 32 of the APD, which is an example of the semiconductor light-receiving element according to Embodiment 2, Ti and Au are used. The APD has a reverse voltage applied thereto, and the operating voltage is 10 V to 100 V. The electric field in the i-type InAlAs multiplication layer 13 during APD operation is 500 kV / cm to 900 kV / cm. Also, the electric field in the i-type InAs / GaAs digital alloy structured light absorption layer 5 is set to 300 kV / cm or less. The multiplication factor is used in the range of 3 to 30, but when operating in the Geiger mode, it is 100 or more.

[0100] <Operation of the semiconductor light-receiving element (APD) according to Embodiment 2> The operation of the semiconductor light-receiving element (APD) according to Embodiment 2 will be described. Similar to the PD according to Embodiment 1, the APD according to Embodiment 2 uses an InAs / GaAs digital alloy structured light absorption layer as the light absorption layer of the APD, thereby enabling high sensitivity and wide bandwidth of the APD. Therefore, it is possible to obtain an APD having sufficient reception sensitivity even in applications with a wide response bandwidth of 25 Gbps or more.

[0101] <Effect of Embodiment 2> As described above, according to the semiconductor light-receiving element according to Embodiment 2, since the InAs / GaAs digital alloy structured light absorption layer is provided, there is an effect that a semiconductor light-receiving element that operates in a wide response bandwidth and has high reception sensitivity can be obtained.

[0102] Modification of Embodiment 2. <Features of the semiconductor light-receiving element (APD) according to the modification of Embodiment 2> Before describing the specific structure of the semiconductor light-receiving element according to the modification of Embodiment 2, first, the digital alloy structured multiplication layer, which is a structural feature of the semiconductor light-receiving element according to the modification of Embodiment 2, will be described below.

[0103] If a wide-band APD of 37.5 GHz or more can be realized, a next-generation high-speed PON system can be realized without using a DSP and an SOA. In the case of a PD in which widening of the response bandwidth is relatively easy, the response bandwidth is (1) RC time constant (R is the element resistance and C is the element capacitance) (2) Carrier travel time (the time for electrons or holes to travel within the depletion layer) is limited by. In an APD, furthermore, (3) Multiplication time (the time for electrons and holes to multiply chain - like within the multiplication layer, increasing in proportion to the multiplication factor) also limits it.

[0104] In a PD, the above - mentioned 37.5 GHz band can be realized. However, in an APD, because multiplication time is required, it becomes difficult to realize the desired band when increasing the multiplication factor. The multiplication time TM is expressed by the following formulas (3) to (5). Multiplication time TM = Multiplication factor M / GB product (3) GB product = 1 / (2πNkτav) (4) That is, Multiplication time TM = 2πNkMτav (5) becomes.

[0105] Here, the GB product is the product of the multiplication factor and the response band, k is the ionization rate ratio, N is a coefficient that gently depends on the ionization rate ratio k, and τav is the average time for electrons and holes to travel through the multiplication layer. Therefore, it is possible to shorten the multiplication time TM by reducing the ionization rate ratio k. In particular, in order to realize a high - speed PON system, it is necessary to make the multiplication time TM approach zero, that is, to make the ionization rate ratio k approach zero.

[0106] In order to make the ionization rate ratio k zero, various compound semiconductors have been proposed as materials for the multiplication layer. Also, in order to reduce the ionization rate ratio k, a digital alloy structure in which semiconductor layers with different compositions are alternately laminated repeatedly with a period of 1 to 6 atomic layers has been proposed. However, even in the digital alloy structure, it has been difficult to make the ionization rate ratio k zero unless the structure is optimized. Note that the digital alloy structure is described in Non - Patent Document 1.

[0107] Therefore, in order to reduce the ionization rate ratio k of the digital alloy structure, the inventors fabricated an APD having a digital alloy structure multiplication layer using a multiplication layer in which two atomic layer InAs layers and two atomic layer AlAs layers were alternately and repeatedly stacked, and analyzed the multiplication characteristics. As a result, it was found that the distance until carriers travel through the multiplication layer and are ionized is longer than that of an APD having an InAlAs made of a normal bulk crystal, that is, an InAlAs random alloy structure multiplication layer. Note that the distance until carriers travel through the multiplication layer and are ionized is called a dead space.

[0108] The length of the dead space (hereinafter referred to as the dead space length) is longer for holes than for electrons. Therefore, in the case of an InAlAs random alloy structure made of a normal bulk crystal, when the layer thickness of the multiplication layer is thinned to the level of several tens of nm, holes cannot be ionized, so the ionization rate ratio k decreases. However, when the layer thickness of the multiplication layer is thinned to the level of several tens of nm, in order to obtain a desired multiplication factor, it is necessary to apply a higher electric field to the multiplication layer, which causes a new problem that leakage current such as tunneling current increases. That is, when the tunneling current increases, the noise generated in the APD increases. On the other hand, in the analysis by the inventors, it was found that in the digital alloy structure, the dead space is particularly large compared to the random alloy structure, so that even in a multiplication layer with a layer thickness of 100 nm or more, the ionization rate ratio k = 0.

[0109] That is, the inventors have found for the first time that by configuring the multiplication layer of the APD with a digital alloy structure, it is possible to suppress the tunneling current and set the ionization rate ratio k = 0. Specifically, in the multiplication layer composed of the digital alloy structure of the present disclosure, the ionization rate ratio k rapidly decreases at a layer thickness of 170 nm or less. In particular, it has been found that the dead space effect is dramatically improved when the layer thickness of the multiplication layer is in the range of 60 nm or more and 130 nm or less. That is, the inventors have demonstrated that the ionization rate ratio k = 0, which was impossible to achieve with a multiplication layer composed of a random alloy structure or a multiplication layer composed of a thick digital alloy structure, can be achieved by applying the multiplication layer composed of the digital alloy structure of the present disclosure. At present, no research institution has reported that the thinning of the multiplication layer of the APD having a digital alloy structure multiplication layer has a higher reduction effect on the ionization rate ratio k than the thinning of the multiplication layer of the APD using conventional materials.

[0110] An example of a surface incident type APD which is an example of a semiconductor light receiving element according to a modification of Embodiment 2, and an example of an end face incident type APD which is another example will be described below. The semiconductor light receiving element according to the modification of Embodiment 2 is structurally different in that the i-type InAlAs multiplication layer 13 of the semiconductor light receiving element according to Embodiment 2, that is, the i-type InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0111] As an example of the structure of the i-type InAs / AlAs digital alloy structure multiplication layer, a digital alloy structure in which a plurality of i-type AlAs layers (for example, the layer thickness is 2 atomic layers, about 0.6 nm) and i-type InAs layers (for example, the layer thickness is 2 atomic layers, about 0.6 nm) are alternately laminated multiple times can be mentioned.

[0112] The layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer is in the range of 40 nm or more and 1000 nm or less. However, in order to increase the dead space effect in the i-type InAs / AlAs digital alloy structure multiplication layer, the layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer may be in the range of 40 nm or more and 170 nm or less. Further, considering 20%, which is the typical degree of variation in layer thickness during the fabrication of the semiconductor light receiving element 100, the layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer is more preferably in the range of 50 nm or more and 140 nm or less.

[0113] <Operation of the semiconductor light receiving element (APD) according to the modified example of Embodiment 2> The operation of an APD, which is an example of the semiconductor light receiving element according to the modified example of Embodiment 2, will be described below. The inventors have found that when a digital alloy structure multiplication layer is used as in the APD according to the modified example of Embodiment 2, the dead space effect, that is, the effect of reducing the ionization rate ratio k, is enhanced. FIG. 8 is a diagram showing the electric field dependence of the dead space of electrons in the InAlAs multiplication layer. As a result of analyzing the multiplication characteristics of electrons in the digital alloy structure multiplication layer, the inventors have clarified that the dead space of the InAs / AlAs digital alloy structure multiplication layer of the present disclosure is longer than that of the conventional InAlAs random alloy structure multiplication layer, as shown in the graph of FIG. 8.

[0114] FIGS. 9A to 9C are diagrams showing the ionization rates of electrons and holes, respectively. FIG. 9A shows the case of electron ionization, FIG. 9B shows the case of hole ionization, and FIG. 9C shows the ionization rates in the case where the multiplication layer is thinned. In the conventional InAlAs random alloy structure multiplication layer, as shown in the graph of FIG. 8, since the dead space length is about 45 nm, the layer thickness of the multiplication layer needs to be thinned to about 1.5 times (about 70 nm) the dead space. However, when the multiplication layer is thinned to 70 nm, the electric field of the multiplication layer becomes high, and noise increases with a sharp increase in the tunnel current, making it difficult to obtain an APD with good reception sensitivity.

[0115] On the other hand, in the InAs / AlAs digital alloy multiplication layer according to the modification of Embodiment 2, as shown in the graph of FIG. 8, when the reciprocal of the applied electric field is 1.47×10 -6 cm / V, since the dead space length is about 85 nm, even if the layer thickness of the multiplication layer is about 1.5 times (about 130 nm) the dead space, the ionization rate ratio k can be made close to zero. Therefore, the influence of the tunnel current is small in the APD according to the modification of Embodiment 2.

[0116] Also, in the InAs / AlAs digital alloy multiplication layer, the applied electric field dependence of the dead space is large. For example, when the reciprocal of the applied electric field is 1.27×10 -6 cm / V, as shown in the graph of FIG. 8, since the dead space length is about 50 nm, it is necessary to thin the multiplication layer to 75 nm. That is, the layer thickness of the InAs / AlAs digital alloy multiplication layer can be made thicker than the layer thickness of the InAlAs random alloy multiplication layer.

[0117] FIG. 10 is a diagram showing the layer thickness dependence of the ionization rate ratio and the tunnel current. The inventors fabricated APDs having an InAs / AlAs digital alloy multiplication layer and an InAlAs random alloy multiplication layer, respectively, measured the ionization rate ratio k, and further plotted them in FIG. 10 together with the measurement results of References 1 and 2 described in FIG. 10. Note that References 1 and 2 in FIG. 10 are as follows.

[0118] (1) Reference 1 Yuan Yuan,et al “Temperature dependence of the ionization coefficients of InAlAs and AlGaAs digital alloys”pp.794,Vol.6,No.8 / August 2018 / Photonics Research (2) Reference 2 Wenyang Wang,et al “Characteristics of thin InAlAs digital alloy avalanche photodiodes” pp.3841,Vol.46,No.16 / 15 August 2021 / Optics Letters

[0119] As shown in Fig. 10, in the InAlAs random alloy multiplication layer, if the layer thickness of the multiplication layer is not less than 80 nm, the reduction effect of the ionization rate ratio k due to the dead space will not appear. On the other hand, if the layer thickness of the multiplication layer is made thinner than 80 nm, the tunnel current will increase rapidly and tunnel breakdown will occur. When the layer thickness of the multiplication layer is around 60 nm, the reduction of the ionization rate ratio k and the limitation of the tunnel current can barely coexist, but the margin of the layer thickness is only about several nanometers, and it is extremely difficult to stably manufacture an APD. Also, the ionization rate ratio k is as large as 0.12. That is, in the conventional InAlAs random alloy multiplication layer, it is difficult to apply the reduction effect of the ionization rate ratio k due to thinning to the APD.

[0120] On the other hand, in the InAs / AlAs digital alloy multiplication layer of the present disclosure, as discovered by the inventors, since the dead space is large, as shown in Fig. 10, when the multiplication layer is thinned, the ionization rate ratio k starts to decrease from 0.1 or less at a layer thickness of 170 nm. Here, the ionization rate ratio k is obtained from the measured value of the multiplication noise and is the minimum value of the ionization rate ratio in the range of multiplication factors 1 to 10. When the ionization rate ratio k is the same, the layer thickness of the InAs / AlAs digital alloy multiplication layer is more than twice that of the InAlAs random alloy multiplication layer.

[0121] As shown in the graph of Fig. 10, in an APD with a pn junction diameter of 20 μm, when the layer thickness of the multiplication layer at which the tunnel current becomes 1 μA is set to 40 nm as the lower limit, the layer thickness in the range of 40 nm or more and 170 nm or less is the optimal range for the InAs / AlAs digital alloy multiplication layer, and the layer thickness within such a range can be manufactured with sufficient reproducibility.

[0122] The reduction effect of the ionization rate ratio k can be sufficiently obtained due to the dead space effect. The layer thickness of the InAs / AlAs digital alloy structure multiplication layer is such that when the reciprocal of the applied electric field is 1.47×10 -6 cm / V, it is considered to be about twice the dead space length. Therefore, as shown in Fig. 10, considering that the dead space length is 85 nm, 170 nm, which is twice the dead space length, is a suitable value as the upper limit of the layer thickness of the InAs / AlAs digital alloy structure multiplication layer.

[0123] Also, in order to control the ionization rate ratio k to 0.05 or less in the InAs / AlAs digital alloy structure multiplication layer, from the graph of Fig. 8, the layer thickness of the multiplication layer is preferably 150 nm or less. Furthermore, in order for the tunnel current to be 1 μA or less and the ionization rate ratio k to satisfy almost zero, the range of 60 nm or more and 130 nm or less is optimal as the layer thickness of the multiplication layer. When setting a margin of 10 nm during the fabrication of the APD, it is preferable to set the layer thickness of the multiplication layer in the range of 70 nm or more and 120 nm or less.

[0124] Also, as the length of the dead space, from Fig. 8, 50 nm to 90 nm is preferable. The ratio of the length of the dead space to the layer thickness of the multiplication layer is preferably the value obtained by dividing the minimum value of the dead space length, 50 nm, by the maximum value of the layer thickness of the multiplication layer, 170 nm, that is, 29% or more. The ionization rate ratio k decreases as the ratio increases, but it cannot exceed 100%. This is because when the ionization rate ratio k exceeds 100%, multiplication does not occur. Therefore, the ratio of the length of the dead space to the layer thickness of the multiplication layer is preferably 29% or more and less than 100% in principle. Furthermore, in this prototype, since the multiplication layer thickness was 120 nm, the optimal range experimentally confirmed was from 42% (=50 nm / 120 nm) to 75% (=90 nm / 120 nm).

[0125] The inventors considered the reason why the ionization rate ratio k = 0 could not be achieved in the conventional InAlAs random alloy structure multiplication layer, but could be achieved in the InAs / AlAs digital alloy structure multiplication layer of the present disclosure.

[0126] Assuming that the dead space length of electrons is De and the dead space length of holes is Dh, the conditions for achieving the ionization rate ratio k = 0 are expressed by the following equations (6) and (7). Equation (6) represents the condition for the difference in dead space length, and equation (7) represents the condition for the tunnel current. Dhe = Dh − De > 0 (6) Dh > Tmin (7)

[0127] Here, Dhe is the difference in the dead space lengths of holes and electrons. Tmin is the minimum layer thickness of the multiplication layer at which the tunnel current becomes small enough not to be affected by noise. As the multiplication layer is made thicker, the tunnel current decreases. As shown in Fig. 9C, the condition for the difference in dead space length is set as in the above equation (7) because when the layer thickness of the multiplication layer becomes less than or equal to the dead space length of holes, holes no longer multiply and the ionization rate ratio k = 0.

[0128] In the case of an InAlAs random alloy structure multiplication layer, from Figs. 8 and 10, the values at which the ionization rate ratio k starts to decrease as the multiplication layer is thinned are De of about 40 nm and Dh of about 80 nm. Since the minimum layer thickness Tmin = 90 nm when the pn junction diameter is 20 μm and the tunnel current is 100 nA or less, the InAlAs random alloy structure does not satisfy the condition for the tunnel current, and it is impossible to achieve the ionization rate ratio k = 0.

[0129] On the other hand, in the case of an InAs / AlAs digital alloy structure multiplication layer, the values at which the ionization rate ratio k starts to decrease as the multiplication layer is thinned are De of about 80 nm and Dh of about 170 nm. Since the minimum layer thickness Tmin = 90 nm when the pn junction diameter is 20 μm and the tunnel current is 100 nA or less, there exists a layer thickness of the multiplication layer that satisfies the condition for the ionization rate ratio k = 0. Note that for the minimum layer thickness Tmin, since the band gaps of the InAs / AlAs digital alloy structure multiplication layer and the InAlAs random alloy structure multiplication layer are the same, they have the same value.

[0130] Specifically, in the case of a random alloy structure, De is approximately 40 nm and Dh is approximately 80 nm. In contrast, in the case of a digital alloy structure, the inventors have found that De is approximately 80 nm and Dh is approximately 170 nm.

[0131] In the InAs / AlAs digital alloy structure multiplication layer, the lattice constant difference between InAs (lattice constant = 0.606 nm) and AlAs (lattice constant = 0.566 nm) that make up the superlattice is as large as 6.55%. Therefore, during the manufacturing process, the dopant of the electric field relaxation layer, that is, the impurity, may diffuse into the InAs / AlAs digital alloy structure multiplication layer, and disordering may occur within the multiplication layer.

[0132] Figures 11A to 11D are diagrams showing the ionization rates in the multiplication layer and the electric field relaxation layer. Figure 11A shows the case of an InAlAs random alloy structure multiplication layer, Figure 11B shows the case of an InAs / AlAs digital alloy structure multiplication layer, Figure 11C shows the case of a partially disordered InAs / AlAs digital alloy structure multiplication layer, and Figure 11D shows the ionization rates when a thick electric field relaxation layer and an InAs / AlAs digital alloy structure multiplication layer are combined. Compared with the InAlAs random alloy structure multiplication layer shown in Figure 11A, the dead space length of the InAs / AlAs digital alloy structure multiplication layer shown in Figure 11B is long. However, due to dopant diffusion from the electric field relaxation layer, in the partially disordered InAs / AlAs digital alloy structure multiplication layer, as shown in Figure 11C, the dead space length becomes short.

[0133] In order for the InAs / AlAs digital alloy structure multiplication layer to avoid the influence of disordering, the selection of the material and dopant of the electric field relaxation layer and the doping concentration are important. The impurity diffusion equation is expressed by the following formula (8). dN / dt = D(d 2 N / d 2 x) - F (8)

[0134] In Equation (8), N is the impurity concentration, t is the time, D is the diffusion constant, x is the position, and F is the external force acting on the diffusion. Examples of materials for the electric field relaxation layer include InP, InAlAs random alloy structures, and InAs / AlAs digital alloy structures. Examples of p-type dopants for the electric field relaxation layer include Be and Zn. Considering the p-type dopant, a combination of a Be-doped p-type InP electric field relaxation layer and an InAs / AlAs digital alloy structure multiplication layer is preferred. This is because, in addition to the small diffusion constant D of Be, it forms a potential barrier with the InAs / AlAs digital alloy structure multiplication layer. Note that the potential barrier corresponds to F in Equation (8).

[0135] When variations occur in the layer thickness of the electric field relaxation layer, in order to prevent the variation in the amount of electric field relaxation, that is, the variation in the product of the layer thickness and the carrier concentration, a carrier concentration of 2×10 18 cm -3 or less is preferred for the carrier concentration of the electric field relaxation layer. When InAlAs is used as the constituent material of the electric field relaxation layer, Zn doping is optimal, and the carrier concentration is optimally 2×10 18 cm -3 or less. Note that when the impurity concentration becomes higher than 2×10 18 cm -3 inactive impurities increase and diffusion is likely to occur. Therefore, it is essential that the carrier concentration is 5×10 18 cm -3 or less.

[0136] The amount of electric field relaxation ΔE is expressed by the following Equation (9). ΔE = W·q·N / ε (9) When the amount of electric field relaxation ΔE is constant, if the carrier concentration of the electric field relaxation layer is increased, it is necessary to decrease the layer thickness of the electric field relaxation layer in inverse proportion to the carrier concentration. Here, W is the layer thickness of the electric field relaxation layer, q is the elementary charge, N is the carrier concentration of the electric field relaxation layer, and ε is the dielectric constant.

[0137] When the carrier concentration N of the electric field relaxation layer is 5×10 18 cm -3When it reaches a certain level, the layer thickness of the electric field relaxation layer becomes about 10 nm. In order to prevent the shortening of the dead space length due to impurity diffusion into the multiplication layer, the carrier concentration of the electric field relaxation layer is controlled to be 5×10 18 cm -3 or less. Also, the electric field relaxation layer requires a layer thickness of 10 nm or more.

[0138] On the other hand, as shown in Fig. 11D, when the electric field relaxation layer becomes thicker than 1.5 times the dead space length of the electric field relaxation layer, multiplication occurs in the electric field relaxation layer. As shown in Fig. 6, in the random alloy structure, the dead space length is 45 nm or less, so the layer thickness of the random alloy structure electric field relaxation layer needs to be 70 nm or less. On the other hand, in the InAs / AlAs digital alloy structure, since the dead space length is 85 nm or less, the layer thickness of the digital alloy electric field relaxation layer needs to be 130 nm or less.

[0139] Note that the dead space lengths shown in Figs. 11A to 11D have the relationship of dead space (Fig. 11A) < dead space (Fig. 11D) < dead space (Fig. 11C) < dead space (Fig. 11B).

[0140] <Regarding the effects of the semiconductor light receiving element (APD) according to the modification of Embodiment 2> First, the first effect in the semiconductor light receiving element according to the modification of Embodiment 2 will be quantitatively described below. For the 3 dB bandwidth fc of a conventional APD, when the bandwidth limited by the RC time constant is frc, the bandwidth limited by the carrier transit time is ftr, and the bandwidth limited by the multiplication time is fm, it is expressed by the following formula (10). fc_APD = 1 / ((1 / frc) 2 +(1 / ftr) 2 +(1 / fm) 2 ) 0.5 (10)

[0141] On the other hand, for the APD having the InAs / AlAs digital alloy structure multiplication layer according to the modification of Embodiment 2, since the ionization rate ratio k is close to zero, from Equations (3), (4), and (5), it is limited only by the RC time constant and the carrier transit time, and thus can be expressed by the following Equation (11). fc_APD = 1 / ((1 / frc) 2 +(1 / ftr) 2 ) 0.5 (11) In Equation (11), the carrier transit time ftr is the sum of the time to travel through the optical absorption layer and the time to travel through the multiplication layer.

[0142] Since the RC time constant is inversely proportional to the sum of the layer thickness of the optical absorption layer and the layer thickness of the multiplication layer, while the transit time is directly proportional, Equation (11) has a maximum value. That is, the maximum bandwidth is obtained when frc = ftr. Substituting frc = ftr into Equation (11), Equation (11) is expressed by the following Equation (12). fc = ftr / √2 (12)

[0143] Also, the 3dB bandwidth ftr determined by the transit time is expressed by the following Equation (13). ftr = 3.5Vav / (2πWt) (13)

[0144] In Equation (13), Vav is the average saturation transit velocity of electrons and holes, and Wt is the sum of the layer thicknesses of the optical absorption layer and the multiplication layer. For example, in the case of InGaAs, Vav is 5.35×10 6 cm / s. Also, when the layer thickness of the multiplication layer is 100 nm and the layer thickness of the optical absorption layer is 400 nm, Wt = 500 nm.

[0145] Vav = 5.35×10 6When cm / s and Wt = 500 nm are substituted into Equation (13), ftr = 59.6 GHz. Further, when the calculated ftr is substituted into Equation (12), the 3 dB bandwidth of the APD having an InAs / AlAs digital alloy structure multiplication layer according to the modified example of Embodiment 2 is 42.2 GHz. Therefore, it is found from the above considerations that the APD having an InAs / AlAs digital alloy structure multiplication layer according to the modified example of Embodiment 2 can satisfy the bandwidth of 37.5 GHz required for the 50G-PON system. In the following description of devices, systems, etc., an APD having an InAs / GaAs digital alloy structure optical absorption layer or an InAs / GaAs digital alloy structure optical absorption layer and an InAs / AlAs digital alloy structure multiplication layer according to the present disclosure is referred to as the DA-APD of the present disclosure.

[0146] <Effect of the modified example of Embodiment 2> As described above, according to the semiconductor light receiving element according to the modified example of Embodiment 2, since it further has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, it operates with a wider response bandwidth, has high reception sensitivity, and has the effect of obtaining a highly reliable semiconductor light receiving element.

[0147] Embodiment 3. FIG. 12 is a cross-sectional view showing the element structure of a surface incident type PD which is an example of the semiconductor light receiving element 120 according to Embodiment 3. Further, FIG. 13 is a cross-sectional view showing the element structure of a surface incident type PD which is an example of the semiconductor light receiving element 120a according to Embodiment 3.

[0148] <Element structure of the semiconductor light receiving element (PD) according to Embodiment 3> The semiconductor light receiving element 120 according to Embodiment 3 shown in FIG. 12 includes an n-type InP substrate 1, and an n-type InP buffer layer 2 having a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1.0 μm, and an i-type InP electron traveling layer 3 having a carrier concentration of 5×10 17 cm -3 or less and a layer thickness of 0.1 to 1.0 μm, and a carrier concentration of 5×1017 cm -3 The i-type InAlGaAs graded layer 4 with a layer thickness of 5 to 50 nm, and a carrier concentration of 1×10 17 cm -3 The i-type InAs layer (for example, the layer thickness is 2 atomic layers, about 0.6 nm) and the i-type GaAs layer (for example, the layer thickness is 2 atomic layers, about 0.6 nm) with a carrier concentration of 5×10 17 cm -3 The i-type InAlGaAs / InAlAs graded layer 6 with a layer thickness of 5 to 50 nm, and a carrier concentration of 5×10 17 cm -3 The n-type InP window layer 11 with a layer thickness of 0.1 to 3.0 μm, the p-type diffusion region 15 provided in the n-type InP window layer 11, the p-type InGaAs contact layer 8 provided on the p-type diffusion region 15, the n-type electrode 31 formed on the back side of the n-type InP substrate 1, and the p-type electrode 32 formed on the p-type InGaAs contact layer 8. The n-type InP buffer layer 2 is also called an n-type semiconductor layer.

[0149] The semiconductor light receiving element 120a according to Embodiment 3 shown in FIG. 13 has the same configuration as the semiconductor light receiving element 120 according to Embodiment 3, except that the Fe-doped semi-insulating InP substrate 1a is used as the substrate and the n-type electrode 31a is formed on the surface side of the n-type InP conductive layer 2b. The back-side electrode 31b is not for the purpose of passing current but is necessary for fixing the semiconductor light receiving element with solder.

[0150] The differences between the semiconductor light receiving elements 120 and 120a according to Embodiment 3 and the semiconductor light receiving elements 100 and 100a according to Embodiment 1 are that the n-type InP constituting the n-type InP window layer 11 is undoped (i-type) or has a low carrier concentration, and a p-type diffusion region 15 is provided in the n-type InP window layer 11. The layer thickness of the n-type InP window layer 11 of the semiconductor light receiving elements 120 and 120a is 0.1 μm or more and 3 μm or less, and the carrier concentration is 5×10 17 cm -3The following applies. Also, the n-type InP window layer 11 may use InAlAs instead of InP, or a stacked structure of InP and InAlAs.

[0151] The p-type diffusion region 15 is formed by partially selectively diffusing a p-type dopant such as Zn in a solid phase or a gas phase. The carrier concentration of the p-type diffusion region 15 is 5×10 17 cm -3 or more. The tip of the p-type diffusion region 15 may be located at a depth up to the middle of the n-type InP window layer 11, a depth reaching the i-type InAlGaAs / InAlAs graded layer 6, or a depth reaching the i-type InAs / GaAs digital alloy structured light absorption layer 5, respectively. In the element structures shown in FIGS. 12 and 13, the p-type diffusion region 15 has a depth reaching the i-type InAs / GaAs digital alloy structured light absorption layer 5. A p-type InGaAs contact layer 8 is provided on the p-type diffusion region 15.

[0152] By performing Zn diffusion to a depth of about 0.2 μm, for example, in the middle of the i-type InAs / GaAs digital alloy structured light absorption layer 5, it is also possible to p-type a part (p-type electrode side) of the i-type InAs / GaAs digital alloy structured light absorption layer 5. The part p-type layered by Zn diffusion may have the InAs / GaAs digital alloy structure disordered and become a random alloy structure. However, since the p-type layered part has a uni-traveling carrier (UTC) structure, the response speed does not deteriorate. This is because in the UTC structure, among the electron-hole pairs generated by light absorption in the p-type layer (non-depleting p-type InGaAs) in the i-type InAs / GaAs digital alloy structured light absorption layer 5, only electrons that can move at high speed are supplied to the depletion layer (the InAs / GaAs digital alloy structured light absorption layer remaining in the i-type state), enabling the high-speed response of the PD. That is, the non-depleting p-type light absorption layer part does not have to be a digital alloy structure. As long as the depleting i-type light absorption layer part is a digital alloy structure, the high-speed responsiveness does not deteriorate. However, if the layer thickness of the p-type layer in the i-type InAs / GaAs digital alloy structured light absorption layer 5 is increased, the electrons generated in the p-type layer will recombine, resulting in a decrease in efficiency. Note that the p-type InGaAs part in the i-type InAs / GaAs digital alloy structured light absorption layer 5 may be formed not by p-type layering by Zn diffusion as described above, but by doping during epitaxial crystal growth.

[0153] In a surface incident type PD which is an example of the semiconductor light receiving element 120 shown in FIG. 12, an n-type electrode 31 is provided on the back side. On the other hand, in a surface incident type PD which is an example of the semiconductor light receiving element 120a shown in FIG. 13, in addition to the electrode 31b on the back side, an n-type electrode 31a is provided on the front side. That is, in the semiconductor light receiving element 120a, an n-type InP conductive layer 2b is provided on the Fe-doped semi-insulating InP substrate 1a. After crystal growth, after partially removing each semiconductor layer above the n-type InP conductive layer 2b, an n-type electrode 31a is formed on the n-type InP conductive layer 2b. The semiconductor light receiving element 120a may use a p-type InP substrate or an n-type InP substrate instead of the Fe-doped semi-insulating InP substrate 1a.

[0154] <Operation of the semiconductor light receiving element (PD) according to Embodiment 3> In a mesa structure such as the surface incident type PD which is an example of the semiconductor light receiving element 100 according to Embodiment 1 shown in FIG. 4, since the side surface portion of the multiplication layer to which an electric field is applied is exposed to the outside, it is liable to deteriorate. In particular, when an InAs / GaAs digital alloy structure is used as the light absorption layer, since the strain of each layer constituting the i-type InAs / GaAs digital alloy structure light absorption layer 5 is high, dislocation defects and disordering are likely to occur from the exposed portion toward the inner side. As a result, there is a possibility that a problem that the semiconductor light receiving element deteriorates may occur.

[0155] As a result, in the case of the light absorption layer in which the InAs / GaAs digital alloy structure is thinned as in the semiconductor light receiving elements 100 and 100a according to Embodiment 1, the lifetime as a semiconductor light receiving element may be shortened due to the dark current generated on the side surface portion as compared with the conventional InGaAs random alloy structure.

[0156] On the other hand, when the p-type diffusion region 15 is provided as in the semiconductor light receiving elements 120 and 120a shown in FIGS. 12 and 13, since the portion where an electric field is applied in the i-type InAs / GaAs digital alloy structure light absorption layer 5, that is, the portion immediately below the p-type diffusion region 15 is not exposed to the outside of the crystal layer, deterioration and disordering can be prevented in the i-type InAs / GaAs digital alloy structure light absorption layer 5 in which the strain of each layer is high. As a result, it becomes possible to keep the absorption coefficient high as the light absorption layer.

[0157] <Effect of Embodiment 3> According to the semiconductor light receiving element according to Embodiment 3 described above, the non-depleted P-type layer portion in the i-type InAs / GaAs digital alloy structured light absorption layer 5 has a random alloy structure, but there is no deterioration in the response speed due to the UTC effect described above. On the other hand, the remaining i-type portion of the depleted InAs / GaAs digital alloy structured light absorption layer 5, that is, the portion directly under the p-type diffusion region 15, is not exposed to the outside of the crystal layer and thus does not become disordered, so the high-speed responsiveness does not deteriorate. Therefore, even though Zn diffusion is carried out to form the p-type diffusion region during element structure formation, the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be prevented, and thus there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and has high reliability can be obtained.

[0158] Embodiment 4. FIG. 14 is a cross-sectional view showing the element structure of a surface incident type APD which is an example of the semiconductor light receiving element 130 according to Embodiment 4. Further, FIG. 15 is a cross-sectional view showing the element structure of a surface incident type APD which is an example of the semiconductor light receiving element 130a according to Embodiment 4.

[0159] <Element Structure of Semiconductor Light Receiving Element (APD) According to Embodiment 4> The semiconductor light receiving element 130 according to Embodiment 4 includes an n-type InP substrate 1, and an n-type InAlAs buffer layer 2a which is sequentially formed on the n-type InP substrate 1 and has a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1.0 μm, an i-type InAlAs multiplication layer 13 having a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 500 nm, a p-type InP electric field relaxation layer 14 having a carrier concentration of 1×10 16 to 5×10 18 cm -3 and a layer thickness of 10 to 70 nm, and a carrier concentration of 1×10 17 cm -3An i-type InAs / GaAs digital alloy structured light absorption layer 5 in which an i-type InAs layer (for example, having a layer thickness of 2 atomic layers, approximately 0.6 nm) and an i-type GaAs layer (for example, having a layer thickness of 2 atomic layers, approximately 0.6 nm) are alternately laminated a plurality of times, with the layer thickness being 50 to 2000 nm, and a carrier concentration of 5×10 17 cm -3 An i-type InAlGaAs / InAlAs graded layer 6 with a carrier concentration of 5×10 17 cm -3 An n-type InP window layer 11 with a carrier concentration of 5×10

[0160] The semiconductor light receiving element 130a according to Embodiment 4 shown in FIG. 15 has the same configuration as the semiconductor light receiving element 130 according to Embodiment 4, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and the n-type electrode 31a is formed on the surface side of the n-type InP conductive layer 2b. Note that the back-side electrode 31b is not for the purpose of passing current but is necessary for fixing the semiconductor light receiving element with solder.

[0161] The differences between the semiconductor light receiving elements 130 and 130a according to Embodiment 4 and the semiconductor light receiving elements 110 and 110a according to Embodiment 2 are that the n-type InP constituting the n-type InP window layer 11 is undoped (i-type) or has a low carrier concentration, and a p-type diffusion region 15 is provided in the n-type InP window layer 11. The layer thickness of the n-type InP window layer 11 of the semiconductor light receiving elements 120 and 130 is 0.1 μm or more and 3 μm or less, and the carrier concentration is 5×10 17 cm -3 or less. Also, the n-type InP window layer 11 may use InAlAs instead of InP, or a laminated structure of InP and InAlAs.

[0162] The p-type diffusion region 15 is formed by partially selectively diffusing a p-type dopant such as Zn in a solid phase or a gas phase. The carrier concentration of the p-type diffusion region 15 is 5×10 17 cm -3 or more. The tip of the p-type diffusion region 15 may be located at a depth reaching halfway through the n-type InP window layer 11, a depth reaching the i-type InAlGaAs / InAlAs graded layer 6, or a depth reaching the i-type InAs / GaAs digital alloy structured light absorption layer 5, respectively. In the element structures shown in FIGS. 14 and 15, the p-type diffusion region 15 has a depth reaching the i-type InAlGaAs / InAlAs graded layer 6. A p-type InGaAs contact layer 8 is provided on the p-type diffusion region 15.

[0163] In the surface incident type APD which is an example of the semiconductor light receiving element 130 shown in FIG. 14, an n-type electrode 31 is provided on the back side. On the other hand, in the surface incident type APD which is an example of the semiconductor light receiving element 130a shown in FIG. 15, in addition to the electrode 31b on the back side, an n-type electrode 31a is provided on the front side. That is, in the semiconductor light receiving element 130a, an n-type InP conductive layer 2b is provided on the Fe-doped semi-insulating InP substrate 1a, and after partially removing each semiconductor layer above the n-type InP conductive layer 2b after crystal growth, an n-type electrode 31a is formed on the n-type InP conductive layer 2b. In the semiconductor light receiving element 130a, a p-type InP substrate or an n-type InP substrate may be used instead of the Fe-doped semi-insulating InP substrate 1a.

[0164] <Operation of the semiconductor light receiving element (APD) according to Embodiment 4> In a mesa type structure such as the surface incident type APD which is an example of the semiconductor light receiving element 110 according to Embodiment 2 shown in FIG. 6, since the side surface portion of the multiplication layer where an electric field is applied is exposed to the outside, it is liable to deteriorate. In particular, when an InAs / GaAs digital alloy structure is used as the light absorption layer, since the strain of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 5 is high, dislocation defects and disordering are liable to occur from the exposed portion toward the inner side, and as a result, there is a possibility that the semiconductor light receiving element deteriorates.

[0165] As a result, in the case of a light absorption layer in which the InAs / GaAs digital alloy structure is thinned, such as the semiconductor light receiving elements 110 and 110a according to Embodiment 2, there is a risk that the lifetime as a semiconductor light receiving element will be shortened due to dark current generated on the side surface as compared with the conventional InGaAs random alloy structure.

[0166] On the other hand, in the case of providing the p-type diffusion region 15 as in the semiconductor light receiving elements 130 and 130a shown in FIGS. 14 and 15, since the portion where an electric field is applied in the i-type InAs / GaAs digital alloy structure light absorption layer 5, that is, the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, it is possible to prevent the occurrence of deterioration and disorder in the i-type InAs / GaAs digital alloy structure light absorption layer 5 where the strain of each layer is high. As a result, it becomes possible to keep the absorption coefficient high as the light absorption layer.

[0167] <Effect of Embodiment 4> As described above, according to the semiconductor light receiving element according to Embodiment 4, even though Zn diffusion is carried out to form a p-type diffusion region during element structure formation, it is possible to prevent the disordering of the InAs / GaAs digital alloy structure light absorption layer and the InAs / GaAs digital alloy structure light absorption layer. Therefore, there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and has high reliability can be obtained.

[0168] Modification of Embodiment 4. An example of a surface incident type APD which is an example of a semiconductor light receiving element according to a modification of Embodiment 4 will be described below.

[0169] The semiconductor light receiving element according to the modification of Embodiment 4 is structurally different in that the i-type InAlAs multiplication layer 13 in the surface incident type APD which is an example of the semiconductor light receiving elements 130 and 130a according to Embodiment 4, that is, the i-type InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0170] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, it is the same as that of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modification example of Embodiment 2, so the description is omitted.

[0171] <Operation of the semiconductor light receiving element (APD) according to the modification example of Embodiment 4> In the semiconductor light receiving element according to the modification example of Embodiment 4, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion process when forming the p-type diffusion region 15, the disordering of the i-type InAs / AlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, as shown in FIG. 11C, the dead space length does not become short, and the state with a long dead space length as shown in FIG. 11B can be maintained. As a result, even though Zn diffusion is performed in the manufacturing process, it is possible to keep the ionization rate ratio k almost zero.

[0172] <Effect of the modification example of Embodiment 4> As described above, according to the semiconductor light receiving element according to the modification example of Embodiment 4, since it further has a digital alloy structure multiplication layer in which the layer thickness is controlled within a preset range, it operates in a wider response band, has high reception sensitivity, and has the effect of obtaining a highly reliable semiconductor light receiving element.

[0173] Embodiment 5. FIG. 16 is a cross-sectional view showing the element structure of a surface incident type APD which is an example of the semiconductor light receiving element 140 according to Embodiment 5.

[0174] <Element structure of the semiconductor light receiving element (APD) according to Embodiment 5> A surface incident type APD which is an example of the semiconductor light receiving element 140 according to Embodiment 5 is characterized in that a separation groove 17 is provided along the outer peripheral portion of the p-type diffusion region 15 formed in the n-type InP window layer 11 in the element structure of the surface incident type APD which is an example of the semiconductor light receiving element 130 according to Embodiment 4.

[0175] The depth of the isolation groove 17 is preferably in the range of 2 μm or more and 5 μm or less. Also, the opening width of the isolation groove 17 is preferably in the range of 0.5 μm or more and 100 μm or less. The bottom of the isolation groove 17 reaches at least the i-type InAs / GaAs digital alloy structured light absorption layer 5. Note that FIG. 16 shows an example in which the bottom of the isolation groove 17 reaches halfway through the n-type InAlAs buffer layer 2a. As a method for forming the isolation groove 17, either dry etching or wet etching may be used. However, a method in which wet etching is added to remove the damage layer generated by dry etching after dry etching with excellent depth control is preferable.

[0176] The inside of the isolation groove 17 and the surface of the n-type InP window layer 11 are protected by a surface protection film 18 composed of an insulating film made of an oxide film such as SiN or SiO2. The surface protection film 18 also serves as an antireflection coating for the light receiving portion. The film thickness of the surface protection film 18 is preferably in the range of 50 nm or more and 5000 nm or less. Also, the surface protection film 18 may be an organic film such as benzocyclobutene (BCB).

[0177] <Operation of the semiconductor light receiving element (APD) according to Embodiment 5> When the light absorption layer has an InAs / GaAs digital alloy structure, since the strain of each layer of the InAs / GaAs digital alloy structure is high, disordering of the InAs / GaAs digital alloy structure is likely to occur when external stress is applied. Therefore, by providing the isolation groove 17 along the outer peripheral portion of the p-type diffusion region 15 as in the semiconductor light receiving element 140 according to Embodiment 5, the stress across the entire wafer in the manufacturing process can be relaxed. Also, even when in the state of each individual semiconductor light receiving element 140, the stress is relaxed due to the presence of the isolation groove 17, so stress concentration at the light receiving portion at the center of the semiconductor light receiving element 140 can be relaxed. Furthermore, since the i-type InAs / GaAs digital alloy structured light absorption layer 5 is exposed in the isolation groove 17, it is desirable that the above-described surface protection film 18 covers the surface of the isolation groove 17. Note that since no high electric field is applied to the isolation groove 17, it does not become a starting point for deterioration.

[0178] When providing the p-type diffusion region 15 as in the semiconductor light receiving element 140 shown in FIG. 16, since the portion where the electric field is applied in the i-type InAs / GaAs digital alloy structured light absorption layer 5, that is, the portion directly below the p-type diffusion region 15, is not exposed to the outside of the crystal layer, in the i-type InAs / GaAs digital alloy structured light absorption layer 5 where the strain of each layer is high, the effect of preventing the occurrence of deterioration can be achieved.

[0179] Furthermore, since the stress is relaxed by the separation groove 17 even during the operation of the semiconductor light receiving element 140, disorder does not occur even when the semiconductor light receiving element 140 is used for a long time. That is, in the semiconductor light receiving element 140 of Embodiment 5, high reliability can be realized in which it can operate over a wide band for a long time and maintain low noise.

[0180] <Effect of Embodiment 5> As described above, according to the semiconductor light receiving element according to Embodiment 5, even though Zn diffusion is carried out to form the p-type diffusion region 15 during element structure formation, the disordering of the InAs / GaAs digital alloy structured light absorption layer can be prevented, and furthermore, since the stress can be relaxed by the presence of the separation groove, there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0181] Modification of Embodiment 5. An example of a semiconductor light receiving element according to a modification of Embodiment 5, a surface incident type APD, will be described below.

[0182] The semiconductor light receiving element according to the modification of Embodiment 5 is structurally different in that the i-type InAlAs multiplication layer 13 in the surface incident type APD which is an example of the semiconductor light receiving element 140 according to Embodiment 5, that is, the i-type InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structured multiplication layer.

[0183] Regarding the layer structure and layer thickness of the type-I InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the type-I InAs / AlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modification example of Embodiment 2, the description thereof is omitted.

[0184] <Operation of the semiconductor light receiving element (APD) according to the modification example of Embodiment 5> In the semiconductor light receiving element according to the modification example of Embodiment 5, even if a high-temperature heat treatment is performed to diffuse Zn in the diffusion process when forming the p-type diffusion region 15, the disordering of the InAs / AlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, as shown in FIG. 11C, the dead space length does not become short, and the state with a long dead space length as shown in FIG. 11B can be maintained. As a result, even when Zn diffusion is performed in the manufacturing process, the ionization rate ratio k can be kept almost zero.

[0185] <Effect of the modification example of Embodiment 5> As described above, according to the semiconductor light receiving element according to the modification example of Embodiment 5, it has a digital alloy structure multiplication layer in which the layer thickness is controlled within a preset range, and even though Zn diffusion for forming a p-type diffusion region is performed during element structure formation, the disordering of the InAs / GaAs digital alloy structure light absorption layer and the InAs / AlAs digital alloy structure multiplication layer can be prevented, and furthermore, the stress can be relaxed due to the presence of the separation groove. Therefore, there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0186] Embodiment 6. FIG. 17 is a cross-sectional view showing the element structure of a back-illuminated APD which is an example of the semiconductor light receiving element 140a according to Embodiment 6.

[0187] <Element structure of the semiconductor light receiving element (APD) according to Embodiment 6> In contrast to the surface-incident APD, which is an example of the semiconductor light-receiving element 140 according to Embodiment 5 and receives light from the surface side, the backside-incident APD, which is an example of the semiconductor light-receiving element 140a according to Embodiment 6, has an element structure in which a part of the n-type electrode 31c on the backside is removed to provide an opening 33, and light is incident on the n-type InP substrate 1 through an antireflection coating film 35 formed to cover the opening 33. That is, an opening 33 covered with the antireflection coating film 35, which is the incident region of the incident light 90, is provided on the back surface of the n-type InP substrate 1 opposite to the p-type electrode 32. Further, the central portion of the p-type InGaAs contact layer 8 is partially removed, and a surface protection film 18 composed of an insulating film made of an oxide film such as SiN or SiO2 is formed on the exposed p-type diffusion region 15, and then covered with the p-type electrode 32, thereby increasing the reflectance of light from the p-type electrode 32.

[0188] In addition, since the backside-incident APD such as the semiconductor light-receiving element 140a can form the area of the p-type diffusion region 15 smaller than that of the surface-incident APD such as the semiconductor light-receiving element 140, it is possible to further reduce the stress generated during p-type diffusion. Therefore, further prevention of the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be achieved. As a result, even though Zn diffusion is performed during element structure formation, the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be prevented. As a result, as the light absorption layer, it is possible to maintain a high absorption coefficient. Further, since the stress can be reduced by the separation groove 17, there is an effect that a semiconductor light-receiving element with high reliability, operating in a wide response band, and excellent in low-noise characteristics can be obtained.

[0189] <Effect of Embodiment 6> As described above, according to the semiconductor light receiving element according to Embodiment 6, since the element structure is a back-illuminated APD, the area of the p-type diffusion region can be made smaller than that of the front-illuminated APD, and the stress can be further relaxed by the isolation groove. Therefore, there is an effect that a semiconductor light receiving element with high reliability, operating in a wide response band, and excellent low-noise characteristics can be obtained. Further, as described above, since the reflectance of light from the p-type electrode 32 is increased, the light transmitted through the i-type InAs / GaAs digital alloy structure light absorption layer 5 without being absorbed is reflected by the p-type electrode 32 and returns to the i-type InAs / GaAs digital alloy structure light absorption layer 5 again, so that the light reception sensitivity is increased. As a result, since the i-type InAs / GaAs digital alloy structure light absorption layer 5 can be made thinner, the transit times of electrons and holes can be shortened. Therefore, by combining with the i-type InAs / GaAs digital alloy structure light absorption layer 5, there is an effect that a semiconductor light receiving element capable of further widening the response band can be obtained.

[0190] Modification of Embodiment 6. An example of a semiconductor light receiving element which is a back-illuminated APD according to a modification of Embodiment 6 will be described below.

[0191] The semiconductor light receiving element according to the modification of Embodiment 6 is structurally different in that the i-type InAlAs multiplication layer 13, that is, the i-type InAlAs multiplication layer having a random alloy structure, in a back-illuminated APD which is an example of the semiconductor light receiving element 140 according to Embodiment 6, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0192] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modification of Embodiment 2, the description will be omitted.

[0193] <Operation of the semiconductor light receiving element (APD) according to the modification of Embodiment 6> A back-illuminated APD, which is an example of a semiconductor light-receiving element according to a modification of Embodiment 6, is the same as the semiconductor light-receiving element according to the modification of Embodiment 5. Even when a high-temperature heat treatment is performed to diffuse Zn in the diffusion process of forming the p-type diffusion region 15, the disordering of the InAs / AlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, as shown in FIG. 11C, the dead space length does not become shorter, and the state with a long dead space length as shown in FIG. 11B can be maintained.

[0194] <Effect of the modification of Embodiment 6> As described above, according to the semiconductor light-receiving element according to the modification of Embodiment 6, since the element structure is a back-illuminated APD, the area of the p-type diffusion region can be formed smaller than that of the front-illuminated APD. Also, it has a digital alloy structure multiplication layer with a layer thickness controlled within a preset range. Even when Zn diffusion for forming the p-type diffusion region is performed during the formation of the element structure, the disordering of the InAs / GaAs digital alloy structure light absorption layer and the InAs / AlAs digital alloy structure multiplication layer can be prevented. Furthermore, the stress can be relaxed due to the presence of the isolation groove. As a result, a semiconductor light-receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0195] Embodiment 7. FIG. 18 is a cross-sectional view showing the element structure of a front-illuminated PD, which is an example of the semiconductor light-receiving element 150 according to Embodiment 7. Also, FIG. 19 is a cross-sectional view showing the element structure of a front-illuminated PD, which is an example of the semiconductor light-receiving element 150a according to Embodiment 7.

[0196] <Element structure of the semiconductor light-receiving element (PD) according to Embodiment 7> The configuration of the semiconductor light-receiving element 150 according to Embodiment 7 from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6 is the same as that of the semiconductor light-receiving element 100 according to Embodiment 1, so the description is omitted.

[0197] The semiconductor light receiving element 150 according to Embodiment 7 shown in FIG. 18 is composed of a structure from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6, an n-type InP window layer 11 with a layer thickness of 0.1 to 3.0 μm, a p-type InAlAs conductive layer 25, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0198] The semiconductor light receiving element 150a according to Embodiment 7 shown in FIG. 19 has the same configuration as the semiconductor light receiving element 150 according to Embodiment 7, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and the n-type electrode 31a is formed on the surface side of the n-type InP conductive layer 2b. Note that the back-side electrode 31b is not for the purpose of passing current but is necessary for soldering and fixing the semiconductor light receiving element.

[0199] The differences between the semiconductor light receiving elements 150 and 150a according to Embodiment 7 and the semiconductor light receiving element 100 according to Embodiment 1 are that in the semiconductor light receiving elements 150 and 150a, the p-type InAlAs conductive layer 25 formed on the n-type InP window layer 11 is formed in a mesa shape, and the p-type InGaAs contact layer 8 and the p-type electrode 32 are provided on the p-type InAlAs conductive layer 25. The n-type InP window layer 11 only needs to have a layer thickness of 50 nm or more, but a layer thickness of 200 nm or less is desirable in order not to increase the carrier transit time. Also, the conductivity type of the n-type InP window layer 11 may be undoped instead of n-type. The carrier concentration in the case of n-type is 5.0×10 17 cm -3 The following is desirable.

[0200] As a manufacturing method of the semiconductor light receiving elements 150 and 150a according to Embodiment 7, the p-type InAlAs conductive layer 25 is crystal-grown on the n-type InP window layer 11 by MOVPE or MBE, etc., and after further crystal-growing the p-type InGaAs contact layer 8, the p-type InAlAs conductive layer 25 is removed leaving the light receiving part. This is the characteristic point.

[0201] The layer thickness of the p-type InAlAs conductive layer 25 is desirably 100 nm or more and 3000 nm or less. The carrier concentration of the p-type InAlAs conductive layer 25 is a high carrier concentration, that is, 5.0×10 17 cm -3 or more, in order to reduce the element resistance. Instead of the p-type InAlAs, the p-type InAlAs conductive layer 25 may have a stacked structure of p-type InP, p-type InGaAs, p-type InGaAsP, or p-type InAlGaAs.

[0202] In addition, while the semiconductor light receiving element 150 shown in FIG. 18 has the n-type electrode 31 provided on the back side, in the semiconductor light receiving element 150a shown in FIG. 19, in addition to the electrode 31b on the back side, the n-type electrode 31a is provided on the front side. That is, in the semiconductor light receiving element 150a, after providing the n-type InP conductive layer 2b on the Fe-doped semi-insulating InP substrate 1a and partially removing each layer above the n-type InP conductive layer 2b after crystal growth, the n-type electrode 31a is formed on the n-type InP conductive layer 2b. Instead of the Fe-doped semi-insulating InP substrate 1a, a p-type InP substrate or an n-type InP substrate may be used.

[0203] <Operation of the semiconductor light receiving element (PD) according to Embodiment 7> The operation of the semiconductor light receiving elements 150 and 150a according to Embodiment 7 will be described below. When forming the p-type InAlAs conductive layer 25 to which a voltage is applied, compared with the semiconductor light receiving element 120 according to Embodiment 3 shown in FIG. 12, since there is no p-type diffusion process accompanied by heat treatment at a high temperature of 400°C or more, the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be prevented. Therefore, it is possible to keep the absorption coefficient high in the i-type InAs / GaAs digital alloy structured light absorption layer 5. On the other hand, similar to Embodiment 3, since the light absorption layer directly under the light receiving portion to which a high electric field is applied is away from the side surface portion of the element, high reliability can be obtained as a semiconductor light receiving element. Therefore, it is possible to achieve both high light receiving sensitivity and high reliability of the semiconductor light receiving element. That is, a semiconductor light receiving element with excellent reliability, that is, a PD can be obtained.

[0204] <Effect of Embodiment 7> According to the semiconductor light-receiving element according to Embodiment 7 above, similar to the semiconductor light-receiving element according to Embodiment 3, since the light absorption layer is away from the side surface portion of the element, a semiconductor light-receiving element with high reliability and operating in a wide response band can be obtained.

[0205] Embodiment 8. FIG. 20 is a cross-sectional view showing the element structure of a surface-incident type APD which is an example of the semiconductor light-receiving element 160 according to Embodiment 8. Further, FIG. 21 is a cross-sectional view showing the element structure of a surface-incident type APD which is an example of the semiconductor light-receiving element 160a according to Embodiment 8.

[0206] <Element Structure of the Semiconductor Light-Receiving Element (APD) According to Embodiment 8> The configuration of the semiconductor light-receiving element 160 according to Embodiment 8 from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6 is the same as that of the semiconductor light-receiving element 110 according to Embodiment 2, so the description thereof is omitted.

[0207] The semiconductor light-receiving element 160 according to Embodiment 8 shown in FIG. 20 includes a configuration from the n-type InP substrate 1 to the i-type InAlGaAs / InAlAs graded layer 6, an n-type InP window layer 11 having a layer thickness of 0.1 to 3.0 μm, a p-type InAlAs conductive layer 25, a p-type InGaAs contact layer 8, an n-type electrode 31 formed on the back surface side of the n-type InP substrate 1, and a p-type electrode 32 formed on the p-type InGaAs contact layer 8.

[0208] The semiconductor light-receiving element 160a according to Embodiment 8 shown in FIG. 21 has the same configuration as the semiconductor light-receiving element 160 according to Embodiment 8, except that an Fe-doped semi-insulating InP substrate 1a is used as the substrate and the n-type electrode 31a is formed on the surface side of the n-type InP conductive layer 2b. Note that the electrode 31b on the back surface side is not for the purpose of passing current but is necessary for fixing the semiconductor light-receiving element with solder.

[0209] The differences between the semiconductor light-receiving elements 160 and 160a according to Embodiment 8 and the semiconductor light-receiving element 110 according to Embodiment 2 are that in the semiconductor light-receiving elements 160 and 160a, a p-type InAlAs conductive layer 25 formed on the n-type InP window layer 11 is formed in a mesa shape, and a p-type InGaAs contact layer 8 and a p-type electrode 32 are provided on the p-type InAlAs conductive layer 25. The n-type InP window layer 11 may have a layer thickness of 50 nm or more, but a layer thickness of 200 nm or less is desirable in order not to increase the carrier transit time. Also, the conductivity type of the n-type InP window layer 11 may be undoped instead of n-type. The carrier concentration in the case of n-type is desirably 5.0×10 17 cm -3 or less.

[0210] As a manufacturing method of the semiconductor light-receiving elements 160 and 160a according to Embodiment 8, a p-type InAlAs conductive layer 25 is crystal-grown on the n-type InP window layer 11 by MOVPE, MBE, or the like, and after further crystal-growing the p-type InGaAs contact layer 8, the p-type InAlAs conductive layer 25 is removed leaving the light-receiving portion. This is the characteristic point.

[0211] The layer thickness of the p-type InAlAs conductive layer 25 is desirably 100 nm or more and 3000 nm or less. The carrier concentration of the p-type InAlAs conductive layer 25 is a high carrier concentration, that is, 5.0×10 17 cm -3 or more, in order to reduce the element resistance. The p-type InAlAs conductive layer 25 may be a laminated structure of p-type InP, p-type InGaAs, p-type InGaAsP, or p-type InAlGaAs instead of p-type InAlAs.

[0212] In addition, while the semiconductor light receiving element 160 shown in FIG. 20 has an n-type electrode 31 provided on the back side, the semiconductor light receiving element 160a shown in FIG. 21 has an n-type electrode 31a provided on the front side in addition to the electrode 31b on the back side. That is, in the semiconductor light receiving element 160a, an n-type InP conductive layer 2b is provided on the Fe-doped semi-insulating InP substrate 1a, and after crystal growth, each layer above the n-type InP conductive layer 2b is partially removed, and then an n-type electrode 31a is formed on the n-type InP conductive layer 2b. Instead of the Fe-doped semi-insulating InP substrate 1a, a p-type InP substrate or an n-type InP substrate may be used.

[0213] <Operation of the semiconductor light receiving element (APD) according to Embodiment 8> The operation of the semiconductor light receiving elements 160 and 160a according to Embodiment 8 will be described below. When forming the p-type InAlAs conductive layer 25 to which a voltage is applied, compared with the semiconductor light receiving element 130 according to Embodiment 4 shown in FIG. 14, since there is no p-type diffusion process accompanied by heat treatment at a high temperature of 400 ° C. or higher, the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be prevented. For this reason, it becomes possible to keep the absorption coefficient high in the i-type InAs / GaAs digital alloy structured light absorption layer 5. On the other hand, similar to Embodiment 4, since the light absorption layer directly under the light receiving portion to which a high electric field is applied is away from the side surface portion of the element, high reliability as a semiconductor light receiving element can be obtained. Therefore, a semiconductor light receiving element, that is, an APD, which can achieve both high light reception sensitivity and high reliability can be obtained.

[0214] <Effect of Embodiment 8> As described above, according to the semiconductor light receiving element according to Embodiment 8, similar to the semiconductor light receiving element according to Embodiment 4, since the light absorption layer is away from the side surface portion of the element, an effect is achieved in that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0215] Modification of Embodiment 8. An example of a surface incident type APD, which is an example of a semiconductor light receiving element according to a modification of Embodiment 8, will be described below.

[0216] The semiconductor light-receiving element according to the modification of Embodiment 8 is structurally different in that the i-type InAlAs multiplication layer 13 in the surface-incident APD, which is an example of the semiconductor light-receiving elements 160 and 160a according to Embodiment 8, that is, the i-type InAlAs multiplication layer with a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0217] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light-receiving element according to the modification of Embodiment 2, the description thereof is omitted.

[0218] <Operation of the semiconductor light-receiving element (APD) according to the modification of Embodiment 8> A surface-incident APD, which is an example of the semiconductor light-receiving element according to the modification of Embodiment 8, can maintain a state with a long dead space length as shown in FIG. 11B without shortening the dead space length, similar to the semiconductor light-receiving element according to the modification of Embodiment 2, for example, as shown in FIG. 11C.

[0219] <Effect of the modification of Embodiment 8> As described above, according to the semiconductor light-receiving element according to the modification of Embodiment 8, and since it has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, there is an effect that a semiconductor light-receiving element with higher reliability, operating in a wide response band, and having high reception sensitivity can be obtained.

[0220] Embodiment 9. FIG. 22 is a cross-sectional view showing the element structure of a surface-incident APD, which is an example of the semiconductor light-receiving element 170 according to Embodiment 9.

[0221] <Element structure of the semiconductor light-receiving element (APD) according to Embodiment 9> A surface-incident type APD which is an example of the semiconductor light receiving element 170 according to Embodiment 9 is characterized in that a separation groove 17 is provided along the outer peripheral portion of the p-type InAlAs conductive layer 25 in the element structure of the surface-incident type APD which is an example of the semiconductor light receiving element 160 according to Embodiment 8.

[0222] The depth of the separation groove 17 is preferably in the range of 2 μm or more and 5 μm or less. Also, the opening width of the separation groove 17 is preferably in the range of 0.5 μm or more and 100 μm or less. The bottom of the separation groove 17 reaches at least the i-type InAs / GaAs digital alloy structured light absorption layer 5. Note that FIG. 22 shows an example in which the bottom of the separation groove 17 reaches halfway through the n-type InAlAs buffer layer 2a. As a method for forming the separation groove 17, either dry etching or wet etching may be used. However, a method in which wet etching is added to remove the damage layer generated by dry etching after dry etching with excellent depth control is preferable.

[0223] The inside of the separation groove 17 and the surface of the n-type InP window layer 11 are protected by a surface protection film 18 composed of an insulating film made of an oxide film such as SiN or SiO2. The surface protection film 18 also serves as an antireflection coating for the light receiving portion. The film thickness of the surface protection film 18 is preferably in the range of 50 nm or more and 5000 nm or less. Also, the surface protection film 18 may be an organic film such as BCB.

[0224] <Operation of the semiconductor light receiving element (APD) according to Embodiment 9> When an InAs / GaAs digital alloy structure is used as the light absorption layer, since the strain of each layer of the InAs / GaAs digital alloy structure is high, disorder is likely to occur when external stress is applied. Therefore, as in the semiconductor light receiving element 170 according to Embodiment 9, by providing the separation groove 17 along the outer periphery of the p-type InAlAs conductive layer 25, the stress across the entire wafer during the manufacturing process can be relaxed. Also, even when in the state of individual semiconductor light receiving elements 170, since the stress is relaxed due to the presence of the separation groove 17, stress concentration at the light receiving portion in the center of the semiconductor light receiving element 170 can be relaxed. As a result, disorder of the digital alloy structure light absorption layer can be prevented, so that the absorption coefficient can be kept high. Further, since the i-type InAs / GaAs digital alloy structure light absorption layer 5 is exposed in the separation groove 17, it is desirable that the above-described surface protection film 18 covers the surface of the separation groove 17. Note that since no high electric field is applied to the separation groove 17, it does not become a starting point of deterioration.

[0225] <Effect of Embodiment 9> As described above, according to the semiconductor light receiving element according to Embodiment 9, since the stress due to heat treatment or the like in the manufacturing process can be relaxed by the separation groove, disorder of the digital alloy structure light absorption layer can be prevented, so that the absorption coefficient can be kept high, and there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0226] Modification of Embodiment 9. An example of a surface incident type APD which is a semiconductor light receiving element according to a modification of Embodiment 9 will be described below.

[0227] The semiconductor light receiving element according to the modification of Embodiment 9 is structurally different in that the i-type InAlAs multiplication layer 13 in a surface incident type APD which is an example of the semiconductor light receiving element 170 according to Embodiment 9, that is, the i-type InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0228] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modification example of Embodiment 2, the description thereof is omitted.

[0229] <Operation of the semiconductor light receiving element (APD) according to the modification example of Embodiment 9> In the semiconductor light receiving element according to the modification example of Embodiment 9, it is not necessary to form the p-type diffusion region 15. That is, since there is no high-temperature heat treatment required for Zn diffusion for forming the p-type diffusion region 15, the disordering of the InAs / AlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, as shown in FIG. 11C, the dead space length does not become short, and it is possible to maintain a state where the dead space length is long as shown in FIG. 11B. As a result, it is possible to keep the ionization rate ratio k almost zero.

[0230] <Effect of the modification example of Embodiment 9> As described above, according to the semiconductor light receiving element according to the modification example of Embodiment 9, it has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and since high-temperature heat treatment is not required, the disordering of the InAs / GaAs digital alloy structure light absorption layer and the InAs / AlAs digital alloy structure multiplication layer can be prevented. Furthermore, since the stress can be relaxed by the presence of the separation groove, there is an effect that a semiconductor light receiving element with higher reliability, operating in a wide response band, and having high reception sensitivity can be obtained.

[0231] Embodiment 10. FIG. 23 is a cross-sectional view showing the element structure of a back-illuminated APD which is an example of the semiconductor light receiving element 170a according to Embodiment 10.

[0232] <Element structure of the semiconductor light receiving element (APD) according to Embodiment 10> In the case of the surface incident type APD which is an example of the semiconductor light receiving element 170 according to Embodiment 9, light is received from the surface side as shown in FIG. 22. On the other hand, in the case of the back incident type APD which is an example of the semiconductor light receiving element 170a according to Embodiment 10, as shown in FIG. 23, a part of the n-type electrode 31c on the back surface side is removed to provide an opening 33, and light is incident on the n-type InP substrate 1 through an antireflection coating film 35 formed so as to cover the opening 33. That is, an opening 33 covered with an antireflection coating film 35 which is an incident region of incident light 90 is provided on the back surface of the n-type InP substrate 1 facing the p-type electrode 32. Further, the central part of the p-type InGaAs contact layer 8 is partially removed, and a surface protection film 18 made of an insulating film such as an oxide film of SiN or SiO2 is formed on the exposed p-type InAlAs conductive layer 25, and further covered with the p-type electrode 32, thereby increasing the reflectance of light from the p-type electrode 32.

[0233] A back incident type APD which is an example of the semiconductor light receiving element 170a according to Embodiment 10, like the semiconductor light receiving element 170 according to Embodiment 9, can relieve stress due to heat treatment in the manufacturing process by a separation groove, and thus can prevent the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5.

[0234] In addition, since the area of the p-type InAlAs conductive layer 25 can be made smaller in the back incident type APD such as the semiconductor light receiving element 170a than in the surface incident type APD, it is possible to further reduce the stress due to heat treatment in the manufacturing process, etc., and thus further prevent the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5. As a result, even when a heat treatment process is carried out during the formation of the element structure, the disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be prevented, and thus a semiconductor light receiving element with high reliability, wideband operation, and excellent low-noise characteristics can be obtained.

[0235] In addition, as described above, since the reflectivity of light from the p-type electrode 32 is increased, the light transmitted through the i-type InAs / GaAs digital alloy structured light absorption layer 5 without being absorbed is reflected by the p-type electrode 32 and returns to the i-type InAs / GaAs digital alloy structured light absorption layer 5 again, thereby increasing the sensitivity. As a result, since the i-type InAs / GaAs digital alloy structured light absorption layer 5 can be made thinner, the transit times of electrons and holes can be shortened, and thus a semiconductor light receiving element capable of further broadening the response band can be obtained.

[0236] Furthermore, in a back-illuminated APD such as the semiconductor light receiving element 170a, since the area of the p-type InAlAs conductive layer 25 formed in a mesa shape can be reduced compared to the case of a front-illuminated APD, the influence of stress from the mesa portion of the p-type InAlAs conductive layer 25 is reduced, and thus disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 does not occur. Also, since stress is relaxed even during the operation of the semiconductor light receiving element 170a, disordering of the i-type InAs / GaAs digital alloy structured light absorption layer 5 does not occur even after a long period. As a result, it becomes possible to maintain a high absorption coefficient as the light absorption layer. That is, the semiconductor light receiving element 170a according to Embodiment 10 can operate with a wide response band over a long period and can maintain high light receiving sensitivity.

[0237] <Effects of Embodiment 10> As described above, according to the semiconductor light receiving element according to Embodiment 10, since the area of the p-type conductive layer can be made small, it becomes possible to further reduce the stress generated in the heat treatment process, so that further prevention of disordering of the i-type InAs / GaAs digital alloy structured light absorption layer can be achieved. Since the stress can be further reduced by the isolation groove, there is an effect that a semiconductor light receiving element that operates with a wide response band, has high reception sensitivity, and has high reliability can be obtained.

[0238] Modification of Embodiment 10. An example of a semiconductor light receiving element according to a modification of Embodiment 10, a front-illuminated APD, will be described below.

[0239] The semiconductor light receiving element according to the modification of Embodiment 10 is structurally different in that the i-type InAlAs multiplication layer 13 in the surface incident type APD, which is an example of the semiconductor light receiving element 170a according to Embodiment 10, that is, the i-type InAlAs multiplication layer having a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0240] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light receiving element according to the modification of Embodiment 2, the description thereof is omitted.

[0241] <Operation of the semiconductor light receiving element (APD) according to the modification of Embodiment 10> In the semiconductor light receiving element according to the modification of Embodiment 10, there is no need to form the p-type diffusion region 15, that is, since there is no high-temperature heat treatment required for Zn diffusion for forming the p-type diffusion region 15, the disordering of the InAs / AlAs digital alloy structure multiplication layer can be prevented. Therefore, for example, as shown in FIG. 9C, the dead space length does not become short, and it is possible to maintain a state where the dead space length is long as shown in FIG. 9B. As a result, the ionization rate ratio k can be kept almost zero.

[0242] <Effect of the modification of Embodiment 10> As described above, according to the semiconductor light receiving element according to the modification of Embodiment 10, it has a digital alloy structure multiplication layer in which the layer thickness is controlled within a preset range, and since high-temperature heat treatment is not required, the disordering of the InAs / GaAs digital alloy structure light absorption layer and the InAs / AlAs digital alloy structure multiplication layer can be prevented. Furthermore, since the stress can be relaxed by the presence of the separation groove, there is an effect that a semiconductor light receiving element that operates in a wide response band, has high reception sensitivity, and is more reliable can be obtained.

[0243] Embodiment 11. FIG. 24 is a cross-sectional view showing the element structure of a back surface incident type APD, which is an example of the semiconductor light receiving element 180 according to Embodiment 11.

[0244] <Element Structure of Semiconductor Light-Receiving Element (APD) According to Embodiment 11> The semiconductor light-receiving element 180 according to Embodiment 11 includes an Fe-doped semi-insulating InP substrate 1a, and a p-type InAlGaAs contact layer 40 having a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1 μm, a p-type InP conductive layer 41 having a carrier concentration of 1 to 5×10 18 cm -3 and a layer thickness of 0.1 to 1 μm, an n-type or i-type InAlGaAs / InAlAs graded layer 42 that is p-type or has a low carrier concentration (5×10 17 cm -3 or less), an i-type InAs / GaAs digital alloy structure light absorption layer 43 formed by alternately laminating a plurality of i-type InAs layers (for example, a layer thickness of 2 atomic layers, about 0.6 nm) and i-type GaAs layers (for example, a layer thickness of 2 atomic layers, about 0.6 nm) having a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 2000 nm, a p-type InP electric field relaxation layer 44 having a carrier concentration of 1×10 17 cm -3 to 5×10 18 cm -3 and a layer thickness of 10 to 100 nm, an i-type InAlAs multiplication layer 45 having a carrier concentration of 1×10 17 cm -3 or less and a layer thickness of 50 to 500 nm, an n-type InAlAs electric field adjustment layer 46 having a layer thickness of 10 to 50 nm, an n-type InP window layer 47 having a layer thickness of 0.1 to 2 μm, a carrier concentration of 5×10 17 to 8×10 18 cm -3 and a layer thickness of 0.1 to 2 μm, an n-type InAlAs conductive layer 49 having a carrier concentration of 5×10 17 to 8×10 18 cm -3An n-type InGaAs contact layer 50 with a layer thickness of 0.1 to 2 μm, an n-type electrode 51 formed on the n-type InGaAs contact layer 50, a p-type electrode 52 formed on the p-type InAlGaAs contact layer 40, a metal film 53 formed on the back side of the Fe-doped semi-insulating InP substrate 1a, and an antireflection coating film 35 provided in the opening 33 of the metal film 53.

[0245] Note that the p-type InAlGaAs contact layer 40 and the p-type InP conductive layer 41 are also referred to as p-type semiconductor layers. Further, the central portion of the n-type InGaAs contact layer 50 is partially removed, and a surface protection film 18 composed of an insulating film made of an oxide film such as SiN or SiO2 is formed on the exposed n-type InAlAs conductive layer 49, and then covered with the n-type electrode 51, thereby increasing the reflectance of light from the n-type electrode 51.

[0246] <Manufacturing method of semiconductor light receiving element (APD) according to Embodiment 11> The manufacturing method of the semiconductor light receiving element 180 according to Embodiment 11 will be described below. Using MOVPE or MBE, a p-type InAlGaAs contact layer 40 with a carrier concentration of 1 to 5×10 18 cm -3 is crystal-grown on the Fe-doped semi-insulating InP substrate 1a with a layer thickness of 0.1 to 1 μm. Here, an n-type InP substrate may be used instead of the Fe-doped semi-insulating InP substrate 1a. Further, the p-type InAlGaAs contact layer 40 may be p-type InP, p-type InGaAsP, or p-type InGaAs instead of p-type InAlGaAs.

[0247] On the p-type InAlGaAs contact layer 40, a p-type InP conductive layer 41 with a carrier concentration of 1 to 5×10 18 cm -3 is crystal-grown with a layer thickness of 0.1 to 1 μm. Here, the p-type InP conductive layer 41 may be p-type InGaAsP or p-type InAlGaAs instead of p-type InP.

[0248] Next, an i-type, n-type, or p-type InAlAs layer with a small barrier for holes may be provided on the p-type InP conductive layer 41. Further, after crystal-growing an n-type or i-type InAlGaAs / InAlAs graded layer 42 with a p-type or low carrier concentration (5×10 17 cm -3 or less), an i-type InGaAs light absorption layer 43 is crystal-grown with a layer thickness of 0.1 to 2 μm. Also, the i-type InAs / GaAs digital alloy structure light absorption layer 43 may be n-type or p-type with a low carrier concentration (5×10 17 cm -3 or less) instead of i-type. Here, either one or both of the p-type InP conductive layer 41 and the n-type InAlGaAs / InAlAs graded layer 42 are not necessarily required.

[0249] Next, a p-type InP electric field relaxation layer 44 with a carrier concentration of 1×10 17 to 5×10 18 cm -3 is crystal-grown with a layer thickness of 10 to 100 nm. Examples of the p-type dopant for the p-type InP electric field relaxation layer 44 include Be, Zn, C, etc. The p-type InP electric field relaxation layer 44 does not necessarily have to be p-type InP, and a p-type InAlAs or p-type InAs / AlAs digital alloy structure may also be used.

[0250] Also, an InAlGaAs / InAlAs graded layer with a layer thickness of 10 to 100 nm having an intermediate bandgap value, such as InAlGaAs or InGaAsP, may be provided between the i-type InAs / GaAs digital alloy structure light absorption layer 43 and the p-type InP electric field relaxation layer 44.

[0251] On the p-type InP electric field relaxation layer 44, an i-type InAlAs multiplication layer 45 and an n-type InAlAs electric field adjustment layer 46 are crystal-grown as multiplication layers. The n-type InAlAs electric field adjustment layer 46 is provided to prevent the electric field from being applied too much to the outermost n-type InP window layer 47, which may increase the dark current or reduce the reliability. An n-type InP window layer 47 is crystal-grown on the n-type InAlAs electric field adjustment layer 46.

[0252] The i-type InAs / GaAs digital alloy structured light absorption layer 43 is composed of a semiconductor layer in which InAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) and GaAs layers (layer thickness: 2 atomic layers, approximately 0.6 nm) are alternately laminated in this order from the Fe-doped semi-insulating InP substrate 1a side. The i-type InAs / GaAs digital alloy structured light absorption layer 43 may be formed in the order of GaAs layer and InAs layer.

[0253] The number of atomic layers of each layer of the i-type InAs / GaAs digital alloy structured light absorption layer 43 is preferably 2 or more and 4 or less atomic layers, and 2 atomic layers are most optimal. This is because the thinner the atomic layer thickness of each layer, the greater the reduction effect of the ionization rate ratio k due to the digital alloy structure.

[0254] The layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 43 is within the range of 50 nm to 2 μm. For example, when the layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 43 is 500 nm, the repetition of InAs layer (2 atomic layers) / GaAs layer (2 atomic layers) is 417 times. Fig. 8 shows the case of the multiplication layer, and when the reciprocal of the applied electric field is 1.47×10 -6 cm / V, the dead space is about 80 nm, but the applied electric field in the light absorption layer of the PD or APD is one digit smaller. That is, considering that the reciprocal of the applied electric field is about 1.47×10 -5 cm / V, since the dead space effect becomes prominent at a layer thickness of generally 800 nm or less, the most suitable range for the layer thickness of the i-type InAs / GaAs digital alloy structured light absorption layer 43 is 800 nm or less. Also, if the layer thickness is 1600 nm or less, since the electron traveling speed is fast at a distance of 800 nm which is 50% or more of the layer thickness, a large dead space effect can also be obtained within the layer thickness range of 1600 nm or less.

[0255] The conduction type of the i-type InAs / GaAs digital alloy structured light absorption layer 43 is i-type, and the carrier concentration is 1×10 17 cm -3 or less. However, it may be p-type or n-type with a carrier concentration of 5×10 18 cm -3 or less.

[0256] On the n-type InP window layer 47, an n-type InAlAs conductive layer 49 is crystal-grown as an n-type conductive layer, and an n-type InGaAs contact layer 50 is crystal-grown as an n-type contact layer. The layer thicknesses of the n-type InAlAs conductive layer 49 and the n-type InGaAs contact layer 50 are each 0.1 to 2 μm, and the carrier concentrations are each 5×10 17 cm -3 ~8×10 18 cm -3 respectively.

[0257] After the crystal growth of the n-type InGaAs contact layer 50, the n-type InAlAs conductive layer 49 and the n-type InGaAs contact layer 50 are etched into a mesa shape to form a first mesa. Then, etching is performed so as to reach the p-type InAlGaAs contact layer 40 so as to include the first mesa outside the first mesa to form a second mesa. Even if the second mesa does not reach the p-type InAlGaAs contact layer 40, it is sufficient that the i-type InAs / GaAs digital alloy structure light absorption layer 43 can be electrically separated. It is preferable that the distance between the first mesa and the second mesa is 1 μm or more apart. Also, the first mesa may be formed after the second mesa is formed first.

[0258] The p-type electrode 52 is formed on the p-type InAlGaAs contact layer 40, and the n-type electrode 51 is formed on the n-type InGaAs contact layer 50. Note that in the case of an n-type semiconductor, since the ohmic resistance is one digit smaller than that of a p-type semiconductor, it is not always necessary to use the n-type InGaAs contact layer 50 with a small bandgap, and n-type InP, n-type InAlAs, or n-type InGsAsP may be used. Alternatively, contact may be directly made with the n-type InAlAs conductive layer 49. Through the above steps, the semiconductor light receiving element 180 according to Embodiment 11 is completed.

[0259] <Operation and Effect of the Semiconductor Light Receiving Element (APD) According to Embodiment 11> The semiconductor light-receiving element 180 according to Embodiment 11 is characterized in that, in the semiconductor light-receiving element 170a according to Embodiment 10, the conductivity types of the n-type and p-type are respectively inverted, and the conductivity type of the upper surface side is n-type.

[0260] The first actions and effects of the semiconductor light-receiving element 180 according to Embodiment 11 will be described below. During epitaxial crystal growth, since it is held at a high temperature for a long time, if a p-type dopant diffuses from the p-type InP electric field relaxation layer 44 to the i-type InAs / GaAs digital alloy structure light absorption layer 43, there is a risk of disorder. In the semiconductor light-receiving element 180 according to Embodiment 11, compared with the semiconductor light-receiving element 170a according to Embodiment 10, the total layer thickness of the semiconductor layers above the p-type InP electric field relaxation layer 44 is about one-third thinner. That is, in the semiconductor light-receiving element 180 according to Embodiment 11, the crystal growth time required for epitaxial crystal growth of the remaining semiconductor layers after growing the p-type InP electric field relaxation layer 44 is about half as short as that of the semiconductor light-receiving element 130a according to Embodiment 4. Therefore, the disordering of the i-type InAs / GaAs digital alloy structure light absorption layer 43 is less likely to occur.

[0261] The second actions and effects of the semiconductor light-receiving element 180 according to Embodiment 11 will be described below. The upper electrode of the semiconductor light-receiving element, that is, the surface-side electrode, is the p-type electrode 32 in the back-illuminated APD shown in FIG. 23 and the n-type electrode 51 in the back-illuminated APD shown in FIG. 24. For high-speed operation, it is necessary to further reduce the electrode area of the surface-side electrode to reduce the capacitance. However, when the electrode area of the upper electrode is reduced, the contact resistance between the electrode and the semiconductor layer increases, resulting in a problem that the RC time constant increases and the response bandwidth becomes narrow.

[0262] In the semiconductor light-receiving element 180 according to Embodiment 11, since the upper electrode, that is, the n-type electrode 51 is in contact with the n-type semiconductor, the ohmic resistance is reduced to one-tenth compared to the contact between the p-type electrode and the p-type semiconductor. Therefore, the area of the n-type electrode 51 can be reduced, and the stress from the electrode is reduced, resulting in an effect that disorder is less likely to occur in the i-type InAs / GaAs digital alloy structure light absorption layer 43. In the above description, the case of an APD has been described as an example of the semiconductor light-receiving element 180 according to Embodiment 11. However, in the case of a PD as well, for example, an element structure in which the conductivity types of the n-type and p-type are inverted in the semiconductor light-receiving element 150 according to Embodiment 7 may be used.

[0263] <Effect of Embodiment 11> As described above, according to the semiconductor light-receiving element according to Embodiment 11, the crystal growth time required for epitaxial crystal growth of the remaining semiconductor layers after growing the p-type InP electric field relaxation layer is about half as short as that of the semiconductor light-receiving element according to Embodiment 10. Therefore, disorder in the InAs / GaAs digital alloy structure light absorption layer is less likely to occur, resulting in a semiconductor light-receiving element with high reliability, broadband operation, and excellent low-noise characteristics. Also, as described above, since the reflectivity of light from the n-type electrode 51 is increased, the light transmitted through the i-type InAs / GaAs digital alloy structure light absorption layer 43 without being absorbed is reflected by the n-type electrode 51 and returns to the i-type InAs / GaAs digital alloy structure light absorption layer 43 again, increasing the light reception sensitivity. As a result, the i-type InAs / GaAs digital alloy structure light absorption layer 43 can be made thinner, shortening the transit time of electrons and holes, and resulting in a semiconductor light-receiving element capable of further broadening the response bandwidth.

[0264] Modification of Embodiment 11. An example of a semiconductor light-receiving element according to a modification of Embodiment 11, a surface-incident type APD and a backside-incident type APD, will be described below.

[0265] The semiconductor light-receiving element according to the modification of Embodiment 11 is structurally different in that the i-type InAlAs multiplication layer 45 in the surface-incident APD and the back-surface incident APD, which are examples of the semiconductor light-receiving element 180 according to Embodiment 11, that is, the i-type InAlAs multiplication layer with a random alloy structure, is replaced with an i-type InAs / AlAs digital alloy structure multiplication layer.

[0266] Regarding the layer structure and layer thickness of the i-type InAs / AlAs digital alloy structure multiplication layer, since they are the same as those of the i-type InAs / AlAs digital alloy structure multiplication layer of the semiconductor light-receiving element according to the modification of Embodiment 2, the description is omitted.

[0267] <Operation of the semiconductor light-receiving element according to the modification of Embodiment 11> In the semiconductor light-receiving element (APD) according to the modification of Embodiment 11, the crystal growth time required for epitaxial crystal growth of the remaining semiconductor layers after growing the i-type InAs / AlAs digital alloy structure multiplication layer is about one-third shorter than that of the semiconductor light-receiving element 150 according to Embodiment 7. Therefore, disordering of the i-type InAs / AlAs digital alloy structure multiplication layer is less likely to occur.

[0268] <Effect of the modification of Embodiment 11> As described above, according to the semiconductor light-receiving element according to the modification of Embodiment 11, it has a digital alloy structure multiplication layer whose layer thickness is controlled within a preset range, and the crystal growth time required for epitaxial crystal growth of the remaining semiconductor layers after growing the i-type InAs / AlAs digital alloy structure multiplication layer is shorter than that of an element structure with the opposite conductivity type. Therefore, disordering of the InAs / GaAs digital alloy structure light absorption layer and the i-type InAs / AlAs digital alloy structure multiplication layer can be prevented, and thus a semiconductor light-receiving element with higher reliability, operating in a wider response band, and having excellent low-noise characteristics can be obtained.

[0269] Embodiment 12. FIG. 25 is a configuration diagram showing an optical line terminal device (OLT) 260 of a 50G-PON system according to Embodiment 12. The optical line terminal device 260 includes a FEC 261 (Forward Error Correction: FEC), a driver amplifier 262, a light source 263, a WDM 264 (Wavelength Division Multiplexing: WDM), a CDR 265 (Clock Data Recovery) which is a clock data recovery circuit, a limiting amplifier 266, a burst TIA 267, and a DA-APD 268 of the present disclosure. Note that a DA-PD of the present disclosure may be applied instead of the DA-APD 268 of the present disclosure.

[0270] Note that the DA-APD of the present disclosure refers to an APD in which the optical absorption layer has an InAs / GaAs digital alloy structure or an APD in which the optical absorption layer has an InAs / GaAs digital alloy structure and the multiplication layer has an InAs / AlAs digital alloy structure, as described in each of the above embodiments. Further, the DA-PD of the present disclosure refers to a PD in which the optical absorption layer has an InAs / GaAs digital alloy structure, as described in each of the above embodiments.

[0271] FIG. 26 is a configuration diagram showing an optical network unit (ONU) of a 50G-PON system according to Embodiment 12. The optical network unit 270 includes a WDM 271, a light source 272, a driver amplifier 273, a FEC 274, a DA-APD 275 of the present disclosure, a TIA 276, a limiting amplifier 277, and a CDR 278.

[0272] FIG. 27 is a configuration diagram showing an optical line terminal device (OLT) 250a of a 50G-PON system which is a comparative example. The optical line terminal device 250a which is a comparative example includes a FEC 251 (Forward Error Correction: FEC) which is a forward error correction circuit, a driver amplifier 252, a light source 253, a WDM 254 (Wavelength Division Multiplexing: WDM) which is a wavelength division multiplexer / demultiplexer, a DSP 255 which is a digital signal processing circuit, an ADC 256 (Analog-to-Digital Converter: ADC) which is an analog / digital conversion circuit, a burst TIA 257 (Trance Impedance Amplifier), and a conventional APD 258.

[0273] In a 50G-PON system which is a comparative example, like the optical line terminal device 250a of the 50G-PON system which is a comparative example shown in FIG. 27, digital band compensation, that is, a DSP 255 was necessary. On the other hand, in a 50G-PON system using the DA-APD of the present disclosure, digital band compensation becomes unnecessary. That is, like the optical network unit (ONU) of the 50G-PON system according to Embodiment 12 shown in FIG. 26, by using the DA-APD of the present disclosure, that is, an APD having at least an InAs / GaAs digital alloy structure optical absorption layer, a wide response band and high reception sensitivity become possible, so that simplification and power saving of the DSP circuit, and reduction of the output power of the SOA become possible.

[0274] In order to achieve multi-branching of the PON system and omission of the SOA, it is necessary to improve the SN ratio of the receiver and increase the reception sensitivity. For example, in order to increase the number of branches more than the current situation, if one stage of an optical demultiplexer is added, the amount of light becomes half, so it is necessary to improve the SN ratio by at least 3 dB. The SN ratio of a receiver using an APD is represented by the following formula (14). SN ratio = Iph 2 ·M 2 / (2q(Iph + Id)M 2 ·F·B + 4Kb·T·Ft·B / Rt) (14)

[0275] In Equation (14), Iph represents the photocurrent of the APD, M represents the multiplication factor, q represents the unit charge, Id represents the multiplied dark current, F represents the excess noise factor of the APD, B represents the bandwidth, Kb represents the Boltzmann constant, T represents the absolute temperature, Ft represents the noise figure of the amplifier, and Rt represents the input resistance. The left term in the denominator represents the shot noise of the APD, and the right term in the denominator represents the thermal noise of the amplifier.

[0276] To simplify Equation (14), assuming that Id is much smaller than Iph and in the case of the multiplication factor at which the SNR is maximized, the shot noise term of the APD and the thermal noise term of the amplifier are equal, and replacing the thermal noise term of the amplifier with the shot noise term of the APD, the SNR is expressed by the following Equation (15). SNR = Iph / (4q·F·B) (15)

[0277] Also, the excess noise factor F is given by the following Equation (16). F = M(1 - (1 - k)·((M - 1) 2 / M 2 )) (16)

[0278] In the case of a conventional InAlAs random alloy structure multiplication layer, due to the influence of the tunnel current as described above, it is difficult to thin the layer (about 70 nm) until the dead space effect appears, so there is no application example to the APD. For this reason, the ionization rate ratio k in the case of an unthinned InAlAs multiplication layer is set to 0.2, and the system design is carried out. When the ionization rate ratio k = 0.2 and the multiplication factor is 12 times, the excess noise factor F = 3.9.

[0279] On the other hand, in the 50G-PON system according to Embodiment 12, an APD having an InAs / AlAs digital alloy structure as a multiplication layer, that is, the DA-APD of the present disclosure, is applied as a semiconductor light receiving element. In the case of the InAs / AlAs digital alloy structure multiplication layer of the present disclosure, since the dead space effect functions even with a layer thickness of 100 nm or more, it can be applied to an APD. In this case, the ionization rate ratio k = 0, and when the multiplication factor is 12 times, the excess noise factor F = 1.9. Therefore, the excess noise is about half that of a conventional APD. As a result, if the DA-APD of the present disclosure is applied, the signal-to-noise ratio is improved by 3 dB.

[0280] Generally, in a 50G-PON system, when a 2-way optical splitter is inserted in one stage to increase the number of branches, the 3 dB loss becomes large. Therefore, when the DA-APD of the present disclosure is applied as a semiconductor light receiving element, it becomes possible to insert one more stage of optical splitter into the 50G-PON system.

[0281] FIG. 28 is a diagram showing the configuration of an optical line terminal device (OLT) of a 50G-PON system according to Embodiment 12. The optical line terminal device 260a of the 50G-PON system includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a burst TIA 267, and the DA-APD 268 of the present disclosure. Note that the DA-PD of the present disclosure may be applied instead of the DA-APD 268 of the present disclosure.

[0282] FIG. 29 is a diagram showing the configuration of an optical network unit (ONU) of a 50G-PON system according to Embodiment 12. The optical network unit 260b of the 50G-PON system includes an FEC 261, a driver amplifier 262, a light source 263, a WDM 264, a DSP 265a, an ADC 266a, a TIA 267a, and the DA-APD 268 of the present disclosure.

[0283] The effects of the semiconductor light receiving element according to the present disclosure will be further described. Among the DA-APDs of the present disclosure, the APD having an InAs / AlAs digital alloy structure multiplication layer controls the layer thickness of the multiplication layer within a preset range to make the ionization rate ratio k zero, so that the multiplication time in Equation (5) becomes almost zero. As a result, even if the multiplication factor is increased, the response bandwidth of the APD does not deteriorate. That is, in the DA-APD of the present disclosure, similar to the conventional PD, the response bandwidth is limited only by the RC time constant and the carrier transit time. Therefore, it is possible to broaden the response bandwidth required for the 50G-PON system, and it is possible to receive without digital band compensation by the DSP.

[0284] Also, when the ionization rate ratio k approaches zero, excess noise that deteriorates the reception sensitivity is suppressed, so that optical signal amplification by the SOA becomes unnecessary. Furthermore, even in PON systems other than the 50G-PON system, more branching becomes possible than before. As a result, low cost and power saving of the PON system can be realized.

[0285] <Effects of Embodiment 12> As described above, according to the optical line terminal device according to Embodiment 12, since the DA-APD or DA-PD of the present disclosure is used as the semiconductor light receiving element, there is an effect that an optical line terminal device capable of increasing the transmission distance of an optical signal and reducing power consumption can be obtained.

[0286] Embodiment 13. FIG. 30 is a diagram showing the configuration of a multi-value intensity modulation transceiver 300 according to Embodiment 13. FIGS. 31A and 31B are diagrams showing the reception waveforms of the multi-value intensity modulation transceiver 300 according to Embodiment 13.

[0287] The multi-value intensity modulation transceiver 300 is a multi-value intensity modulation transceiver using the PAM (Pulse Amplitude Modulation) method, which is a multi-value intensity modulation method. In the transmission unit, the digital signal generated in the DSP 301 is converted into an analog signal in the DAC 302a, amplified in the driver amplifier 303, and the light source 304 composed of a DFB laser or an EML is driven to emit an optical signal to the optical fiber cable 310.

[0288] On the other hand, in the receiving unit, it is incident on the DA-APD 305, which is a semiconductor light receiving element of the present disclosure, from the optical fiber cable 310 via an optical system, converts and multiplies the optical signal into an electric current, and further amplifies it in the Linear-TIA 306, and then converts it into a digital signal in the ADC 302b, and the DSP 301 performs signal processing. Note that instead of the DA-APD 305 of the present disclosure, the DA-PD of the present disclosure may be used.

[0289] <Operation and Effect of Multi-Value Intensity Modulation Transceiver According to Embodiment 13> In the multi-value intensity modulation transceiver 300 using the PAM method, not only binary signals of 1 and 0 such as NRZ (Non-Return to Zero) and RZ (Return to Zero), but also, for example, in PAM4 (Pulse Amplitude Modulation-4), it is necessary to receive four values with different optical signal intensities. An example of the received waveform of PAM4 is shown in FIG. 31A. For determining the quality of the received waveform in PAM4, an index called TDECQ (Transmitter Dispersion and Eye Closure Quaternary) is used. TDECQ is calculated by the following formula (17). TDECQ(dB)=10·log(OMA / (6·Qt·R)) (17)

[0290] In formula (17), the optical modulation amplitude (OMA) is the total amplitude from level 0 to level 3, Qt is a value depending on the SER (Symbol Error Rate) defined by the IEEE (Institute of Electrical and Electronics Engineers), and R is the additional noise value required to obtain the SER value. TDECQ(dB) is defined to be, for example, 3 dB or less. In order to reduce TDECQ(dB), (1) the eye openings of each level are uniform (2) there is little noise in each level is necessary.

[0291] For each level of eye opening consisting of four values with different optical signal intensities to be uniform, the semiconductor light-receiving element needs to have excellent linearity. Here, good linearity of the semiconductor light-receiving element means that the photocurrent Iph increases in proportion to the optical input power Pin. That is, even if the optical input power Pin changes, if Iph / Pin is constant, it can be said that the linearity is good.

[0292] Also, in PAM, since it is necessary to receive signals from those with low intensity to those with high intensity, it is necessary to have excellent dynamic range. That is, even if the optical input power Pin increases, if the decrease amount of Iph / Pin is small, it can be said that the dynamic range is good. As shown in the received waveform of FIG. 31B, when the linearity and the dynamic range deteriorate, the eye opening formed between level 2 and level 3 deteriorates.

[0293] In the case of PD and APD, as a cause of deterioration of linearity, when the photocurrent increases with the increase of optical input, the number of holes and electrons traveling in the multiplication layer and the optical absorption layer increases, and the electric field distribution in the multiplication layer and the optical absorption layer changes. Such a phenomenon is called the space charge effect.

[0294] The inventors studied a model in which the linearity of APD deteriorates. FIGS. 32A and 32B are diagrams for explaining the operation of PD at high optical input. As shown in FIG. 32A, when the optical input increases and the photocurrent increases, the space charge effect acts as if a voltage drop due to the series resistance occurs and no voltage is applied to the pn junction. The multiplication factor decreases due to this voltage drop. This is because, as shown in FIG. 32B, the generated electrons and holes affect the electric field distribution. The series resistance Rli that deteriorates the linearity of APD is expressed as the following formula (18). Rli = Rsc + Rd + Rlo (18)

[0295] In Equation (18), Rsc is the resistance due to the space charge effect, Rd is the device resistance, and Rlo is the load resistance. Rd and the load resistance are usually on the order of several tens of ohms, but Rsc can be several hundred ohms or more.

[0296] Let Td be the time for electrons and holes generated by light absorption to pass through the depletion layer. The inventors have found that Rsc is expressed by the following Equation (19). Rsc = W·Td / (2εS) (19) In Equation (19), W is the layer thickness of the depletion layer, ε is the dielectric constant, and S is the pn junction area. The resistance Rsc due to the space charge effect is proportional to the time Td for electrons and holes to pass through the depletion layer. Therefore, it is possible to reduce the resistance Rsc by increasing the traveling speeds of electrons and holes to reduce Td.

[0297] In the PD and APD having at least the InAs / GaAs digital alloy structure light absorption layer of the present disclosure, since the absorption coefficient of the light absorption layer is high, it is possible to make the light absorption layer thinner, and the resistance Rsc can be reduced by thinning the light absorption layer. As a result, the eye opening becomes uniform, so that TDECQ satisfies the specified value. Furthermore, it becomes possible to increase the transmission distance or reduce the drive current of the transmission laser.

[0298] Among the DA-APDs of the present disclosure, the case where both the light absorption layer and the multiplication layer use an APD having a digital alloy structure will be described below. First, the operation of the APD in the case of high-light input will be described. FIG. 33 is a diagram for explaining the operation of the APD at high-light input. When a large number of electrons and holes are generated in the multiplication layer, in the APD, the electric field in the multiplication layer changes, that is, a so-called space charge effect occurs. Due to the occurrence of this space charge effect, the multiplication factor of the APD decreases and the linearity deteriorates. As described above, since the deterioration of the linearity of the APD is caused by the series resistance Rsc, it is necessary to reduce the residence time Tdm of electrons and holes in the depletion layer. In particular, when the multiplication factor increases, the residence time Tdm in the multiplication layer increases. Tdm is the same as the so-called multiplication time and is expressed by the following formula (20). Residence time Tdm = Multiplication time = 2πNkMτav (20)

[0299] In formula (20), N is the Emmons coefficient (which depends gently on the ionization rate ratio k), M is the multiplication factor, and τav is the average time for electrons and holes to travel through the multiplication layer. The passing time for one-way travel of carriers across the multiplication layer is excluded from the residence time Tdm. N becomes 0.55, 0.83, 1.1, and 2.0 when the ionization rate ratio k = 0.5 (InP), 0.2 (InAlAs), 0.1 (Si), and 0 to 0.001 (InAs / AlAs digital alloy structure), respectively.

[0300] FIG. 34 shows the residence times Tdm of electrons and holes for each material constituting the multiplication layer. In the InAs / AlAs digital alloy structure multiplication layer, the residence time Tdm in the multiplication layer decreases epoch-makingly. That is, since electrons and holes are discharged from the multiplication layer quickly, the space charge effect in the multiplication layer is suppressed. As a result, the linearity and dynamic range are improved in the InAs / AlAs digital alloy structure multiplication layer.

[0301] As a result, in the conventional APD, the eye opening of PAM4 was non-uniform as shown in Fig. 31B, but in the DA-APD of the present disclosure, the eye opening becomes uniform as shown in Fig. 31A, so that TDECQ can satisfy the specified value. Therefore, when the DA-APD of the present disclosure is used, an APD can also be used in a transceiver for PAM, so that the transmission distance of an optical signal can be increased or the drive current of a transmission laser can be reduced.

[0302] <Effect of Embodiment 13> As described above, according to the multi-valued intensity modulation transceiver apparatus according to Embodiment 13, since the DA-APD or DA-PD of the present disclosure is used as the semiconductor light receiving element, there is an effect that a multi-valued intensity modulation transceiver apparatus capable of increasing the transmission distance of an optical signal and reducing power consumption can be obtained.

[0303] Embodiment 14. Fig. 35 is a schematic diagram showing the configuration of an optical fiber radio system 400 (Radio on fiber: RoF) according to Embodiment 14. Fig. 36 is a schematic diagram showing the configuration of a comparative example optical fiber radio system 450. The optical fiber radio system 400 includes a light source 401, a transmission path 402 such as an optical fiber cable, the DA-APD 403 of the present disclosure, and an antenna 404. Note that the DA-PD of the present disclosure may be used instead of the DA-APD 403 of the present disclosure.

[0304] In the optical fiber radio system 400 according to Embodiment 14, an analog electrical amplitude signal is input to a light source 401 such as an LD and converted into an optical amplitude signal. The converted optical amplitude signal is transmitted by an optical fiber cable, that is, a transmission path 402. The transmitted optical amplitude signal is multiplied using the DA-APD 403 of the present disclosure and converted into an electrical amplitude signal. The converted electrical amplitude signal is transmitted to the antenna 404 and radiated as a radio wave signal.

[0305] The optical fiber wireless system 400 according to Embodiment 14 can efficiently supply a signal toward the antenna 404 that is far from the electrical signal source. Further, since the conversion from analog to digital or from digital to analog is not performed during transmission, the system configuration is simple and the power consumption is small.

[0306] <Operation and Effect of the Optical Fiber Wireless System According to Embodiment 14> In the optical fiber wireless system 450 of the comparative example shown in FIG. 36, since the signal is attenuated during transmission through the optical fiber cable and cannot be multiplied by the PD 406, there is a problem that a sufficient radio wave signal cannot be radiated from the antenna.

[0307] Further, when a conventional APD is used, as shown in FIGS. 32A and 32B, when the electrons and holes in the multiplication layer increase, the electric field distribution changes, so the multiplication factor saturates and the dynamic range cannot be ensured. For this reason, there has been a problem that not only a sufficient amplitude of the electrical signal cannot be obtained, but also the analog signal is distorted. As a result, it has been difficult to apply a conventional APD to an optical fiber wireless system 450 as in the comparative example.

[0308] On the other hand, in the PD or APD having at least the InAs / GaAs digital alloy structure light absorption layer of the present disclosure used in the optical fiber wireless system 400 according to Embodiment 14, since the absorption coefficient of the light absorption layer is high, the light absorption layer can be made thin, and the resistance Rsc can be reduced by thinning the light absorption layer. As a result, a linear response can be obtained over a wide dynamic range, and a large current amplitude can be obtained. In this way, since the optical fiber wireless system 400 is configured using the DA-PD or DA-APD of the present disclosure, it is possible to output a strong radio wave signal linearly even when the optical transmission distance is increased.

[0309] Furthermore, in the DA-APD403 having an optical absorption layer made of an InAs / GaAs digital alloy structure and a multiplication layer made of an InAs / AlAs digital alloy structure of the present disclosure, as shown in FIG. 34, since the residence time Tdm of electrons and holes in the multiplication layer is short, the change in the electric field distribution in the multiplication layer is suppressed. As a result, a response with excellent linearity can be obtained over a wide dynamic range. That is, since the signal is multiplied by the DA-APD403 of the present disclosure, the original signal can be reproduced, and a large current amplitude can be obtained.

[0310] As the multiplication factor of the DA-APD403 of the present disclosure, it can also be used within the range of 1.2 to 10 times. However, since the signal is distorted as the multiplication factor increases, it is desirable to use it within the range of 1.2 to 5 times. In addition, considering that the multiplication amount is such that the loss of the optical fiber and the quantum efficiency of the APD are not 100% but about 80%, in order to compensate for such losses, it is optimal to use it with a multiplication factor of 2 to 3 times.

[0311] <Effects of Embodiment 14> As described above, according to the optical fiber wireless system according to Embodiment 14, since the optical fiber wireless system is configured using the DA-APD or DA-PD of the present disclosure, an optical fiber wireless system capable of outputting a strong radio wave signal even when the optical transmission distance is increased can be obtained.

[0312] Embodiment 15. FIG. 37 is a schematic diagram showing the configuration of the digital coherent receiver 500 according to Embodiment 15. The digital coherent receiver 500 according to Embodiment 15 is characterized in that the DA-APD505a of the present disclosure is used. Note that instead of the DA-APD505a of the present disclosure, the DA-PD of the present disclosure may be used.

[0313] In digital coherent communication, an optical signal that modulates both the phase and intensity in an optical fiber is polarization multiplexed and transmitted. In the digital coherent receiver 500, the optical signal input from the optical fiber cable 501 is first polarization-separated by the polarization separator 502. After polarization separation, the respective polarization signal lights are incident on the 90-degree hybrid 503a and the 90-degree hybrid 503b, respectively. On the other hand, the laser light locally emitted from the semiconductor laser 504 is separated into two signals with a 90-degree phase shift from each other.

[0314] The signal light and the laser light are combined, and further, the signal light is separated into orthogonal components (I, Q) and output. Inside the 90-degree hybrids 503a and 503b, four balanced detectors 505 in which two of the DA-APDs 505a of the present disclosure are connected in series and in pairs are arranged. A total of four optical signals composed of I components and Q components orthogonal to each polarization are incident on the four balanced detectors 505, respectively. The electrical signals output from the balanced detectors 505 are input to the DSP 506. The digital coherent receiver 500 according to Embodiment 15 has the above configuration.

[0315] <Operation of the Digital Coherent Receiver According to Embodiment 15> FIG. 38A is a diagram showing the waveform of a digital coherent receiver which is a comparative example, and FIG. 38B is a diagram showing the waveform of the digital coherent receiver according to Embodiment 15.

[0316] In a conventional balanced detector, a PD has been used as a semiconductor light-receiving element that receives signal light. On the other hand, when the DA-APD505a of the present disclosure is used, since the signal can be multiplied, local light emission can be suppressed to a small level. Further, when a conventional APD is used, as shown in FIG. 33, when electrons and holes in the multiplication layer increase, the electric field distribution changes, so that the multiplication factor saturates and a dynamic range cannot be ensured. For this reason, not only is it impossible to obtain a sufficient amplitude of the electrical signal, but there is also a problem that the analog signal is distorted. As a result, as shown in FIG. 38A, in the comparative example, the interval between waveform A1 and waveform B1 becomes narrow, and the intensity signal of the constellation waveform is distorted, so that the application of the APD has been difficult.

[0317] On the other hand, in the PD or APD having at least the InAs / GaAs digital alloy structure light absorption layer of the present disclosure used in the digital coherent receiver 500 according to Embodiment 15, since the absorption coefficient of the light absorption layer is high, the light absorption layer can be made thin, and since the influence of the resistance Rsc due to the space charge effect is less likely to be affected by the thinning of the light absorption layer, a constellation waveform excellent in linearity can be obtained over a wide dynamic range.

[0318] Furthermore, in the DA-APD505a having a light absorption layer made of the InAs / GaAs digital alloy structure and a multiplication layer made of the InAs / AlAs digital alloy structure of the present disclosure, as shown in FIG. 34, since the residence time Tdm of electrons and holes in the multiplication layer is short, the change in the electric field distribution in the multiplication layer is suppressed. As a result, as shown in FIG. 38B, when the DA-APD505a of the present disclosure is used, the interval between waveform A and waveform B becomes wide, and a constellation waveform excellent in linearity can be obtained over a wide dynamic range. That is, even if the signal is multiplied by the APD, the original signal can be reproduced, and a large current amplitude can be obtained.

[0319] The multiplication factor of the DA-APD505a of the present disclosure can also be used in the range of 1.2 to 10 times. However, since the signal is distorted when the multiplication factor increases, it is desirable to use it at a multiplication factor in the range of 1.2 to 5 times.

[0320] <Effect of Embodiment 15> As described above, according to the digital coherent receiving apparatus according to Embodiment 15, since the DA-APD or DA-PD of the present disclosure is applied as a semiconductor light receiving element for receiving an optical signal, it is possible to reduce the drive current of local light emission (laser), that is, to reduce the power consumption of the digital coherent receiving apparatus.

[0321] Embodiment 16. FIG. 39 is a schematic diagram showing the configuration of the SPAD sensor system according to Embodiment 16. The SPAD sensor system 600 includes a optoelectronic measurement circuit 601, a SPAD sensor 602 composed of the DA-APD of the present disclosure, and a quenching circuit 603.

[0322] The SPAD can be used not only as a light receiving element with good sensitivity but also for counting the number of photons. However, it is necessary to continuously repeat from the A: Quenching voltage described later to the B: Geiger mode voltage described later. The repetition period is on the order of nanoseconds to microseconds. If the repetition period of the A: Quenching voltage and the B: Geiger mode voltage can be shortened, the response speed of the SPAD can be increased.

[0323] That is, when the DA-APD of the present disclosure is used for the SPAD, it is possible to switch between the A: Quenching voltage and the B: Geiger mode voltage with a high response speed, and it is possible to improve the response band of the SPAD sensor 602.

[0324] Furthermore, when the DA-APD505a having a light absorption layer made of the InAs / GaAs digital alloy structure and a multiplication layer made of the InAs / AlAs digital alloy structure of the present disclosure is used in the SPAD sensor system 600, photons incident on the SPAD sensor system 600 are absorbed in the light absorption layer made of the InAs / GaAs digital alloy structure included in the SPAD sensor 602 composed of the DA-APD of the present disclosure, generating electron-hole pairs, and the electrons flow into the multiplication layer. An electric field about 10% higher than the avalanche breakdown electric field is applied to the multiplication layer.

[0325] This state is called the Geiger mode. In the Geiger mode, electrons multiply to reach a level of 10 6 times. The generated electrons flow as a current and flow into the optoelectronic measurement circuit 601. If the current generated by one photon is known in advance, it is possible to count the number of photons incident on the SPAD sensor system 600.

[0326] FIG. 40A is a diagram showing the multiplication characteristics of a SAPD sensor system as a comparative example, and FIG. 40B is a diagram showing the multiplication characteristics of a SAPD sensor system according to Embodiment 16. When an electric field above the avalanche breakdown electric field is continuously applied to the multiplication layer, an excess current flows out. Therefore, after detecting photons, the voltage applied to the SPAD sensor 602 is quickly reduced to weaken the electric field of the multiplication layer. This is called quenching. That is, as shown in the comparison of the multiplication characteristics of the SPAD sensors in FIGS. 40A and 40B, the voltage is lowered from B: the Geiger mode voltage to A: the quenching voltage to stop the cascade multiplication, and then the voltage is increased again from A: the quenching voltage to B: the Geiger mode voltage to enable high-sensitivity reception of incident photons.

[0327] The quenching circuit 603 for controlling voltage includes a passive circuit and an active circuit. In the passive circuit, when a current flows due to photons incident on the SPAD sensor 602, a voltage drop occurs across the resistor connected in series with the SPAD sensor 602, and the voltage applied to the SPAD sensor 602 decreases. That is, the quenching circuit 603 operates to repeatedly apply a voltage equal to or higher than the breakdown voltage and a voltage lower than the breakdown voltage to the SPAD sensor 602.

[0328] <Operation and Effect of SPAD Sensor System According to Embodiment 16> The SPAD sensor system 600 according to Embodiment 16 can be used not only for counting the number of photons but also as a highly sensitive semiconductor light receiving element. However, it is necessary to continuously repeat from the B: Geiger mode voltage to the A: quenching voltage. The repetition period is on the order of nanoseconds to microseconds. If the difference between the A: quenching voltage and the B: Geiger mode voltage can be reduced, the repetition period can be shortened, so that the response speed of the SPAD sensor system 600 can be increased.

[0329] In the passive quenching circuit 603, it is possible to reduce the resistance value connected in series with the SPAD sensor 602, and the response speed of the SPAD sensor 602 is increased. Also, in the active quenching circuit 603, since the amplitude of the voltage is small, simplification of the drive circuit and power saving are possible, and furthermore, it is also possible to widen the response band.

[0330] In the APD having at least the InAs / GaAs digital alloy structure light absorption layer of the present disclosure, since the absorption coefficient of the light absorption layer is high, it is possible to make the light absorption layer thinner. Since the resistance Rsc can be reduced by thinning the light absorption layer, the breakdown voltage can also be reduced. When the DA-APD of the present disclosure is used as a SPAD, the difference between the quenching voltage and the Geiger mode voltage, that is, the applied voltage difference, can be reduced, so that the response band can be improved and the quenching circuit can be simplified and power can be saved.

[0331] The operation when the InAs / AlAs digital alloy structure of the present disclosure is used as a multiplication layer will be described below. In the InAs / AlAs digital alloy structure multiplication layer of the present disclosure, as shown in FIGS. 9A and 9B, since the dead space length is long, multiplication does not occur at low electric fields. However, as the electric field is increased, the dead space length becomes shorter, so the multiplication factor rapidly increases and breakdown occurs. In the APD with an InAlAs random alloy structure multiplication layer and the APD having an InAs / AlAs digital alloy structure multiplication layer with a thick multiplication layer, when the voltage at which the dark current exceeds 10 μA is defined as the breakdown voltage, the multiplication factor at 90% of the breakdown voltage exceeds 10 times. On the other hand, in the InAs / AlAs digital alloy structure multiplication layer of the present disclosure, the multiplication factor at a voltage of 90% of the breakdown voltage is 10 times or less.

[0332] The voltage required for breakdown depends on the device structure such as the layer thickness of the optical absorption layer and the carrier concentration of the electric field relaxation layer. Therefore, here, the effect is verified by the electric field of the multiplication layer that can be quantified. Note that at a reach-through voltage (~12V) or higher, the voltage applied to the SPAD sensor 602 is proportional to the electric field of the multiplication layer.

[0333] FIG. 41 is a diagram showing the calculated difference between the quenching electric field and the Geiger mode electric field for each constituent material of the multiplication layer. In the InAs / AlAs digital alloy structure multiplication layer of the present disclosure, it can be seen that the difference between the quenching electric field and the Geiger mode electric field of each multiplication layer is specifically low at 170 kV / cm. For an InAs / AlAs digital alloy structure multiplication layer having a superlattice structure similar to that of the InAs / AlAs digital alloy structure multiplication layer of the present disclosure but having a layer thickness of 200 nm or more that is not thinned, the electric field is as low as 120 kV / cm.

[0334] <Effect of Embodiment 16> According to the SPAD sensor system according to Embodiment 16 above, since the DA-APD of the present disclosure is used in the SPAD sensor, the difference between the quenching electric field and the Geiger mode electric field, that is, the applied voltage difference, can be reduced. As a result, an SPAD sensor system capable of improving the response band, simplifying the quenching circuit, and reducing power consumption is obtained.

[0335] Embodiment 17. FIG. 42 is a diagram showing the configuration of a lidar (Light Detection And Ranging: LiDAR) device according to Embodiment 17. FIG. 43A is a diagram showing the received waveform of the APD of a lidar device which is a comparative example, and FIG. 43B is a diagram showing the received waveform of the APD of the lidar device 700 according to Embodiment 19.

[0336] The lidar device 700 according to Embodiment 17 includes a light source 701, the DA-APD 702 of the present disclosure, a TIA 703, and a ranging circuit 704. Note that the DA-PD of the present disclosure may be used instead of the DA-APD 702 of the present disclosure. The light source 701 emits pulsed light (hereinafter referred to as pulse light) or frequency-modulated light.

[0337] In the lidar device 700 according to Embodiment 17, the distance to the object 705 is calculated by measuring the time from when the pulsed light emitted from the light source hits the object 705 and returns to the semiconductor light receiving element. An LD or the like is used as the light source 701. In order to measure up to a long distance, it is necessary to increase the light amount of the LD, but the upper limit of the light amount emitted from the LD is defined for safety reasons with respect to the eyes. Therefore, it is necessary to increase the sensitivity of the semiconductor light receiving element. Therefore, in the lidar device 700 according to Embodiment 17, the DA-APD 702 of the present disclosure is used at a high multiplication factor as the semiconductor light receiving element.

[0338] The detected optical pulse is multiplied by the DA-APD702 of the present disclosure and converted into a current pulse. Then, it is amplified by the TIA703 and input to the ranging circuit 704. As shown in FIGS. 43A and 43B, when the intensity of the pulse signal exceeds a preset discrimination line, that time point is determined as the arrival time. The ranging circuit 704 has input the timing of emitting the optical pulse from the light source 701 as a signal. By multiplying the time difference between the two by the speed of light and dividing by 2, the distance to the object 705 can be calculated. Also, a method of emitting frequency-modulated light and calculating the distance from the frequency difference between the emitted wave and the returning reflected wave is also used.

[0339] <Operation and Effect of the Rider Device According to Embodiment 17> Since the reflectivity of the object 705 is not necessarily high and the reflection directions are various, it is necessary to detect the minute light with an APD. In a conventional APD, as shown in FIG. 43A, when the voltage is set and operated to achieve high multiplication, the multiplication time becomes long and the current pulse width output from the APD becomes wide. Also, the tunnel current increases and it becomes difficult to discriminate the optical pulse. In the method of calculating the distance from the frequency difference between the emitted wave and the reflected wave, it also becomes difficult to discriminate the frequency.

[0340] On the other hand, in the PD and APD having at least the InAs / GaAs digital alloy structure optical absorption layer of the present disclosure used in the rider device 700 according to Embodiment 17, even when the light reception sensitivity is insufficient in a conventional APD, high sensitivity can be obtained with an APD using the InAs / GaAs digital alloy structure for the optical absorption layer. As a result, not only can the distance to a distant object 705 be measured, but also the light output of the light source 701 can be reduced, so power saving can be achieved, and moreover, the safety to the eyes is increased.

[0341] Furthermore, in the DA-APD505a having a light absorption layer made of an InAs / GaAs digital alloy structure and a multiplication layer made of an InAs / AlAs digital alloy structure of the present disclosure, as described in the description of the operation of Embodiment 1, even at a multiplication factor of 20 times or more, the tunnel current does not increase, so it is possible to easily distinguish weak light. Also, as shown in FIG. 34, since the residence time in the multiplication layer is short, as shown in FIG. 43B, a current pulse with a large peak intensity can be obtained, resulting in high discrimination sensitivity. As a result, not only can the distance to a distant object be measured, but also the light output of the light source can be reduced, achieving power savings, and further enhancing the safety for the eyes.

[0342] <Effect of Embodiment 17> As described above, according to the lidar device according to Embodiment 17, since the reflected light from an object is received by the DA-APD or DA-PD of the present disclosure, it is possible to measure the distance to a distant object, and it is possible to achieve power savings of the light source, and further, there is an effect that a lidar device with high safety for the eyes can be obtained.

[0343] Although the present disclosure describes various exemplary embodiments and examples, the various features, aspects, and functions described in one or more of the embodiments are not limited to the application of a specific embodiment, but are applicable to the embodiments alone or in various combinations.

[0344] Therefore, countless variations not illustrated are envisioned within the scope of the technology of the present disclosure. For example, it includes cases where at least one component is deformed, added, or omitted, and further cases where at least one component is extracted and combined with the components of other embodiments.

Description of Reference Numerals

[0345] 1 n-type InP substrate, 1a Fe-doped semi-insulating InP substrate, 2 n-type InP buffer layer, 2a n-type InAlAs buffer layer, 2b n-type InP conductive layer, 3 i-type InP electron traveling layer, 4 i-type InAlGaAs graded layer, 5, 43 i-type InAs / GaAs digital alloy structured light absorption layer, 6 i-type InAlGaAs / InAlAs graded layer, 7 p-type InP window layer, 8 p-type InGaAs contact layer, 11, 47 n-type InP window layer, 13, 45 i-type InAlAs multiplication layer, 15 p-type diffusion region, 17 isolation groove, 18 surface protective film, 20 Fe-doped semi-insulating InP buried layer, 25 p-type InAlAs conductive layer, 31, 31a, 31c, 51 n-type electrode, 31b backside electrode, 32, 52 p-type electrode, 33 opening, 35 antireflection coating film, 40 p-type InAlGaAs contact layer, 41 p-type InP conductive layer, 42 i-type InAlGaAs / InAlAs graded layer, 14, 44 p-type InP electric field relaxation layer, 46 n-type InAlAs electric field adjustment layer, 49 n-type InAlAs conductive layer, 50 n-type InGaAs contact layer, 53 metal film, 90 incident light, 100, 100a, 110, 110a, 120, 120a, 130, 130a, 140, 140a, 150, 150a, 160, 160a, 170, 170a, 180 semiconductor light receiving element, 250a, 260, 260a, 260b, 270 optical line terminal device, 251, 261, 274 FEC, 252, 262, 273, 303 driver amplifier, 253, 263, 272, 304, 401, 701 light source, 254, 264, 271 WDM, 255, 265a, 301, 506 DSP, 256, 266a, 302b ADC, 258 APD, 257, 267 burst TIA, 265, 278 CDR, 266, 277 limiting amplifier, 267a, 276, 703 TIA, 268, 275, 305, 403, 505a, 702 DA-APD, 300 multi-value intensity modulation transceiver, 302a DAC, 310, 501 optical fiber cable, 306 Linear-TIA, 400, 450 optical fiber wireless system, 402 transmission path, 404 antenna, 406 PD, 500 digital coherent receiver, 501 optical fiber cable, 502 polarization beam splitter, 503a, 503b 90-degree hybrid, 504Semiconductor laser, 505 Balanced detector, 600 SPAD sensor system, 601 Optoelectronic measurement circuit, 602 SPAD sensor, 603 Quenching circuit, 700 Lidar device, 704 Distance measurement circuit, 705 Object

Claims

1. An InP substrate; an n-type semiconductor layer formed on the InP substrate; an electron transit layer formed on the n-type semiconductor layer; A carrier concentration of 1×10 17 cm -3 a light absorption layer having an i-type digital alloy structure in which two types of semiconductor layers, each of which is a combination of an InAs layer and a GaAs layer, an InAlAs layer and an InGaAs layer, or an InAlGaAs layer having a different composition ratio, are alternately stacked at a period of 2 to 6 atomic layers; A semiconductor light receiving element comprising:

2. 2. The semiconductor light-receiving element according to claim 1, wherein the light-absorbing layer has an i-type digital alloy structure in which InAs layers and GaAs layers having the same number of atomic layers per period are alternately laminated.

3. The electron transport layer has a carrier concentration of 5×10 17 cm -3 2. The semiconductor light-receiving element according to claim 1, wherein the thickness of the layer is 0.1 μm or more and 1.0 μm or less.

4. 4. The semiconductor light-receiving element according to claim 1, wherein the n-type semiconductor layer is an n-type conductive layer, and an n-type electrode is provided on a portion of the n-type conductive layer formed on the InP substrate that is partially exposed.

5. 4. The semiconductor light-receiving element according to claim 1, wherein an i-type or n-type window layer is formed on the light absorption layer, a p-type impurity diffusion region is formed at least inside the window layer, and a p-type electrode is provided on an upper portion of the p-type impurity diffusion region.

6. 6. The semiconductor light-receiving element according to claim 5, wherein an isolation groove is provided on an outer periphery of the p-type impurity diffusion region, the isolation groove reaching the n-type semiconductor layer.

7. 6. The semiconductor light-receiving element according to claim 5, wherein a light incidence area is provided on a rear surface of said InP substrate opposite to said p-type electrode.

8. 4. The semiconductor light-receiving element according to claim 1, further comprising a mesa-shaped p-type conductive layer formed on the light absorption layer, and a p-type electrode formed on the p-type conductive layer.

9. 9. The semiconductor light-receiving element according to claim 8, wherein an isolation groove having a bottom that reaches at least the n-type semiconductor layer is provided on the outer periphery of the mesa-shaped p-type conductive layer.

10. An InP substrate; a p-type semiconductor layer formed on the InP substrate; A carrier concentration of 1×10 17 cm -3 a light absorption layer having an i-type digital alloy structure in which two types of semiconductor layers, each of which is a combination of an InAs layer and a GaAs layer, an InAlAs layer and an InGaAs layer, or an InAlGaAs layer having a different composition ratio, are alternately stacked at a period of 2 to 6 atomic layers; an electron transport layer formed on the light absorption layer; A semiconductor light receiving element comprising:

11. 11. The semiconductor light-receiving element according to claim 10, wherein the light-absorbing layer has an i-type digital alloy structure in which InAs layers and GaAs layers having the same number of atomic layers per period are alternately laminated.

12. The electron transport layer has a carrier concentration of 5×10 17 cm -3 11. The semiconductor light-receiving element according to claim 10, wherein the thickness of the layer is 0.1 μm or more and 1.0 μm or less.

13. 13. The semiconductor light-receiving element according to claim 1, wherein a part of the light-absorbing layer is doped with an n-type or p-type impurity.

14. A semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12; an optical multiplexer / demultiplexer that inputs an optical signal to the semiconductor light receiving element; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; a clock data recovery circuit connected to the amplifier circuit and configured to recover clock data from the amplified electrical signal; a forward error correction circuit connected to the clock data recovery circuit for correcting an error in the clock data; An optical line terminal comprising:

15. A semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12; an optical multiplexer / demultiplexer that inputs an optical signal to the semiconductor light receiving element; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; an analog / digital conversion circuit connected to the amplifier circuit and converting the amplified electrical signal into a digital signal; a digital signal processing circuit connected to the analog / digital conversion circuit and processing the digital signal; a forward error correction circuit connected to the digital signal processing circuit for correcting errors in the digital signal; An optical line terminal comprising:

16. A semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12, which receives a multi-level intensity modulated optical signal; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; an analog / digital conversion circuit connected to the amplifier circuit and converting the amplified electrical signal into a digital signal; a digital signal processing circuit connected to the analog / digital conversion circuit and processing the digital signal; A multilevel intensity modulation transmitting / receiving device comprising:

17. a light source that emits an analog modulated optical signal; A semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12, which receives the optical signal that has been analog-modulated; a transmission path for transmitting an analog electrical signal output from the semiconductor light receiving element to an antenna; an antenna connected to the transmission line and configured to radiate the analog electrical signal as a radio wave signal; A radio-on-fiber system comprising:

18. A semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12; a polarization splitter that splits the polarization of the intensity- and phase-modulated polarization multiplexed optical signal; a 90-degree hybrid that splits and combines the optical signals output from the polarization splitter; a digital signal processing circuit connected to the 90-degree hybrid device and processing a digital signal; A digital coherent receiving device comprising:

19. A SPAD sensor including a semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12; a quenching circuit for repeatedly applying a voltage equal to or greater than a breakdown voltage and a voltage equal to or less than the breakdown voltage to the SPAD sensor; an optoelectronic measurement circuit for measuring an electrical signal output from the SPAD sensor; A SPAD sensor system comprising:

20. a light source that emits pulsed or frequency modulated light; a semiconductor light receiving element according to any one of claims 1 to 3 and 10 to 12, which receives light emitted from the light source and reflected by an object; an amplifier circuit for amplifying an electrical signal output from the semiconductor light receiving element; a distance measuring circuit for calculating a distance based on the electrical signal amplified by the amplifier circuit; A lidar device comprising:

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