Target detection signal processing device, target detection system, and target detection signal processing program

Abstract

To provide a target detection signal processing device that is equipped with a transmission / reception common antenna to detect targets within each distance range, and that, when sharing a frequency band of each transmission pulse, reliably removes false echoes of each reflected pulse without lengthening each reception period for alternately receiving each reflected pulse, and demodulates a desired echo of each reflected pulse with high accuracy.SOLUTION: The present disclosure provides a target detection signal processing device 3 including: a phase control unit 31 that controls phases of one transmission pulse and another transmission pulse so that an initial phase of the one transmission pulse and an initial phase of the other transmission pulse are uncorrelated; a phase correction unit 32 that corrects a phase of a reception signal received during a reception period of one reflected pulse, removes false echoes of other reflected pulses, and demodulates a desired echo of the one reflected pulse; a false echo removal unit 33; and a desired echo demodulation unit 34.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to techniques for detecting targets within respective distance ranges. [Background technology]

[0002] Patent Document 1 and other publications disclose a target detection device that is equipped with a dual-purpose antenna (reception is not possible during transmission) to detect targets within each distance range, transmits each transmission pulse alternately with a different pulse width during each transmission period, and receives each reflected pulse alternately during each reception period. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-277572 Summary of the Invention [Problem to be solved by the invention]

[0004] The details of target detection signal processing using the pulse compression method of the prior art are shown in Figure 1. The target detection device is equipped with a transmit / receive antenna to detect targets within the short and long distance ranges, and alternately transmits 1 / 2 transmission pulses with different pulse widths during the 1 / 2 transmission period and alternately receives 1 / 2 reflected pulses during the 1 / 2 reception period, without sharing the frequency band of the 1 / 2 transmission pulses.

[0005] Here, the target detection device uses an RF frequency band f RF In this case, the second reflected pulse may be received in the first reception period, while the first reflected pulse may be received in the second reception period. IF In the above, since the frequency band of the 1st / 2nd transmission pulse is not shared, the desired echo of the first reflected pulse can be demodulated in the first reception period and the false echo of the second reflected pulse can be not demodulated in the first reception period, while the desired echo of the second reflected pulse can be demodulated in the second reception period and the false echo of the first reflected pulse can be not demodulated in the second reception period.

[0006] The issues with target detection signal processing using the pulse compression method of the prior art are shown in Figure 2. To detect targets within the short and long distance ranges, the target detection device is equipped with a dual-purpose antenna for transmission and reception, alternately transmitting 1 / 2 transmission pulses with different pulse widths during the 1 / 2 transmission period and alternately receiving 1 / 2 reflected pulses during the 1 / 2 reception period, sharing the frequency band of the 1 / 2 transmission pulses.

[0007] Here, the target detection device uses an RF frequency band f RF In this case, the second reflected pulse may be received in the first reception period, while the first reflected pulse may be received in the second reception period. IF In order to share the frequency band of the 1 / 2 transmission pulse, the desired echo of the first reflected pulse is demodulated in the first reception period, and the false echo of the second reflected pulse is also demodulated in the first reception period, while the desired echo of the second reflected pulse is demodulated in the second reception period, and the false echo of the first reflected pulse is also demodulated in the second reception period.

[0008] In addition, if the target detection device lengthens the 1 / 2 reception period during which the 1 / 2 reflected pulses are alternately received, the false echo of the 2 / 1 reflected pulse will be demodulated less during the 1 / 2 reception period, but since the number of 1 / 2 transmissions during which the 1 / 2 transmitted pulses are alternately transmitted is reduced, the performance of demodulating the desired echo of the 1 / 2 reflected pulse during the 1 / 2 reception period will be reduced.

[0009] Therefore, in order to solve the above problem, the present disclosure has an object to provide a transmission / reception shared antenna for detecting targets within each distance range, and when sharing the frequency band of each transmission pulse, to reliably remove false echoes of each reflected pulse without lengthening each reception period for alternately receiving each reflected pulse, and to demodulate the desired echo of each reflected pulse with high accuracy. [Means for solving the problem]

[0010] In order to solve the above problems, the phase of one transmission pulse and the phase of another transmission pulse are phase-controlled so as to be uncorrelated. Then, the received signal received during the reception period of one reflected pulse is phase-corrected to remove the ghost echo of another reflected pulse and demodulate the desired echo of one reflected pulse.

[0011] Specifically, the present disclosure provides a target detection signal processing device that includes a transmit-receive shared antenna, alternately transmits each transmission pulse with a different pulse width in each transmission period, alternately receives each reflected pulse in each reception period, and shares the frequency band of each transmission pulse to detect a target within each distance range. The target detection signal processing device executes transmission control of each transmission pulse and signal processing of each reflected pulse, and includes: a phase control unit that phase-controls the one transmission pulse and the other transmission pulse so that the initial phase of the one transmission pulse and the initial phase of the other transmission pulse are uncorrelated; a phase correction unit that phase-corrects the received signal received during the reception period of one reflected pulse, demodulates the ghost echo of another reflected pulse, and noise-cancels the desired echo of the one reflected pulse; an artifact echo removal unit that performs frequency domain conversion on the received signal in which the ghost echo of the other reflected pulse is demodulated, removes the ghost echo of the other reflected pulse from the frequency spectrum, and outputs the frequency spectrum from which the ghost echo of the other reflected pulse has been removed; and a desired echo demodulation unit that performs time domain conversion on the frequency spectrum from which the ghost echo of the other reflected pulse has been removed, phase-corrects the received signal from which the ghost echo of the other reflected pulse has been removed, and outputs the received signal in which the desired echo of the one reflected pulse has been demodulated.

[0012] According to this configuration, in order to detect a target within each distance range, when using a transmit-receive shared antenna and sharing the frequency band of each transmission pulse, by performing uncorrelated phase control of each transmission pulse, it is possible to surely remove the ghost echo of each reflected pulse and demodulate the desired echo of each reflected pulse with high accuracy without increasing the length of each reception period for alternately receiving each reflected pulse.

[0013] The present disclosure also provides a target detection system comprising the target detection signal processing device described above, and the target detection device that executes a heterodyne method using a PLL (Phase Locked Loop) circuit and applies a pulse compression method or an unmodulated pulse method.

[0014] According to this configuration, the heterodyne method using the PLL circuit is executed, and the above-described invention can be applied when the pulse compression method or the unmodulated pulse method is applied.

[0015] The present disclosure also provides a target detection system comprising: the target detection signal processing device described above; and the target detection device that performs direct phase modulation on a PLL (Phase Locked Loop) circuit and applies an FMICW (Frequency Modulation Interrupted Continuous Wave) method.

[0016] According to this configuration, direct phase modulation is performed on the PLL circuit, and the above-described invention can be applied when the FMICW system is applied.

[0017] The present disclosure also provides a target detection system, characterized in that the phase control unit resets a frequency division state of the PLL circuit, initializes a fractional frequency division value of the PLL circuit, and sets initial phases of the one transmission pulse and the other transmission pulse when starting a frequency sweep of the one transmission pulse and the other transmission pulse.

[0018] According to this configuration, direct phase modulation is performed on the PLL circuit, and when the FMICW system is applied, uncorrelated phase control of each transmission pulse can be performed with high precision.

[0019] The present disclosure also provides a target detection signal processing program for causing a computer to sequentially execute the processing steps executed by the processing units included in the target detection signal processing device described above.

[0020] According to this configuration, it is possible to provide a program having the above-described effects. [Effects of the Invention]

[0021] In this way, the present disclosure is equipped with a shared transmit / receive antenna to detect targets within each distance range, and by sharing the frequency band of each transmitted pulse, it is possible to reliably remove false echoes from each reflected pulse and demodulate the desired echo from each reflected pulse with high accuracy without lengthening the reception period for alternately receiving each reflected pulse. [Brief explanation of the drawings]

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0023] Embodiments of the present disclosure will be described with reference to the accompanying drawings. The embodiments described below are examples of carrying out the present disclosure, and the present disclosure is not limited to the following embodiments.

[0024] (Configuration of the Target Detection System of the Present Disclosure) The configuration of the target detection system of the present disclosure is shown in FIG. 3. The procedure of the target detection signal processing of the present disclosure is shown in FIG. 4. The target detection system S includes a transceiver shared antenna 1, a target detection device 2, and a target detection signal processing device 3. The target detection signal processing device 3 includes a phase control unit 31, a phase correction unit 32, a false echo removal unit 33, and a desired echo demodulation unit 34.

[0025] The target detection device 2 includes a transceiver shared antenna 1 in order to detect a target T within each distance range (two or more types), alternately transmits each transmission pulse with a different pulse width in each transmission period, alternately receives each reflected pulse in each reception period, and shares the frequency band of each transmission pulse. Here, the target detection system S may be a radar sensor system, an ultrasonic sensor system, etc., and may also be a small and low-power sensor system mounted on UAM (Urban Air Mobility), etc., or a large and high-power sensor system installed in a weather radar, etc.

[0026] The target detection signal processing device 3 executes transmission control of each transmission pulse and signal processing of each reflected pulse with respect to the target detection device 2. Here, the target detection signal processing device 3 can be realized by storing the target detection signal processing program shown in FIG. 4 in a ROM (Read Only Memory) read by a CPU (Central Processing Unit), and the target detection digital signal processing shown in FIG. 4 can also be realized by causing an FPGA (Field Programmable Gate Array) to execute it.

[0027] The phase control unit 31 controls the phases of one transmission pulse and another transmission pulse so that the initial phase of one transmission pulse and the initial phase of the other transmission pulse are uncorrelated (step S1). Specifically, the phase control unit 31 executes the phase control shown in FIGS. 7 and 11 of the first and second embodiments.

[0028] The phase correction unit 32 phase-corrects the received signal received during the reception period of one reflected pulse, demodulates the ghost echo of the other reflected pulse, and noise-suppresses the desired echo of one reflected pulse (step S2). Specifically, the phase correction unit 32 executes the phase correction shown in the middle columns of FIGS. 8 and 12 of the first and second embodiments based on the phase control shown in FIGS. 7 and 11 of the first and second embodiments.

[0029] The ghost echo removal unit 33 converts the received signal in which the ghost echo of the other reflected pulse has been demodulated into the frequency domain, removes the ghost echo of the other reflected pulse from the frequency spectrum, and outputs the frequency spectrum from which the ghost echo of the other reflected pulse has been removed (step S3). Specifically, the ghost echo removal unit 33 executes the ghost echo removal shown in the middle column to the right column of FIGS. 8 and 12 of the first and second embodiments for the phase correction shown in the middle columns of FIGS. 8 and 12 of the first and second embodiments.

[0030] The desired echo demodulation unit 34 converts the frequency spectrum from which the ghost echo of the other reflected pulse has been removed into the time domain, phase-corrects the received signal from which the ghost echo of the other reflected pulse has been removed, and outputs the received signal in which the desired echo of one reflected pulse has been demodulated (step S4). Specifically, the desired echo demodulation unit 34 executes the desired echo demodulation shown in the right column of FIGS. 8 and 12 of the first and second embodiments based on the phase control shown in FIGS. 7 and 11 of the first and second embodiments.

[0031] In this way, in order to detect targets T within each distance range (two or more types), the transmission / reception shared antenna 1 is provided, and when the frequency band of each transmission pulse is shared, uncorrelated phase control of each transmission pulse makes it possible to reliably remove false echoes of each reflected pulse and demodulate the desired echo of each reflected pulse with high accuracy without lengthening the reception period in which each reflected pulse is alternately received. Specifically, even when the frequency band of each transmission pulse is shared as shown in the upper parts of Figures 6 and 10 of the first and second embodiments, false echo removal and desired echo demodulation can be performed reliably and with high accuracy as shown in the lower parts of Figures 6 and 10 of the first and second embodiments.

[0032] (Configuration of the pulse compression target detection system of the first embodiment) The configuration of a target detection system using the pulse compression method according to the first embodiment is shown in Fig. 5. The details of target detection signal processing using the pulse compression method according to the first embodiment are shown in Fig. 6. The target detection device 2 executes a heterodyne method using a PLL circuit, and applies either the pulse compression method or the unmodulated pulse method.

[0033] The target object detection device 2 includes a D / A conversion unit 21, a high frequency transmission unit 22, a transmission / reception switching unit 23, a high frequency reception unit 24, an A / D conversion unit 25, and a PLL circuit 26. The target object detection signal processing device 3 includes a waveform generation unit 35, a phase modulation unit 36, a quadrature detection unit 37, a pulse compression unit 38, and an array conversion unit 39 in addition to the components of the target object detection signal processing device 3 shown in FIG.

[0034] The target detection device 2 is equipped with a transmission / reception shared antenna 1 to detect a target T within a short / long distance range, and alternately transmits 1 / 2 transmission pulses (unmodulated pulses / compressed pulses) with different pulse widths during a 1 / 2 transmission period, and alternately receives 1 / 2 reflected pulses (unmodulated pulses / compressed pulses) during a 1 / 2 reception period, sharing the frequency band of the 1 / 2 transmission pulses.

[0035] Here, the target detection device 2 uses an RF frequency band f RFIn this case, the second reflected pulse may be received in the first reception period, while the first reflected pulse may be received in the second reception period. IF In the above, the frequency band of the 1st / 2nd transmission pulse is shared, but the desired echo of the first reflected pulse is demodulated in the first reception period and the false echo of the second reflected pulse is not demodulated in the first reception period, while the desired echo of the second reflected pulse is demodulated in the second reception period and the false echo of the first reflected pulse is not demodulated in the second reception period.

[0036] 7 shows the details of the phase control process of the pulse compression method of the first embodiment. Phase control unit 31 controls the phases of the first transmission pulse and the second transmission pulse so that the initial phases of the first transmission pulse and the second transmission pulse are uncorrelated (step S1). Specifically, phase control unit 31 controls the phases of the first transmission pulse and the second transmission pulse with respect to waveform generation unit 35 and phase modulation unit 36 so that the initial phase φ1(n) of the first transmission pulse and the initial phase φ2(n) of the second transmission pulse are uncorrelated Pseudo Random Binary Sequence (PRBS) in sweep number n (n = 1 to N).

[0037] The phase control unit 31 may store the PRBS of the initial phase φ1(n) of the first transmission pulse and the initial phase φ2(n) of the second transmission pulse in a ROM in advance. Furthermore, the phase control unit 31 may control the initial phase of the first transmission pulse to φ1(n)≠φ1(n+1) to remove the secondary echo of the first reflected pulse, and may control the initial phase of the second transmission pulse to φ2(n)≠φ2(n+1) to remove the secondary echo of the second reflected pulse.

[0038] The D / A conversion unit 21, the high frequency transmission unit 22, the transmission / reception switching unit 23, the high frequency reception unit 24, the A / D conversion unit 25, the PLL circuit 26, the quadrature detection unit 37, and the pulse compression unit 38 implement the heterodyne method using the PLL circuit 26, and apply the pulse compression method or the unmodulated pulse method.

[0039] The content of the artifact echo removal process of the pulse compression method according to the first embodiment is shown in FIG. 8. The array conversion unit 39 converts the data sequence D t (n) (sample time t = 1 to T, sweep number n = 1 to N) from the sample time t direction to the sweep number n direction. In the left column of FIG. 8, the array conversion unit 39 sequentially acquires the data sequence D T (1), ···, D T (1), ···, D1(N), ···, D t (N) in the order of. In the middle column of FIG. 8, the array conversion unit 39 converts the data sequence D T (1), ···, D1(N), ···, D T (1), ···, D t (N). Note that the array conversion unit 39 is provided for phase correction described later, which is indispensable when using an FPGA, but not indispensable when using a CPU.

[0040] The phase correction unit 32 phase-corrects the received signal received during the reception period of the first / second reflection pulse, demodulates the artifact echo of the second / first reflection pulse, and noise-suppresses the desired echo of the first / second reflection pulse (step S2). In the middle column of FIG. 8, the phase correction unit 32 performs phase correction on the data sequences D1(1), ···, D1(N) by the correction amounts -φ2(1) / -φ1(1), ···, -φ2(N) / -φ1(N), ···, and performs phase correction on the data sequences D T (1), ···, D T (N) by the correction amounts -φ2(1) / -φ1(1), ···, -φ2(N) / -φ1(N).

[0041] The artifact echo removal unit 33 converts the received signal in which the artifact echo of the second / first reflection pulse is demodulated into the frequency domain, removes the artifact echo of the second / first reflection pulse from the frequency spectrum, and outputs the frequency spectrum from which the artifact echo of the second / first reflection pulse has been removed (step S3). In the middle column to the right column of FIG. 8, the artifact echo removal unit 33 performs the data sequences D1(1), ···, D1(N), ···, D T (1), ···, D TFor (N), perform coherent integration, demodulate the ghost echo of the second / first reflection pulse, noise the desired echo of the first / second reflection pulse, and perform frequency domain conversion. Then, remove the ghost echo of the second / first reflection pulse from the frequency spectrum (Doppler spectrum).

[0042] The desired echo demodulation unit 34 performs time domain conversion on the frequency spectrum from which the ghost echo of the second / first reflection pulse has been removed, performs phase correction on the received signal from which the ghost echo of the second / first reflection pulse has been removed, and outputs the received signal in which the desired echo of the first / second reflection pulse has been demodulated (step S4). In the right column of FIG. 8, the desired echo demodulation unit 34 performs time domain conversion on the frequency spectrum (Doppler spectrum) from which the ghost echo removing unit 33 has removed the ghost echo. Then, for the data series D1’(1), ···, D1’(N) from which the ghost echo has been removed, phase correction is performed by the correction amounts φ2(1)-φ1(1) / φ1(1)-φ2(1), ···, φ2(N)-φ1(N) / φ1(N)-φ2(N), ···, for the data series D T ’(1), ···, D T ’(N), phase correction is performed by the correction amounts φ2(1)-φ1(1) / φ1(1)-φ2(1), ···, φ2(N)-φ1(N) / φ1(N)-φ2(N). That is, after removing the ghost echo of the second / first reflection pulse, the desired echo of the first / second reflection pulse is demodulated.

[0043] In this way, in order to detect the target T within the near / far distance range, when providing the transceiver common antenna 1 and sharing the frequency band of the first / second transmission pulse, without increasing the length of the first / second reception period for alternately receiving the first / second reflection pulses by the uncorrelated phase control of the first / second transmission pulse, the ghost echo of the second / first reflection pulse can be surely removed, and the desired echo of the first / second reflection pulse can be demodulated with high precision. Then, the heterodyne method by the PLL circuit 26 can be executed, and the pulse compression method or the unmodulated pulse method can be applied.

[0044] (Configuration of the FMICW method target detection system of the second embodiment) The configuration of the FMICW method target detection system according to the second embodiment is shown in FIG. 9. The content of the FMICW method target detection signal processing according to the second embodiment is shown in FIG. 10. The target detection device 2 performs direct phase modulation on the PLL circuit and applies the FMICW method.

[0045] The target detection device 2 includes a PLL circuit 26 (the object of direct phase modulation), a high-frequency transmission unit 22, a transmission / reception switching unit 23, a high-frequency reception unit 24, and an A / D conversion unit 25 (the D / A conversion unit 21 is not required). The target detection signal processing device 3 further includes a frequency conversion unit 40 (calculation of the beat frequency) and an array conversion unit 39 with respect to the target detection signal processing device 3 shown in FIG. 3 of the present disclosure.

[0046] The target detection device 2 is provided with a transmission / reception shared antenna 1 to detect the target T within the near / far distance range, respectively. The first / second transmission pulses (both are FMCW pulses) are alternately transmitted with different pulse widths during the first / second transmission periods, and the first / second reflected pulses (both are FMCW pulses) are alternately received during the first / second reception periods, sharing the frequency band of the first / second transmission pulses.

[0047] Here, the target detection device 2 may receive the second reflected pulse during the first reception period while receiving the first reflected pulse during the second reception period in the RF frequency band f RF . However, the target detection device 2 shares the frequency band of the first / second transmission pulses in the IF frequency band f IF , demodulates the desired echo of the first reflected pulse during the first reception period, does not demodulate the false echo of the second reflected pulse during the first reception period, demodulates the desired echo of the second reflected pulse during the second reception period, and can avoid demodulating the false echo of the first reflected pulse during the second reception period.

[0048] The content of the phase control process of the FMICW method according to the second embodiment is shown in FIG. 11. The phase control unit 31 controls the phases of the first transmission pulse and the second transmission pulse so that the initial phase of the first transmission pulse and the initial phase of the second transmission pulse are uncorrelated (step S1). Specifically, the phase control unit 31 directly controls the phases of the first transmission pulse and the second transmission pulse with respect to the PLL circuit 26 so that the initial phase φ1(n) of the first transmission pulse and the initial phase φ2(n) of the second transmission pulse are uncorrelated PRBSs at the sweep number n (n = 1 to N).

[0049] Here, at the start of the frequency sweep of the first transmission pulse and the second transmission pulse, the phase control unit 31 resets the division state of the PLL circuit 26, initializes the fractional division values K1(n) and K2(n) of the PLL circuit 26, and sets the initial phases φ1(n) and φ2(n) of the first transmission pulse and the second transmission pulse. Then, when the phase control unit 31 executes timing-critical phase control having a synchronization relationship with the reference clock, it can be realized by the current technology when using an FPGA, and can also be realized by technological progress when using a CPU.

[0050] Note that the phase control unit 31 may previously hold the PRBSs of the initial phases φ1(n) and φ2(n) of the first transmission pulse and the second transmission pulse and the fractional division values K1(n) and K2(n) of the PLL circuit 26 in the ROM. In addition, in order to remove the second echo of the first reflection pulse, the phase control unit 31 may control the initial phase of the first transmission pulse to φ1(n) ≠ φ1(n + 1) and control the fractional division value of the PLL circuit 26 to K1(n) ≠ K1(n + 1). In order to remove the second echo of the second reflection pulse, the phase control unit 31 may control the initial phase of the second transmission pulse to φ2(n) ≠ φ2(n + 1) and control the fractional division value of the PLL circuit 26 to K2(n) ≠ K2(n + 1).

[0051] The PLL circuit 26, the high-frequency transmission unit 22, the transmission / reception switching unit 23, the high-frequency reception unit 24, the A / D conversion unit 25 (the D / A conversion unit 21 is unnecessary), and the frequency conversion unit 40 (calculation of the beat frequency) perform direct phase modulation on the PLL circuit 26 and apply the FMICW method.

[0052] The content of the artifact echo removal process of the FMICW method according to the second embodiment is shown in FIG. 12. The array conversion unit 39 converts the data sequence D t (n) (sample time t = 1 to T, sweep number n = 1 to N) from the sample time t direction to the sweep number n direction. In the left column of FIG. 12, the array conversion unit 39 obtains the data sequence D T (1), ···, D T (1), ···, D1(N), ···, D t (n) in the order of. In the middle column of FIG. 12, the array conversion unit 39 converts the data sequence D T (1), ···, D1(N), ···, D T (1), ···, D t (N). Note that the array conversion unit 39 is provided for phase correction described later, which is indispensable when using an FPGA, but not indispensable when using a CPU.

[0053] The phase correction unit 32 phase-corrects the received signal received during the reception period of the first / second reflection pulse, demodulates the artifact echo of the second / first reflection pulse, and noiseizes the desired echo of the first / second reflection pulse (step S2). In the middle column of FIG. 12, the phase correction unit 32 performs phase correction on the data sequences D1(1), ···, D1(N) by the correction amounts φ1(1) - φ2(1) / φ2(1) - φ1(1), ···, φ1(N) - φ2(N) / φ2(N) - φ1(N), ···, and on the data sequences D T (1), ···, D T (N) by the correction amounts φ1(1) - φ2(1) / φ2(1) - φ1(1), ···, φ1(N) - φ2(N) / φ2(N) - φ1(N).

[0054] Here, in the second embodiment (applying the FMICW method), compared with the first embodiment (applying the pulse compression method), the phase correction unit 32 corrects the data sequence D tSet the correction amount for (n) to different values. That is, in the first embodiment (applying the pulse compression method), the high-frequency receiving unit 24 uses the PLL circuit 26 (executing the heterodyne method) to demodulate the received signal. Therefore, the phase correction unit 32 corrects the data sequence D t (n) to a correction amount of -φ2(n) / -φ1(n) is sufficient. On the other hand, in the second embodiment (applying the FMICW method), the high-frequency receiving unit 24 uses the PLL circuit 26 (executing direct phase modulation) to demodulate the received signal. Therefore, the phase correction unit 32 takes into account the modulation amount of the direct phase modulation and then corrects the data sequence D t (n) needs to be set to φ1(n)-φ2(n) / φ2(n)-φ1(n).

[0055] The artifact echo removal unit 33 frequency-domain transforms the received signal in which the artifact echo of the second / 1 reflected pulse is demodulated, removes the artifact echo of the second / 1 reflected pulse from the frequency spectrum, and outputs the frequency spectrum from which the artifact echo of the second / 1 reflected pulse has been removed (step S3). In the middle to right columns of FIG. 12, the artifact echo removal unit 33 performs coherent integration on the data sequences D1(1), ···, D1(N), ···, D T (1), ···, D T (N), demodulates the artifact echo of the second / 1 reflected pulse, noiseizes the desired echo of the first / 2 reflected pulse, and performs a frequency-domain transform. Then, the artifact echo of the second / 1 reflected pulse is removed from the frequency spectrum (Doppler spectrum).

[0056] The desired echo demodulation unit 34 performs time-domain conversion on the frequency spectrum from which the artifact echoes of the second / primary reflection pulse have been removed, phase-corrects the received signal from which the artifact echoes of the second / primary reflection pulse have been removed, and outputs the received signal in which the desired echo of the primary / second reflection pulse has been demodulated (step S4). In the right column of FIG. 12, the desired echo demodulation unit 34 performs time-domain conversion on the frequency spectrum (Doppler spectrum) from which the artifact echo removal unit 33 has removed the artifact echoes. Then, with respect to the data series D1’(1), ···, D1’(N) from which the artifact echoes have been removed, phase correction is performed by the correction amounts φ2(1)-φ1(1) / φ1(1)-φ2(1), ···, φ2(N)-φ1(N) / φ1(N)-φ2(N), ···, and with respect to the data series D T ’(1), ···, D T ’(N), phase correction is performed by the correction amounts φ2(1)-φ1(1) / φ1(1)-φ2(1), ···, φ2(N)-φ1(N) / φ1(N)-φ2(N). That is, after removing the artifact echoes of the second / primary reflection pulse, the desired echo of the primary / second reflection pulse is demodulated.

[0057] In this way, in order to detect the target T within the near / far distance range, when providing the transceiver common antenna 1 and sharing the frequency band of the primary / second transmission pulse, without increasing the length of the primary / second reception period for alternately receiving the primary / second reflection pulses by performing uncorrelated phase control of the primary / second transmission pulses, the artifact echoes of the second / primary reflection pulse can be surely removed, and the desired echo of the primary / second reflection pulse can be demodulated with high precision. And when performing direct phase modulation on the PLL circuit 26 and applying the FMICW method, uncorrelated phase control of the primary / second transmission pulses can be performed with high precision. Further, since the D / A conversion unit 21 is unnecessary, the circuit configuration of the target detection device 2 is simplified, and only the phase correction unit 32, the artifact echo removal unit 33, and the desired echo demodulation unit 34 are added, so that the processing load on the CPU of the target detection signal processing device 3 is reduced, or the circuit configuration of the FPGA of the target detection signal processing device 3 is simplified.

Industrial Applicability

[0058] The target detection signal processing device, target detection system, and target detection signal processing program disclosed herein are applicable to radar sensor systems or ultrasonic sensor systems, etc., and are applicable to small, low-power sensor systems mounted on UAMs (drones that avoid collisions, etc.), and are applicable to large, high-power sensor systems installed on weather radars, etc. [Explanation of symbols]

[0059] S: Target detection system T:Target 1: Common antenna for transmission and reception 2:Target detection device 3: Target detection signal processing device 21: D / A conversion section 22: High frequency transmitter 23: Transmission / reception switching unit 24: High frequency receiver 25: A / D conversion section 26:PLL circuit 31: Phase control section 32: Phase correction section 33: False echo removal unit 34: Desired echo demodulation section 35: Waveform generation section 36: Phase modulation section 37: Quadrature detection unit 38: Pulse compression section 39: Array conversion section 40: Frequency conversion section

Claims

1. A target detection signal processing device that executes transmission control of each transmission pulse and signal processing of each reflected pulse for a target detection device that has a transmit-receive shared antenna, alternately transmits each transmission pulse with a different pulse width in each transmission period, alternately receives each reflected pulse in each reception period, and shares the frequency band of each transmission pulse, and is configured to detect a target within each distance range, wherein: a phase control unit that controls the phase of the one transmission pulse and the other transmission pulse so that the initial phase of the one transmission pulse and the initial phase of the other transmission pulse are uncorrelated; a phase correction unit that phase-corrects a received signal received during a reception period of one reflected pulse, demodulates an image echo of the other reflected pulse, and noise-suppresses a desired echo of the one reflected pulse; an image echo removal unit that performs a frequency domain conversion on a received signal in which the image echo of the other reflected pulse has been demodulated, removes the image echo of the other reflected pulse from the frequency spectrum, and outputs a frequency spectrum from which the image echo of the other reflected pulse has been removed; a desired echo demodulation unit that performs a time domain conversion on the frequency spectrum from which the image echo of the other reflected pulse has been removed, phase-corrects the received signal from which the image echo of the other reflected pulse has been removed, and outputs a received signal in which the desired echo of the one reflected pulse has been demodulated; A target detection signal processing device, characterized by comprising the above.

2. The target detection signal processing device according to claim 1; and the target detection device that executes a heterodyne method using a PLL (Phase Locked Loop) circuit and applies a pulse compression method or an unmodulated pulse method. A target detection system, characterized by comprising the above.

3. The target detection signal processing device according to claim 1; and the target detection device that executes direct phase modulation on a PLL (Phase Locked Loop) circuit and applies an FMICW (Frequency Modulation Interrupted Continuous Wave) method. A target detection system, characterized by comprising the above.

4. The phase control unit resets the division state of the PLL circuit, initializes the fractional division value of the PLL circuit, and sets the initial phases of the one transmission pulse and the other transmission pulse at the start of frequency sweep of the one transmission pulse and the other transmission pulse. The target detection system according to claim 3, characterized by the above.

5. A target detection signal processing program for causing a computer to execute in order each processing step executed by each processing unit included in the target detection signal processing apparatus according to claim 1.

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