Storage system

By separating IO devices into expansion housings, the storage system addresses heat and cooling challenges, ensuring efficient heat management and compact design while enhancing data transfer performance.

JP2025118220APending Publication Date: 2025-08-13HITACHI VANTARA LTD
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Patent Information

Application Number
JP2024013419
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-31
Publication Date
2025-08-13

AI Technical Summary

Technical Problem

Existing storage systems face challenges in managing heat generation and cooling, particularly due to increased power consumption by processors and IO devices, with IO devices being affected by processor heat and complicating cooling efforts, and the need to maintain a compact design.

Method used

The storage system is configured with a controller housing containing a processor and expansion housings with memory devices, where IO devices are located in separate expansion housings, distributing heat generation without increasing the number of chassis and improving cooling efficiency.

Benefits of technology

This configuration effectively manages heat generation by separating IO devices from the processor, enhancing cooling efficiency and maintaining a compact design while improving data transfer performance.

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Abstract

To realize efficient countermeasures against heat generation of a storage system.SOLUTION: A storage system is connected to a host computer and stores or outputs data according to a request from the host computer. The storage system includes: a first enclosure with a controller including a processor that controls the storage system; and one or more second enclosures with a storage device that stores data transmitted from the host computer. An IO device that receives data stored in the storage system from the host computer and transmits data output by the storage system to the host computer is further provided, and the IO device is mounted on the second enclosure.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present invention relates to a storage system. [Background technology]

[0002] Japanese Patent Laid-Open Publication No. 2019-91152 (Patent Document 1) describes a technology for reducing power consumption in storage systems that require strict performance improvement. This publication states that "power consumption is appropriately reduced in accordance with host I / O." and "a storage system includes one or more storage drives and a controller that controls the one or more storage drives, each of which has a plurality of power consumption states, and which are capable of responding to read requests and write requests and have different power consumption and different response performance, and the controller monitors the frequency of a predetermined type of I / O to each of the one or more storage drives, and sets each of the one or more storage drives to a state selected from the plurality of power consumption states based on the frequency." As described above, the storage system described in Patent Document 1 reduces power consumption by selecting one of several power consumption states for the storage drives. In contrast, in a storage system that receives data input / output requests from a host computer and stores / outputs data, a processor is installed in the controller for internal control. This processor operates at high speed to achieve high processing performance, and therefore consumes a lot of power. In recent years, the performance required of storage systems has increased, and the power consumption of the processor installed in the storage system controller has become very large, resulting in a large amount of heat generation. This has led to an increase in power consumption and heat generation in the controller housing that houses the controller. Storage systems also include a host interface that connects to a host computer and transmits and receives data to and from the host computer. This host interface is composed of IO devices, including a protocol controller for processing protocols related to data transmission and reception with the host computer and a communication processor for communicating with the host computer. In recent years, data communication between the host computer and the storage system has become extremely fast, resulting in increased power consumption and heat generation in these IO devices. For this reason, if the IO devices and processors are placed in a controller housing, power consumption and the resulting heat generation are concentrated in the controller housing. In particular, the processor, which controls the entire controller, is often physically located in the center of the controller housing. In contrast, the host interface is often located on the outer edge of the controller housing, such as the back of the controller housing, to connect a communication cable for communication with the host computer. As a result, when air cooling is used in a controller housing, the IO devices that make up the host interface often receive the significant heat generated by the processor, making power, heat generation, and cooling even greater challenges. To solve this problem, if the IO devices are stored in a separate dedicated housing rather than in the controller housing, the number of housings will increase, compromising the space-saving nature of the storage system. Furthermore, in an expansion enclosure, which is an enclosure equipped with many storage devices, the storage devices store and output data at high speed when instructed to do so by the controller, but the frequency with which the many storage devices equipped in the expansion enclosure all input and output data at once is low. For this reason, in an expansion enclosure equipped with only storage devices, even if there are many storage devices installed, it is rare for all of the storage devices to input and output data at the same time, so the heat generated by the power consumed by the storage devices is not a major problem. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2019-91152 Summary of the Invention [Problem to be solved by the invention]

[0004] The above-mentioned conventional technology does not take into consideration the heat generation and cooling of IO devices, which are devices that perform input / output (Input / Output). This point will be explained below. As the performance of storage systems improves, the power consumption of processors increases. This increase in processor power consumption also increases the amount of heat generated by the processor. For this reason, measures such as air cooling of processors have been taken. As the performance of storage systems improves, the power consumption and heat generation of not only processors but also IO devices increase. If IO devices are located near the processor, the heat generation points become concentrated. In particular, if IO devices are located downwind from the cooling air that cools the processor, the IO devices will be affected by the heat generated by the processor, making cooling difficult.

[0005] Therefore, the present invention aims to realize an efficient heat countermeasure for the entire storage system by taking into consideration not only the heat generated by the processor but also the heat generated by the IO devices. [Means for solving the problem]

[0006] In order to achieve the above object, one representative storage system of the present invention is a storage system that is connected to a host computer and stores or outputs data in accordance with a request from the host computer, and is characterized in that it comprises a first housing (controller housing) equipped with a controller having a processor that controls the storage system, and one or more second housings (expansion housings) equipped with memory devices that store data sent from the host computer, and further comprises an IO device that receives data from the host computer to be stored in the storage system and sends data output by the storage system to the host computer, and the IO device is mounted in the second housing (expansion housing). [Effects of the Invention]

[0007] According to the present invention, an efficient heat generation countermeasure can be realized for a storage system. Problems, configurations, and effects other than those described above will become clear from the following description of the embodiment. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is an explanatory diagram of a storage system according to a first embodiment. [Figure 2] FIG. 10 is a sequence diagram illustrating the processing of a read request according to the first embodiment. [Figure 3] FIG. 10 is a sequence diagram illustrating the processing of a write request according to the first embodiment. [Figure 4] FIG. 10 is an explanatory diagram of a storage system according to a second embodiment. [Figure 5] FIG. 10 is a sequence diagram illustrating the processing of a read request according to the second embodiment. [Figure 6] A sequence diagram illustrating the processing of a write request according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, an embodiment will be described with reference to the drawings. [Example]

[0010] Fig. 1 is an explanatory diagram of a storage system of Example 1. Fig. 1(a) is a schematic diagram of the storage system of Example 1 seen from the side, and Fig. 1(b) is a logical connection diagram of the storage system of Example 1.

[0011] As shown in FIG. 1(a), the storage system of the first embodiment has two expansion enclosures 1 (1a, 1b) provided on a controller enclosure 2. The number of expansion enclosures 1a, 1b is not limited to two, but may be any number equal to or greater than one. The controller enclosure corresponds to the first enclosure in the claims. The expansion enclosure corresponds to the second enclosure in the claims. The controller housing 2 is equipped with two controllers 210 (210a, 210b). The controller 210a includes a CPU (Central Processing Unit) 201a and two pass-through modules 202 (202a, 202b). The controller 210b includes a CPU 201b and two pass-through modules 202 (202c, 202d). The number of CPUs 201a and 201b mounted on the controllers 210a and 210b is not limited to 1, but may be any number greater than or equal to 1. The number of pass-through modules 202a is also not limited to 2, but may be any number greater than or equal to 1.

[0012] The expansion enclosure 1 comprises four IO devices 101 (101a to 101d), two integrated switches 102 (102a, 102b), two backend switches 103 (103a, 103b), and is equipped with four storage devices 104 (104a to 104d). The IO device 101a and the IO device 101b are connected to the integrated switch 102a, which is connected to the IO device 101a, the IO device 101b, and the backend switch 103a. The IO devices 101c and 101d are connected to the integrated switch 102b, which is connected to the IO devices 101c, 101d, and the backend switch 103b. The backend switch 103a is connected to the integrated switch 102a and the storage devices 104a to 104d. The backend switch 103b is connected to the integrated switch 102b and the storage devices 104a to 104d. The number of IO devices 101a to 101d is not limited to four and may be any number greater than or equal to two. The number of integrated switches 102a and 102b is also not limited to two and may be any number greater than or equal to two. The number of backend switches 103a and 103b is also not limited to two and may be any number greater than or equal to two. The number of storage devices 104a to 104d is also not limited to four and may be any number greater than or equal to one.

[0013] The integrated switch 102a of the expansion enclosure 1a is connected to the pass-through module 202a of the controller enclosure 2 by an integrated connection cable 203a. The integrated switch 102b of the expansion enclosure 1a is connected to the pass-through module 202d of the controller enclosure 2 by an integrated connection cable 203d. The integrated switch 102a of the expansion enclosure 1b is connected to the pass-through module 202b of the controller enclosure 2 by an integrated connection cable 203b. The integrated switch 102b of the expansion enclosure 1b is connected to the pass-through module 202c of the controller enclosure 2 by an integrated connection cable 203c.

[0014] The CPU 201 is a processor that controls the storage system. The storage device 104 stores data sent from the host computer. The IO device 101 performs processing related to sending and receiving data with the host computer. The IO device 101 includes a protocol controller unit for protocol processing related to sending and receiving data with the host computer, and a communication processing unit for communicating data with the host computer. The pass-through module 202 relays data.

[0015] When a write request is made by the host computer, the write request is sent to the CPU 201 via the IO device 101, the integrated switch 102, the integrated connection cable 203, and the pass-through module 202. The CPU 201 writes data to the storage device 104 via the pass-through module 202, the integrated connection cable 203, the integrated switch 102, and the backend switch 103. When a read request is made by the host computer, the read request is sent to the CPU 201 via the IO device 101, integrated switch 102, integrated connection cable 203, and pass-through module 202. The CPU 201 reads data from the storage device 104 via the pass-through module 202, integrated connection cable 203, integrated switch 102, and backend switch 103, and sends the read result to the host computer via the pass-through module 202, integrated connection cable 203, integrated switch 102, and IO device 101.

[0016] The expansion enclosure 1 and the controller enclosure 2 use predetermined surfaces of the enclosure for wiring, such as cables for communicating with the host computer and for connecting the integrated cable 203. The pass-through module 202, integrated switch 102, and IO device 101 are placed near the surface used for wiring. For convenience, this surface used for wiring is called the back surface, and the surface opposite the back surface is called the front surface. The back-end switch 103 does not need to be placed near the back surface because it does not require wiring to the outside of the enclosure. Although not shown in the figure, the storage system has a mechanism for introducing cooling air into the housing. The front side is the intake side for cooling air, and the rear side is the exhaust side for cooling air. The CPU 201 is located in the center of the controller enclosure 2. The storage device 104 is placed on the intake side of the expansion enclosure 1. On the downwind side of the CPU 201 in the controller enclosure 2, there is a pass-through module 202, but there is no IO device 101. The IO device 101 is placed in the expansion enclosure 1, so it is not downwind of the CPU 201.

[0017] Therefore, in the storage system of the first embodiment, the IO devices are not placed in the controller chassis, but are placed in the expansion chassis together with the storage devices. As a result, heat generation can be distributed to the controller chassis and expansion chassis without increasing the number of chassis, making it possible to take efficient measures against heat generation.

[0018] The storage system has two controllers 210 for redundant processing. The IO device 101 mounted in the expansion enclosure 1 is controlled by a processor provided in one of the controllers 210 mounted in the controller enclosure 2. The IO device 101 transmits data received from the host computer to the processor of one of the controllers 210, and receives data to be transmitted to the host computer from the processor of one of the controllers 210. On the other hand, the storage device 104 mounted in the expansion enclosure 1 is controlled by the processors of the two controllers 210 mounted in the controller enclosure 2. The storage device 104 receives data to be stored from the processors of the two controllers, and transmits data output by the storage device to the processors of two or more controllers. In this way, the storage device 104 can send and receive data to and from either processor of the two redundant controllers 210. Furthermore, when sending and receiving data to and from two controllers 210 simultaneously, the data sending and receiving performance seen from the storage device 104 can be doubled compared to when sending and receiving data to and from only one controller, and therefore the data sending and receiving performance of the storage device can be improved.

[0019] 2 is a sequence diagram illustrating the processing of a read request in embodiment 1. When the IO device 101a receives a read request from the host computer, it transmits the read request to the CPU 201a as a read request 301. The read request 301 is received by the CPU 201a via the integrated switch 102a, the integrated connection cable 203a, and the pass-through module 202a.

[0020] Upon receiving the read request 301, the CPU 201a sends a data output request 302 to the storage device 104a. The data output request 302 is received by the storage device 104a via the pass-through module 202a, the integrated connection cable 203a, the integrated switch 102a, and the backend switch 103a.

[0021] Upon receiving the data output request 302, the storage device 104a reads the requested data and transmits it to the CPU 201a as data output 303. The data output 303 is received by the CPU 201a via the backend switch 103a, the integrated switch 102a, the integrated connection cable 203a, and the pass-through module 202a.

[0022] The CPU 201a receives the data output 303, extracts the data transmitted from the storage device 104a from the data output 303, and transmits it to the IO device 101a as data return 304. The data return 304 is received by the IO device 101a via the pass-through module 202a, the integrated connection cable 203a, and the integrated switch 102a. Based on the data return 304, the IO device 101a returns a read response including the read data to the host computer.

[0023] 3 is a sequence diagram illustrating the processing of a write request in Example 1. When the IO device 101a receives a write request from the host computer, it transmits the write request to the CPU 201a as a write request 401. The write request 401 is received by the CPU 201a via the integrated switch 102a, integrated connection cable 203a, and pass-through module 202a.

[0024] The CPU 201a receives the write request 401 and sends a data send permission 402 to the IO device 101a. The data send permission 402 is received by the IO device 101a via the pass-through module 202a, the integrated connection cable 203a, and the integrated switch 102a. The IO device 101a sends the data send permission 402 to the host computer and receives write data 403 from the host computer.

[0025] When the IO device 101a receives the write data 403 from the host computer, it transmits the write data 403 to the CPU 201a. The write data 403 is received by the CPU 201a via the integrated switch 102a, the integrated connection cable 203a, and the pass-through module 202a.

[0026] The CPU 201a receives the write data 403 and sends a data storage request 404 to the storage device 104a. The data storage request 404 is received by the storage device 104a via the pass-through module 202a, the integrated connection cable 203a, the integrated switch 102a, and the backend switch 103a.

[0027] The storage device 104a that receives the data store request 404 transmits to the CPU 201a a data acquisition request 405. The data acquisition request 405 is received by the CPU 201a via the backend switch 103a, integrated switch 102a, integrated connection cable 203a, and pass-through module 202a.

[0028] Upon receiving the data acquisition request 405, the CPU 201a transmits the write data received in the write data 403 to the storage device 104a as data transmission 406. The data transmission 406 is received by the storage device 104a via the pass-through module 202a, the integrated connection cable 203a, the integrated switch 102a, and the backend switch 103a.

[0029] The storage device 104a, which has received the data transmission 406, extracts and stores the write data from the data transmission 406, and transmits to the CPU 201a a data storage completion notification 407. The data storage completion notification 407 is received by the CPU 201a via the backend switch 103a, the integrated switch 102a, the integrated connection cable 203a, and the pass-through module 202a.

[0030] Upon receiving the data storage completion notification 407, the CPU 201a transmits a write completion notification 408 to the IO device 101a. The write completion notification 408 is received by the IO device 101a via the pass-through module 202a, the integrated connection cable 203a, and the integrated switch 102a. Based on the write completion notification 408, the IO device 101a returns a response indicating the completion of the write to the host computer. [Example]

[0031] Fig. 4 is an explanatory diagram of a storage system of Example 2. Fig. 4(a) is a schematic diagram of the storage system of Example 2 seen from the side, and Fig. 4(b) is a logical connection diagram of the storage system of Example 2.

[0032] As shown in Fig. 4(a), the storage system of the second embodiment has two expansion enclosures 3 (3a, 3b) provided on the controller enclosure 2. The number of expansion enclosures 3a, 3b is not limited to two, but may be any number equal to or greater than one. The controller housing 2 is equipped with two controllers 210 (210a, 210b). The controller 210a includes a CPU (Central Processing Unit) 201a, two pass-through modules 202 (202a, 202b), and two back-end connection modules 205 (205a, 205b). The controller 210b includes a CPU 201b, two pass-through modules 202 (202c, 202d), and two back-end connection modules 205 (205c, 205d). The number of CPUs 201a and 201b mounted on the controllers 210a and 210b is not limited to 1, but may be any number greater than or equal to 1. The number of pass-through modules 202a is also not limited to 2, but may be any number greater than or equal to 1. The number of back-end connection modules 205a and 205b is also not limited to 2, but may be any number greater than or equal to 1.

[0033] The expansion enclosure 3 comprises four IO devices 101 (101a to 101d), two front-end switches 105 (105a, 105b), two back-end switches 106 (106a, 106b), and is equipped with four storage devices 104 (104a to 104d). The IO device 101a and the IO device 101b are connected to the front-end switch 105a. The IO device 101c and the IO device 101d are connected to the front-end switch 105b. The backend switch 106a is connected to the storage devices 104a to 104d. The backend switch 106b is connected to the storage devices 104a to 104d. The number of IO devices 101a to 101d is not limited to four and may be any number equal to or greater than 2. The number of front-end switches 105a and 105b is also not limited to two and may be any number equal to or greater than 2. The number of back-end switches 106a and 106b is also not limited to two and may be any number equal to or greater than 2. The number of storage devices 104a to 104d is also not limited to four and may be any number equal to or greater than 1.

[0034] The front-end switch 105a of the expansion enclosure 3a is connected to the pass-through module 202a of the controller enclosure 2 by an IO connection cable 204a. The front-end switch 105b of the expansion enclosure 3a is connected to the pass-through module 202d of the controller enclosure 2 by an IO connection cable 204d. The front-end switch 105a of the expansion enclosure 3b is connected to the pass-through module 202b of the controller enclosure 2 by an IO connection cable 204b. The front-end switch 105b of the expansion enclosure 3b is connected to the pass-through module 202c of the controller enclosure 2 by an IO connection cable 204c.

[0035] The backend switch 106a of the expansion enclosure 3a is connected to the backend connection module 205b of the controller enclosure 2 by a backend connection cable 206b. The backend switch 106b of the expansion enclosure 3a is connected to the backend connection module 205c of the controller enclosure 2 by a backend connection cable 206c. The backend switch 106a in the expansion enclosure 3b is connected to the backend connection module 205a in the controller enclosure 2 by a backend connection cable 206a. The backend switch 106b in the expansion enclosure 3b is connected to the backend connection module 205d in the controller enclosure 2 by a backend connection cable 206d.

[0036] When a write request is made by the host computer, the write request is sent to the CPU 201 via the IO device 101, the front-end switch 105, the IO connection cable 204, and the pass-through module 202. The CPU 201 writes data to the storage device 104 via the back-end connection module 205, the back-end connection cable 206, and the back-end switch 106. When a read request is made by the host computer, the read request is sent to the CPU 201 via the IO device 101, the front-end switch 105, the IO connection cable 204, and the pass-through module 202. The CPU 201 reads data from the storage device 104 via the back-end connection module 205, the back-end connection cable 206, and the back-end switch 106, and sends the read result to the host computer via the pass-through module 202, the IO connection cable 204, the front-end switch 105, and the IO device 101.

[0037] The expansion enclosure 3 and the controller enclosure 2 use predetermined surfaces of the enclosures for wiring, such as cables for communicating with the host computer, and for connecting the IO connection cable 204 and the back-end connection cable 206. The pass-through module 202, the back-end connection module 205, the front-end switch 105, the back-end switch 106, and the IO device 101 are arranged near the back surface, which is the surface used for wiring.

[0038] As in the first embodiment, the pass-through module 202 is present on the downwind side of the CPU 201 in the controller housing 2, but the IO device 101 is not present. The IO device 101 is placed in the expansion housing 3, and is therefore not on the downwind side of the CPU 201. Therefore, heat can be distributed to the controller housing and the expansion housing without increasing the number of housings, enabling efficient heat generation countermeasures.

[0039] 5 is a sequence diagram illustrating the processing of a read request in embodiment 2. When the IO device 101a receives a read request from the host computer, it transmits the read request to the CPU 201a as a read request 501. The read request 501 is received by the CPU 201a via the front-end switch 105a, the IO connection cable 204a, and the pass-through module 202a.

[0040] The CPU 201a receives the read request 501 and sends a data output request 502 to the storage device 104a. The data output request 502 is received by the storage device 104a via the backend connection module 205a, backend connection cable 206a, and backend switch 106a.

[0041] The storage device 104a that receives the data output request 502 reads the requested data and transmits it to the CPU 201a as data output 503. The data output 503 is received by the CPU 201a via the backend switch 106a, the backend connection cable 206a, and the backend connection module 205a.

[0042] The CPU 201a receives the data output 503, extracts the data transmitted from the storage device 104a from the data output 503, and transmits it to the IO device 101a as data return 504. The data return 504 is received by the IO device 101a via the pass-through module 202a, the IO connection cable 204a, and the front-end switch 105a. Based on the data return 504, the IO device 101a returns a read response including the read data to the host computer.

[0043] 6 is a sequence diagram illustrating the processing of a write request in Example 2. When the IO device 101a receives a write request from the host computer, it sends the write request to the CPU 201a as a write request 601. The write request 601 is received by the CPU 201a via the front-end switch 105a, the IO connection cable 204a, and the pass-through module 202a.

[0044] The CPU 201a receives the write request 601 and sends a data send permission 602 to the IO device 101a. The data send permission 602 is received by the IO device 101a via the pass-through module 202a, the IO connection cable 204a, and the front-end switch 105a. The IO device 101a sends the data send permission 402 to the host computer and receives write data 603 from the host computer.

[0045] When the IO device 101a receives the write data 603 from the host computer, it transmits the write data 603 to the CPU 201a. The write data 603 is received by the CPU 201a via the front-end switch 105a, the IO connection cable 204a, and the pass-through module 202a.

[0046] The CPU 201a receives the write data 603 and sends a data storage request 604 to the storage device 104a. The data storage request 604 is received by the storage device 104a via the backend connection module 205a, backend connection cable 206a, and backend switch 106a.

[0047] The storage device 104a that receives the data store request 604 transmits to the CPU 201a a data acquisition request 605. The data acquisition request 605 is received by the CPU 201a via the backend switch 106a, backend connection cable 206a, and backend connection module 205a.

[0048] The CPU 201a, which has received the data acquisition request 605, transmits the write data received in the write data 603 to the storage device 104a as data transmission 606. The data transmission 606 is received by the storage device 104a via the backend connection module 205a, the backend connection cable 206a, and the backend switch 106a.

[0049] The storage device 104a that has received the data transmission 606 extracts and stores the write data from the data transmission 606, and transmits to the CPU 201a a data storage completion notification 607. The data storage completion notification 607 is received by the CPU 201a via the backend switch 106a, the backend connection cable 206a, and the backend connection module 205a.

[0050] Upon receiving the data storage completion notification 607, the CPU 201a transmits a write completion notification 608 to the IO device 101a. The write completion notification 608 is received by the IO device 101a via the pass-through module 202a, the IO connection cable 204a, and the front-end switch 105a. Based on the write completion notification 608, the IO device 101a returns a response indicating the completion of the write to the host computer.

[0051] As described above, the disclosed storage system is a storage system that is connected to a host computer and stores or outputs data in accordance with requests from the host computer, and comprises a first housing (controller housing 2) equipped with a controller 210 having a processor (CPU 201) that controls the storage system, and one or more second housings (expansion housing 1, expansion housing 3) equipped with storage devices 104 that store data sent from the host computer. Furthermore, the storage system is characterized in that it is provided with an IO device 101 that receives data to be stored in the storage system from the host computer and transmits data output by the storage system to the host computer, and that the IO device 101 is mounted in the second enclosure (expansion enclosure 1, expansion enclosure 3). According to this configuration, by arranging the heat source in the controller housing 2 and the expansion housings (1, 3) at a distance from each other, an efficient heat countermeasure can be realized. In particular, it is preferable that the IO devices 101 are not mounted on the controller housing 2, that is, that the IO devices 101 are mounted together in the second housing.

[0052] Furthermore, in the storage system of the first embodiment, the first chassis (controller chassis 2) and the second chassis (expansion chassis 1) are connected by a connection cable (integrated connection cable 203). The processor mounted on the controller 210 controls the IO device 101 mounted on the second enclosure (expansion enclosure 1) via the connection cable, receives data from the IO device 101 that the IO device 101 has received from the host computer via the connection cable, and transmits data to be sent to the host computer to the IO device 101. The processor further controls the storage device 104 mounted in the second enclosure (expansion enclosure 1) via the connection cable, transmits data to be stored in the storage device 104 to the storage device 104 via the connection cable, and receives data output by the storage device 104 from the storage device 104. In this way, if the IO device 101 side (front end side) and the storage device 104 side (back end side) share a connection cable, the wiring can be simplified.

[0053] Furthermore, in the storage system of the second embodiment, the first housing (controller housing 2) and the second housing (expansion housing 1) are connected by a first group of connection cables and a second group of connection cables different from the first group of connection cables. The processor controls the IO device 101 mounted on the second enclosure (expansion enclosure 1) via the connection cable of the first group (IO connection cable 204), receives data that the IO device 101 has received from the host computer from the IO device 101, and transmits data to be sent to the host computer to the IO device 101 via the connection cable of the first group. The processor controls the storage device 104 mounted in the second enclosure (expansion enclosure 1) via the connection cable of the second group (back-end connection cable 206), transmits data to be stored in the storage device 104 to the storage device 104 via the connection cable of the second group, and receives data output by the storage device 104 from the storage device 104. Therefore, by separating the communication path from the processor to the IO device and the communication path from the processor to the storage device 104, communications between the IO device and the storage device do not interfere with each other, and efficient heat generation countermeasures can be achieved while simplifying the communication control of each. The "group" between the first group of connection cables and the second group of connection cables indicates a difference in their use, and does not mean that the physical properties or structures are different. Furthermore, one group does not necessarily have multiple cables; one group may contain one or multiple cables. For example, if there are multiple cables for controlling the IO device 101, these multiple cables are the first group of connection cables.

[0054] Furthermore, in the disclosed storage system, the first housing (controller housing 2) is equipped with two or more of the controllers 210, and the IO device 101 equipped in the second housing (expansion housing 1, expansion housing 3) is controlled by the processor provided in one of the two or more controllers 210 equipped in the first housing (controller housing 2), and the IO device 101 transmits data received from the host computer to the processor of the one controller 210, and receives data to be transmitted to the host computer from the processor of the one controller 210. Furthermore, the storage device 104 mounted in the second housing (expansion housing 1, expansion housing 3) is controlled by the processors of two or more of the controllers 210 mounted in the first housing (controller housing 2), receives data to be stored in the storage device 104 from the processors of the two or more controllers 210, and transmits data output by the storage device to the processors of the two or more controllers. This configuration makes it possible to make the controller redundant and improve the performance of sending and receiving data from the storage device.

[0055] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, not only can the configurations be deleted, but also replacements and additions of configurations are possible. For example, in the above embodiment, a storage system having two second enclosures (expansion enclosures) was exemplified, but the number of expansion enclosures may be one, or three or more. The number of controllers is also arbitrary. Furthermore, even in a configuration in which IO devices are provided in both the first enclosure (controller enclosure) and the second enclosure (expansion enclosure), heat dissipation from the IO devices can be achieved. The second enclosure (expansion enclosure) may be configured so that it can accommodate storage devices and IO devices, and a second enclosure (expansion enclosure) that does not have a storage device installed may be provided in order to add IO devices. [Explanation of symbols]

[0056] 1, 1a, 1b, 3a, 3b: Expansion housing 2: Controller case 101, 101a to 101d: IO devices 102, 102a, 102b, 105, 105a, 105b: Front-end switches 103, 103a, 103b, 106, 106a, 106b: Back-end switches 104, 104a to 104d: storage devices 201, 201a, 201b: Processors 202, 202a to 202d: Pass-through modules 203, 203a to 203d: Integrated connection cable 204, 204a to 204d: IO connection cable 205, 205a to 205d: Back-end connection modules 206, 206a to 206d: Back-end connection cables 210, 210a, 210b: Controllers

Claims

1. 1. A storage system that is connected to a host computer and stores or outputs data in accordance with a request from the host computer, a first housing that includes a controller having a processor that controls the storage system; one or more second enclosures each equipped with a storage device for storing data sent from the host computer; Equipped with further comprising an IO device that receives data to be stored in the storage system from the host computer and transmits data output by the storage system to the host computer; A storage system characterized in that the IO device is mounted in the second enclosure.

2. 2. A storage system according to claim 1, wherein the IO devices are mounted in a consolidated manner in the second enclosure.

3. 2. The storage system according to claim 1, the first housing and the second housing are connected by a connection cable, the processor controls the IO device mounted in the second enclosure via the connection cable, receives data from the IO device that the IO device has received from the host computer via the connection cable, and transmits data to the IO device that is to be transmitted to the host computer; The storage system is characterized in that the processor further controls the storage device mounted in the second housing via the connection cable, transmits data to be stored in the storage device to the storage device via the connection cable, and receives data output by the storage device from the storage device.

4. 2. The storage system according to claim 1, the first housing and the second housing are connected by a first group of connection cables and a second group of connection cables different from the first group; the processor controls the IO devices mounted in the second enclosure via the connection cables of the first group, receives data from the IO devices that the IO devices have received from the host computer via the connection cables of the first group, and transmits data to the IO devices to be transmitted to the host computer; A storage system characterized in that the processor controls the storage device mounted in the second housing via the connection cable of the second group, transmits data to be stored in the storage device to the storage device via the connection cable of the second group, and receives data output by the storage device from the storage device.

5. 2. The storage system according to claim 1, the first housing is equipped with two or more of the controllers, the IO device mounted in the second housing is controlled by the processor provided in one of the two or more controllers mounted in the first housing, the IO device transmits data received from the host computer to the processor of the one controller, and receives data to be transmitted to the host computer from the processor of the one controller; A storage system characterized in that the storage device mounted in the second housing is controlled by the processor of two or more of the controllers mounted in the first housing, data to be stored in the storage device is received from the processor of the two or more controllers, and data output by the storage device is sent to the processor of the two or more controllers.

Citation Information

Patent Citations

  • Storage system with power-saving function

    JP2019091152A