Light-emitting device, image forming apparatus, display, imaging apparatus, electronic apparatus, movable body, and wearable device

Abstract

To provide a light-emitting device that has a configuration advantageous for preventing a reduction in light-emitting quality associated with a conversion operation of a DA converter.SOLUTION: A light-emitting device comprises pixels 101 that are arranged in a plurality of rows and columns, a plurality of column circuits that individually drive the columns, a voltage generation circuit that outputs a pair of voltage signals, and a control circuit. The pixels 101 each include at least a first sub pixel that emits light in a first color and a second sub pixel that emits light in a second color different from the first color. The column circuit includes a first selection circuit 901 that outputs one of first color data and second color data corresponding to the first color and the second color, and a digital-analog converter 800 that converts the output color data into an analog signal on the basis of the pair of voltage signals output by the voltage generation circuit. In a first period, the first selection circuit 901 of a first column circuit outputs the first color data to the digital-analog converter 800, and the first selection circuit 901 of a second column circuit outputs the second color data to the digital-analog converter 800.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a light-emitting device, for example, a light-emitting device having an organic light-emitting element, and to an image forming apparatus, a display device, an imaging device, an electronic device, a mobile object, and a wearable device to which the light-emitting device is applied. [Background technology]

[0002] Some devices convert an input digital display signal into an analog video signal using a digital-to-analog converter (DA converter) that converts the signal into an analog signal based on a reference voltage, and output the analog video signal to a display element. Patent Document 1 describes a flat panel display device that time-division multiplexes a reference voltage and supplies it to the DA converter. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2003-98998 Summary of the Invention [Problem to be solved by the invention]

[0004] When multiple digital-to-analog (DA) converters arranged corresponding to pixel columns perform conversion operations, the potential of the wiring that supplies the voltage signal that serves as the reference for DA conversion can fluctuate. This potential fluctuation can cause crosstalk between columns, which can be a factor in degrading the quality of light emission.

[0005] An object of the present invention is to provide a light emitting device having a configuration that is advantageous for suppressing degradation in light emission quality that accompanies the conversion operation of a DA converter in the light emitting device. [Means for solving the problem]

[0006] A light emitting device according to one aspect of the present invention includes a plurality of pixels arranged to form a plurality of rows and a plurality of columns, a plurality of column circuits that drive the plurality of columns, a voltage generating circuit that outputs a set of voltage signals, and a control circuit, wherein each of the plurality of pixels includes at least a first sub-pixel that emits light in a first color and a second sub-pixel that emits light in a second color different from the first color, and the plurality of column circuits include a first selection circuit that outputs one of first color data and second color data corresponding to the first color and the second color that are input to each of the plurality of column circuits, and a control circuit that selects the output first color data or the output second color data from the first selection circuit. and a second selection circuit that supplies the analog signal output from the digital-to-analog converter to one of the first sub-pixels or the second sub-pixels that emits light of a corresponding color, wherein the plurality of column circuits have at least a first column circuit and a second column circuit, and are controlled by the control circuit so that, during a first period, the first selection circuit of the first column circuit outputs the first color data to the digital-to-analog converter and the first selection circuit of the second column circuit outputs the second color data to the digital-to-analog converter. [Effects of the Invention]

[0007] A light emitting device can be provided that has a configuration that is advantageous for suppressing a decrease in light emission quality that accompanies the conversion operation of a DA converter. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a block diagram of a light emitting device according to a first embodiment. [Figure 2] Schematic diagram of the reference voltage generation circuit [Figure 3] 1 is an explanatory diagram of a column circuit according to the first embodiment; [Figure 4] Digital-to-analog converter explanation section [Figure 5] Timing chart related to embodiment 1 [Figure 6] 10 is an explanatory diagram of a column circuit according to the second embodiment; [Figure 7] Timing chart related to embodiment 2 [Figure 8] 10 is an explanatory diagram of a column circuit according to the third embodiment; [Figure 9] Timing chart related to embodiment 3 [Figure 10] 10 is an explanatory diagram of a column circuit according to the fourth embodiment; [Figure 11] Timing chart related to the fourth embodiment [Figure 12] 10 is an explanatory diagram of a column circuit according to the fifth embodiment. [Figure 13] Timing chart related to embodiment 5 [Figure 14] 10 is an explanatory diagram of a column circuit according to a fifth embodiment; [Figure 15] Timing chart related to embodiment 5 [Figure 16] 1 is a schematic diagram illustrating an example of an image forming apparatus according to an embodiment of the present invention. [Figure 17] 1 is a schematic diagram illustrating an example of a display device according to an embodiment of the present invention. [Figure 18] 1A is a schematic diagram showing an example of an imaging device according to an embodiment of the present invention; FIG. 1B is a schematic diagram showing an example of an electronic device according to an embodiment of the present invention; [Figure 19] 1A is a schematic diagram showing an example of a display device according to an embodiment of the present invention; FIG. 1B is a schematic diagram showing an example of a foldable display device; [Figure 20] 1A is a schematic diagram showing an example of a lighting device according to an embodiment of the present invention; FIG. 1B is a schematic diagram showing an example of a vehicle having a vehicle lamp according to an embodiment of the present invention; [Figure 21] 1A and 1B are schematic diagrams showing an example of a wearable device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0010] (Embodiment 1) A light emitting device according to a first embodiment will be described below. FIG. 1 is a schematic diagram showing one form of a light emitting device according to the present invention. The description will be given taking as an example a display device including a pixel array 100 having a plurality of pixels 101 arranged across a plurality of rows and a plurality of columns (two-dimensionally). A control signal is input to each pixel 101 from a vertical scanning circuit 200 via a scanning line 210, and a pixel in a predetermined row is selected. A luminance signal voltage Vsig, which is an image signal, is input from a signal output circuit 300 via a signal line 310. The vertical scanning circuit 200 and the signal output circuit 300 are controlled by a control circuit 400.

[0011] The pixel 101 may include a light-emitting element such as a light-emitting diode. An organic light-emitting element may be used as the light-emitting element. The luminance signal voltage input to the light-emitting element is an analog signal. The light-emitting element can emit light at an amount corresponding to the voltage of this analog signal. Here, each pixel 101 may have multiple sub-pixels arranged by color. In this case, the signal lines 310 are arranged in columns based on each sub-pixel. For example, if one pixel includes three sub-pixels, three signal lines 310 may be arranged in one pixel column.

[0012] The signal output circuit 300 may include a horizontal scanning circuit 600, column digital-to-analog converter (DAC) circuits 800 arranged across multiple columns, and column driver circuits 700 arranged across multiple columns. The horizontal scanning circuit 600 scans the pixel array, and image data input to each column is input to the column DAC circuit 800. The column DAC circuit converts the image data into an analog signal and outputs it as a luminance signal voltage Vsig to a signal line 310 via the column driver circuit 700. A signal voltage written to the signal line 310 is supplied to the pixel 101 in a row selected by the vertical scanning circuit 200, causing the pixel 101 to emit light. The circuit configuration of the pixel 101 is not limited here. Here, an example will be described in which one DAC circuit 801 supplies analog signals to the signal lines 310 connected to three sub-pixels by switching the switches of a selection circuit 902.

[0013] The reference voltage generation circuit 500 can generate reference voltages in a number corresponding to the gradation of the image data and supply them to the column DAC circuit 800 via a reference voltage line 510. The reference voltage generation circuit 500 may also generate a reference voltage Vcal used to correct variations in the column driver circuit 700 and the pixels 101. In this case, the reference voltage Vcal may be supplied to the pixels 101 via the column driver circuit 700 and a signal line 310.

[0014] The reference voltage generation circuit 500 is, for example, a circuit as shown in FIG. 2. A minimum voltage signal VB for emitting light at the lowest brightness and a maximum voltage signal VW for emitting light at the maximum brightness are input to a buffer amplifier 520. The output of the buffer amplifier 520 is divided by resistors to generate a set of voltage signals. This set of voltage signals is output to a reference voltage line 510. In the example of FIG. 2, a configuration is shown in which a set of 256 voltage signals is generated when the image data is 8 bits. However, the configuration is not limited to that of FIG. 2 as long as the number of voltage signals generated corresponds to the image data and output to the reference voltage line 510. Furthermore, the locations at which the circuits for generating the minimum voltage signal VB and the maximum voltage signal VW are provided are not limited to a specific location. The voltage generation circuit may be implemented within the chip, or may be supplied from outside the chip.

[0015] A circuit that drives a signal line connected to one of the pixels arranged in a column is called a column circuit for one column. The column circuit may include a set of switches for supplying input data to a digital-to-analog converter, a digital-to-analog converter, and a set of switches for supplying the output of the digital-to-analog converter to the signal line. The column circuit may also include a drive circuit corresponding to one pixel.

[0016] An example of driving six pixels will be described with reference to FIG. 3 , which shows column circuits for n columns to n+1 columns each equipped with DAC[n] to DAC[n+5]. Note that the number of pixel columns and pixels is not limited to that shown in this example. Here, an example of a horizontal scanning circuit 600, column DAC circuit 800, column driver circuit 700, and pixel 101 for six pixels is shown. In this embodiment, the pixel 101 is composed of three sub-pixels corresponding to three colors, red (R), green (G), and blue (B), and three sets of signal lines 310 corresponding to each sub-pixel are provided. Here, the signal lines 310 are commonly provided for the pixels (sub-pixels) arranged in a column, and the pixels are driven for each row.

[0017] The column driver circuit 700 can have one buffer circuit 701 corresponding to the pixels arranged for each pixel column. The column DAC circuit 800 can have one digital-to-analog converter (DAC) 801 arranged for each pixel column. The voltage output from the DAC 801 is written to the signal line 310 via the buffer circuit 701. At this time, a switch is provided between the buffer circuit 701 and the signal line 310. The switch sequentially switches the connection between the buffer circuit 701 and the signal line 310, thereby sequentially writing the signal voltage to the signal line 310 connected to each sub-pixel. In this example, a set of three switches functions as one selection circuit 902. In FIG. 3, the output control signal line OUTSEL <0> ~OUTSEL <2> In response to the control signal appearing on the line OUTSEL, a switch located at the intersection with the output control signal line OUTSEL is controlled.

[0018] The latch circuits 601 arranged in the horizontal scanning circuit 600 can hold color data corresponding to each color, which is a digital signal input from outside, in accordance with scanning by the horizontal scanning circuit 600. The latches 601 are scanned by a control unit of the horizontal scanning circuit 600, and the data of each pixel 101 stored in the latch circuits 601 is input to each DAC 801. The number of latch circuits 601 arranged corresponds to the number of sub-pixels of each pixel 101. Color data is supplied to the latch circuits 601 from data wiring Rdata, Gdata, and Bdata corresponding to each pixel 101.

[0019] A switch is provided at the input section of the DAC 801. In this example, the outputs of three latch circuits are switched sequentially by the switch. In this example, a set of three switches functions as one selection circuit 901. The selection circuit 901 may include a latch circuit 601 corresponding to the switch. In this case, the selection circuit 902 including a switch provided at the output of the buffer circuit 701 described above and the selection circuit 901 including a switch provided at the input section of the DAC 801 switch in tandem. By switching the selection circuit 901 and the selection circuit 902 in tandem in this way, data corresponding to each pixel 101 is input to the DAC 801, and the operation of outputting a signal voltage corresponding to the data from the buffer circuit 701 can be performed in synchronous. Note that in FIG. 3, the input control signal line INSEL <0> ~INSEL <2> In response to a control signal appearing at the input control line INSEL, a switch located at the intersection with the input control line INSEL is controlled.

[0020] An example of the circuit of the nth DAC 801 is shown in FIG. 4. Here, an example is shown in which color data is 8 bits. Reference voltages are input to the DAC 801 from reference voltage lines 510-1 to 510-256. A switch is connected between the DAC 801 and the output wiring 802. 8-bit image data DACIN[n]-1 to DACIN[n]-8 input from the latch circuit 601 are input to a decoder circuit (DECODER) 811 of the DAC 801. In this configuration, 2 bits (00, 01, 10, 11) are decoded as one unit, and the 8-bit data is converted into 16 decode signal lines.

[0021] A reference voltage selection circuit (REFSEL) 821 is provided for each of the reference voltage lines 510-1 to 510-256. Of the 16 decode signal lines, four corresponding to the selected gradation are combined and input to REFSEL. One of the switches connected to the reference voltage lines 510-1 to 510-256 is selected by REFSEL 821 according to the combination of each of the four sets of decode signal lines, from 00 to 11. The selected reference voltage is input to the buffer circuit 701 via the output wiring 802. At this time, the operation of the DAC 801 is not limited to the circuit configuration shown in FIG. 4, as long as the reference voltage line 510 corresponding to the data DACIN[n] is output from the DAC 801.

[0022] Next, the operation timing of this embodiment will be explained with reference to Fig. 5. The horizontal drive (HD) signal goes to high level, and writing to pixels in a predetermined row begins. At time t1, the HD signal goes to high level, and a predetermined row of the pixel array 100 is selected. Signal writing to the pixels 101 arranged in the same selected row begins. At time t2, INSEL <0> becomes high level, and the switches connecting the input DACIN of the DAC 801 and each latch circuit 601 are turned on.

[0023] In this example, of the three latch circuits LATCH provided in the nth column, the left one is selected by the selection circuit 901 and connected to DAC[n]. Also, of the three latch circuits LATCH in the (n+1)th column, the second one from the left is selected and connected to DAC[n+1]. During the first period from time t2 to t3, as shown in Figure 5, data is input in the order R, G, B, R, G, B data to DACIN of each DAC 801 provided in the nth to (n+5)th columns.

[0024] The operation will be explained further. Data is input from the latch circuit 601 to the DAC 801, and digital-to-analog conversion is performed in the DAC 801. One of the reference voltage lines 510-1 to 510-256 is selected in the DAC 801. The output of the DAC 801 is output to the corresponding buffer circuit 701. Next, the INSEL <0> During the High level period, OUTSEL <0> When INSEL goes to high level, the switch of the selection circuit 902 connects the buffer circuit 701 to the signal line 310, and the signal voltage is written to the signal line 310. At time t3, INSEL <0> becomes Low level, and OUTSEL <0> becomes low level before that, and the switches between the signal line 310 and the buffer circuit 701, and between the DAC 801 and the latch circuit 601 are turned off.

[0025] In addition, in the second period from time t3 to time t4, INSEL <1> , OUTSEL <1> , sequentially become high level, and the latch circuits 601 and signal lines 310 different from those at time t2 are sequentially connected to the DAC 801 and buffer circuit 701. Next, at time t4, INSEL <1> becomes low level, and before that, OUTSEL <1> becomes low level, and the switch is turned off as at time t3, and the connection is released.

[0026] Next, in the third period from time t4 to t5, INSEL <2> , OUTSEL <2> are sequentially set to a High level, and the latch circuits 601 and signal lines 310 different from those at times t2 and t3 are sequentially connected to the DAC 801 and buffer circuit 701. At time t5, INSEL <2> becomes high level, and before that, OUTSEL <2> becomes low level, and each switch is turned off in turn. In this way, a signal writing operation for the same row is performed.

[0027] In this series of signal writing operations, for example, INSEL <0> The timing when OUTSEL goes high <0> The order in which INSEL goes to high level at time t3 may be reversed or may be simultaneous. <0> and OUTSEL <0> However, the order in which INSEL <0> Better than OUTSEL <0> If OUTSEL goes low later, the voltage fluctuation caused when the switch between the DAC 801 and the latch circuit 601 is turned off may be written to the signal line 310. <0> INSEL <0> It is better for the transition timing to become low before INSEL <1> and OUTSEL <1> , INSEL <2> and OUTSEL <2> At time t6, the HD signal goes high, and the above signal writing operation is repeated for the next row.

[0028] In the above operation, INSEL <0> ~INSEL <2> are common wirings for the columns, and when each becomes High level, data is input from each latch circuit 601 to DACIN[n] to DACIN[n+5] for all columns simultaneously. Depending on the input data, one of the reference voltage lines 510-1 to 510-256 is simultaneously selected by the DAC 801. <0> ~OUTSEL <2> Similarly, all columns are controlled simultaneously. In this manner, data can be input to the signal lines 310 connected to the pixels of all columns.

[0029] The timing of data input to the DAC 801 will be explained with reference to FIG. <0> When the signal goes to High level and the switch is turned ON, R data [n] is input to DACIN[n]. G data [n+1] is input to DACIN[n+1], and B data [n+2] is input to DACIN[n+2]. This is repeated in DACIN[n+3] to DACIN[n+5], and the same color data is not input to all columns (columns n to n+5) at the same time. INSEL at times t3 and t4 <1> , INSEL <2> Even when the switch is turned on, the same color data is not input to all columns at the same time. A plurality of columns may be divided into blocks of a predetermined number of columns, so that the same color is not selected simultaneously within each block.

[0030] In a configuration in which data of the same color is input simultaneously to all columns, the voltage fluctuation of the reference voltage line 510 can become large during the selection operation of the reference voltage line 510. This is because the voltage of the reference voltage line 510 fluctuates due to switch feedthrough when selecting the reference voltage and parasitic capacitance of the control line. In this case, adjacent pixels tend to have the same data of the same color, and the same reference voltage line 510 is selected, resulting in large voltage fluctuations due to superposition of the voltages corresponding to the number of simultaneously selected columns. A voltage that deviates from the desired voltage is written to the signal line 310 via the buffer circuit 701, which can lead to the pixel 101 emitting light at a brightness that deviates from the desired brightness.

[0031] In particular, when displaying white, for which color balance is important, the above fluctuations cause the color to appear colored, significantly degrading display quality. Note that this degradation in display quality can be reduced by lengthening the high period of INSEL and OUTSEL until the fluctuating voltage of the reference voltage line 510 returns to the desired voltage. However, this increases the signal voltage write time, which can lead to a decrease in the display frame rate and a decrease in the performance of the display device.

[0032] As in this case, by varying the color data simultaneously input to the DAC 801 for each column, it is possible to reduce the number of columns that simultaneously select the same reference voltage line 510, thereby reducing the coloring of the display due to voltage fluctuations in the reference voltage line 510. In addition, there is no need to extend the write time, which is advantageous for high-speed circuit operation and improved display frame rates.

[0033] In this embodiment, since the display data tends to have the same value for adjacent pixels, the color data input to DAC[n] to DAC[n+5] of the DAC 801 is shown as being swapped between adjacent pixels, but this is not limiting. Because the reference voltage line 510 is common to the columns, voltage fluctuations propagate beyond adjacent columns. Therefore, swapping may be performed in block units, with multiple DACs 801 forming one unit.

[0034] For example, in the case of a 12-column circuit, color data may be input to DAC[n] to DAC[n+5] in the same order as DAC[n] in Fig. 5, and color data may be input to DAC[n+6] to DAC[n+11] in a different order. Also, in this embodiment, the same color data is input simultaneously to DAC[n] to DAC[n+5] in equal numbers in the column direction, but this does not have to be equal.

[0035] Furthermore, although this embodiment has shown an example in which one pixel column is configured with one buffer circuit 701 and one DAC 801, a configuration in which multiple pixel columns are driven by one buffer circuit 701 and one DAC 801 may also be used. In this case, data of the same color may be input consecutively to the same DAC 801.

[0036] Although this embodiment has been described as a case where data is input to the DAC 801 at the same time for the same row, the configuration of this embodiment is not limited to this. Since the effect can be obtained by reducing the number of times the DAC 801 simultaneously selects the same color, it is preferable to prevent the color data to the DAC from simultaneously being the same color, as in this embodiment, even when different rows are simultaneously driven. For example, the pixel region may be divided into left and right blocks, and different rows may be driven, or all columns may be driven separately.

[0037] (Embodiment 2) The second embodiment shown in FIG. 6 will be described below. In contrast to the first embodiment, this embodiment is an example in which, when the data input to the DAC 801 is three colors, two of the colors are mixed. In this case, as shown in the timing chart of FIG. 7, at time t2, INSEL <0> When goes high, R data is input to DAC[n], DAC[n+2], and DAC[n+4]. G data is input to DAC[n+1], DAC[n+3], and DAC[n+5].

[0038] INSEL at time t3 <1> At time 4, INSEL switches between the columns where R and G data are input. <2> When OUTSEL goes high, B data is input simultaneously to all columns. <0> ~OUTSEL <2> The timing of the transition to high and low levels is <0> ~INSEL <2> The relationship between the transition timing is the same as in the first embodiment. At this time, for R data and G data, the number of columns of DACs 801 to which data of the same color is simultaneously input is reduced. This makes it possible to reduce the number of DACs 801 that select the same reference voltage line 510 of the same color from the reference voltage lines 510-1 to 510-256 in the DACs 801, thereby reducing fluctuations in the reference voltage line 510.

[0039] In this embodiment, an example of two-color data, R data and G data, has been given, but the color combination is not limited thereto. For example, a combination of R data and B data is also possible. Since R coloring is generally more noticeable, degradation of display quality can be reduced simply by reducing the number of DACs 801 that simultaneously input R data. In this embodiment, the arrangement and connection of the switches, their control lines, INSEL, and OUTSEL can be simplified compared to the first embodiment, thereby suppressing an increase in circuit area.

[0040] (Embodiment 3) The third embodiment shown in Fig. 8 will now be described. This embodiment differs from the first embodiment in that the order of the color data R data, G data, and B data input to the DAC 801 is different for all DAC[n] to DAC[n+5]. Fig. 8 shows an example of the connection between the latch circuit 601 and the DAC 801, and the connection between the buffer circuit 701 and the signal line 310. Fig. 9 is a timing chart of this configuration.

[0041] Here, the INSEL <0> ~INSEL <2> , OUTSEL <0> ~OUTSEL <2> The timing of transition to the High level and the Low level of each INSEL is the same as that of the first embodiment. <0> ~INSEL <2> When the R, G, and B color data are input to DAC[n] to DAC[n+5] at the timing when each of the DACs goes to High level, the R, G, and B color data are input to each of the DACs for two pixel columns. Therefore, as described in the first embodiment, it is possible to reduce voltage fluctuations during the selection operation of the reference voltage line 510 of the DAC 801.

[0042] Also, when paying attention to the order in which the color data R data, G data, and B data are input, DAC[n] is R data[n] → G data[n] → B data[n], whereas DAC[n+1] has the R data and G data in the reverse order. At this time, INSEL <0> From INSEL <1> At the timing when the selection is switched to , it is assumed that R data[n] and R data[n+1] are the same data. At this time, DAC[n] switches from a state in which one of the reference voltage lines 510-1 to 510-256 is selected by a switch to an unselected state with the switch turned OFF. Meanwhile, in DAC[n+1], the switch of the reference voltage line 510 selected by DAC[n] is turned ON and the line is selected.

[0043] That is, selection and deselection are simultaneously performed on any one of the reference voltage lines 510-1 to 510-256. Considering switch feedthrough and the fact that voltage transitions on control signal lines, such as the decode signal lines shown in FIG. 4, propagate from parasitic capacitance to the reference voltage line 510, voltage fluctuations on the reference voltage line 510 are canceled out by the reverse operation of selection and deselection. Furthermore, the Gdtada[n] and B data[n] of DAC[n] are also input in the reverse order in DAC[n+2]. This achieves a similar cancellation effect of voltage fluctuations on the reference voltage line 510 when the G data and B data are the same. Regarding the cancellation effect of voltage fluctuations due to the order of color data input to the DAC 801, when considering all color combinations, the combinations are based on the order of colors in DAC[n] to DAC[n+5] according to the example of this embodiment.

[0044] As a result, when the R, G, and B color data are the same across DAC[n] to DAC[n+5], voltage fluctuations are canceled out, ideally resulting in almost no voltage fluctuations. Adjacent pixels typically tend to have the same data. While this embodiment illustrates a configuration example for six adjacent DACs 801, this is not limiting. For example, multiple DACs 801 may be grouped into one block, and the R, G, and B color data may be input in the same order within the same block, with color data switching aimed at canceling out voltage fluctuations between blocks. While this embodiment, like the first embodiment, illustrates a configuration example for driving the same row, this is not limiting. Even when driving different rows, voltage fluctuations on the reference voltage line 510 are reduced, improving display quality.

[0045] (Embodiment 4) The fourth embodiment will be described below. An example of the configuration of this embodiment is shown in Fig. 10. In the first to third embodiments described so far, the color data R data, G data, and B data input to the latch circuit 601 are output to the latch circuit 601 from wiring prepared for each color. In this embodiment, the input data wiring Dataline <0> ~Dataline <2> R data, G data, and B data are mixed in each column. Data is output in the same order from the multiple latch circuits 601 in each column. Switches that function as selection circuits 901 connecting the DAC 801 and the latch circuits 601 are arranged in the same pattern for DAC[n] to DAC[n+5]. The latch circuits 601 are connected to the data wiring Dataline <0> ~Dataline <2> is connected.

[0046] The timing at which the R data, G data, and B data, which are the data for each color, are written into the latch circuit 601 is determined by the strobe output (SR_OUT <n>~SR_OUT<n+5> ) pulse. Specifically, SR_OUT <n>~SR_OUT<n+5> The writing is controlled when the SR_OUT signal falls from a high level to a low level. At this time, the SR_OUT and DAC number correspond to each pixel column number. For example, SR_OUT <n>controls writing to the latch circuit 601 connected to DAC[n].<n+1> ~SR_OUT<n+5> also correspond to DAC[n+1] to DAC[n+5] respectively.

[0047] A detailed timing chart is shown in Figure 11. The kth HD period is from time t1 to t9, and the k+1th HD period is from t9 to t14. During the kth HD period, the HD signal goes high at time t1, and the operation of writing display data for the k+1th row into each latch circuit 601 begins.

[0048] At time t2, SR_OUT <n>becomes Hi level, and data writing to the latch circuit 601 in the nth pixel column begins. <n>During the high level period, <0> R data <n>(R[n]), Dataline <1> G data <n>(G[n]), Dataline <2> B data <n>(B[n]) starts to be input. At time t3, when it becomes low level, R data <n>, G Data <n>, B data <n>The data is written into each latch circuit 601 in the n-th pixel column. At the same time, the next column signal SR_OUT of the shift register circuit 602<n+1> becomes high level.

[0049] SR_OUT<n+1> During the high level period, <0> ~Dataline <2> At the time of the data write operation, the input of data to be written to the latch circuit 601 in the (n+1)th pixel column starts. <0> G data<n+1> (G[n+1]), Dataline <1> R data<n+1> (R[n+1]), Dataline <2> B data<n+1> (B[n+1]) are input respectively.

[0050] At time t4, SR_OUT of the next pixel row<n+1> When SR_OUT goes to low level, data is written to each latch circuit 601 in the (n+1)th pixel column.<n+2> ~SR_OUT<n+5> At times t5 to t8 when the data is at a low level, the R data, G data, and B data, which are color data, are mixed on the same Dataline, as shown in FIG. <0> ~Dataline <2> The data input to SR_OUT <n>, SR_OUT<n+1> Similarly, SR_OUT<n+2> ~SR_OUT<n+5> is switched to the next pixel row data during the High level period.

[0051] Also, SR_OUT at times t4 to t7<n+1> ~SR_OUT<n+5> The timing at which the SR_OUT signal transitions to High level and Low level is the same as at time t3. As at time t3, the next SR_OUT signal transitions to High level at the timing at which the SR_OUT signal of the previous pixel column transitions to Low level. However, this does not have to be simultaneous, as it is sufficient that the desired data is written to each latch circuit 601 at the timing at which the SR_OUT signal transitions to Low level.

[0052] Also, each SR_OUT <n>~SR_OUT<n+5> On the other hand, Dataline <0> ~Dataline <2> 11, the data cycles input to the latch circuits 601 are preferably shifted by half a cycle. However, as long as the desired data is written to each latch circuit 601, it is not limited to a half cycle. At time t9, the HD signal goes to a high level, the next (k+1)th HD period starts, and the signal write operation for the (k+1)th row is performed. Here, the INSEL <0> ~INSEL <2> Transition timing and OUTSEL <0> ~OUTSEL <2> The transition timing relationship is the same as in the first embodiment.

[0053] Input to the DAC 801 and DAC[n] to DAC[n+5] is performed from time t10 to time t13. This timing is the same as in the third embodiment. <0> ~INSEL <2> The R, G, and B color data input to DAC[n] to DAC[n+5] are mixed together at the timing when the DAC 801 and latch circuit 601 are connected. Since the same color data is not input to all columns of each DAC 801 at the same time, fluctuations in the reference voltage line 510 can be reduced.

[0054] Also, INSEL at times t11 and t12 <0> ~INSEL <2> At the timing when the input data is switched, the effect of canceling out the fluctuation of the reference voltage line 510 can be obtained in the same way as in the third embodiment, depending on the input order of the color data R data, G data, and B data. <0> ~Dataline <2> The R data, G data, and B data of the color data input from the DACs 801 and 802 are mixed at each time. This ensures that the color data input simultaneously to the DACs [n] to [n+5] are not the same color. When the data wiring input to the latch circuit 601 is common to each color data as in the first to fourth embodiments, the switches between the latch circuit 601 and the DACs 801 and the INSELs that control them are used. <0> ~INSEL <2> In the conventional method, the connections of the reference voltage lines 510 had to be asymmetric. However, in this embodiment, this is not necessary, and the connections of each column can be patterned. This reduces the fluctuation of the reference voltage line 510 while also preventing an increase in the circuit size and complexity.

[0055] In this case, the data input to DAC[n] to DAC[n+5] should not be the same color data input to all columns at the same time. <0> ~Dataline <2> The color order of the data input to the DAC 801 is not limited to that of this embodiment. Also, the same colors may be consecutive in the time direction. In this embodiment, the order of the color data input to the DAC 801 is the same as that of the configuration of the third embodiment, but is not limited to this. Color combinations such as those given as examples in the first to fourth embodiments may also be used.

[0056] (Embodiment 5) The fifth embodiment will be described below. A configuration example of this embodiment is shown in FIG. 12. This embodiment uses an INSEL <0> ~INSEL <2> A mode selection circuit (SELMODE circuit) 804 for selecting an operation mode is added between the switches 701 and 702. Also, an OUTSEL <0> ~OUTSEL <2> The SELMODE circuits 803 and 804 are connected to the INSEL <0> ~INSEL <2> , OUTSEL <0> ~OUTSEL <2> Switches the control mode.

[0057] At this time, INSEL <0> ~INSEL <2> High level and low level transition timing of OUTSEL <0> ~OUTSEL <2> The transition timing is the same as in the first embodiment regardless of the control mode. The differences in control modes by SELMD are shown in Figure 13. For example, a first mode is shown that is executed when SELMD is at a low level during the m-th HD period starting at time t1. Also shown is a second mode that is executed when SELMD is at a high level during the (m+1)-th HD period starting at time t6. However, for simplicity, an example in which the transition occurs during consecutive HD periods is shown, but this is not limiting.

[0058] It may be at a low level throughout the entire HD period of one display frame, or it may be at a high level. Next, with regard to the color data input to DAC[n] to DAC[n+5] of each DAC 801, control is performed so that R data, G data, and B data are input in order from time t2 to t5 while SELMD is at a low level. Meanwhile, control is performed so that color data of the same color is input to all DAC[n] to DAC[n+5] from time t7 to t10 while SELMD is at a high level. This corresponds to the same driving as the prior art mentioned above.

[0059] For example, INSEL <0> During the High level period, R data is input, and INSEL <1> So G data, INSEL <2> In this case, B data is input. This is the opposite of the operation of reducing voltage fluctuations on the reference voltage line 510 in the DAC 801 described in the first to fifth embodiments, and the same color data is input to all DACs 801 at the same time. This can suppress degradation of image quality in certain special scenes. The use of switching operation between High level and Low level of SELMD will be described below. First, when SELMD is at Low level, the same color data is input to all DACs 801, which has the effect of suppressing coloring in scenes such as night scenes.

[0060] An example will be explained using Figure 14 for two columns of DAC801, DAC[n] and DAC[n+1]. At this time, when the pixel 101 is miniaturized, the pitch of the DAC801 and buffer circuit 701 also becomes narrower, and the parasitic capacitance between adjacent pixels increases. Naturally, the output of the buffer circuit 701 also has parasitic capacitance 702, so the buffer circuit 701 must also drive the parasitic capacitance. Figure 15 explains each timing and the transition of the signal voltages of the outputs OUT[n] and OUT[n+1] of the buffer circuit 701. When the output voltage difference between adjacent pixels is small and all pixels are displayed in black, INSEL <0> becomes high level, and then OUTSEL <0> At the timing when writing of the signal voltage to the signal line 310 starts, OUT[n] and OUT[n+1] rise to the same signal voltage of the black light emission level between adjacent pixels as shown by the solid line, so the change in the charge held in the parasitic capacitance 702 between adjacent pixels is small.

[0061] Thereafter, the signal voltage remains at the same black display level from time t14 to time t18, so the voltage does not change as shown by the solid line. <0> ~OUTSEL <2> becomes low, a signal voltage of the desired black display level is written to the signal line 310. On the other hand, if only one R pixel in the nth pixel column emits light, at time t12, OUT[n] becomes a signal voltage of the emission luminance level, and therefore becomes a voltage lower than the black emission level, as indicated by the dotted line. On the other hand, a signal voltage of the black emission level is written to the adjacent OUT[n+1], but because it is necessary to write the differential voltage with OUT[n] to the parasitic capacitance 702, the load on the buffer circuit 701 becomes heavy, and the voltage settling time becomes long, as indicated by the dotted line.

[0062] At time t13, OUTSEL <0> When INSEL goes low, the signal voltage is not fully settled, so the signal voltage on the signal line 310 is not the desired black display voltage, but is slightly lower, causing a black floating. In this case, since OUT[n+1] writes the signal voltage of the G pixel, the G pixel also emits light, even though only the R pixel should emit light. At time t14, INSEL <1> At time t15, OUTSEL goes to High level, and the next color data G data [n] and B data [n+1] are input, and OUT[n] and OUT[n+1] are raised to the signal voltage of the black display level. <1> becomes low level, and a signal voltage of the desired black display level is written to the signal line 310.

[0063] At time t16, the next color data is switched to B data [n] and R data [n+1], but the signal voltage remains constant, and at t17, the OUTSEL <2> When the signal line 310 goes low, the desired voltage is written to the signal line 310. In cases where the background is a mostly black area, such as a night scene, and certain pixels emit light, the signal voltage may not settle to the desired voltage due to parasitic capacitance between adjacent pixels, resulting in noticeable localized coloring. In such special scenes, it is desirable to simultaneously output the same color from the buffer circuit 701.

[0064] In this embodiment, if G data[n+1] changes to R data[n+1], the voltage change at OUT[n+1] will be as shown by the dotted line, causing the R pixel to color, but since the color change is the same color as the emitted light, it is not very noticeable. On the other hand, in scenes where white is displayed, such as clouds during the day, the driving method described in the previous embodiment is appropriate from the perspective of suppressing color change in the display caused by voltage fluctuations on the reference voltage line 510.

[0065] As described above, in a specific display scene, switching to drive each column with color data of the same color can maintain display quality for each scene. Regarding mode selection, for example, a configuration is sufficient in which SELMD is set to a high level when displaying a night scene, and SELMD is set to a low level otherwise. This setting switching is not limited. Of course, a configuration may be adopted in which SELMD is automatically switched by determining whether the input data is a nearly black display. For example, the control circuit 400 in FIG. 1 may be provided with a data processing function. Furthermore, although the present invention has been described with reference to a case in which the pixel 101 emits light with high luminance when a low voltage is applied, the polarity may be reversed.

[0066] (Example of application of light emitting device) Below, we will explain examples in which the light-emitting devices according to the above-mentioned embodiments 1 to 5 are applied to equipment. As the light-emitting elements, organic light-emitting elements are preferably used. Figure 16 shows an image forming apparatus according to this embodiment. Figure 16(a) is a schematic diagram of an image forming apparatus 36 according to this embodiment. The image forming apparatus has a photoconductor 927, an exposure light source 928, a developing unit 931, a charging unit 930, a transfer unit 932, a conveying unit 933, and a fixing unit 935.

[0067] Light 929 is emitted from an exposure light source 928, and an electrostatic latent image is formed on the surface of a photoconductor 927. This exposure light source has a light-emitting device according to any one of embodiments 1 to 5. A developing unit 931 has a developing material such as toner, and applies the developing material to the exposed photoconductor 927. A charging unit 930 charges the photoconductor 927. A transfer unit 932 transfers the developed image to a recording medium 934. A transport unit 933 transports the recording medium 934. The recording medium 934 is, for example, paper. A fixing unit 935 fixes the image formed on the recording medium.

[0068] 16(b) and 16(c) are schematic diagrams showing an exposure light source 928 in which multiple light-emitting units 936 are arranged on a long substrate. Arrow 937 indicates a direction parallel to the axis of the photoconductor, representing the row direction in which the light-emitting elements are arranged. Organic light-emitting elements can be used as the light-emitting elements. This row direction is the same as the axis direction about which the photoconductor 927 rotates. This direction can also be called the long axis direction of the photoconductor.

[0069] Figure 16(b) shows a configuration in which the light-emitting units are arranged along the longitudinal axis of the photoconductor. Figure 16(c) shows a different configuration from Figure 16(b), in which the light-emitting units are arranged alternately in the column direction in each of the first and second columns. The first and second columns are arranged at different positions in the row direction.

[0070] 16(c), the first column has a plurality of light-emitting units arranged at intervals. The second column has light-emitting units at positions corresponding to the intervals between the light-emitting units in the first column. That is, the plurality of light-emitting units are also arranged at intervals in the row direction.

[0071] The arrangement in FIG. 16(c) can also be described as a grid arrangement, a houndstooth arrangement, or a checkerboard pattern.

[0072] 17 is a schematic diagram illustrating an example of a display device that can use the light-emitting devices according to the first to fifth embodiments. The display device 1000 may have a touch panel 1003, a display panel 1005, a frame 1006, a circuit board 1007, and a battery 1008 between an upper cover 1001 and a lower cover 1009. The touch panel 1003 and the display panel 1005 are connected by flexible printed circuits FPCs 1002 and 1004. A transistor is disposed on the circuit board 1007. The battery 1008 may not be provided if the display device is not a portable device, and may be provided in a different position even if the display device is a portable device.

[0073] The display device according to this embodiment may have color filters having red, green, and blue colors, which may be arranged in a delta arrangement.

[0074] The display device according to the present embodiment may be used as a display unit of a mobile terminal. In this case, the display device may have both a display function and an operation function. Examples of the mobile terminal include a mobile phone such as a smartphone, a tablet, and a head-mounted display.

[0075] The display device according to this embodiment may be used as a display unit of an imaging device having an optical unit with a plurality of lenses and an imaging element that receives light that has passed through the optical unit. The imaging device may have a display unit that displays information acquired by the imaging element. The display unit may be a display unit exposed to the outside of the imaging device or a display unit disposed within a viewfinder. The imaging device may be a digital camera or a digital video camera.

[0076] 18(a) is a schematic diagram showing an example of an imaging device according to this embodiment. The imaging device 1100 may have a viewfinder 1101, a rear display 1102, an operation unit 1103, and a housing 1104. The viewfinder 1101 may have a display device using the light-emitting device according to embodiments 1 to 5. In this case, the display device may display not only an image to be captured, but also environmental information, imaging instructions, and the like. The environmental information may include the intensity of external light, the direction of external light, the speed at which the subject is moving, the possibility that the subject will be blocked by an obstruction, and the like.

[0077] Since the optimum timing for capturing an image is very short, it is better to display information as quickly as possible. Therefore, it is advisable to use organic light-emitting elements as the light-emitting elements, as organic light-emitting elements have a fast response speed. Display devices using organic light-emitting elements are more suitable than liquid crystal display devices, which require high display speed.

[0078] The imaging device 1100 has an optical section (not shown). The optical section has multiple lenses, which form an image on an imaging element housed in a housing 1104. The focus of the multiple lenses can be adjusted by adjusting their relative positions. This operation can also be performed automatically. The imaging device may also be called a photoelectric conversion device. Instead of sequentially capturing images, the photoelectric conversion device can include an imaging method that detects the difference from the previous image, or a method of cutting out an image from a constantly recorded image, etc.

[0079] FIG. 18(b) is a schematic diagram showing an example of an electronic device according to this embodiment. The electronic device 1200 has a display unit 1201, an operation unit 1202, and a housing 1203. The housing 1203 may have a circuit, a printed circuit board having the circuit, a battery, and a communication unit. The operation unit 1202 may be a button or a touch panel type reaction unit. The operation unit may be a biometric recognition unit that recognizes a fingerprint to unlock the device, etc. An electronic device having a communication unit can also be called a communication device. The electronic device may further have a camera function by including a lens and an image sensor. An image captured by the camera function is displayed on the display unit. Examples of the electronic device include a smartphone and a laptop computer.

[0080] 19(a) and 19(b) are schematic diagrams showing an example of a display device using the light-emitting devices according to the first to fifth embodiments. FIG. 19(a) shows a display device such as a television monitor or a PC monitor. The display device 1300 has a frame 1301 and a display unit 1302. When the light-emitting devices according to the first to fifth embodiments are used in the display unit 1302, degradation of the displayed image can be suppressed.

[0081] It has a frame 1301 and a base 1303 that supports a display unit 1302. The base 1303 is not limited to the form shown in Fig. 11(a). The bottom side of the frame 1301 may also serve as the base.

[0082] The frame 1301 and the display unit 1302 may be curved. The radius of curvature may be 5000 mm or more and 6000 mm or less.

[0083] FIG. 19(b) is a schematic diagram illustrating another example of a display device. The display device 1310 in FIG. 19(b) is configured to be bendable, and is a so-called foldable display device. The display device 1310 has a first display unit 1311, a second display unit 1312, a housing 1313, and a bending point 1314. The first display unit 1311 and the second display unit 1312 may have the light-emitting devices according to embodiments 1 to 5. The first display unit 1311 and the second display unit 1312 may be a single seamless display unit. The first display unit 1311 and the second display unit 1312 can be separated by the bending point. The first display unit 1311 and the second display unit 1312 may display different images, or the first and second display units may display a single image.

[0084] FIG. 20(a) is a schematic diagram illustrating an example of an illumination device using the light-emitting device according to any one of the first to fifth embodiments. The illumination device 1400 may include a housing 1401, a light source 1402, a circuit board 1403, an optical film 1404, and a light diffusion unit 1405. The light source may include the light-emitting device according to any one of the first to fifth embodiments. The light-emitting element may be an organic light-emitting element. The optical film 1404 may be a filter that transmits light and improves the color rendering of the light source. The light diffusion unit can effectively diffuse light from the light source for illumination purposes, etc., and deliver the light over a wide area. The optical film 1404 and the light diffusion unit 1405 may be provided on the light-emitting side of the illumination device. If necessary, a cover may be provided on the outermost surface.

[0085] The lighting device is, for example, a device for illuminating a room. The lighting device may emit white, daylight white, or any other color from blue to red. It may have a dimming circuit for dimming these colors. The lighting device may have a light-emitting device according to any one of embodiments 1 to 5 and a power supply circuit connected thereto. An organic light-emitting element can be used as the light-emitting element of the light-emitting device. The power supply circuit is a circuit that converts AC voltage into DC voltage. Furthermore, white has a color temperature of 4200K, and daylight white has a color temperature of 5000K. The lighting device may have a color filter.

[0086] The lighting device according to this embodiment may also include a heat dissipation unit, which dissipates heat from within the device to the outside, and may be made of a material such as a metal with a high specific heat capacity or liquid silicon.

[0087] 20(b) is a schematic diagram of an automobile, which is an example of a moving body according to this embodiment, using the light emitting device according to any one of embodiments 1 to 5. The automobile has tail lamps, which are an example of a lighting fixture. The automobile 1500 has tail lamps 1501, and may be configured to turn on the tail lamps when braking or the like is performed.

[0088] The tail lamp 1501 may include a light emitting device according to any one of the first to fifth embodiments. The tail lamp may include a protective member for protecting the light emitting device. The protective member may be made of any material as long as it has a certain degree of strength and is transparent, but is preferably made of polycarbonate or the like. Polycarbonate may be mixed with a furandicarboxylic acid derivative, an acrylonitrile derivative, or the like.

[0089] An automobile 1500 may have a body 1503 and a window 1502 attached thereto. The window may be a transparent display as long as it is not a window for checking the front and rear of the automobile. The transparent display may have a light-emitting device according to any one of the first to fifth embodiments. In this case, the constituent materials of the electrodes and the like of the light-emitting device are made of transparent materials.

[0090] The moving body according to this embodiment may be a ship, an aircraft, a drone, or the like. The moving body may have a body and a lighting device provided on the body. The lighting device may emit light to indicate the position of the body. The lighting device has a light-emitting device according to any one of the first to fifth embodiments.

[0091] 21(a) and 21(b), application examples of display devices using the light-emitting devices according to embodiments 1 to 5 will be described. The display device can be applied to systems that can be worn as wearable devices, such as smart glasses, HMDs, and smart contact lenses. The display device used in such application examples has an imaging device capable of photoelectrically converting visible light, and a display device capable of emitting visible light.

[0092] 21(a) illustrates glasses 1600 (smart glasses) according to one application example. An imaging device 1602 such as a CMOS sensor or SPAD is provided on the front side of a lens 1601 of the glasses 1600. Furthermore, a display device according to any of the above-described embodiments is provided on the back side of the lens 1601.

[0093] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the image capture device 1602 and the display device according to each embodiment. The control device 1603 also controls the operations of the image capture device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light onto the image capture device 1602.

[0094] FIG. 21(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612. The control device 1612 is equipped with an imaging device corresponding to the imaging device 1602 and a display device. An optical system for projecting light emitted by the display device in the control device 1612 is formed in the lens 1611, and an image is projected onto the lens 1611. The control device 1612 functions as a power source that supplies power to the imaging device and the display device, and also controls the operations of the imaging device and the display device.

[0095] The control device may have a gaze detection unit that detects the gaze of the wearer. The gaze detection may use infrared rays. The infrared light emitting unit emits infrared light toward the eyeball of the user who is gazing at the displayed image. An imaging unit having a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By having a reduction means that reduces light from the infrared light emitting unit to the display unit in a planar view, degradation of image quality is reduced.

[0096] The gaze of the user relative to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be used for gaze detection using an image of the eyeball. One example is a gaze detection method based on the Purkinje image formed by reflection of irradiated light on the cornea.

[0097] More specifically, gaze detection processing is performed based on the pupil-corneal reflex method, which calculates a gaze vector representing the direction (rotation angle) of the eyeball based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0098] The display device according to this embodiment may have an imaging device having a light receiving element, and may control the image displayed on the display device based on information about the user's line of sight from the imaging device.

[0099] Specifically, the display device determines a first display area where the user gazes and a second display area other than the first display area based on the line-of-sight information. The first display area and the second display area may be determined by a control device of the display device, or may be determined by an external control device and received. In the display area of ​​the display device, the display resolution of the first display area may be controlled to be higher than the display resolution of the second display area. In other words, the resolution of the second display area may be lower than that of the first field of view area.

[0100] The display area includes a first display area and a second display area different from the first display area, and a high-priority area is determined from the first display area and the second display area based on line-of-sight information. The first and second view areas may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the high-priority area may be controlled to be higher than the resolution of areas other than the high-priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0101] Note that AI may be used to determine the first display area and the area with high priority. The AI ​​may be a model configured to estimate the angle of gaze and the distance to an object in the line of sight from the image of the eyeball, using as training data an image of the eyeball and the direction in which the eyeball in the image was actually looking. The AI ​​program may be included in the display device, the imaging device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0102] When display control is performed based on visual recognition detection, the smart glasses can be preferably applied to smart glasses that further include an imaging device for capturing images of the outside world. The smart glasses can display captured external information in real time.

[0103] As described above, by using the light emitting device according to this embodiment in an apparatus, it is possible to provide a stable display with good image quality even over a long period of time.

[0104] (Other embodiments) (Item 1) a plurality of pixels arranged to form a plurality of rows and a plurality of columns; a plurality of column circuits for driving the plurality of columns respectively; a voltage generating circuit that outputs a set of voltage signals; a control circuit; Each of the plurality of pixels includes at least a first sub-pixel that emits light in a first color and a second sub-pixel that emits light in a second color different from the first color; the plurality of column circuits include: a first selection circuit that outputs one of first color data and second color data corresponding to the first color and the second color input to each of the plurality of column circuits; a digital-to-analog converter that converts the output first color data or the output second color data into an analog signal based on the set of voltage signals output by the voltage generation circuit; and a second selection circuit that supplies the analog signal output from the digital-to-analog converter to one of the first sub-pixels or the second sub-pixels that emit light of a corresponding color; a first column circuit for supplying the first color data to the digital-to-analog converter, and a second column circuit for supplying the second color data to the digital-to-analog converter; (Item 2) The light emitting device described in item 1 is characterized in that the first selection circuits that the first column circuit and the second column circuit each have are controlled by the control circuit so that in a second period following the first period, the first color data or the second color data that is different from the first color data and the second color data output in the first period is supplied to the digital-to-analog converter. (Item 3) Furthermore, the light emitting device described in item 1 or 2 is characterized in that the control circuit controls to execute a first mode in which the first selection circuit of the first column circuit outputs the first color data and the first selection circuit of the second column circuit outputs the second color data, and a second mode in which the first selection circuits of the first column circuit and the second column circuit output either the first color data or the second color data. (Item 4) The light emitting device described in any one of items 1 to 3, characterized in that the first column circuit and the second column circuit each further have a plurality of latch circuits that hold the first color data or the second color data, and the first selection circuit outputs one of the first color data or the second color data held in the plurality of latch circuits. (Item 5) the first column circuit has a first latch circuit and a second latch circuit that respectively hold at least either the first color data or the second color data, and the second column circuit has a third latch circuit and a fourth latch circuit that respectively hold at least either the first color data or the second color data, The control circuit controlling inputs to each latch circuit so that the first color data is input to the first latch circuit and the fourth latch circuit, and the second color data is input to the second latch circuit and the third latch circuit; the first selection circuit of each of the first column circuit and the second column circuit is controlled so as to output the first color data or the second color data held in the first latch circuit and the third latch circuit during the first period, and to output the first color data or the second color data held in the second latch circuit and the fourth latch circuit during a second period following the first period. 4. The light emitting device according to any one of items 1 to 3. (Item 6) 6. The light emitting device according to any one of items 1 to 5, wherein the first selection circuits of the first column circuit and the second column circuit are controlled to operate in synchronization with each other. (Item 7) 7. The light emitting device according to any one of items 1 to 6, wherein the first selection circuit and the second selection circuit of each of the plurality of column circuits are controlled to operate in synchronization with each other. (Item 8) The light emitting device described in any one of items 1 to 7, characterized in that the first column circuit and the second column circuit drive first pixels and second pixels arranged in a predetermined row among the plurality of rows based on the first color data and the second color data supplied to the digital-to-analog converter during the first period. (Item 9) 9. The light emitting device according to any one of items 1 to 8, wherein the first column circuits and the second column circuits are arranged alternately in the row direction. (Item 10) The light emitting device described in any one of items 1 to 9, characterized in that the plurality of column circuits are divided into blocks of a predetermined number of column circuits each, and all of the first selection circuits of the column circuits in the blocks are controlled by the control circuit so as not to output the same first color data or the same second color data during the first period. (Item 11) 11. The light-emitting device according to any one of items 1 to 10, wherein each of the plurality of column circuits further comprises a drive circuit, and the output of the digital-to-analog converter is supplied to the first subpixel or the second subpixel via the drive circuit. (Item 12) a photosensitive member, an exposure light source for exposing the photosensitive member, a developing device for applying a developer to the exposed photosensitive member, and a transfer device for transferring an image developed by the developing device onto a recording medium, 12. An image forming apparatus, characterized in that the exposure light source comprises the light emitting device according to any one of items 1 to 11. (Item 13) 12. An imaging device comprising: an optical unit having a plurality of lenses; an imaging element that receives light that has passed through the optical unit; and a display unit that displays an image captured by the imaging element, wherein the display unit comprises the light-emitting device according to any one of items 1 to 11. (Item 14) 12. A display device comprising: a display unit having the light-emitting device according to any one of items 1 to 11; and a housing in which the display unit is provided. (Item 15) 12. An electronic device comprising: a display unit having the light-emitting device according to any one of items 1 to 11; a housing in which the display unit is provided; and a communication unit provided in the housing for communicating with the outside. (Item 16) 12. A lighting device comprising: a light source having the light-emitting device according to any one of items 1 to 11; and a light diffusion section or optical film that transmits light emitted by the light source. (Item 17) 12. A moving body comprising: a lighting fixture having the light-emitting device according to any one of items 1 to 11; and a vehicle on which the lighting fixture is provided.

[0105] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0106] 100 pixel array, 101 pixel, 310 signal line, 510 reference voltage line, 601 latch circuit, 700 column driver circuit, 701 buffer circuit, 800 column DAC circuit, 801 DAC, 901 switch, 902 switch< / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n>

Claims

1. a plurality of pixels arranged to form a plurality of rows and a plurality of columns; a plurality of column circuits for driving the plurality of columns respectively; a voltage generating circuit that outputs a set of voltage signals; a control circuit; Each of the plurality of pixels includes at least a first sub-pixel that emits light in a first color and a second sub-pixel that emits light in a second color different from the first color; the plurality of column circuits include: a first selection circuit that outputs one of first color data and second color data corresponding to the first color and the second color input to each of the plurality of column circuits; a digital-to-analog converter that converts the output first color data or the output second color data into an analog signal based on the set of voltage signals output by the voltage generation circuit; and a second selection circuit that supplies the analog signal output from the digital-to-analog converter to one of the first sub-pixels or the second sub-pixels that emit light of a corresponding color; The light emitting device is characterized in that the plurality of column circuits have at least a first column circuit and a second column circuit, and in that, during a first period, the first selection circuit of the first column circuit outputs the first color data to the digital-to-analog converter, and the first selection circuit of the second column circuit outputs the second color data to the digital-to-analog converter, controlled by the control circuit.

2. The light emitting device according to claim 1, characterized in that the first selection circuits respectively provided in the first column circuit and the second column circuit are controlled by the control circuit so as to supply the first color data or the second color data, which are different from the first color data and the second color data output in the first period, to the digital-to-analog converter in a second period following the first period.

3. The light-emitting device described in claim 1, characterized in that the control circuit controls the device to execute a first mode in which the first selection circuit of the first column circuit outputs the first color data and the first selection circuit of the second column circuit outputs the second color data, and a second mode in which the first selection circuits of the first column circuit and the second column circuit output either the first color data or the second color data.

4. 2. The light-emitting device according to claim 1, wherein the first column circuit and the second column circuit each further have a plurality of latch circuits that hold the first color data or the second color data, and the first selection circuit outputs one of the first color data or the second color data held in the plurality of latch circuits.

5. the first column circuit has a first latch circuit and a second latch circuit that respectively hold at least either the first color data or the second color data, and the second column circuit has a third latch circuit and a fourth latch circuit that respectively hold at least either the first color data or the second color data, The control circuit controlling inputs to each latch circuit so that the first color data is input to the first latch circuit and the fourth latch circuit, and the second color data is input to the second latch circuit and the third latch circuit; the first selection circuit of each of the first column circuit and the second column circuit is controlled so as to output the first color data or the second color data held in the first latch circuit and the third latch circuit during the first period, and to output the first color data or the second color data held in the second latch circuit and the fourth latch circuit during a second period following the first period.

2. The light emitting device according to claim 1.

6. 2. The light emitting device according to claim 1, wherein the first selection circuits of the first column circuit and the second column circuit are controlled to operate in synchronization with each other.

7. The light emitting device according to claim 1 , wherein the first selection circuit and the second selection circuit of each of the plurality of column circuits are controlled to operate in synchronization with each other.

8. 2. The light-emitting device according to claim 1, wherein the first column circuit and the second column circuit drive first pixels and second pixels arranged in a predetermined row among the plurality of rows based on the first color data and the second color data supplied to the digital-to-analog converter during the first period.

9. 2. The light emitting device according to claim 1, wherein the first column circuits and the second column circuits are arranged alternately in the row direction.

10. The light-emitting device according to claim 1, characterized in that the plurality of column circuits are divided into blocks of a predetermined number of column circuits each, and all of the first selection circuits of the column circuits in the blocks are controlled by the control circuit so as not to output the same first color data or the same second color data during the first period.

11. 2. The light-emitting device according to claim 1, wherein each of the plurality of column circuits further comprises a drive circuit, and an output of the digital-to-analog converter is supplied to the first sub-pixel or the second sub-pixel via the drive circuit.

12. a photosensitive member, an exposure light source for exposing the photosensitive member, a developing device for applying a developer to the exposed photosensitive member, and a transfer device for transferring an image developed by the developing device onto a recording medium, An image forming apparatus, comprising the light emitting device according to claim 1 as the exposure light source.

13. 12. An imaging device comprising: an optical section having a plurality of lenses; an imaging element that receives light that has passed through the optical section; and a display section that displays an image captured by the imaging element, wherein the display section comprises a light-emitting device according to any one of claims 1 to 11.

14. A display device comprising: a display portion having the light-emitting device according to claim 1; and a housing in which the display portion is provided.

15. 12. An electronic device comprising: a display unit having the light-emitting device according to claim 1; a housing in which the display unit is provided; and a communication unit provided in the housing for communicating with an external device.

16. 12. An illumination device comprising: a light source having the light-emitting device according to claim 1; and a light diffusion portion or an optical film that transmits light emitted by the light source.

17. A moving body comprising: a lighting fixture having the light-emitting device according to any one of claims 1 to 11; and a body on which the lighting fixture is provided.

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