Protective sheet for work processing and method for producing individualized work pieces

A protective sheet with a substrate, intermediate layer, and adhesive layer addresses the issues of static charge and surface conformity in workpiece processing, ensuring effective protection and precision during grinding of high-bump wafers.

JP2025146025APending Publication Date: 2025-10-03LINTEC CORP
4 Cites 0 Cited by

Patent Information

Application Number
JP2024046589
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-22
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Existing protective sheets for workpiece processing, such as semiconductor wafers with irregularities, fail to adequately conform to the wafer's surface, leading to issues like water penetration and chip shift during grinding, and do not effectively suppress static charge, which can cause damage and electrostatic discharge.

Method used

A protective sheet with a substrate, an intermediate layer containing an antistatic agent, and an adhesive layer, designed to maintain antistatic properties even with thick intermediate layers, ensuring effective discharge of static electricity and conforming to uneven surfaces.

Benefits of technology

The protective sheet effectively suppresses static charge and protects the workpiece surface, preventing damage and ensuring precise grinding of high-bump wafers by maintaining antistatic properties and conforming to surface irregularities.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

To provide a protective sheet for work processing which enables reliable protection of high-bump wafers and exhibits superior antistatic performance.SOLUTION: A protective sheet for work processing 1 according to the present invention comprises a base material 10 and a pressure-sensitive adhesive layer 30, and is characterized by a peeling electrification voltage of 150 V or less as measured when the sheet 1 is peeled off after individualizing a wafer under conditions simulating the DGB method or LDBG method.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art