Battery management system

Abstract

To provide a battery management system capable of performing synchronization of a measurement timing of a battery in a plurality of devices as accurately as possible.SOLUTION: A device 10...1N includes an oscillator 29 that generates a second clock whose frequency can be controlled, and a time information generation part 30 generates second time information from the second clock generated by the oscillator 29. The device 10...1N generates a measurement timing of a battery from the second time information. When receiving a synchronization command from a controller 52, the device 10...1N compares the received first time information with the second time information, and controls the frequency of the oscillator 29 so as to eliminate the time difference from the compared difference. The device 10...1N controls the frequency of the second clock of the oscillator 29 to approach the frequency of the first clock of the controller 52.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a battery management system. [Background technology]

[0002] In recent years, battery management systems (BMS) have been required to measure not only battery voltage and charge / discharge current but also impedance in order to monitor battery status and detect abnormalities. In particular, to measure impedance at frequencies from several to several kHz and obtain accurate temperature characteristics of the battery, it is sometimes necessary to simultaneously measure battery voltage and current flowing through the battery for periods of tens of milliseconds to several minutes.

[0003] Meanwhile, in the field of network technology, a technology has long been proposed in which a master (equivalent to the controller in this application) that operates using a highly accurate clock distributes its own time information to a slave (equivalent to the device in this application), and the slave corrects the difference directly or indirectly using an oscillator frequency to achieve time synchronization. However, these technologies are based on the assumption that the time information can be transmitted periodically to correct transmission and reception delays, or that a highly accurate synchronization state is maintained in advance. The battery management system proposed in this application faces the problem of being unable to synchronize accurately in advance, resulting in discontinuous correction of the time information, making this technology difficult to adopt.

[0004] In the technical field of battery management systems, as exemplified by Patent Document 1, it has been proposed to correct the clock of a monitoring IC by directly receiving the clock of a communication IC. However, to achieve accurate synchronization, it is necessary to continuously send the clock for a long period of time, which interferes with the measurement of battery voltage. Furthermore, although frequency correction is possible, it is not possible to achieve high-precision synchronization that allows accurate measurement of battery impedance values. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2023-062989 Summary of the Invention [Problem to be solved by the invention]

[0006] An object of the present disclosure is to provide a battery management system that can synchronize battery measurement timing among multiple devices as accurately as possible. [Means for solving the problem]

[0007] The invention of claim 1 is directed to a battery management system including a controller and multiple devices that receive commands from the controller and monitor the battery. The controller and multiple devices communicate asynchronously while connected in one of a ring, daisy chain, or star topology. The controller operates using a first clock from a high-precision oscillator, generates first time information from the first clock as a reference for each device, and transmits data including the first time information to the devices as a synchronous command that can be used in conjunction with other commands.

[0008] The device has an oscillator that generates a second clock with a controllable frequency, generates second time information from the second clock generated by the oscillator, and generates battery measurement timing from the second time information. When the device receives a synchronization command from the controller, it compares the received first time information with the second time information and controls the frequency of the oscillator so that the time difference between the two is a constant value based on the difference between the two. As a result, the battery measurement timing of multiple devices can be synchronized as accurately as possible. [Brief explanation of the drawings]

[0009] [Figure 1] Block diagram of a battery management system according to one embodiment. [Figure 2] FIG. 10 is an explanatory diagram of a transmission mode of a synchronization command. [Figure 3] Electrical configuration diagram of the battery management system [Figure 4] An explanatory diagram showing the relationship between the excitation current and the phase error of the measurement voltage [Figure 5] Synchronous command description [Figure 6] Explains the timing of receiving a synchronization command [Figure 7] A flowchart outlining the operation of the system. [Figure 8] 1 is a flowchart outlining the time synchronization process on the controller side. [Figure 9] Flowchart 1 outlining the device-side time synchronization process [Figure 10] Illustration of true time difference and detectable time difference [Figure 11] A time chart showing the temporal changes of the first clock and first time information on the controller side and the second clock and second time information on the device side. [Figure 12] An explanatory diagram showing the change in measurement timing for each device [Figure 13] 10 is a flowchart outlining the processing operation of the communication pass-through function. [Figure 14] FIG. 1 is a circuit diagram illustrating a hardware configuration related to a communication pass-through function. [Figure 15] Explains the command propagation delay time for each device [Figure 16] Diagram of the effect of pulse signal propagation delay (part 1) [Figure 17] Diagram 2 explaining the effect of pulse signal propagation delay [Figure 18] An explanatory diagram of the operation when the pulse signal is made longer than a predetermined width [Figure 19] Diagram 1 of the total propagation delay [Figure 20] Diagram 2 of the total propagation delay [Figure 21] Flowchart 2 outlining the device-side time synchronization process [Figure 22]A time chart that illustrates the time difference on the device side and the change in the frequency of the second clock. [Figure 23] A time chart that illustrates the time difference and the change in the frequency of the second clock when a free-running period is provided between feedback control periods. [Figure 24] A time chart that illustrates the time difference and the change in the frequency of the second clock when a free-running period is provided between feedback control periods. [Figure 25] A time chart outlining the operation of the timeout process [Figure 26] A time chart outlining the operation of the calibration process [Figure 27] 1 is a diagram showing the electrical configuration for adjusting the frequency for the calibration process. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, an embodiment of a battery management system will be described with reference to the drawings. As shown in Figures 1 and 2, the battery management system 1 includes a controller 52 and N+1 devices 10...1N (where N is an integer equal to or greater than 1). As shown in Figures 2 and 3, the devices 11...1N in each stage monitor the state of the batteries S1...SM of the assembled batteries CS1...CSN in each stage. The batteries S1...SM represent, for example, secondary batteries. In this embodiment, the assembled batteries CS1...CSN monitored by the devices 11...1N in each stage each incorporate batteries S1...SM. The number of batteries S1...SM incorporated in each assembled battery CS1...CSN is a predetermined number, but the numbers of batteries S1...SM in each stage may be the same or different.

[0011] In this embodiment, when measuring the impedance of a battery, synchronization is performed between the devices 10...1N to synchronize the voltage of the battery S1...SM monitored by each device 11...1N with the timing of AD conversion of the excitation current Iexc by the device 10. FIG. 3 illustrates hardware functions in a format corresponding to FIGS. 1 and 2. Note that FIG. 2 omits the configuration of the device 10 corresponding to the voltage measurement unit 110 for the excitation current Iexc. The controller 52 is configured with a microcomputer or the like equipped with a memory, and functions as a control unit 52a, a calculation unit 52b, and a communication unit 52c. Each device 10, 11...1N is configured with an IC having, for example, an A / D converter, a digital filter, and a communication circuit, and each device 10, 11...1N is configured with a voltage measurement unit 110, 111...11N.

[0012] When the control unit 52a transmits a command for voltage measurement or impedance measurement to the voltage measurement units 111...11N of each device 11...1N, the voltage measurement units 111...11N are each equipped with an A / D converter (not shown), and measure the terminal voltage of the corresponding battery S1...SM through an analog filter AF at a predetermined A / D conversion timing.

[0013] A current excitation unit 60 and a current detection resistor Rs are connected in series to each battery pack CS1...CSN, and an excitation current Iexc can be caused to flow through the current excitation unit 60 under the control of the control unit 52a. Although not shown in FIGS. 1 and 2, a voltage measurement unit 110 is also provided as shown in FIG. 3. The voltage measurement unit 110 also includes an A / D converter (not shown), which converts the voltage across the current detection resistor Rs via an analog filter AF at a predetermined A / D conversion timing as detection information for the excitation current Iexc. The A / D conversion timing determines the timing for measuring the voltage and current of the batteries S1...SN, and these timings are generated based on second time information (see below) measured independently by each device 11...1N.

[0014] When the voltage measurement units 110...11N measure the inter-terminal voltages and excitation currents Iexc of the batteries S1...SM, they transmit information about the voltages and excitation currents Iexc to the controller 52. The communication unit 52c receives information about the voltages and excitation currents Iexc of the batteries S1...SM that make up each of the assembled batteries CS1...CSN. The calculation unit 52b of the controller 52 measures and calculates the impedances of the batteries S1...SM based on the measured voltages and excitation currents Iexc of the batteries S1...SM.

[0015] When measuring the impedance of batteries S1...SM, even if the frequencies of the voltage V and current I of batteries S1...SM match, the phase difference between voltage V and current I will appear as a phase error in impedance Z. If the synchronization time error between voltage V and current I is Tsync_err, then the phase error of impedance Z for a frequency of fmeas is Tsync_err × fmeas × 360°. Since the temperature characteristics of batteries S1...SM are estimated using the phase component of the impedance, it is desirable to have a fairly high degree of phase accuracy.

[0016] If there is a synchronization error between the voltages and currents of the batteries S1...SM, as shown in Figure 4, the measurement data will appear to show a phase difference between the voltages VBN-01, VB1-02, and VBN-1 of each battery S1...SM and the voltage Vexc corresponding to the excitation current Iexc. However, it is not possible to determine from the measurement data whether there is an actual phase difference or a synchronization error. For this reason, it is desirable to synchronize the time information on the side of each voltage measurement unit 110...11N in the configuration of the battery management system 1.

[0017] Returning to the reference drawing in FIG. 1 , the configuration will be described further. The controller 52 receives a clock signal from the high-precision oscillator 51, generates commands to instruct each of the devices 10...1N based on the clock signal, and transmits the commands to the devices 10...1N via the isolation elements 53 and 6T. The high-precision oscillator 51 is, for example, a crystal oscillator. Upon receiving a measurement command, the device 10 measures the excitation current Iexc, and upon receiving a measurement command from the controller 52, the devices 11...1N monitor the batteries S1...SM. The controller 52 transmits a synchronization command to synchronize the AD conversion timing during these measurements. This synchronization command may also function as another broadcast command. The controller 52 and the devices 10...1N perform asynchronous communication while connected in a daisy-chain configuration.

[0018] Each of the devices 10...1N includes blocks serving as a communication control unit 21, a receiving unit 22, a transmitting unit 23, a pass-through control unit 24, a reference time register 25, a time difference detection unit 26, a frequency control unit 27, a filter 28, an oscillator 29, a time information generation unit 30, and a calibration unit 31. The receiving unit 22 receives a command from the controller 52 through an insulating element 6T. The receiving unit 22 and the transmitting unit 23 are connected to each other.

[0019] The devices 10...1N each have a pass-through function that passes a received synchronization command to the next device 10...1N in order to minimize internal delays within the device 10...1N. The devices 10...1N can enable or disable the pass-through function. After enabling the pass-through function, the devices 10...1N can receive and execute synchronization commands from the controller 52.

[0020] Specifically, when the communication control unit 21 receives a synchronization command from the receiving unit 22, it instructs the pass-through control unit 24, and the pass-through control unit 24 determines whether to perform communication pass-through, and if so, controls the communication path from the receiving unit 22 to the transmitting unit 23 to set up the communication pass-through.

[0021] The devices 10...1N then transmit the synchronization command sequentially to the next devices 11...1N through the isolation elements 6R and 6T, and finally return the command to the controller 52 through the isolation element 54. Here, a form of communication in a state where the devices are connected in a daisy chain connection is shown as an example, but the present invention is not limited to this, and the devices may also be connected in a ring connection or a star connection, for example.

[0022] The isolation elements 53, 54, 6R, and 6T are each configured by connecting capacitors in series (not shown). This provides DC isolation between the communication lines of the devices 10...1N. While the isolation units are configured using capacitors as an example here, DC isolation may also be achieved using other isolation units such as pulse transformers. The isolation elements 53, 54, 6R, and 6T connected to the controller 52 and each device 10...1N are connected in sequence from the controller 52 to all of the devices 10...1N as shown in FIG. 2, allowing synchronization commands to be transmitted in sequence from the controller 52 to each of the devices 10...1N.

[0023] As shown in Fig. 1, when the controller 52 transmits a synchronization command to each of the devices 10...1N, it transmits the command in a predetermined format as shown in Fig. 5. The synchronization command includes synchronization command identification information, time information of the controller 52 (hereinafter referred to as first time information), a time update interval Ts, and an error detection code such as a CRC (Cyclic Redundancy Check). The synchronization command identification information indicates information for distinguishing the synchronization command from other commands.

[0024] The first time information is time information on the controller 52 side that is generated from the first clock and transmitted from the controller 52 to the devices 10...1N, and indicates a time equivalent to a counter value obtained by counting up or down the rising or falling timing of the first clock. This counter value is obtained up to a certain threshold value. The transmission interval of the synchronization command is determined arbitrarily by the controller 52. The controller 52 sets the interval for the next synchronization command to be transmitted in the setting area for the time update interval Ts and transmits the synchronization command. Therefore, the time update interval Ts shown in FIG. 5 indicates the timing for transmitting the next synchronization command.

[0025] Although the transmission interval of the synchronization command is arbitrarily determined by the controller 52 in the illustrated embodiment, the present invention is not limited to this. For example, the transmission interval of the synchronization command may be set in advance in a memory or register provided inside each of the devices 10...1N. Furthermore, the target information for acquiring synchronization may be the first time information as shown in the present embodiment, but it may also be a signal itself indicating the timing of measuring the voltage of each of the batteries S1...SM, i.e., the timing of AD conversion.

[0026] When each of the devices 10...1N receives a synchronization command, it obtains the digital value of the first time information from the synchronization command and stores it in the reference time register 25 shown in FIG. 1. The time difference detection unit 26 can then refer to the first time information stored in the reference time register 25. Meanwhile, the time information generation unit 30 generates second time information independently for each of the devices 10...1N. Each of the devices 10...1N generates the second clock using a variable frequency oscillator that uses a crystal oscillator, a Ceralock oscillator, a MEMS oscillator, or an LC oscillator as the operating oscillator 29.

[0027] The time information generation unit 30 generates second time information based on the second clock of the oscillator 29 and inputs it to the time difference detection unit 26. The second time information is time information on the device 11...1M side generated from the second clock by the time information generation unit 30, and indicates time equivalent to a counter value obtained by counting up or down the rising or falling timing of the second clock. This counter value is obtained up to a certain threshold value. The time information generation unit 30 outputs the generated second time information to the time difference detection unit 26.

[0028] The time difference detection unit 26 detects the difference between the first time information and the second time information, and if it determines that the time information needs to be adjusted, it outputs the time difference ΔT to the frequency control unit 27. N The frequency control unit 27 outputs the time difference ΔT N The frequency fluctuation amount of the oscillator 29 for its own operation is determined according to the magnitude of the time difference ΔT N The second clock frequency Fdev of the oscillator 29 for its own operation is controlled so as to eliminate this. The time update interval Ts here refers to the time update interval Ts set in the synchronization command.

[0029] The time difference detection unit 26 detects the time difference ΔT N The frequency control unit 27 is instructed to eliminate this, and the frequency control unit 27 controls the frequency and outputs it to the oscillator 29 via the filter 28, which is a loop filter, so that the oscillator 29 adjusts the phase of the second clock based on the instructed frequency input and locks the frequency. This phase-adjusted second clock is input to the time information generation unit 30. Each of the devices 10...1N measures the current flowing through the batteries S1...SM and the voltage of each of the batteries S1...SM based on the second clock. By correcting the second clock in this way, the second time information can be synchronized between each of the devices 10...1N.

[0030] 6 shows the relationship between the transmission interval of the synchronization command and the frequency of the oscillator 29 on the device 11...1N side. When the device 10...1N receives the synchronization command, it calculates the transmission interval of the synchronization command and the time difference ΔT N As shown in FIG. 6, the frequency fluctuation amounts ΔF1, ΔF2, ΔF3, and ΔF4 are also changed depending on whether the synchronization command arrives earlier or later than the transmission interval Ts of the synchronization command. Therefore, the devices 11...1N can set the frequency fluctuation amounts ΔF1, ΔF2, ΔF3, and ΔF4 at this timing depending on whether the synchronization command arrives earlier or later than the transmission interval Ts of the synchronization command. N The controller 52 changes the amount of change in the second time information or the amount of change in the frequency of the oscillator 29 depending on the synchronization command update interval. The controller 52 may adjust the amount of change in the second time information by including the update interval of the synchronization command in the synchronization command and transmitting it to the devices 10...1N. The controller 52 may also include information for adjusting the amount of change in the second time information on the devices 10...1N in the synchronization command and transmit it to the devices 10...1N. This allows the second time information and the frequency Fdev of the oscillator 29 on the devices 10...1N to be matched as closely as possible to the first time information and the frequency of the first clock of the controller 52.

[0031] The system main body performs calibration processing at startup, before measuring impedance, or when a certain time has passed since the last synchronization command was sent. For this purpose, each of the devices 10...1N includes a calibration unit 31, as shown in FIG. 1. The calibration unit 31 is configured to receive a command from the communication control unit 21 and calibrate the frequency control unit 27. The calibration unit 31 controls the frequency by commanding the frequency control unit 27 to keep the frequency Fdev of the second clock of the oscillator 29 of the device 10...1N within a specific range. The calibration method is performed by adjusting the frequency Fdev of the second clock of the oscillator 29 or changing the second time information, but details of this method will be described later.

[0032] The processing operation of the above configuration will be described. As described above, the controller 52 and the devices 10...1N operate on separate first and second clocks, respectively, which causes a difference between the first time information and the second time information. In this embodiment, the first time information and the second time information are synchronized, thereby enabling the timing of impedance measurement to be synchronized.

[0033] <Overall operation for impedance measurement> The battery management system 1 measures the voltage of one or more of the batteries S1 to SM and the current flowing through the assembled batteries CS1 to CSN, and measures the impedance based on this information. As shown in Fig. 7, when performing impedance measurement, the battery management system 1 first determines in S111 whether calibration should be performed, and if calibration should be performed, performs coarse adjustment by calibration using the calibration unit 31 in S112.

[0034] Then, the battery management system 1 performs detailed time synchronization in S113, and while performing impedance measurement, performs time synchronization if the time synchronization interval deviates from a predetermined specified value. These processes of S111 to S116 are repeated until the impedance measurement is completed.

[0035] <About time synchronization> When the controller 52 and the devices 10...1N perform time synchronization, they execute the processes shown in Figures 8 and 9. The controller 52 determines whether to implement the communication pass-through function in S121 of Figure 8, and if it does, sets the communication pass-through function to be enabled by sending a communication pass-through command to the devices 10...1N in S122. Enabling the communication pass-through function will be described later. Thereafter, the controller 52 generates a synchronization command in S123, embeds the generated first time information, and sends it to the devices 10...1N. Each device 10...1N sequentially transmits the synchronization command to the next device 11...1N (see S222 of Figure 9). The last device 1N returns the synchronization command to the controller 52. That is, the synchronization command circulates through the devices 10...1N and returns to the controller 52.

[0036] The controller 52 determines whether a communication abnormality has occurred by determining whether a synchronization command has been returned in S124. If there is no communication abnormality in S124, the subroutine is exited. However, if there is a communication abnormality in S124, the controller 52 waits in S125 and then determines whether communication is possible in S126. If the controller 52 confirms that communication is possible in S126, the controller 52 returns to the process in S123 and sends the synchronization command again. If it is determined that communication is impossible in S126, the controller 52 performs timeout processing in S127 and terminates abnormally. In this case, the controller 52 stops processing as communication is impossible.

[0037] 9, when the devices 11...1N receive a synchronization command from the controller 52, they transmit the synchronization command to the subsequent stage. Then, in S223, the time difference detection units 26 of the devices 11...1N calculate the time difference ΔT between the first time information of the controller 52 and their own second time information. N The time difference detection unit 26 detects the time difference ΔT Nexceeds the difference threshold value ΔTth, the frequency control unit 27 is instructed to increase the frequency Fdev of the second clock in S225, and the frequency control unit 27 increases the frequency Fdev of the second clock of the oscillator 29.

[0038] The time difference detection unit 26 calculates the time difference ΔT N If it is determined that the time difference ΔT is less than the difference threshold value ΔTth, the frequency control unit 27 is instructed to reduce the frequency Fdev of the second clock of the oscillator 29 in S227, and the frequency control unit 27 reduces the frequency Fdev of the second clock of the oscillator 29. N If it is equal to zero, the determination is NO in S224 and NO in S226, and the process routine is terminated. These processes are performed for all devices 10 to 1N.

[0039] 10 explains the cause of the discrepancy between the first time information of the controller 52 and the second time information of the devices 10...1N. Here, an example is shown in which the controller 52 derives the first time information by counting the first clock from zero to an upper limit n, and the devices 10...1N derive the second time information by counting the second clock from zero to an upper limit m.

[0040] The time difference that can be detected when a device 10...1N receives a synchronization command from the controller 52 can be divided into the following causes: (1) the true time difference of the internal clock, (2) the time difference in the processing time when the synchronization command is generated / interpreted, (3) the time difference due to the transmission / reception delay of the communication path, and (4) the time difference due to the delay of up to one cycle until the rise / fall of the clock of each of the controller 52 and the device 10...1N. The time difference is the sum of these four factors.

[0041] Causes (2) and (3) are correctable because they are fixed times. Cause (4) is an error that cannot be corrected because the system operates in units of clocks. Cause (3) changes depending on the distance between the controller 52 and the devices 10...1N and the number of devices 10...1N that pass through between them, but is almost constant during operation. In this embodiment, the detectable time difference caused by causes (1) to (3) is determined.

[0042] For example, let Tc0 be the first time information of the controller 52 when the controller 52 sends the synchronization command, and let Td0 be the second time information of the devices 11...1N when the devices 10...1N receive the synchronization command. Then, let Tad0 be the second time information of the devices 10...1N when the most recent voltage measurement is performed thereafter. The frequency of the oscillator 29 on the device 10...1N side may be controlled so that Tad0-Td0 falls within a certain range. The time difference ΔT between the controller 52 and the devices 10...1N N The frequency Fdev of the second clock of the oscillator 29 of the devices 10...1N is controlled so that the time difference after X cycles becomes ΔTx=(Tc0-Td0)-(Tad0-Td0). This allows the first time information of the controller 52 to be synchronized with the second time information of each of the devices 10...1N using a synchronization command, and each of the devices 10...1N can generate an AD conversion timing signal based on its own second time information.

[0043] FIG. 11 shows a schematic diagram of frequency control. The controller 52 generates first time information using a first clock. In the example shown in FIG. 11, the controller 52 changes the first time information by repeatedly counting from zero to an upper limit m each time the first clock is generated. Similarly, on the device 10...1N side, the controller 52 changes the second time information by counting from zero to an upper limit m each time the second clock is generated.

[0044] At this time, these count values ​​differ by a time difference ΔTn1 at a certain timing ta. Because the frequency Fref of the first clock of the controller 52 differs from the frequency Fdev of the second clock of the devices 10...1N, the devices 10...1N increase or decrease their frequencies for a specific period after receiving the synchronization command. This allows the time difference ΔTnj (<ΔTn1) of the count values ​​to be suppressed. Thereafter, the time difference ΔTnk after the frequency Fdev is returned to be equal to the frequency Fref can also be made smaller than the time difference ΔTn1 before synchronization.

[0045] FIG. 12 shows an example of the change before and after synchronization. The second time information of the devices 10...1N is synchronized with the first time information of the controller 52, and in particular, the second time information between the devices 10...1N can be synchronized as much as possible between the devices 10...1N. There is also a slight time difference ΔT between the first time information of the controller 52 and the second time information of the devices 10...1N. N and the time difference ΔT between the controller 52 and each device 10...1N. N However, by aligning the measurement timing between the second time information of each of the devices 10...1N, the measurement timing of the battery voltage of each of the devices 10...1N can be aligned, so this does not cause a problem.

[0046] The above is a basic explanation, but more desirable synchronization methods will be explained below for each element. <About the communication pass-through function> The communication pass-through function will be described with reference to Figures 8 and 13. As described above, when the controller 52 enables the communication pass-through function, it transmits a communication pass-through command to the devices 10...1N in S122 of Figure 8. On the device 10...1N side, upon receiving the communication pass-through command, it transmits the communication pass-through command to the subsequent device 10...1N or the controller 52 in S212 of Figure 13. Then, the pass-through control unit 24 of each device 10...1N switches the circuit so that data is passed through from the receiving unit 22 to the transmitting unit 23.

[0047] On the device 10...1N side, after waiting in S214 of FIG. 13, it is determined in S215 whether data has been received before a predetermined time has elapsed, and if data continues to be received, it is determined in S216 whether the data is a pass-through end command. If the received data is not a pass-through end command, the device 10...1N waits again in S214. If the device 10...1N continues to receive data before the predetermined time has elapsed and receives a pass-through end command in S216, it disables the communication pass-through function in S217, returns to the normal state, and terminates. That is, if the device 10...1N receives a pass-through end command in S216 or does not receive data before the predetermined time has elapsed in S215, it disables the communication pass-through function in S217, returns to the normal state, and terminates.

[0048] FIG. 14 shows an example of a hardware configuration related to the communication pass-through function. As shown in FIG. 14, the receiving unit 22 is configured with a switch SWR. The transmitting unit 23 is configured with switches SWT1 and SWT2, each of which can be turned on and off by the pass-through control unit 24. When a communication pass-through command is input, the pass-through control unit 24 turns on the switches SWR and SWT1, thereby directly connecting the communication path of the receiving unit 22 to the communication path of the transmitting unit 23. This enables the communication pass-through function. Conversely, if the pass-through control unit 24 does not receive a communication pass-through command, it turns off the switches SWR and SWT1 and turns on the switch SWT2, thereby cutting off the direct connection between the receiving unit 22 and the transmitting unit 23, disabling the communication pass-through function, and allowing only command transmission and reception processing via the communication control unit 21 to be performed. This allows the communication pass-through function to be switched between enabled and disabled.

[0049] Fig. 15 shows an explanation of the delay time Δtd_path in each device 10...1N, and Fig. 16 shows a schematic diagram of the delay state of the pulse signal in each device 10...1N. This pulse signal is a signal that constitutes a synchronization command. As shown in Figs. 15 and 16, it can be seen that the longer the command propagation distance from the controller 52 to the device 10...1N, the longer the cumulative time of the delay time Δtd_path.

[0050] In particular, when the communication control unit 21 of each device 10...1N executes command transmission / reception processing and repeatedly transmits and receives synchronization commands, the delay time Δtd_path increases by the processing time required for each device 10...1N to interpret and generate the command. Therefore, it is desirable for the controller 52 to minimize internal delays by sending a communication pass-through command to each device 10...1N in advance and enabling the communication pass-through function of each device 10...1N. This minimizes the delay time Δtd_path.

[0051] When this pass-through function is enabled, there is a risk that each device 10...1N may shorten the pulse width of the pulse signal that constitutes the synchronization command when passing the synchronization command to the next device 10...1N. This is because, as shown in Fig. 17, a propagation delay occurs in the communication path and the pulse signal waveform is rounded due to stray capacitance that occurs in the communication path.

[0052] For this reason, although not shown in Fig. 14, it is desirable to shape the pulse signal into a rectangular wave by configuring a buffer (not shown) in the receiving unit 22 or the transmitting unit 23 to shape the waveform. Fig. 17 shows an example of a pulse signal shaped into a rectangular wave.

[0053] For example, as shown in Fig. 17, whether the pulse width is high or low, there is a difference in propagation delay between the rising and falling edges of the pulse signal, so the pulse width tends to become shorter as the synchronization command is transmitted to subsequent stages. In the example shown in Fig. 17, whether it is a high pulse or a low pulse, when it is transmitted to subsequent devices 10...1N, the pulse width of the pulse signal becomes gradually shorter, with tpw0>tpw1>tpw2.

[0054] For this reason, it is desirable that the controller 52 make the pulse signal constituting the synchronization command a pulse signal longer than a predetermined width so that it reaches all of the devices 10...1N, as shown in Fig. 18. By having the controller 52 lengthen the pulse width of the pulse signal to be output to the next device 10...1N in advance, it is possible to prevent the pulse signal from disappearing even if the pulse signal received / sent by each device 10...1N gradually becomes shorter as it is transmitted to the subsequent stage due to the characteristics of the device 10...1N.

[0055] Furthermore, when each of the devices 10...1N uses a communication pass-through function, the delay time Δtd_path that a command takes to pass through each of the devices 10...1N may be measured in advance, and the measured delay time Δtd_path may be taken into account when adjusting the second time information. Also, even in a normal communication state in which the communication pass-through function is not used, the delay time Δtd_path that the communication control unit 21 takes to decode a synchronization command may be measured in advance, and the delay time Δtd_path may be taken into account when adjusting the second time information.

[0056] For example, the controller 52 may store first time information at the time when the command is transmitted to the next device 10, 11, etc., in advance. When the command passes through each device 10...1N and returns to the controller 52, the difference between the stored first time information and the time information at the time of the return may be measured in advance, such as during manufacturing inspection, or at timings such as when the system main body is started up or when a normal command is transmitted, and the difference may be stored in the memory of the controller 52 as the total delay time Δtd_all. The controller 52 may include a nonvolatile memory and a volatile memory as memory. During manufacturing inspection, the controller 52 stores the total delay time Δtd_all in the nonvolatile memory. Furthermore, at other timings such as when the system main body is started up or when a normal command is transmitted, the controller 52 stores the total delay time Δtd_all in the volatile memory. When using the total delay time Δtd_all, the controller 52 may use the total delay time Δtd_all stored in the memory to correct for internal delays in the communication path and each device 11...1N.

[0057] N+1 devices 10 to 1N are connected to the controller 52, and as shown in Fig. 19, the internal delay of each of the devices 10 to 1N is designated as Δtd_path. The total delay time Δtd_all of all paths roughly coincides with the sum of the internal delay of each of the N+1 devices 10 to 1N and the delay times of the N+2 communication paths, as shown in Fig. 20. For example, by measuring these delay times Δtd_all, it becomes possible to correct the internal delays of the communication paths and each of the devices 10...1N, regardless of whether the communication pass-through function is set or not.

[0058] <Detailed examples of frequency feedback control> A more detailed example will be described below. Fig. 21 shows a detailed example of time synchronization that replaces Fig. 9. When the controller 52 generates a synchronization command and transmits the synchronization command together with the first time information to the devices 10...1N as shown in S123 of Fig. 8 and the description thereof, the devices 10...1N receive the synchronization command as shown in S321 of Fig. 21.

[0059] Upon receiving the synchronization command, each of the devices 10 to 1N sequentially transmits the synchronization command to the subsequent stage. Then, in S323, the time difference detection unit 26 of each of the devices 10 to 1N calculates the time difference ΔT between the first time information of the controller 52 and its own second time information. N Detect.

[0060] <Time difference ΔT N exceeds the difference threshold ΔTth> The time difference detection unit 26 calculates the time difference ΔT N If it is determined that the previous time difference ΔT exceeds the difference threshold value ΔTth, the process proceeds to steps S325a to S325d. N and the current time difference ΔT N If the time difference detection unit 26 determines that the calculated value is less than zero, it calculates the difference in absolute value of the previous time difference ΔT N The time difference ΔT N In this case, the time difference detection unit 26 sets the frequency in S325b so that it is higher than the target frequency value but lower than the previous frequency setting value. At this time, the frequency control unit 27 increases the frequency Fdev of the second clock output by the oscillator 29.

[0061] Conversely, if the time difference detection unit 26 determines in S325a that the calculated value exceeds zero, the previous time difference ΔT N The time difference ΔT N has become wider. Then, the time difference detection unit 26 determines NO in S325a and YES in S325c, and instructs the frequency control unit 27 to increase the frequency further than the previous frequency setting value in S325d. At this time, the frequency control unit 27 increases the frequency Fdev of the second clock output by the oscillator 29 further than the previous frequency setting value.

[0062] In other words, on the device 11...1N side, the time difference between the previous and current time ΔT N Considering the change in time difference ΔTN If the time difference ΔT is greater than the target value, the frequency setting value is increased above the target value. However, the frequency setting value is controlled by selecting whether to increase the frequency setting value to be smaller than the previous frequency setting value but larger than the target value, or to increase the frequency setting value even more than the previous frequency setting value. N and the current time difference ΔT N If the difference in absolute value between these is equal to zero, the determination in S325a is NO and the determination in S325c is NO, so the processing routine is terminated.

[0063] <Time difference ΔT N is below the difference threshold ΔTth> On the other hand, the time difference detection unit 26 calculates the time difference ΔT N If it is determined that the previous time difference ΔT is less than the difference threshold value ΔTth, the process proceeds to steps S327a to S327d. N and the current time difference ΔT N If the time difference detection unit 26 determines that the calculated value is less than zero, it calculates the difference in absolute value of the previous time difference ΔT N The time difference ΔT N In this case, the time difference detection unit 26 sets the frequency in S327b so that it is smaller than the target frequency value but larger than the previous frequency setting value. At this time, the frequency control unit 27 reduces the frequency Fdev of the second clock output by the oscillator 29.

[0064] Conversely, if the time difference detection unit 26 determines in S327a that the calculated value exceeds zero, the previous time difference ΔT N The time difference ΔT N has become wider. Then, the time difference detection unit 26 determines NO in S327a and YES in S327c, and instructs the frequency control unit 27 in S327d to make the frequency even smaller than the previous frequency setting value. At this time, the frequency control unit 27 makes the frequency Fdev of the second clock output by the oscillator 29 even smaller than the previous frequency setting value.

[0065] In other words, on the device 10...1N side, the time difference between the previous and current time ΔT N Considering the change in time difference ΔT N If the time difference ΔT is smaller than the target value, the frequency setting value is made smaller than the target value, but the control is performed by selecting whether to make the frequency setting value larger than the previous frequency setting value but smaller than the target value, or to make it even smaller than the previous frequency setting value. N If the difference threshold ΔTth is met, or if the difference N and the current time difference ΔT N If the difference in absolute value between the values ​​is equal to zero, the devices 11...1N will make a NO determination in S327a and a NO determination in S327c, and will exit the processing routine.

[0066] Figure 22 shows the time difference ΔT N and the change in frequency Fdev of oscillator 29 on the device 10...1N side. As shown in Figure 22, the time difference ΔTN is adjusted each time a device 10...1N receives a synchronization command. As mentioned above, the synchronization command sets the time update intervals Ts1, Ts2, and Ts3 as the synchronization interval, and by interpreting the time update interval Ts each time a synchronization command is received, the device 10...1N can determine the timing for inputting the next synchronization command.

[0067] Furthermore, each time a synchronization command is input, the devices 10...1N calculate the time difference ΔT between the first time information and the second time information. N (ΔT1, ΔT2, ΔT3, ΔT4) is calculated. N When F changes, the frequency Fdev of the oscillator 29 of the device 10...1N also changes. Fig. 22 shows the frequency fluctuations ΔF (ΔF1, ΔF2, ΔF3, ΔF4).

[0068] For example, the time difference ΔT NConsider a case where the frequency changes from ΔT1 to ΔT2. At timing t1, the time difference detection unit 26 determines that the time difference ΔT1 exceeds zero. In the example of FIG. 22, the difference threshold value ΔTth is set to zero. The frequency change amount ΔF1 is set to be larger the farther the time difference ΔT1 is from the target value of zero.

[0069] At timing t2, the current time difference ΔT2 is smaller than the previous time difference ΔT1, so the time difference detection unit 26 detects the time difference ΔT N has decreased, and the frequency change amount ΔF2 is adjusted so that the frequency Fdev is set to a value higher than the target value fref but lower than the previous frequency Fdev.

[0070] At timing t3, similar to timing t2, the current time difference ΔT3 is smaller than the previous time difference ΔT2, so the time difference detection unit 26 detects the time difference ΔT N has decreased, and the frequency change amount ΔF3 is adjusted so that the frequency is set to a value higher than the target value fref of the frequency Fdev but lower than the previous frequency Fdev.

[0071] At timing t4, the time difference detection unit 26 determines that the time difference ΔT4 is less than zero. Furthermore, the current time difference ΔT4 is smaller than the previous time difference ΔT3. The time difference detection unit 26 sets the frequency to be smaller than the target frequency value fref and adjusts the change amount ΔF4 in the frequency Fdev so that the frequency is set to be smaller than the previous frequency Fdev.

[0072] In this way, the devices 10...1N detect the time difference ΔT N becomes zero and feedback control can be performed so that the frequency Fdev becomes the target value fref. Furthermore, even if the first clock frequency of the controller 52 and the frequency Fdev of the second clock of the oscillator 29 of the device 10...1N differ due to some influence, by repeating the process shown in Fig. 21, the frequency Fdev of the second clock can be matched as much as possible to the target value fref of the first clock frequency.

[0073] <When a free-run period is set between feedback control periods> Next, an example in which a free-running period is provided between feedback control periods will be described with reference to Figures 23 and 24. When the device 10...1N receives a synchronization command at timing t11 in Figure 23, it reads the first time information of the controller 52 from the synchronization command and calculates the time difference ΔT from the previous first time information. N The frequency of the first clock of the controller 52 can be calculated based on the above.

[0074] The devices 10...1N control the frequency Fdev of the second clock of the oscillator 29 of the devices 10...1N based on the calculated frequency of the first clock. N Within a certain range ΔT ideal It should be noted that during this feedback control period, the devices 10...1N do not necessarily control the frequency Fdev of the second clock of the oscillator 29 to a frequency close to the target value fref.

[0075] Then, the free-running period begins at timing t12 after the lapse of the period Ts. During the free-running period, the devices 10...1N free-run without feedback control. The devices 10...1N adjust the frequency Fdev of the second clock of the oscillator 29 so that it approaches the frequency of the first clock of the controller 52 calculated when the synchronization command was received, but perform free-running control without feedback control.

[0076] Device 10...1N is the time difference ΔT N and the current time difference TN, after a certain period of time, the time difference ΔT N It is advisable to adjust the frequency Fdev so that the time difference ΔT becomes zero, and then adjust the frequency so that it returns to the target value fref after a certain period of time. This will allow the time difference ΔT to be stable even if synchronization commands are received irregularly. Ncan be aligned.

[0077] <Case 1> 23 illustrates an example in which a small error remains in the frequency Fdev of the second clock of the oscillator 29 of each of the devices 10...1N after the lapse of the period Ts. Here, the period Ts is set to a time update interval Ts0 that is set based on the time update interval Ts of the synchronization command received from the controller 52. Note that the period Ts may also be set to a specific period (e.g., Ts1) that is set in advance.

[0078] When the time difference when the devices 10...1N receive the synchronization command is ΔT1 and a proportional constant is Fx, the time difference ΔT N When controlling to make the frequency Fdev of the second clock equal to zero, the difference ΔF1a between the frequency Fdev of the second clock and the previous frequency Fdev is calculated as shown in the following equation (1). ΔF1a=ΔT N / Ts·Fx…(1)

[0079] The devices 10...1N control the oscillator 29 at timing t11 so as to significantly change the frequency Fdev of the oscillator 29 by ΔF1a in equation (1), and continue feedback control for the period Ts. For example, a preset fixed value or an initial value is used as the target value fref, and the time difference ΔT1 is corrected and calculated when the synchronization command is received.

[0080] After that, when a predetermined period Ts has elapsed, the devices 10...1N reduce the frequency Fdev of the second clock of the oscillator 29 by an amount of change ΔF1b so that the time difference ΔT1 does not increase any further. The time difference ΔT1 corresponds to the integrated value of the frequency error up to the time when the synchronization command was received immediately before. This time difference ΔT1 is mainly due to T freerun :Assuming that it is an integrated value during the free-running period, it can be calculated using the following formula (2). ΔT1 = ΔF0b × T freerun …(2)

[0081] The devices 10...1N set the next change amount ΔF1b as shown in the following equation (3). ΔF1b=ΔT1 / T freerun …(3) As a result, as shown at timings t12 to t13, the frequency of the first clock of the controller 52 can be brought closer to the reference value fref. Similarly, the subsequent feedback control period t13 to t14 and the free-run period t14 to t15 can also be controlled in the same way by calculating the amounts of change ΔF2a and ΔF2b in the frequency Fdev of the second clock of the devices 11...1N.

[0082] <Case 2> In FIG. 24, during a free-running period t22 to t23 following a feedback control period t21 to t22, a frequency fluctuation of the second clock occurs due to the influence of the temperature drift of the oscillator 29 on the device 10...1N side, resulting in a time difference ΔT N In such a case, the same effect can be achieved by controlling in the same way as the method described above.

[0083] The example shown in Figure 24 differs from the time change in Figure 23 in that the time difference ΔT N As the frequency Fdev decreases, the frequency Fdev increases. However, since the time difference ΔTk is calculated after the synchronization command is received at timing t23, the effect of this drift can be corrected at this timing t23. Similar control continues in the subsequent feedback control period t23 to t24 and free-run period t24 to t25. This achieves the same effect as the flow in FIG. 23.

[0084] <About timeouts> When the controller 52 transmits a synchronization command with an error detection code such as a CRC attached, the devices 10...1N detect the error by detecting the error detection code from the synchronization command. If an error is detected in the synchronization command received from the controller 52 due to noise being mixed in the communication path or the like, and the synchronization command cannot be completed within a certain predetermined period of time, each of the devices 10...1N executes a timeout process.

[0085] As shown in FIG. 25, the devices 10...1N receive synchronization commands at timings t31 and t32, each after the time update interval Ts. However, if noise is mixed in due to some influence, the devices 10...1N detect an error in the command at timings t33 and t34, and are unable to interpret the synchronization command. In this case, if the devices 10...1N are unable to interpret the synchronization command after a predetermined number of attempts, for example, two attempts in this case, they execute a timeout process at timing t35. In the timeout process, the frequency Fdev is returned to the initial target value fref, thereby reducing the time difference ΔT N As a result, even if noise is mixed in during communication, the time difference ΔT N This can prevent significant deviations.

[0086] Here, the example shows a case where the timeout process is executed on the condition that an error is detected on the device 10...1N side and the execution of the synchronization command processing is not completed, but the present invention is not limited to this. The timeout process may also be executed on the condition that the execution of the synchronization command processing is not completed due to some influence on the device 10...1N side.

[0087] Alternatively, each device 10...1N may perform a timeout process if it does not receive a synchronization command within a certain period of time after receiving a communication pass-through setting. In such a case, the device 10...1N may store an expected reception interval of the synchronization command in the reference time register 25. If this reception interval deviates beyond a certain threshold, the device 10...1N may return the frequency Fdev of the second clock to the target value fref, thereby reducing the time difference ΔT N This can prevent the alignment error from continuing.

[0088] <About calibration> Next, calibration by the system will be described with reference to Figures 26 and 27. The main body of the battery management system 1 performs calibration at startup or before measuring impedance. Furthermore, the devices 10...1N are configured to perform calibration so that the frequency Fdev of the second clock of the oscillator 29 of each of the devices 10...1N falls within a specific range when a certain time or more has elapsed since the previous synchronization command was transmitted.

[0089] At this time, the controller 52 transmits a calibration command to the devices 10...1N at timing t41 in Fig. 26. As also shown in S111 and S112 in Fig. 7, the devices 10...1N roughly adjust the frequency Fdev of the second clock related to the calibration before measuring the impedance.

[0090] When performing calibration, the controller 52 transmits the first clock for a predetermined period or a predetermined number of pulses. The devices 10...1N detect the frequency difference between the first clock and the second clock based on the received first clock and adjust the frequency Fdev of the second clock.

[0091] For example, during the calibration period t41 to t42, the communication control unit 21 causes the calibration unit 31 to input the first clock signal itself transmitted from the controller 52 to the time difference detection unit .

[0092] 27, the time difference detection unit 26 is configured with a phase detector 26a, and the time information generation unit 30 is configured with a frequency divider 30a. As a result, when performing calibration processing, a PLL loop can be configured with the phase detector 26a of the time difference detection unit 26, the frequency control unit 27, the filter 28, the oscillator 29, and the frequency divider 30a of the time information generation unit 30. The phase detector 26a of the time difference detection unit 26 detects the phase difference between the signal with the frequency Fdev of its own oscillator 29 and the signal with the frequency of the clock transmitted from the controller 52, and can perform frequency control via the PLL loop so that the phase difference is eliminated.

[0093] As a result, the devices 10...1N forcibly synchronize the second time information with the first time information so that there is no time difference between timing t41 when the calibration command is received and timing t42 when the calibration ends. If the devices 10...1N receive a measurement command during this period t41 to t42 or before that, they may perform AD conversion of the measurement data of the voltage and current of the batteries S1...SM, but since the time information does not match between the controller 52 and the devices 10...1N, it is advisable to discard the measurement data.

[0094] In the above description, the devices 10...1N perform calibration using the first clock transmitted from the controller 52 as a reference signal. However, this is not limiting. For example, the controller 52 may transmit digital data of first time information based on the first clock, and the devices 10...1N may synchronize their second time information to this digital data. In this case, the controller 52 may include the data of the first time information in the calibration command, and the devices 10...1N may forcibly synchronize their second time information to the first time information. As a result, discontinuity between the controller 52 and the devices 10...1N can be tolerated, and the time information can be forcibly synchronized.

[0095] <Summary of this embodiment> As described above, the battery management system 1 of this embodiment operates as follows. The controller 52 operates using the first clock of the high-precision oscillator 51, generates first time information from the first clock as a reference for each of the devices 10...1N, and transmits data including the first time information to the devices 10...1N as a synchronization command that can be used in conjunction with other commands. Meanwhile, the devices 10...1N each include an oscillator 29 that generates a second clock with a controllable frequency Fdev, generates second time information from the second clock generated by the oscillator 29, and generates measurement timing from the second time information.

[0096] When the devices 10...1N receive a synchronization command from the controller 52, they compare the received first time information with the second time information and control the frequency Fdev of the oscillator 29 so that the time difference becomes a constant value based on the difference between the two. This allows the devices 10...1N to control the frequency Fdev of the second clock of the oscillator 29 so that the frequency of the first clock of the controller 52 approaches the target value fref, aligning the second time information generated from the second clock with the first time information generated from the first clock, and enabling synchronization of measurement timing among the multiple devices 11...1N to be performed as accurately as possible.

[0097] (Other embodiments) The present disclosure is not limited to the above-described embodiment, and for example, the following modifications or extensions are possible. In the above-described embodiment, an example was given of measuring current and voltage at the same timing in different devices 10...1N, but without being limited to this, the present invention can also be applied to a case where voltage and current are measured with a certain time lag in voltage measurement units 110...11N, and the time lag in measurement time is corrected when calculating impedance.

[0098] In addition to the inventions set forth in the claims, the present disclosure also includes the following content. [1] 1. A battery management system comprising a controller and a plurality of devices that receive commands from the controller and monitor a battery, the controller and the plurality of devices perform asynchronous communication while connected in any one of a ring connection, a daisy chain connection, and a star connection; The controller a device that operates according to a first clock of a high-precision oscillator, generates first time information from the first clock as a reference for each device, and transmits data including the first time information to the device as a synchronization command that can be used in conjunction with other commands; The device comprises: an oscillator that generates a second clock whose frequency is controllable, second time information is generated from the second clock generated by the oscillator, and measurement timing of the battery is generated from the second time information; When the synchronization command is received from the controller, the battery management system compares the received first time information with the second time information, and controls the frequency of the oscillator based on the difference between the two to make the time difference a constant value.

[0099] [2] A battery management system in which the communication lines between each of the devices are DC-isolated by insulating parts such as pulse transformers, capacitors, and relays [1].

[0100] [3] When the synchronization command is transmitted from the controller by sequentially transmitting pulse signals to the downstream device in the connection configuration, The device comprises: A battery management system according to [1] or [2], which has a pass-through function that passes the received synchronization command to the next device in order to minimize internal delays in the device, and which receives the synchronization command from the controller after enabling the pass-through function and then executes the synchronization command.

[0101] [4] When the pass-through function is enabled, each of the devices shortens the pulse width of the pulse signal constituting the synchronization command when passing it to the next device; The controller outputs a pulse signal having a width greater than a predetermined width so that the pulse signal reaches all of the devices.

[0102] [5] the controller is configured to attach an error detection code to the synchronization command and transmit it, causing the device to detect the error; A battery management system according to any one of [1] to [4], wherein each device executes a timeout process if an error is detected in the command received from the controller and the device is unable to complete execution of the synchronization command within a certain predetermined period of time.

[0103] [6] the system main body is configured to perform calibration so that the frequency of the second clock of each device falls within a specific range when the system main body is started up, before measuring impedance, or when a certain time period has elapsed since the previous transmission of the synchronization command; the controller transmits the first clock for a predetermined period or a predetermined number of pulses, or transmits data of the first time information based on the first clock; The device is a battery management system according to any one of [1] to [5], which detects a frequency difference based on the received data of the first clock or the first time information and forcibly adjusts the frequency of the second clock.

[0104] [7] A battery management system according to any one of [1] to [6], wherein each device performs a timeout process if it does not receive the synchronization command for a certain period of time after receiving a communication pass-through setting, or if it is unable to complete execution of the synchronization command, and stores an expected interval for receiving the synchronization command, and if the reception interval deviates by more than a certain threshold, returns the frequency of the second clock to a target value.

[0105] [8] Each device is a battery management system that measures the delay time passing through each device in advance during communication pass-through or normal communication conditions, and takes that delay time into account when adjusting time information.

[0106] [9] The device changes the amount of change in the second time information depending on the reception interval of the synchronization command and the time difference between the first time information and the second time information.

[0107]

[10] The battery management system of any one of [1] to [9], wherein the controller includes information for adjusting the update interval of the synchronization command stored in each device or the amount of change in the second time information in the synchronization command and transmits the information to the device.

[0108]

[11] The battery management system of any one of [1] to

[10] , wherein the device adjusts the frequency so that the time difference becomes zero after a certain period of time according to the difference between the previous time difference and the current time difference, and adjusts the frequency so that the frequency returns to a target value after the certain period of time.

[0109]

[12] A battery management system according to any one of [1] to

[11] , which synchronizes each device to align the timing of AD conversion of the voltage and current of the battery when measuring the impedance of the battery.

[0110] The techniques described in this disclosure may be implemented by a special purpose computer configured with a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the techniques described in this disclosure may be implemented by a special purpose computer configured with a processor comprising one or more dedicated hardware logic circuits. Alternatively, the techniques described in this disclosure may be implemented by one or more special purpose computers configured with a processor comprising one or more hardware logic circuits in combination with a processor and memory programmed to perform one or more functions. Furthermore, a computer program may be stored as instructions executed by a computer on a computer-readable non-transitory storage medium.

[0111] Although the present disclosure has been described based on the above-described embodiment, it is understood that the present disclosure is not limited to the embodiment or the structure described in the embodiment. The present disclosure also encompasses various modifications and modifications within the equivalent range. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure. [Explanation of symbols]

[0112] In the drawings, 1 indicates a battery management system, 52 indicates a controller, 10...1N indicate devices, 29 indicates an oscillator, 51 indicates a high-precision oscillator, and S1...SM indicate batteries.

Claims

1. A battery management system comprising a controller (52) and a plurality of devices (10, 11...1N) that receive commands from the controller and monitor the battery, The controller and the plurality of devices perform asynchronous communication while connected via one of the following connection types: ring connection, daisy-chain connection, or star connection. The aforementioned controller, It operates using the first clock of a high-precision oscillator, generates first time information from the first clock that serves as a reference for each device, and transmits data including the first time information to the device as a synchronization command that can be used in conjunction with other commands. The device described above, It includes an oscillator that generates a second clock with controllable frequency, generates second time information from the second clock generated by the oscillator, and generates the measurement timing of the battery from the second time information, A battery management system that, upon receiving the synchronization command from the controller, compares the received first time information with the second time information, and controls the frequency of the oscillator to be increased or decreased according to the comparison between the time difference and the difference threshold (ΔTth) for a specific period or update interval, and then returns the frequency to its original value, so that the compared time difference (ΔTN) becomes a constant value.

2. The battery management system according to claim 1, wherein the communication lines between each of the aforementioned devices are DC-insulated by an insulating part such as a pulse transformer, capacitor, or relay.

3. When the controller sequentially transmits pulse signals to the subsequent device in the connection configuration to transmit the synchronization command, The device described above, The battery management system according to claim 1, comprising a pass-through function that allows the received synchronization command to be passed to the next device in order to minimize the internal delay of the device, and which receives and executes the synchronization command from the controller after enabling the pass-through function.

4. If the aforementioned pass-through function is enabled, The battery management system according to claim 3, wherein the controller outputs a pulse signal that is longer than a predetermined width so that it reaches all of the devices.

5. The controller is configured to detect errors when it transmits an error detection code attached to the synchronization command, The battery management system according to claim 1, wherein each device detects an error in a command received from the controller and fails to complete the execution of the synchronization command within a predetermined period of time, and performs a timeout process.

6. The system itself is configured to perform calibration so that the frequency of the second clock of each device falls within a specific range when it starts up, before impedance measurement, or when a certain amount of time has elapsed since the previous transmission of the synchronization command. The controller transmits the first clock for a predetermined period or for a predetermined number of pulses, or transmits data of the first time information based on the first clock. The battery management system according to claim 1, wherein the device detects a frequency difference based on the received data of the first clock or first time information and forcibly adjusts the frequency of the second clock.

7. The battery management system according to claim 1, wherein each device performs a timeout process if it does not receive the synchronization command for a certain period of time after receiving the communication passthrough setting, or if it is unable to complete the execution of the synchronization command, stores the expected interval for receiving the synchronization command, and returns the frequency of the second clock to the target value if the reception interval deviates by a certain threshold.

8. The battery management system according to claim 1, wherein each device pre-measures the delay time passing through each device in a communication pass-through or normal communication state, and takes that delay time into account when adjusting the time information.

9. The battery management system according to claim 1, wherein the device changes the amount of change of the second time information according to the interval of receiving the synchronization command and the time difference between the first time information and the second time information.

10. The battery management system according to claim 1, wherein the controller transmits to the device information to adjust the update interval of the synchronization command stored in each device or the amount of change of the second time information, including this information in the synchronization command.

11. The battery management system according to claim 1, wherein the device adjusts the frequency to make the time difference zero after a certain period of time, according to the difference between the time difference before the current time and the time difference of the current time, and adjusts the frequency to return to a target value after the certain period of time.

12. The battery management system according to claim 1, which synchronizes each device in order to match the AD conversion timing of the battery voltage and current when measuring the impedance of the battery.

Images