Optical print head and image forming apparatus comprising the optical print head

Abstract

To solve the problem with a control section of an image forming apparatus in prior art, that one light-emitting chip among a plurality of light-emitting chips is specified and transmission of control data to the specified light-emitting chip is repeated, when transmitting control data to each light-emitting chip, and in such a constitution, there is risk of increasing the time required for transmitting control data to all light-emitting chips mounted on a substrate.SOLUTION: A plurality of light-emitting chips respectively is connected to a controller IC by the different one among a plurality of signal wires, and control data is transmitted to each of the light-emitting chips connected by the different one among the plurality of signal wires.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to an image forming apparatus that forms an image using an exposure unit having a plurality of light emitting units. [Background technology]

[0002] An electrophotographic image forming apparatus forms an image by exposing a rotating photoconductor to light, forming an electrostatic latent image on the photoconductor, and developing the electrostatic latent image with toner. The direction parallel to the rotation axis of the photoconductor is referred to as the main scanning direction. Patent Document 1 discloses an image forming apparatus using an exposure unit in which a plurality of light-emitting units are arranged in the main scanning direction. In Patent Document 1, a plurality of light-emitting chips are mounted on a substrate, each chip having electrodes, an organic electroluminescence (EL) film, and a circuit unit for emitting light from the organic EL film formed on a silicon wafer. The circuit unit of each light-emitting chip receives control data from a control unit of the image forming apparatus, for example, regarding the magnitude of the voltage to be applied to the electrode (the current to be supplied to the organic EL film). The control data is stored in a register provided in the circuit unit. The circuit unit applies a voltage to the electrodes based on image data sent from the control unit of the image forming apparatus and control data related to the magnitude of the voltage stored in the register. As a result, the organic EL film emits light. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-35765 Summary of the Invention [Problem to be solved by the invention]

[0004] In Patent Document 1, in order to transmit control data from the control unit of the image forming device to each light-emitting chip, the control unit of the image forming device and each light-emitting chip are connected in a bus shape by signal lines.

[0005] Therefore, when transmitting control data to each light-emitting chip, the control unit of the image forming apparatus repeatedly designates one of the light-emitting chips and transmits the control data to the designated light-emitting chip. In such a configuration, there is a risk that the time required to transmit the control data to all the light-emitting chips mounted on the board will increase.

[0006] In view of the above problems, an object of the present invention is to reduce the time required to transmit control data to a plurality of light-emitting chips. [Means for solving the problem]

[0007] The image forming apparatus according to the present invention comprises: A rotating photoreceptor; a plurality of light-emitting chips arranged along the rotation axis direction of the photosensitive member, the plurality of light-emitting units emitting light to expose the photosensitive member; a circuit unit that turns on and off the plurality of light-emitting units based on image data that controls the turning on and off of the plurality of light-emitting units; and a memory unit that stores control data that indicates target light amounts of the plurality of light-emitting units; a controller that outputs the control data; Equipped with each of the plurality of light-emitting chips is connected to the controller via a different one of a plurality of signal lines; the control data transmitted via a different one of the plurality of signal lines is stored in the storage unit; It is characterized by: [Effects of the Invention]

[0008] According to the present invention, it is possible to reduce the time required to transmit control data to a number of light-emitting chips. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic diagram illustrating the configuration of an image forming apparatus. [Figure 2] FIG. 2 is a diagram showing an exposure head and a photosensitive member. [Figure 3] FIG. 3 is a diagram showing a printed circuit board of an exposure head. [Figure 4] FIG. 2 is an explanatory diagram of the arrangement of light-emitting elements in a light-emitting chip. [Figure 5] FIG. [Figure 6] FIG. [Figure 7] FIG. 1 is a control configuration diagram of a light-emitting chip. [Figure 8] 10A and 10B are diagrams showing examples of signals on signal lines when image data is transmitted to the light-emitting chip; [Figure 9] 10A and 10B are diagrams showing examples of signals on each signal line when control data is written to a register of a light-emitting chip. [Figure 10] 10A and 10B are diagrams showing examples of signals on each signal line when control data is read from a register of a light-emitting chip. [Figure 11] FIG. 1 is a functional block diagram of a light-emitting chip. [Figure 12] FIG. [Figure 13] An example of a circuit diagram for a current setting DAC. [Figure 14] 4 is a timing chart of various signals during printing. [Figure 15] 4 is a timing chart of various signals during printing. [Figure 16] 10 is a flowchart of a process executed by an image controller. [Figure 17] 10 is a flowchart of a process executed by an image controller. [Figure 18] FIG. 10 is a diagram showing a test pattern for tone correction control. [Figure 19] 10 is a flowchart of a process executed by an image controller. [Figure 20] FIG. 1 is a control configuration diagram of a light-emitting chip. [Figure 21] 10A and 10B are diagrams showing examples of signals on each signal line when control data is read from a register of a light-emitting chip. [Figure 22] FIG. 1 is a functional block diagram of a light-emitting chip. [Figure 23] 5A and 5B are diagrams showing examples of signals on each signal line when transmitting image data. [Figure 24] FIG. 4 is a diagram showing an example of signals on each signal line when accessing a register. [Figure 25] 10A and 10B are diagrams showing examples of signals on each signal line when an identification bit indicating the type "invalid" is transmitted. [Figure 26] FIG. 1 is a functional block diagram of a light-emitting chip. [Figure 27] State transition diagram of the interface circuit. [Figure 28] FIG. 1 is a schematic diagram illustrating the configuration of an image forming apparatus. [Figure 29] FIG. 3 is a diagram showing a printed circuit board of an exposure head. [Figure 30] 10 is a diagram showing the relationship between the temperature of a light-emitting unit and the amount of light emitted when a predetermined current is supplied to the light-emitting unit. DETAILED DESCRIPTION OF THE INVENTION

[0010] Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. However, the components described in this description are merely examples, and the present invention is not limited to the embodiments described in this description.

[0011] [Embodiment 1] 1 is a schematic diagram of an image forming apparatus according to this embodiment. A reading unit 100 optically reads an original placed on a platen and generates image data representing the reading result. An image creating unit 103 forms an image on a sheet based on the image data generated by the reading unit 100 or based on image data received from an external device via a network, for example.

[0012] The image forming unit 103 includes image forming units 101a, 101b, 101c, and 101d. The image forming units 101a, 101b, 101c, and 101d form black, yellow, magenta, and cyan toner images, respectively. The image forming units 101a, 101b, 101c, and 101d have the same configuration and will hereinafter be collectively referred to as image forming unit 101.

[0013] During image formation, the photosensitive member 102 of the image forming unit 101 is rotated clockwise in the drawing.

[0014] The charger 107 charges the photoconductor 102. The exposure head 106, which is an exposure device, exposes the photoconductor 102 according to image data, forming an electrostatic latent image on the photoconductor 102. The developer 108 develops the electrostatic latent image on the photoconductor 102 with toner. The toner image on the photoconductor 102 is transferred to a sheet transported on a transfer belt 111. Note that by transferring the toner images of the photoconductors 102 onto a sheet in an overlapping manner, it is possible to reproduce colors different from black, yellow, magenta, and cyan.

[0015] The conveying unit 105 controls the feeding and conveying of sheets. Specifically, the conveying unit 105 feeds sheets from a designated unit among the internal storage units 109a and 109b, the external storage unit 109c, and the manual feed unit 109d to a conveying path of the image forming apparatus.

[0016] The fed sheet is transported to registration rollers 110. The registration rollers 110 transport the sheet onto the transfer belt 111 at a predetermined timing so that the toner image on each photoconductor 102 is transferred onto the sheet. As described above, the toner image is transferred onto the sheet while it is being transported on the transfer belt 111. The fixing unit 104 fixes the toner image onto the sheet by applying heat and pressure to the sheet onto which the toner image has been transferred. After the toner image is fixed, the sheet is discharged outside the image forming apparatus by discharge rollers 112.

[0017] 2(A) and 2(B) show the photoconductor 102 and the exposure head 106. The exposure head 106 has a light-emitting point group 201, a printed circuit board 202 on which the light-emitting point group 201 is mounted, a rod lens array 203, and a housing 204 that holds the rod lens array 203 and the printed circuit board 202. The rod lens array 203 focuses the light emitted from the light-emitting point group 201 onto the photoconductor 102, and forms an imaging spot of a predetermined size on the photoconductor 102.

[0018] 3(A) and 3(B) show the printed circuit board 202. FIG. 3(A) shows the surface on which the connector 305 is mounted, and FIG. 3(B) shows the surface on which the light-emitting point group 201 is mounted (the surface opposite to the surface on which the connector 305 is mounted). In this embodiment, the light-emitting point group 201 includes 20 light-emitting chips 400-1 to 400-20. The light-emitting chips 400-1 to 400-20 are arranged in two staggered rows along the main scanning direction. In the following description, the light-emitting chips 400-1 to 400-20 will also be collectively referred to as light-emitting chips 400. The light-emitting chip 400 has a plurality of light-emitting points (light-emitting elements). Each light-emitting chip 400 on the printed circuit board 202 is connected to an image controller 700 (FIG. 7) serving as a control unit via a connector 305.

[0019] FIG. 4 is an explanatory diagram of the light-emitting chip 400 and the arrangement of the light-emitting points 602 provided on the light-emitting chip 400. One light-emitting chip 400 has multiple sets of 748 light-emitting points 602 arranged along the main scanning direction. The multiple sets are arranged along the sub-scanning direction, which is perpendicular to the main scanning direction. In this manner, the light-emitting chip 400 is arranged two-dimensionally along both the main scanning direction and the sub-scanning direction. In the following description, the number of sets is assumed to be four as an example. That is, in the following exemplary embodiment, the light-emitting chip 400 has four sets of 748 light-emitting points 602 arranged along the main scanning direction, that is, a total of 2992 light-emitting points 602. The pitch between adjacent light-emitting points 602 in the main scanning direction is approximately 21.16 μm, which corresponds to a resolution of 1200 dpi. Therefore, the length of one set of 748 light-emitting points 602 in the main scanning direction is approximately 15.8 mm. The pitch between adjacent light-emitting points 602 in the sub-scanning direction (length P in FIG. 4) is also approximately 21.16 μm, which corresponds to a resolution of 1200 dpi. Furthermore, the pitch between the light-emitting points 602 of two adjacent light-emitting chips 400 in the main scanning direction (length L in FIG. 4) is also approximately 21.16 μm, which corresponds to a resolution of 1200 dpi.

[0020] 5 is a plan view of the light-emitting chip 400. The light-emitting chip 400 has a plurality of light-emitting points 602 formed on a light-emitting substrate 402, which is, for example, a silicon substrate. The light-emitting substrate 402 is also provided with a circuit unit 406 for controlling the plurality of light-emitting points 602. Signal lines for communicating with the image controller 700, power lines for connecting to a power source, and ground lines for connecting to ground are connected to the pads 408-1 to 408-10. The signal lines, power lines, and ground lines are, for example, wires made of gold.

[0021] FIG. 6 shows a portion of the cross section taken along line AA in FIG. 5. A plurality of lower electrodes 504 are formed on the light-emitting substrate 402. A gap of length d is provided between two adjacent lower electrodes 504. A light-emitting layer 506 is provided on the lower electrodes 504, and an upper electrode 508 is provided on the light-emitting layer 506. The upper electrode 508 is a common electrode for the plurality of lower electrodes 504. When a predetermined voltage is applied between the lower electrode 504 and the upper electrode 508, a current flows from the lower electrode 504 to the upper electrode 508, causing the light-emitting layer 506 to emit light. Therefore, the region of the light-emitting layer 506 corresponding to the region of one lower electrode 504 corresponds to one light-emitting point 602. That is, in this embodiment, the light-emitting substrate 402 includes a plurality of light-emitting points. The light-emitting points may also be called light-emitting portions.

[0022] For example, an organic EL film can be used for the light-emitting layer 506. Alternatively, an inorganic EL film can be used for the light-emitting layer 506. The upper electrode 508 is made of a transparent electrode such as indium tin oxide (ITO) so as to transmit the emission wavelength of the light-emitting layer 506.

[0023] In this embodiment, the entire upper electrode 508 transmits the light emitted from the light-emitting layer 506 at a wavelength, but it is not necessary for the entire upper electrode 508 to transmit the light emitted at a wavelength. Specifically, it is sufficient that the region through which light from each light-emitting point 602 is emitted transmits the light emitted at a wavelength.

[0024] In the present embodiment, the light-emitting layer 506 is common to all the lower electrodes 504 provided in the light-emitting chip 400; however, this is not limited thereto. For example, a configuration may be adopted in which a first plurality of lower electrodes 504 among the plurality of lower electrodes 504 provided in the light-emitting chip 400 are covered with a first light-emitting layer 506, and a second plurality of lower electrodes 504 among the plurality of lower electrodes 504 provided in the light-emitting chip 400 are covered with a second light-emitting layer 506. Even in such a configuration, a region of the light-emitting layer 506 corresponding to a region of one lower electrode 504 corresponds to one light-emitting point 602. Alternatively, a light-emitting layer 506 may be individually provided for each of the plurality of lower electrodes 504 provided in the light-emitting chip 400. Even in such a configuration, a region of the light-emitting layer 506 corresponding to a region of one lower electrode 504 corresponds to one light-emitting point 602.

[0025] 7 shows the control configuration of the light-emitting chip 400. The data switching unit 705 and each light-emitting chip 400 are connected by a plurality of signal lines (wires). Specifically, the data switching unit 705 and the light-emitting chip 400-n (n is an integer from 1 to 20) are connected by a signal line DATAn, a signal line WRITEn, and a signal line READn. The signal line DATAn is used by the data switching unit 705 to transmit image data to the light-emitting chip 400-n. The signal line WRITEn is used by the data switching unit 705 to write control data to a register of the light-emitting chip 400-n and to notify the light-emitting chip 400-n of the readout of the control data. The signal line READn is used by the data switching unit 705 to read out the control data stored in the register of the light-emitting chip 400-n.

[0026] The data switching unit 705 and all the light-emitting chips 400 are connected by one signal line CLK, one signal line SYNC, and one signal line EN. The signal line CLK is used to transmit a clock signal used for transmitting and receiving data on the signal lines DATAn, WRITEn, and READn. The data switching unit 705 outputs a clock signal generated based on a reference clock signal from the clock generating unit 702 to the signal line CLK. The signals transmitted to the signal lines SYNC and EN will be described later.

[0027] The CPU 701 controls the entire image forming apparatus. The image data generation unit 703 performs various image processing, such as halftoning, on image data received from the reading unit 100 or an external device to generate image data for controlling the on / off of light emission of the light-emitting points 602 of each light-emitting chip 400. The image data generation unit 703 transmits the generated image data to a data switching unit 705. When writing control data to a register in each light-emitting chip 400, the register access unit 704 receives the control data from the CPU 701 and transmits it to the data switching unit 705. The register access unit 704 also outputs the control data read from the register in each light-emitting chip 400 to the CPU 701.

[0028] FIG. 8 shows signals on each signal line when image data is transmitted to each light-emitting chip 400. A periodic line synchronization signal indicating the exposure timing of each line on the photosensitive element 102 is output to the signal line SYNC. If the peripheral speed of the photosensitive element 102 is 200 mm / s and the resolution in the sub-scanning direction is 1200 dpi (approximately 21.16 μm), the line synchronization signal is output at a cycle of approximately 105.8 μs. The data switching unit 705 transmits image data to the signal lines DATA1 to DATA20 in synchronization with the rising edge of the line synchronization signal. In this embodiment, each light-emitting chip 400 has 2992 light-emitting points 602, and therefore, image data indicating whether each of the 2992 light-emitting points 602 is emitting or not emitting light must be transmitted to each light-emitting chip 400 within a cycle of approximately 105.8 μs. In this example, in order to transmit image data for a total of 2,992 light-emitting points 602 within a period of approximately 105.8 μs, as shown in FIG. 8, when transmitting image data, the data switching unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to 30 MHz.

[0029] FIG. 9 shows the signals on each signal line when control data is written to the register of the light-emitting chip 400. An enable signal, which is at a high level during communication and indicates that communication is in progress, is output to the signal line EN. The data switching unit 705 transmits a start bit to the signal line WRITEn in synchronization with the rising edge of the enable signal. Next, the data switching unit 705 transmits a write identification bit indicating a write operation, and then transmits the address (4 bits in this example) of the register to which the control data is to be written and the control data (8 bits in this example). The start bit, write identification bit, and address are command data that instruct the register to perform an operation. Because the amount of control data is smaller than the amount of image data, the frequency of the clock signal output to the signal line CLK can be lower than that when transmitting image data. In this example, the frequency of the clock signal when reading and writing control data is 3 MHz.

[0030] 10 shows the signals on each signal line when control data stored in the register of the light-emitting chip 400 is read. An enable signal that is at a high level during communication and indicates that communication is in progress is output to the signal line EN. The data switching unit 705 transmits a start bit to the signal line WRITEn in synchronization with the rising edge of the enable signal. Next, the data switching unit 705 transmits an identification bit followed by a read identification bit indicating a read operation, and then transmits the address of the register from which the control data is to be read.

[0031] The start bit, the read identification bit, and the address are command data that instruct the register to perform an operation. In response to the command data, the light-emitting chip 400-n reads out the control data stored at the address specified by the command from the register and outputs the read control data to a signal line READn.

[0032] Fig. 11 is a functional block diagram of one light-emitting chip 400-n. As also shown in Fig. 5, the light-emitting chip 400 has ten pads 408-1 to 408-10. The pads 408-1 and 408-2 are connected to a power supply voltage VCC by a power supply line. Power is supplied by this power supply voltage VCC to each circuit of the circuit unit 406 of the light-emitting chip 400. The pads 408-3 and 408-4 are connected to ground by a ground line.

[0033] The circuits of the circuit unit 406 and the upper electrode 508 are connected to ground via pads 408-3 and 408-4. The signal lines CLK, SYNC, and DATAn are connected to the image data holding unit 1103 via pads 408-5 to 408-7. The image data holding unit 1103 and the pads 408-5 to 408-7 are connected by signal lines corresponding to the signal lines CLK, SYNC, and DATAn, respectively. The signal lines EN, WRITEn, and READn are connected to the register 1102 via pads 408-8 to 408-10. The register 1102 and the pads 408-8 to 408-10 are connected by signal lines corresponding to the signal lines EN, WRITEn, and READn, respectively. The clock signal from the signal line CLK is also input to the register 1102. As described above, the register 1102 stores control data indicating control information. Details of the control information will be described later.

[0034] When the image data storage unit 1103 receives image data corresponding to each light-emitting point 602, it generates a drive signal that controls the light emission of each light-emitting point 602 based on the image data corresponding to each light-emitting point 602 and outputs the drive signal to the current drive unit 1104.

[0035] 12 is a diagram showing the configuration of the driver 1104. The driver 1104 is connected to each light-emitting point in a one-to-one relationship. In this embodiment, for the sake of simplicity, the description will be given for one light-emitting point, but there are as many similar driver units as there are light-emitting points 602. In other words, in this embodiment, there are 748 units x 4 columns = 2992 driver circuits for one light-emitting element array chip.

[0036] The driving unit 1104 is composed of a reference power supply 1200, a switch 1204, a DAC 1201, a control MOSFET 1202 for control, and a switching MOSFET 1203. The driving unit 1104 corresponds to the driving unit.

[0037] The reference power supply 1200 outputs a reference voltage and a reference current used in the drive unit 1104 from a voltage VCC supplied from a power supply. In other words, the reference power supply 1200 corresponds to a voltage source. The DAC 1201 receives the control data stored in the register unit 1102 as a digital value, and divides the reference voltage to generate and output a voltage (=analog value) corresponding to the digital value based on the reference voltage. In other words, the control data corresponds to a digital signal.

[0038] The switch 1204 is configured to be switched ON / OFF in response to an instruction from the register unit 1102. When the switch 1204 is ON, a reference voltage output from the reference power supply 1200 is supplied to the DAC 1201. When the switch 1204 is OFF, the electrical connection between the reference power supply 1200 and the DAC 1201 is cut off, and the reference current and reference voltage are not supplied to the DAC 1201. That is, the ON state of the switch 1204 corresponds to a first state, and the OFF state of the switch 1204 corresponds to a second state. The connection state between the reference power supply 1200 and the switch 1204 can be switched by switching the switch 1204 ON and OFF. When the switch 1204 is OFF, no power is consumed by the DAC 1201, thereby suppressing the power consumption of the light-emitting chip 400 and reducing heat generation from the light-emitting chip 400. The reference power supply 1200, the DAC 1201, and the switch 1204 may each be a common circuit for a plurality of light-emitting points.

[0039] The control MOSFET 1202 of this embodiment is a Pch MOSFET, with its source terminal connected to the power supply voltage VCC and its gate terminal connected to the output of the DAC 1201. The larger the current flowing from the DAC 1201 to the gate, the larger the current flowing from the source to the drain.

[0040] In this embodiment, the switching MOSFET 1203 is also a P-channel MOSFET, with its source terminal connected to the drain terminal of the control MOSFET 1202 and its gate terminal receiving a drive signal output from the image data storage unit 1103. The drive signal is a binary signal of either a high level or a low level. When a high level signal is input, the switching MOSFET 1203 turns on, and a current controlled by the control MOSFET 1202 flows from the source to the drain. The drain terminal is connected to the light-emitting layer 506 via the lower electrode 504, and the light-emitting point 602 emits light when a current flows. The light-emitting intensity of the light-emitting point 602 varies depending on the current flowing through the light-emitting layer 506, and the value of the current is controlled by an analog voltage output by the DAC 1501. In other words, the light-emitting intensity of each light-emitting point 602 is controlled by control data stored in the register 1102. The control data may indicate individual digital values ​​to be set in the DAC 1201 corresponding to each light-emitting point 602, or may indicate a single digital value to be set for a group of multiple light-emitting points 602.

[0041] 13 is an example of a circuit diagram of the DAC 1201. The DAC 1201 includes multiple resistors 1205, the same number of voltage-dividing switches 1206 as the resistors 1205, and a decoder 1207. The reference current generated by the reference power supply 1200 flows to ground via multiple resistors 1205 connected in series. Each resistor 1205 is connected to a voltage-dividing switch 1206.

[0042] The decoder 1207 turns on any of the voltage-dividing switches 1206 in accordance with the setting value received from the register unit 1102. As a result, the reference voltage is divided by the number of resistors 1205 corresponding to the positions of the voltage-dividing switches 1206 that have been turned on, and the divided voltage (analog value) is output from the DAC 1201. In other words, the DAC 1201 corresponds to a D / A converter. When the reference voltage is supplied to the DAC 1201 regardless of whether the light-emitting point 602 emits light or not, Joule heat is generated from each resistor 1205 due to the voltage being supplied to each resistor 1205. In this embodiment, when the switch 1204 is turned off, the reference voltage is no longer supplied to the DAC 1201, so the generation of Joule heat from the resistor 1205 is suppressed. In other words, the generation of heat from the DAC 1201 is suppressed. Note that the DAC 1201 shown in FIG. 13 is an example of a D / A converter in this embodiment. The D / A converter may use a method of dividing the reference voltage using a switching element instead of a resistor. That is, the D / A converter may be of another type that receives a digital signal and outputs an analog signal.

[0043] Fig. 14 is a timing chart of each signal in the image controller unit 700 when a print request is received from the user. For simplification, Fig. 14 shows a timing chart of each signal when a monochrome image is formed.

[0044] When the device controller unit 708 receives a print request from a user, it checks whether the scanner unit 100, the image creating unit 103, and the fixing unit 104 meet predetermined conditions that allow printing. For example, one of the predetermined conditions is whether the temperature of the fixing unit 104 meets a predetermined temperature that allows fixing. When the device controller unit 708 confirms that the scanner unit 100, the image creating unit 103, and the fixing unit 104 meet the predetermined conditions that allow printing, it transmits an itop signal to the image controller unit 700. The itop signal is a signal transmitted from the device controller unit 708 to the image controller unit 700 based on a user instruction to instruct the image forming apparatus to start an image forming job. In other words, the device controller unit 708 corresponds to a transmitting unit.

[0045] Upon receiving the itop signal from the device controller unit 708, the image controller unit 700 transmits image data corresponding to each light-emitting chip (400-1 to 400-20) after a predetermined time has elapsed. The lighting of each light-emitting chip (400-1 to 400-20) is controlled based on the received image data, and a latent image is formed on the surface of the photosensitive drum by the light emitted by the light-emitting chip 400. In other words, the image controller unit 700 starts transmitting image data to the light-emitting chip 400 based on the timing at which the itop signal is received. In other words, the itop signal corresponds to a reference signal. Furthermore, the image data corresponds to an image signal.

[0046] When an image forming job is executed to continuously form images on multiple recording media, a predetermined time passes after a latent image for one page of image data is formed on the surface of the photosensitive drum, and then the next itop signal is transmitted. When the rotation speed of the photosensitive drum is constant, the image controller unit 700 determines that formation of a latent image for one page of image data has been completed based on the elapse of a first time, which is a predetermined time, since the image controller unit 700 received the itop signal. In other words, the timing at which the first time has elapsed since the image controller unit 700 received the itop signal corresponds to the first time. The first time is defined, for example, by the image controller unit 700 issuing a predetermined number of CLK signals to the light-emitting chip 400.

[0047] At a first timing, which is the timing when formation of an image for one page is completed, the image controller unit 700 transmits register data to the register unit 1102 in the light-emitting chip 400 to turn off the switch 1024. In other words, the image controller unit 700 corresponds to the control unit. The switch 1024 that has been turned off by the image controller unit 700 remains in the off state until it is turned on by the image controller unit 700. Through the above-described processing, the image controller unit 700 determines that formation of an image for one page is completed, and can cut off the voltage supplied to the DAC 1201 during the period when light emission from the light-emitting unit is not required.

[0048] Note that image controller unit 700 transmits image data for one page line by line in the sub-scanning direction to image data holding unit 1103. Image controller unit 700 may determine that formation of a latent image for one page is complete when image data for the last line in the sub-scanning direction for one page has been transmitted to image data holding unit 1103. In other words, the first timing may be the timing when transmission of image data for the last line in the sub-scanning direction for one page to image data holding unit 1103 has been completed.

[0049] In addition, in the image forming apparatus of this embodiment, a registration sensor 114 is installed immediately before the registration roller 110 on the recording medium transport path in the recording medium transport direction. The completion of image formation for one page may be determined based on the elapse of a predetermined third time period after the registration sensor 114 detects the leading edge of the recording medium. That is, the registration sensor 114 corresponds to the detection unit, and the timing at which the third time period has elapsed since the registration sensor 114 detected the leading edge of the recording medium corresponds to the third timing period. The third time period is the time period at which an image is formed on the recording medium by the latent image formed on the photosensitive drum when the third time period has elapsed since the registration sensor 114 detected the leading edge of the recording medium. The third time period is defined, for example, by the image controller unit 700 issuing a predetermined number of CLK signals to the light-emitting chip 400.

[0050] The image controller unit 700 determines that image formation of one page of image data for the next page has started based on the elapse of a second time, which is a predetermined time, after receiving the itop signal. That is, the timing at which the second time has elapsed after the image controller unit 700 received the itop signal corresponds to the second time. The second time is longer than the first time, and the second time is defined, for example, by the image controller unit 700 issuing a predetermined number of CLK signals to the light-emitting chip 400.

[0051] At the second timing, which is the timing when image formation of the next page starts, the image controller unit 700 transmits register data to the register unit 1102 in the light-emitting chip 400 to turn on the switch 1024. The switch 1024 that has been turned on by the image controller unit 700 remains on until it is turned off by the image controller unit 700. Through the above-described processing, the image controller unit 700 determines the start of image formation of the next page and can supply current to the DAC 1201 during the period when light emission from the light-emitting unit is required.

[0052] Note that image controller unit 700 transmits image data for one page line by line in the sub-scanning direction to image data holding unit 1103. Image controller unit 700 may determine the start of formation of a latent image for the next page when image data for the first line in the sub-scanning direction for the next page has been transmitted to image data holding unit 1103. In other words, the second timing may be the timing when transmission of image data for the first line in the sub-scanning direction for the next page to image data holding unit 1103 has begun.

[0053] Alternatively, the completion of image formation for one page may be determined based on the elapse of a fourth time, which is a predetermined time, after the registration sensor 114 detects the leading edge of the recording medium. That is, the timing at which the fourth time has elapsed after the registration sensor 114 detects the leading edge of the recording medium corresponds to the fourth time. The fourth time is defined, for example, by the image controller unit 700 issuing a predetermined number of CLK signals to the light-emitting chip 400.

[0054] By performing the above processing, the image controller unit 700 cuts off the supply of reference voltage to DAC1201 during periods when the light-emitting chip 400 is not emitting light, and the generation of Joule heat in resistor 1205 is suppressed, thereby suppressing heat generation from DAC1201.

[0055] In the present embodiment, the timing at which register data for turning off the switch 1024 is transmitted to the register unit 1102 in the light-emitting chip 400 is set to the first timing, but the timing is not limited to this and may be other timing. The timing at which the switch 1024 is turned off may be any timing between the first timing and the second timing, for example.

[0056] In the present embodiment, the second timing is the timing at which register data for turning on the switch 1024 is transmitted to the register unit 1102 in the light-emitting chip 400, but this is not limitative and other timings may be used. The timing at which the switch 1024 is turned on may be any timing within the period between the timing at which the switch 1024 is turned off and the second timing.

[0057] That is, the period between the first period and the second period during which the switch 1024 is in the OFF state corresponds to the first period. The start point of the first period may be the timing when a third time has elapsed since the registration sensor 114 detected the leading edge of the recording medium. The end point of the first period may be the timing when a fourth time has elapsed since the registration sensor 114 detected the leading edge of the recording medium.

[0058] Figure 15 is a timing chart of signals when forming an image in four colors: yellow (Y), magenta (M), cyan (C), and black (K). When forming a color image, the image forming units 103 for yellow (Y), magenta (M), cyan (C), and black (K) are arranged in the direction of conveyance of the recording medium. The four image forming units sequentially form magenta, cyan, and black toner images a predetermined time after starting to form a yellow toner image. T1, T2, and T3 in Figure 15 correspond to the predetermined times for magenta, cyan, and black, respectively. By forming a toner image after T1, T2, and T3 have elapsed since the yellow toner image, a color image without color shift can be formed on the recording medium. Even when forming a color image, heat generation from the drive units can be suppressed by performing the same process as in Figure 15 for each color after T1, T2, and T3 have elapsed since the yellow image formation.

[0059] FIG. 16 is a flowchart showing the control of the register 1002 included in the light-emitting chip 400 by the image controller unit 700 when a print request is received from the user.

[0060] When a print request is received from the user, the image controller unit 700 writes register data including the setting value of the DAC 1201 to the register unit 1002 in the light-emitting chip 400 in S1301.

[0061] In S1302, the image controller unit 700 determines that it is time to start printing when it has received the itop signal and then emitted a predetermined number of CLK signals to the light-emitting chip 400, and proceeds to S1303.

[0062] In S1303, the image controller unit 700 sets the register unit 1002 in the light-emitting chip 400 to turn on the switch 1204 before starting printing.

[0063] In S1304, the image controller unit 700 transmits image data based on the image file specified by the user to the 20 light-emitting chips 400. The image data continues to be transmitted until printing of one page is completed.

[0064] In S1305, when the image controller unit 700 determines that printing of one page has been completed by issuing the CLK signal for a predetermined period after receiving the itop signal, the process proceeds to S1306.

[0065] In S1306, the image controller unit 700 sets the register unit 1002 in the light-emitting chip 400 to turn off the switch 1204.

[0066] In S1307, when registration sensor 114, which is installed immediately before registration roller 110, detects the leading edge of the recording medium, it notifies image controller unit 700 that the leading edge of the recording medium has been detected. Image controller unit 700 determines that there is a next page when the leading edge of the recording medium has been detected. If it is determined that there is a next page, the process returns to S1302, and image controller unit 700 executes S1302 to S1307.

[0067] In S1307, if the registration sensor 114 (not shown) installed immediately before the registration roller 110 does not detect the leading or trailing edge of the recording medium after a predetermined time has elapsed, it transmits a message to the image controller unit 700 indicating that the leading or trailing edge of the recording medium has not been detected. The image controller unit 700 determines that there is no next page because the leading or trailing edge of the recording medium has not been detected within the predetermined time, and ends the printing operation.

[0068] In this embodiment, in a configuration in which the light-emitting unit and the drive circuit are formed on the same chip, the supply of current to the DAC 1201 included in the drive circuit of the light-emitting chip 400 is cut off at times when printing is not being performed, such as between pages, thereby suppressing heat generation from the DAC 1201 included in the drive circuit of the exposure head. In other words, it is possible to suppress heat generation from the D / A converter that converts digital signals into voltage.

[0069] FIG. 17 is a flowchart of the process of writing and reading control data executed by the image controller 700 when a print request is received from a user. In S10, the image controller 700 writes control data in parallel to the register 1102 of each light-emitting chip 400 using signal lines WRITE1 to WRITE20. The control data includes data for controlling the light emission intensity of each light-emitting point 602. In S11, the image controller 700 checks whether the control data has been correctly written to the register 1102. Specifically, in S11, the image controller 700 reads the control data stored in the register 1102 of each light-emitting chip 400 in parallel using signal lines WRITE1 to WRITE20 and signal lines READ1 to READ20. If the control data written in S10 and the control data read from the register 1102 in S11 do not match, the image controller 700 repeats the process from S10 (S12). It is also possible to set an upper limit to the number of times S10 and S11 are repeated, and when the upper limit is reached, the process of FIG. 17 is stopped and an error is notified to the user.

[0070] If the control data written in S10 matches the control data read from the register 1102 in S11, the image controller 700 proceeds to S13 when it is time to start image formation. In S13, the image controller 700 transmits image data in parallel to each light-emitting chip 400 using the signal lines WRITE1 to WRITE20. In S14, the image controller 700 determines whether image formation is complete, and if image formation is not complete, repeats the process from S13. On the other hand, if image formation is complete, the image controller 700 ends the process of FIG. 17.

[0071] The image forming apparatus also performs gradation correction control. For example, the image forming apparatus forms a test pattern for gradation correction control on a sheet. FIG. 8 shows an example of a test pattern used to explain this embodiment. As shown in FIG. 18, the test pattern includes five test images PT1 to PT5 of different densities. A gap (pattern gap) is provided between each test image in the sheet conveyance direction. The user operates the image forming apparatus to cause the reading unit 100 to read the sheet on which the test pattern is formed. As a result, the image forming apparatus detects the density of each of the test images PT1 to PT5 included in the test pattern and corrects the image formation conditions related to density so that the density of each of the test images PT1 to PT5 approaches the target density. Specifically, for example, the image controller 700 rewrites the control data so that the density of each of the test images PT1 to PT5 approaches the target density.

[0072] FIG. 19 is a flowchart of a process executed by the image controller 700 when forming a test pattern. In S20, the image controller 700 initializes the index q of the test image to 1. In S21, the image controller 700 writes control data for forming the test image PTq in parallel to the registers 1102 of each light-emitting chip 400 using signal lines WRITE1 to WRITE20. The control data includes data for controlling the light-emitting intensity of each light-emitting point 602. The data for controlling the light-emitting intensity of each light-emitting point 602 may also be referred to as data regarding the magnitude of the voltage to be applied to the electrode or data regarding the magnitude of the current to be supplied to the organic EL film. In S22, the image controller 700 checks whether the control data has been correctly written to the registers 1102. Specifically, in S22, the image controller 700 reads the control data stored in the registers 1102 of each light-emitting chip 400 in parallel using signal lines WRITE1 to WRITE20 and signal lines READ1 to READ20. If the control data written in S21 does not match the control data read from register 1102 in S22, image controller 700 repeats the process from S21 (S23). Note that an upper limit may be set for the number of times S21 and S22 are repeated, and when the upper limit is reached, the process of Fig. 19 may be stopped and an error may be notified to the user.

[0073] If the control data written in S21 matches the control data read from register 1102 in S22, image controller 700 advances the process to S24 when it is time to start image formation. In S24, image controller 700 transmits image data of the test pattern in parallel to signal lines DATA1 to DATA20, and starts exposing photoconductor 102. In S25, image controller 700 determines whether formation of test image PTq is complete. If not, image controller 700 repeats the process from S24. On the other hand, if formation of test image PTq is complete, image controller 700 determines whether q=5 in S26. If q=5, it means that formation of all test images PT1 to PT5 of the test pattern is not complete, so image controller 700 increments q by 1 in S27 and repeats the process from S21. On the other hand, if q=5, image controller 700 ends the process of FIG. 19.

[0074] In this embodiment, the light emission intensity of the light emitting point 602 is varied according to the density of the test images PT1 to PT5 to be formed by the control data set in the register 1102 in S21. Therefore, the image data of the test pattern transmitted in S24 can be the same regardless of the test images PT1 to PT5 to be formed.

[0075] As described above, the image controller 700 is individually connected to each of the light-emitting chips 400 via dedicated signal lines WRITEn and READn so that the image controller 700 can access the registers 1102 of the light-emitting chips 400 in parallel. This configuration shortens the time it takes to transmit control data to each light-emitting chip 400 compared to accessing each light-emitting chip 400 sequentially via one signal line WRITE and one signal line READ. Furthermore, by rewriting the control data in the register 1102, the exposure intensity can be changed in a short time. Therefore, when forming multiple test images with different densities, the intervals between test images in the sheet transport direction can be reduced. This increases the number of test images that can be formed on a sheet, thereby reducing the number of sheets (or pages) required to form a test pattern.

[0076] In this embodiment, the image controller 700 and each of the light-emitting chips 400 are individually connected via dedicated signal lines WRITEn and READn, but the connection method is not limited to this. For example, there may be multiple light-emitting chip groups each including a plurality of light-emitting chips 400, and these light-emitting chip groups and the image controller may be connected via dedicated signal lines WRITEn and READn. In this case, the number of light-emitting chip groups is not limited to two and may be three or more. Furthermore, the number of light-emitting chips 400 included in each light-emitting chip group may vary depending on the light-emitting chip group, and may include a case where the number of light-emitting chips included in a light-emitting chip group is one. By sharing the dedicated signal lines WRITEn and READn within a light-emitting chip group, the number of signal lines can be reduced compared to when the image controller 700 and each of the light-emitting chips 400 are individually connected via dedicated signal lines WRITEn and READn, thereby reducing the manufacturing cost of the exposure head 106.

[0077] [Embodiment 2] Next, the second embodiment will be described, focusing on the differences from the first embodiment. FIG. 20 shows a control configuration of the light-emitting chip 400 according to this embodiment. In the first embodiment, signal lines READ1 to READ20 were provided in a one-to-one correspondence with the light-emitting chips 400-1 to 400-20. In this embodiment, a common signal line READ is used for all of the light-emitting chips 400-1 to 400-20. More specifically, one (common) signal line READ is connected to the data switching unit 705 of the image controller 700. Within the printed circuit board 202, a total of 20 signal lines (hereinafter, intra-board signal lines READ) from each of the light-emitting chips 400-1 to 400-20 are connected to this one signal line READ. Note that the one signal line READ is pulled up to a predetermined first potential via a pull-up resistor 1506 within the printed circuit board 202.

[0078] FIG. 21 shows a timing chart for reading control data from the register 1102 of each of the light-emitting chips 400-1 to 400-20. To read the control data from the register 1102 of the light-emitting chip 400-1, the image controller 700 transmits command data to the signal line WRITE1 in synchronization with the rising edge of the enable signal from the signal line EN. When transmitting the start bit (high level) of the command data to the signal line WRITE1, the signal lines WRITE2 to WRITE20 are fixed to the low level. In other words, the start bit is transmitted only to the signal line WRITE1, and not to the signal lines WRITE2 to WRITE20. In response to the command data from the image controller 700, the register 1102 of the light-emitting chip 400-1 reads out the control data stored at the address specified by the command data and outputs it to the signal line READ. Subsequently, to read the control data from the register 1102 of the light-emitting chip 400-2, the image controller 700 transmits the command data to the signal line WRITE2 in synchronization with the rising edge of the enable signal from the signal line EN. In response to the command data from the image controller 700, the register 1102 of the light-emitting chip 400-2 reads out the control data stored at the address specified by the command data and outputs the read data to the signal line READ. The image controller 700 repeats the same process for the light-emitting chips 400-3 to 400-20 in order. Note that the transmission of image data and the writing of control data are the same as in the first embodiment.

[0079] FIG. 22 is a functional block diagram of the light-emitting chip 400-n according to this embodiment. Compared with the light-emitting chip 400-n according to the first embodiment, the light-emitting chip 400-n according to this embodiment includes an FET 1701. The pad 408-10 is connected to the intra-substrate signal line READ and to the drain terminal of the FET 1701. The source terminal of the FET 1701 is connected to a second potential (ground in this example) that is lower than the first potential to which the pull-up resistor 1506 is connected. The gate terminal of the FET 1701 is connected to a terminal of the register 1102 that transmits control data. The FET 1701 constitutes a switching unit that is switched between an ON state and an OFF state based on the level of a signal from the register 1102. In the ON state, the intra-substrate signal line READ is connected to the second potential. In the OFF state, the intra-substrate signal line READ is disconnected from the second potential, and the intra-substrate signal line READ is in a high-impedance state. The register 1102 keeps the FET 1701 in the OFF state while not transmitting control data to the image controller 700. In this way, the FET 1701 and pull-up resistor 1506 configure the intra-board signal line READ as an open-drain output. Meanwhile, while the register 1102 is transmitting control data to the image controller 700, it turns the FET 1701 on or off depending on the data value. When the FET 1701 is in the on state, a low-level signal based on the second potential is output to the signal line READ. When the FET 1701 is in the off state, the pull-up resistor 1506 of the printed circuit board 202 causes a high-level signal based on the first potential to be output to the signal line READ.

[0080] In this way, by configuring the intra-substrate signal line READ as an open-drain output, while control data is being read from the register 1102 of a certain light-emitting chip 400, the pad 408-10 of the other light-emitting chip 400 is in a high-impedance state. Therefore, the potential of the intra-substrate signal line READ from the other light-emitting chip 400 does not affect the signal line READ, and one signal line READ can be shared.

[0081] In this embodiment, the process when a print request is received from the user is the same as that of the first embodiment shown in Fig. 17. However, the readout of the control data in S11 cannot be performed in parallel for the light-emitting chips 400-1 to 400-20, but is performed sequentially. The same applies to the process of Fig. 19 for forming a test pattern.

[0082] As described above, in this embodiment, it takes longer to read the control data from the light-emitting chip 400 compared to the first embodiment. However, it is possible to shorten the time required to transmit the control data to each light-emitting chip 400. Furthermore, in this embodiment, it is possible to reduce the number of signal lines READ compared to the first embodiment, thereby reducing costs.

[0083] [Embodiment 3] Next, the third embodiment will be described, focusing on the differences from the first and second embodiments. In the first and second embodiments, the image controller 700 transmitted image data to the light-emitting chip 400-n via signal lines DATAn and transmitted control data via signal lines WRITEn. Furthermore, when transmitting image data to the light-emitting chip 400-n, the image controller 700 transmitted a line synchronization signal via signal line SYNC, and when accessing the register 1102 of the light-emitting chip 400-n, transmitted an enable signal via signal line EN. In this embodiment, the image controller 700 transmits image data and control data to the light-emitting chip 400-n via signal line DATAn, and transmits a line synchronization signal and an enable signal via signal line SYNC. That is, in this embodiment, the signal lines WRITEn and EN are not used. Therefore, in the first and second embodiments, as shown in FIG. 5, the light-emitting chip 400 is provided with a total of 10 pads, 408-1 to 408-10, whereas in this embodiment, the light-emitting chip 400 is provided with a total of 8 pads, 408-1 to 408-8.

[0084] 23 to 25 show signals on each signal line when the data switching unit 705 outputs various types of data to each light-emitting chip 400. In addition, in Fig. 23 to 25, when the signal level is Hi (high), the bit value is "1", and when the signal level is Lo (low), the bit value is "0".

[0085] FIG. 23 shows a case where the data type is "image." When the data type is "image," a line synchronization signal indicating the exposure timing of one line on the photoconductor 102 is output to the signal line SYNC. In this example, the peripheral speed of the photoconductor 102 is 200 mm / s, and the resolution in the sub-scanning direction is 1200 dpi (approximately 21.16 μm). Therefore, the line synchronization signal is output approximately every 105.8 μs, which is the period during which the surface of the photoconductor 102 moves approximately 21.16 μm. The data switching unit 705 transmits an identification bit with a value of "11," indicating that the data type is "image," to the signal line DATAn in synchronization with the rising edge of the line synchronization signal, and then transmits image data. In this embodiment, each light-emitting chip 400 has 2992 light-emitting points 602, and therefore, image data indicating the light-emitting or non-light-emitting status of each of the 2992 light-emitting points 602 must be transmitted within a period of approximately 105.8 μs. In this example, in order to transmit image data for a total of 2,992 light-emitting points 602 within a period of approximately 105.8 μs, as shown in FIG. 23, when transmitting image data, the data switching unit 705 sets the frequency of the clock signal transmitted to the signal line CLK to 30 MHz.

[0086] 24(A) and 24(B) show the case where the data type is "control." Note that FIG. 24(A) shows the case where control data is written to the register of the light-emitting chip 400, and FIG. 24(B) shows the case where the control data stored in the register of the light-emitting chip 400 is read. When the data type is "control," an enable signal that is at a high level during communication and indicates that communication is in progress is output to the signal line SYNC. The data switching unit 705 transmits an identification bit with a value of "10," indicating that the data type is "control," to the signal line DATAn in synchronization with the rising edge of the enable signal. When writing control data, the data switching unit 705 transmits a write identification bit indicating a write operation following the identification bit, and then transmits the address of the register to which the control data is written (4 bits in this example) and the control data (8 bits in this example). Note that the order of transmitting the address and control data may be reversed. When reading control data, the data switching unit 705 transmits a read identification bit indicating a read operation following the identification bit, and then transmits the address of the register from which the control data is to be read. In this case, the light-emitting chip 400-n reads the control data stored at the specified address from the register and outputs it to the signal line READn. Because the amount of control data is smaller than the amount of image data, the frequency of the clock signal output to the signal line CLK can be lower than that when transmitting image data. As an example, the frequency of the clock signal when reading and writing control data can be set to 3 MHz. However, the frequency of the clock signal when reading and writing control data may be the same as that when transmitting image data.

[0087] FIG. 25 illustrates a case where the data type is “invalid.” When the data type is “invalid,” a trigger signal indicating the transmission of an identification bit is output to the signal line SYNC. The data switching unit 705 transmits an identification bit with a value of “0x,” indicating that the data type is “invalid,” to the signal line DATAn in synchronization with the rising edge of the trigger signal. When transmitting the data type “invalid,” the data switching unit 705 can set the frequency of the clock signal output to the signal line CLK to the same frequency as when transmitting image data. Alternatively, when transmitting the data type “invalid,” the data switching unit 705 can set the frequency of the clock signal output to the signal line CLK to the same frequency as when accessing the register. Furthermore, when transmitting the data type “invalid,” the data switching unit 705 can set the frequency of the clock signal output to the signal line CLK to the same frequency as before transmitting the data type “invalid.” Furthermore, when transmitting the data type “invalid,” the data switching unit 705 can set the frequency of the clock signal output to the signal line CLK to a predetermined value different from the frequency when transmitting image data and when accessing the register.

[0088] 26 is a functional block diagram of the light-emitting chip 400-n according to the present embodiment. In the present embodiment, an interface circuit 1101 is provided in the circuit unit 406, and the interface circuit 1101 is connected to the signal lines CLK, SYNC, DATAn, and READn via the pads 408-5 to 408-8.

[0089] The interface circuit 1101 manages its state based on the identification bit received on the signal line DATAn in synchronization with the rising edge of the signal received on the signal line SYNC. FIG. 27 is a state transition diagram of the interface circuit 1101. Note that the initial state when power is supplied by the power supply voltage VCC is the disabled state. In the disabled state, if an identification bit indicating the type "disabled" is received, the interface circuit 1101 remains in the disabled state. Note that in the disabled state, the interface circuit 1101 only receives the identification bit and does not transmit data to other circuits.

[0090] In the invalid state, if an identification bit indicating the type "image" is received, the interface circuit 1101 transitions to the image reception state. In this case, the interface circuit 1101 transmits the image data received on the signal line DATAn following the identification bit to the image data holding unit 1103. At this time, the interface circuit 1101 also transmits the clock signal received on the signal line CLK and the line synchronization signal received on the signal line SYNC to the image data holding unit 1103. In the image reception state, if an identification bit indicating the type "image" is received, the state of the interface circuit 1101 does not transition, and the interface circuit 1101 transmits the image data received on the signal line DATAn following the identification bit to the image data holding unit 1103. On the other hand, in the image reception state, if an identification bit indicating the type "invalid" is received, the interface circuit 1101 transitions to the invalid state.

[0091] In the disabled state, if an identification bit indicating the type "control" is received, the interface circuit 1101 transitions to the control state. In this case, the interface circuit 1101 writes control data to the register 1102 or reads control data stored in the register 1102 based on the data received on the signal line DATAn following the identification bit. At this time, the interface circuit 1101 transmits to the register 1102 a clock signal received on the signal line CLK or an enable signal received on the signal line SYNC. In the control state, if an identification bit indicating the type "control" is received, the state of the interface circuit 1101 does not transition, and the interface circuit 1101 writes or reads control data to or from the register 1102 based on the data received on the signal line DATAn following the identification bit. On the other hand, in the control state, if an identification bit indicating the type "invalid" is received, the interface circuit 1101 transitions to the disabled state.

[0092] On the other hand, if an identification bit indicating the type "control" is received in the image reception state, the interface circuit 1101 remains in the image reception state and does not transition to another state. In this case, the interface circuit 1101 determines that data received on the signal line DATAn until the next identification bit is received is neither image data nor control data, discards the data, and does not output it to other circuits. Similarly, if an identification bit indicating the type "image" is received in the control state, the interface circuit 1101 remains in the control state and does not transition to another state. In this case, the interface circuit 1101 determines that data received on the signal line DATAn until the next identification bit is received is neither image data nor control data, discards the data, and does not output it to other circuits.

[0093] In this way, in this embodiment, a direct transition from the image reception state to the control state and a direct transition from the control state to the image reception state are prohibited. This is to prevent external noise, static electricity, etc. from causing an error in the identification bit received by the interface circuit 1101, which could lead to a malfunction of the interface circuit 1101. In other words, in this embodiment, the transition between the "image reception state" and the "control state" is made via the "invalid state," and the data type "invalid" is provided to transition the interface circuit 1101 to the "invalid state."

[0094] When the image data holding unit 1103 receives one line of image data based on the line synchronization signal, it generates a drive signal for controlling the light emission of each light-emitting point 602 based on this image data and outputs the drive signal to the current driving unit 1104 .

[0095] As described above, in this embodiment as well, control data is transmitted in parallel to each light-emitting chip 400 via dedicated signal lines DATA1 to DATA20 for each of the light-emitting chips 400-1 to 400-20. This reduces the time required to transmit control data to each light-emitting chip 400. Furthermore, in this embodiment, the signal lines DATA1 to DATA20 are used in common for transmitting image data and transmitting control data, so the number of signal lines can be reduced compared to the first embodiment, thereby reducing costs.

[0096] In addition, in order to notify the light-emitting chip 400 whether the data to be transmitted over the shared signal line, i.e., the signal line DATA, is control data or image data, prior to transmitting the data, identification information indicating the data type is transmitted over the signal line DATA. As a result, the interface circuit 1101 can determine whether the data transmitted from the image controller 700 is control data or image data. That is, while reducing the number of signal lines connecting the image controller 700 and the printed circuit board 202, it is possible to control the on / off of each light-emitting point 602 and adjust the amount of current supplied to each light-emitting point 602 (voltage to be applied to the electrode). That is, it is possible to control the light emission of each light-emitting point 602 while suppressing an increase in the cost of the image forming apparatus.

[0097] Furthermore, in this embodiment, when switching the data type between "control" and "image," the image controller 700 first transmits the data type "invalid" before switching to the other data type. This configuration reduces malfunctions of the image forming apparatus due to erroneous detection of the data type caused by disturbances such as noise or static electricity.

[0098] In the above embodiment, the interface circuit 1101 transitions between the "image reception state" and the "control state" via the "invalid state." Therefore, the data switching unit 705 transmits an identification bit indicating the type "invalid" after transmitting image data or after accessing the register 1102 is complete. However, a configuration may be adopted that allows direct transition between the "image reception state" and the "control state" without providing the "invalid state." In this case, the data switching unit 705 simply transmits an identification bit indicating the type "image" before transmitting image data and an identification bit indicating the type "control" before accessing the register 1102. Even with such a configuration, the number of signal lines connecting the image controller 700 and the printed circuit board 202 can be reduced.

[0099] 26, dedicated signal lines READ1 to READ20 are provided for the light-emitting chips 400-1 to 400-20, respectively, as in the first embodiment. However, as in the second embodiment, a configuration in which one common signal line READ is provided for each of the light-emitting chips 400 may also be adopted.

[0100] In the above embodiment, specific numerical values ​​are used for explanation purposes. However, these specific numerical values ​​are merely examples, and the present invention is not limited to the specific numerical values ​​used in the embodiment. Specifically, the number of light-emitting chips 400 provided on one printed circuit board 202 is not limited to 20 and can be any number equal to or greater than one. Furthermore, the number of light-emitting points 602 included in each light-emitting chip 400 is not limited to 2992 and can be any number. In this embodiment, one light-emitting chip 400 has four sets of 748 light-emitting points arranged along the main scanning direction, but the number of sets can be any number equal to or greater than one. Furthermore, the light-emitting points 602 are arranged in the main scanning direction at a pitch of approximately 21.16 μm, which corresponds to a resolution of 1200 dpi. However, the arrangement interval of the light-emitting points 602 may also be other values.

[0101] In the above embodiment, the image forming apparatus transfers the toner images formed on the photoconductors 102 onto a sheet conveyed on the transfer belt 111. However, the image forming apparatus may transfer the toner images on the photoconductors 102 onto a sheet via an intermediate transfer body. The image forming apparatus may be a color image forming apparatus that forms an image using toners of multiple colors, or a monochrome image forming apparatus that forms an image using toner of one color.

[0102] [Embodiment 4] Next, the fourth embodiment will be described, focusing on the differences from the first to third embodiments. In the image forming apparatuses of the first to third embodiments, a test pattern for gradation correction control was formed on a sheet when performing gradation correction control. Then, the sheet on which the test pattern was formed was read by the reading unit 100. The image forming apparatus detected the density of each of the test images PT1 to PT5 included in the test pattern, and corrected the image formation conditions related to density so that the density of each of the test images PT1 to PT5 approached the target density. Specifically, for example, the image controller 700 rewrote the control data so that the density of each of the test images PT1 to PT5 approached the target density.

[0103] 28 is a diagram illustrating the image forming apparatus 120 according to this embodiment. The image forming apparatus 120 according to this embodiment may be applied to each of the first to third embodiments.

[0104] Image forming units 20a, 20b, 20c, and 20d form toner images of yellow "Y," magenta "M," cyan "C," and black "K," respectively. Hereinafter, identical or similar components will be given the same reference numeral. When distinguishing between multiple components, an alphabet will be added to the end of the reference numeral. When describing matters common to multiple components, the alphabet will be omitted from the end of the reference numeral. Note that the exposure head 23 in the following description has the same configuration as the exposure head 106 described in each of the first to third embodiments.

[0105] The photoconductor 21 is an image carrier that carries an electrostatic latent image and a toner image. The charger 22 charges the surface of the photoconductor 21. The exposure head 23 exposes the photoconductor 21 to light to form an electrostatic latent image. The developer 24 develops the electrostatic latent image with toner to form a toner image. The primary transfer roller 25 transfers the toner image from the photoconductor 21 to the intermediate transfer belt 27. The intermediate transfer belt 27 transports the toner image to the secondary transfer device 28.

[0106] The feeding device 1 feeds the sheet P held in a sheet storage container to a conveying path. The conveying device 2 conveys the sheet P to the registration device 3. The registration device 3 corrects skew of the sheet P and conveys the sheet P to the secondary transfer device 28.

[0107] The secondary transfer device 28 transfers the toner image from the intermediate transfer belt 27 to the sheet P. The fixing device 29 fixes the toner image onto the sheet P by applying heat and pressure to the sheet P. The discharge conveying device 4 conveys and discharges the sheet P on which the toner image has been fixed to the outside of the image forming apparatus 120.

[0108] In this embodiment, a current based on the value of control data set based on the test pattern is supplied to each light-emitting element, resulting in exposure of photoconductor 21. During an image formation job in which images are formed on multiple sheets, image forming apparatus 120 forms multiple patch images for tone correction control on intermediate transfer belt 27 when the number of sheets on which images have been formed reaches a predetermined number. Note that the density of each of the multiple patch images corresponds to, for example, the density of each of test images PT1 to PT5 in the first embodiment.

[0109] The image controller 700 reads patch images formed on the intermediate transfer belt 27 using a sensor 30 provided adjacent to the intermediate transfer belt 27, and detects the density of each patch image. The image controller 700, for example, rewrites the control data so that the density of each patch image approaches the target density. The target density corresponds to the target density when the control data is set based on the test pattern (FIG. 18). The configuration of any one of the first to third embodiments is applied to writing the control data.

[0110] Note that when the number of sheets on which images have been formed reaches a predetermined number, image forming apparatus 120 may temporarily stop sheet conveyance (image formation job) and form multiple patch images of densities corresponding to test images PT1 to PT5 on intermediate transfer belt 27. Image controller 700 may cause sensor 30 to read the multiple patch images and rewrite the control data based on the read results. When rewriting of the control data is complete, image forming apparatus 120 may resume the image formation job.

[0111] Furthermore, during an image formation job, the image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image with a density corresponding to test image PT1 on the photoreceptor 21 (i.e., a patch image on the intermediate transfer belt 27) during the period from when the electrostatic latent image of a first page is formed on the photoreceptor 21 to when the electrostatic latent image of a second page that is subsequent to the first page is formed on the photoreceptor 21. Thereafter, the image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image with a density corresponding to test image PT2 on the photoreceptor 21 (i.e., a patch image on the intermediate transfer belt 27) during the period from when the electrostatic latent image of the second page is formed on the photoreceptor 21 to when the electrostatic latent image of a third page that is subsequent to the second page is formed on the photoreceptor 21. In this way, image forming apparatus 120 may form an electrostatic latent image corresponding to a patch image on photoconductor 21 (i.e., a patch image on intermediate transfer belt 27) during the period from when an electrostatic latent image for one page is formed on photoconductor 21 until when a latent image for the next page is formed on photoconductor 21. Image controller 700 may have sensor 30 read the patch image each time it is formed, and when the reading results for test images PT1 to PT5 are obtained, rewrite the control data based on the reading results.

[0112] As described above, the image controller 700 is individually connected to each of the light-emitting chips 400 via dedicated signal lines WRITEn and READn so that the image controller 700 can access the registers 1102 of each of the light-emitting chips 400 in parallel. This configuration shortens the time required to transmit control data to each light-emitting chip 400 compared to accessing each light-emitting chip 400 sequentially via one signal line WRITE and one signal line READ. This configuration is particularly effective when patch images need to be formed (control data needs to be rewritten) within a relatively short period of time, such as when an electrostatic latent image corresponding to a patch image is formed on the photoconductor 21 (i.e., on the intermediate transfer belt 27) during the period from when an electrostatic latent image for one page is formed on the photoconductor 21 until when an electrostatic latent image for the next page is formed on the photoconductor 21. Note that the tone correction control described in this embodiment detects the density of multiple patch images on the intermediate transfer belt 27, instead of detecting the density of multiple test images PT1 to PT5 on the sheet P described in the first embodiment. Therefore, the plurality of patch images of this embodiment can be considered as the plurality of test images of the first embodiment.

[0113] [Embodiment 5] Next, the fifth embodiment will be described, focusing on the differences from the first to fourth embodiments. In this embodiment, as shown in Fig. 29, a temperature sensor 31 for detecting the temperature on the printed circuit board 202 (the temperature of the light-emitting chip 400, the temperature of the light-emitting point or light-emitting unit 602) is provided on the surface on which the light-emitting point group 201 of the printed circuit board 202 is mounted. Note that the temperature sensor 31 may also be provided on the surface (Fig. 3(A)) opposite to the surface on which the light-emitting point group 201 of the printed circuit board 202 is mounted.

[0114] Fig. 30 is a diagram showing the relationship between the temperature of the light-emitting unit and the amount of light when a predetermined current is supplied to the light-emitting unit. Note that the relationship shown in Fig. 30 is an example, and the relationship between temperature and amount of light is not limited to being expressed linearly.

[0115] As shown in Fig. 29, the amount of light emitted from a light-emitting unit supplied with a predetermined current increases as the temperature increases. In this embodiment, the relationship between temperature and light intensity for each chip shown in Fig. 30 is stored, for example, in a memory provided in image controller 700. Based on the detection result of temperature sensor 31 and the relationship between temperature and light intensity stored in the memory, image controller 700 rewrites the control data stored in register 1102 so that, for example, when the temperature rises, the current supplied to the light-emitting unit decreases.

[0116] For example, in an image forming job in which images are formed on multiple sheets, the control data is rewritten during the period from when an image for one page is formed on the intermediate transfer belt 27 to when the image for the page following that page is formed on the intermediate transfer belt 27.

[0117] As described above, the image controller 700 is individually connected to each of the plurality of light-emitting chips 400 via dedicated signal lines WRITEn and READn so that the image controller 700 can access the registers 1102 of the plurality of light-emitting chips 400 in parallel. This configuration can shorten the time it takes to transmit control data to each light-emitting chip 400 compared to accessing each light-emitting chip 400 sequentially via one signal line WRITE and one signal line READ. This configuration is particularly effective when it is necessary to rewrite control data during the period from when an electrostatic latent image for one page is formed on the photosensitive member 21 until when an electrostatic latent image for the page following that page is formed on the photosensitive member 21.

[0118] In the above embodiments, specific numerical values ​​are used for explanation purposes. However, these specific numerical values ​​are merely examples, and the present invention is not limited to the specific numerical values ​​used in the embodiments. Specifically, the number of light-emitting chips 400 provided on one printed circuit board 202 is not limited to 20 and can be any number equal to or greater than one. Furthermore, the number of light-emitting points 602 included in each light-emitting chip 400 is not limited to 2992 and can be any number. In the present embodiment, one light-emitting chip 400 has four sets of 748 light-emitting points arranged along the main scanning direction, but the number of sets can be any number equal to or greater than one. Furthermore, the light-emitting points 602 are arranged at a pitch of approximately 21.16 μm in the main scanning direction, which corresponds to a resolution of 1200 dpi. However, the arrangement interval of the light-emitting points 602 may also be other values.

[0119] In each of the above embodiments, the image forming apparatus transfers the toner images formed on the photoconductors 102 onto a sheet conveyed on the transfer belt 111. However, the image forming apparatus may transfer the toner images on the photoconductors 102 onto a sheet via an intermediate transfer body. The image forming apparatus may be a color image forming apparatus that forms an image using toners of multiple colors, or a monochrome image forming apparatus that forms an image using toner of one color. [Explanation of symbols]

[0120] 101 Image forming unit 102 Photoreceptor 400 light-emitting chips 602 Luminous point 700 Image controller 705 Data Switching Unit 1102 Register section 1104 Drive unit 1200 reference power supply 1201 DAC 1204 Switch 1205 Resistance 1206 Voltage divider switch

Claims

1. A rotating photoreceptor, The facility includes a plurality of light-emitting units that emit light to expose the photoreceptor, and a circuit unit that controls the lighting and extinguishing of the plurality of light-emitting units based on image data, and a plurality of light-emitting chips arranged along the rotation axis direction of the photoreceptor. A controller that outputs the image data and control data indicating the target light intensity of the plurality of light-emitting units, Equipped with, Each of the plurality of light-emitting chips is connected to the controller via one of several different signal lines. The image data and the control data are communicated via one of the multiple signal lines, An image forming apparatus characterized by the following features.

2. The image forming apparatus according to claim 1, wherein the controller assigns identification bits to the image data and the control data that can distinguish between the image data and the control data, and outputs the image data and the control data.

3. Each of the light-emitting chips has an interface circuit for receiving the image data and the control data, The interface circuit identifies the image data and the control data according to the identification bit. The image forming apparatus according to feature 2.

4. The interface circuit includes an image reception state for receiving the image data and a control state for receiving the control data, and transitions between states based on the identification bit. The image forming apparatus according to feature 3.

5. The interface circuit, when it receives the control data in the image reception state, discards the received control data without transitioning to a new state, and when it receives the image data in the control state, discards the received image data without transitioning to a new state. The image forming apparatus according to feature 4.

6. Each of the plurality of light-emitting chips has a storage unit for storing the received control data, The image forming apparatus according to feature 1.

7. The image forming apparatus according to claim 6, characterized in that the controller reads the control data stored in the storage unit and checks whether the transmitted control data matches the read control data.

8. Each of the plurality of light-emitting chips is equipped with a D / A converter that converts the control data into an analog signal, The plurality of light-emitting units emit light with a light intensity based on the analog signal. The image forming apparatus according to feature 1.

9. Each of the plurality of light-emitting chips further comprises a switch for interrupting the supply of a reference voltage to the D / A converter. The image forming apparatus according to feature 8.

10. The image data and the control data are communicated via a common signal line. The image forming apparatus according to any one of claims 1 to 9.

11. The image forming apparatus according to claim 1, characterized in that the plurality of light-emitting units are organic EL.

Images