Method for manufacturing semiconductor device

Abstract

To provide stable electrical characteristics to a semiconductor device using an oxide semiconductor to increase reliability.SOLUTION: A semiconductor device comprises: a gate electrode; a gate insulation layer on the gate electrode; an oxide semiconductor layer having a region which overlaps the gate electrode via the gate insulation layer; a source electrode electrically connected with the oxide semiconductor layer; a drain electrode electrically connected with the oxide semiconductor layer; an insulation layer on the oxide semiconductor layer, the source electrode, and the drain electrode; a first metal oxide region between the insulation layer and the source electrode; a second metal oxide region between the insulation layer and the drain electrode; openings provided in the insulation layer; and conductive layers provided in the openings, in which the conductive layers have regions which do not overlap the first metal oxide region and the second metal oxide region.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called TFTs) is attracting attention. It is widely used in electronic devices such as ICs and image display devices. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be applied to transistors. Another material that has attracted attention is oxide semiconductors.

[0004] For example, the active layer of a transistor is 18 / cm 3 is less than Amorphous oxides containing indium (In), gallium (Ga), and zinc (Zn) were used. A transistor is disclosed (see Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165528 Summary of the Invention [Problem to be solved by the invention]

[0006] However, in the thin film formation process of oxide semiconductors, the stoichiometric composition is affected by factors such as excess or deficiency of oxygen. If there is a deviation from the normal state or if hydrogen or moisture that forms electron donors gets mixed in, the electrical conductivity This phenomenon is a major problem for transistors using oxide semiconductors. This is a factor that affects the characteristics of the material.

[0007] In view of such problems, a method for imparting stable electrical characteristics to a semiconductor device using an oxide semiconductor has been proposed. One of the objectives is to improve reliability. [Means for solving the problem]

[0008] In order to suppress the fluctuation of the electrical characteristics of thin film transistors using oxide semiconductor layers, impurities such as hydrogen, moisture, hydroxyl groups, or hydrides (also called hydrogen compounds) that are present in the oxide semiconductor The oxide semiconductor is intentionally removed from the substrate layer and is simultaneously reduced by the impurity removal process. By supplying oxygen, which is the main component of the conductor, the oxide semiconductor layer can be grown to a high purity. and electrically becomes type I (intrinsic).

[0009] An i-type (intrinsic) oxide semiconductor is an oxide semiconductor that has had hydrogen, an n-type impurity, removed from it. By purifying the material so that it contains as few impurities as possible, an I-type (intrinsic) oxide semiconductor or It is an oxide semiconductor that is as close to intrinsic as possible. By removing as many impurities as possible, it is possible to obtain a highly purified I-type (intrinsic semiconductor) or something close to it. By doing so, the Fermi level (Ef) is set to the intrinsic Fermi level. It can be made to the same level as (Ei).

[0010] In a transistor including an oxide semiconductor layer, an oxide insulating layer ( Then, oxygen is introduced (added) through the oxide insulating layer, and heat treatment is performed. This oxygen introduction and heating process removes hydrogen, moisture, hydroxyl groups, or hydrides (hydrogen impurities such as SiO 2 and SiO 3 (also referred to as a compound) are intentionally removed from the oxide semiconductor layer. The introduction of oxygen creates bonds between the metal and hydrogen that make up the oxide semiconductor. Alternatively, the bond between the metal and the hydroxyl group is broken, and the hydrogen or hydroxyl group is converted into an acid. The reaction with hydrogen produces water, and the subsequent heating process removes the impurity hydrogen. Alternatively, the hydroxyl group can be easily removed as water.

[0011] Since oxygen is introduced into the oxide semiconductor layer through the stacked oxide insulating layer, The introduction depth (introduction region) can be controlled, and oxygen can be introduced efficiently into the oxide semiconductor layer. It is possible.

[0012] In addition, since heat treatment is performed in a state where the oxide semiconductor layer and the oxide insulating layer containing oxygen are in contact with each other, One of the main components of oxide semiconductors that is reduced at the same time during the impurity removal process Oxygen, which is one of the oxygen-containing elements, can be supplied to the oxide semiconductor layer from the oxide insulating layer containing oxygen. Therefore, the oxide semiconductor layer is further purified and becomes electrically i-type (intrinsic).

[0013] Furthermore, impurities such as moisture and hydrogen are prevented from remixing into the oxide semiconductor layer on the oxide insulating layer. A protective insulating layer (also called a second insulating layer) is provided to block these substances from entering from the outside. It is preferable to form (c).

[0014] A transistor including a highly purified oxide semiconductor layer has a low threshold voltage, an on-state current, and the like. The electrical characteristics show almost no temperature dependence. There is also little fluctuation.

[0015] In this way, a transistor having a highly purified and electrically i-type (intrinsic) oxide semiconductor layer is produced. The electrical characteristics of the sintered body are suppressed, and the sintered body is electrically stable. It is possible to provide a highly reliable semiconductor device using an oxide semiconductor having such characteristics.

[0016] The temperature of the heat treatment is 250°C or more and 700°C or less, or 400°C or more and 700°C or less, or The temperature must be below the strain point of the substrate. The heat treatment is carried out in a gas atmosphere containing nitrogen, oxygen, and ultra-dry air (water content 20p / cm²). pm or less, preferably 1 ppm or less, and more preferably 10 ppb or less of air), or This may be carried out under an atmosphere of a rare gas (argon, helium, etc.).

[0017] In one embodiment of the invention disclosed in this specification, an oxide semiconductor layer is formed, A first insulating layer, which is an oxide insulating layer, is formed in contact with the first insulating layer. Oxygen is introduced into the oxide semiconductor layer, and the first insulating layer and the oxide semiconductor layer are subjected to a heat treatment. The present invention relates to a method for manufacturing a semiconductor device, in which a second insulating layer is formed on a first insulating layer.

[0018] In one embodiment of the invention disclosed in this specification, a gate electrode layer is formed on a substrate, and a gate electrode a gate insulating layer is formed over the oxide semiconductor layer; an oxide semiconductor layer is formed over the gate insulating layer; a source electrode layer and a drain electrode layer are formed on the oxide semiconductor layer; A first insulating layer, which is an oxide insulating layer, is formed on the drain electrode layer in contact with the oxide semiconductor layer, and the first insulating layer is formed on the drain electrode layer in contact with the oxide semiconductor layer. The oxide semiconductor layer is then heated to a temperature of 1000° C. for 1 hour. and forming a second insulating layer over a first insulating layer by performing heat treatment on the first insulating layer. do.

[0019] One embodiment of the structure of the invention disclosed in this specification is a semiconductor device including a source electrode layer and a drain electrode layer formed over a substrate. forming an oxide semiconductor layer over the source electrode layer and the drain electrode layer; A first insulating layer, which is an oxide insulating layer, is formed in contact with the first insulating layer. Oxygen is introduced into the conductor layer, and the first insulating layer and the oxide semiconductor layer are subjected to heat treatment. a second insulating layer is formed on the oxide semiconductor layer; and a gate electrode layer is formed on the second insulating layer that overlaps with the oxide semiconductor layer. This is a method for manufacturing a semiconductor device.

[0020] In the above structure, before the first insulating layer is formed on the oxide semiconductor layer, Heat treatment may be performed. Oxygen may be introduced by ion implantation or ion doping. This can be done using

[0021] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. Furthermore, the specific names used in this specification are not intended to identify the invention. This does not indicate [Effects of the Invention]

[0022] forming an oxide insulating layer in contact with the oxide semiconductor layer, and introducing oxygen through the oxide insulating layer; The heat treatment is carried out. By this oxygen introduction and heating process, hydrogen, moisture, hydroxyl groups or hydrides are removed. and the like are intentionally removed from the oxide semiconductor layer to highly purify the oxide semiconductor layer. A transistor having a highly purified and electrically intrinsic oxide semiconductor layer can be produced. The capacitor has suppressed fluctuations in electrical characteristics and is electrically stable.

[0023] Therefore, according to one embodiment of the present invention, a transistor with stable electrical characteristics can be manufactured. Cut.

[0024] Another embodiment of the present invention is a semiconductor device including a transistor with favorable electrical characteristics and high reliability. It is possible to create a device. [Brief explanation of the drawings]

[0025] [Figure 1] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 2] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 3] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 4] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 5] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 6] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 7] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 8] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 9] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 10] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 11] 1A and 1B are diagrams illustrating electronic devices. [Figure 12] 1A and 1B are diagrams illustrating electronic devices. [Figure 13] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 14] 10A and 10B are graphs showing the sheet resistance of oxide semiconductor layers depending on oxygen introduction conditions; DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and various modifications in form and details are possible by those skilled in the art. Furthermore, the present invention should not be construed as being limited to the description of the following embodiments. It is not something that can be done.

[0027] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. In this embodiment, a transistor including an oxide semiconductor layer is used as an example of a semiconductor device. Shows.

[0028] As shown in FIG. 1E, a transistor 410 is formed on a substrate 400 having an insulating surface. a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, and a source electrode layer 405a. The transistor 410 includes an oxide insulating layer 407 (the first A protective insulating layer 409 (also referred to as a first insulating layer) and a protective insulating layer 409 (also referred to as a second insulating layer) are stacked in this order. are.

[0029] 1A to 1E illustrate an example of a method for manufacturing the transistor 410. FIG.

[0030] First, a conductive film is formed on a substrate 400 having an insulating surface, and then a first photolithography is performed. A gate electrode layer 401 is formed by a process. If the resist mask is formed by the inkjet method, a photomask can be used. Therefore, manufacturing costs can be reduced.

[0031] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface. A glass substrate such as borosilicate glass or aluminoborosilicate glass can be used. .

[0032] Alternatively, a semiconductor device may be manufactured using a flexible substrate as the substrate 400 .

[0033] In order to manufacture a flexible semiconductor device, a semiconductor device including an oxide semiconductor layer 403 is formed on a flexible substrate. The transistor 410 may be directly formed, or may be formed on another substrate including the oxide semiconductor layer 403. The transistor 410 may be fabricated and then peeled off and transferred to a flexible substrate. In order to separate and transfer the transistor including the oxide semiconductor layer from the substrate to the flexible substrate, It is advisable to provide a release layer between the stamper and the substrate.

[0034] An insulating film serving as a base film may be provided between the substrate 400 and the gate electrode layer 401. , which has the function of preventing the diffusion of impurity elements from the substrate 400, and The insulating film is made of one or more films selected from a silicon film, a silicon nitride oxide film, and a silicon oxynitride film. The insulating film can be formed by a laminated structure.

[0035] The material of the gate electrode layer 401 is molybdenum, titanium, tantalum, tungsten, or aluminum. Metallic materials such as aluminum, copper, neodymium, scandium, etc., or alloy materials containing these as the main components The insulating film can be formed as a single layer or a laminate using a material.

[0036] Next, a gate insulating layer 402 is formed on the gate electrode layer 401. The gate insulating layer 402 is , a silicon oxide layer, a silicon nitride layer, etc., are formed by using a plasma CVD method, a sputtering method, etc. , silicon oxynitride layer, silicon nitride oxide layer, aluminum oxide layer, aluminum nitride layer a single layer of aluminum oxide nitride, aluminum oxide nitride, or hafnium oxide; can be formed by laminating.

[0037] In addition, the oxide semiconductor of this embodiment is such that impurities are removed and the oxide semiconductor contains only the main component of the oxide semiconductor. By purifying the material to the extent possible to minimize the amount of impurities that act as carrier donors, the intrinsic (I type) In the present invention, an oxide semiconductor that has been rendered intrinsic (i-type) or substantially intrinsic (i-type) is used.

[0038] Such highly purified oxide semiconductors are extremely sensitive to interface states and interface charges. Therefore, the interface between the oxide semiconductor layer and the gate insulating layer is important. The gate insulating layer in contact with the nitride semiconductor is required to have high quality.

[0039] For example, high density plasma CVD using microwaves (for example, frequency 2.45 GHz) produces dense This is preferable because it allows the formation of a high-quality insulating layer with high dielectric strength. The close contact between the gate insulating layer and the high-quality gate insulating layer reduces the interface state and improves the interface characteristics. This is because it can be considered as such.

[0040] Of course, if a good insulating layer can be formed as a gate insulating layer, sputtering is also possible. Other film formation methods such as the plasma CVD method and the like can also be applied. Even if the insulating layer is one in which the film quality of the gate insulating layer and the interface characteristics with the oxide semiconductor are modified by In any case, it is important that the film quality as a gate insulating layer is good, and that the oxidation Any material may be used as long as it can reduce the interface state density with the compound semiconductor and form a good interface.

[0041] In addition, the gate insulating layer 402 and the oxide semiconductor layer should contain as little hydrogen, hydroxyl groups, and moisture as possible. In order to prevent this, a spare sputtering device is used as a pretreatment for forming the oxide semiconductor layer. In the heating chamber, the substrate 400 on which the gate electrode layer 401 is formed or the substrate 400 on which the gate insulating layer 402 is formed is The substrate 400 is preheated to remove impurities such as hydrogen and moisture adsorbed on the substrate 400. It is preferable that the evacuation means provided in the preheating chamber is a cryopump. It is preferable to omit this preheating process. Before forming the oxide insulating layer 407, the source electrode layer 405a and the drain electrode layer 405b are formed. The same procedure may be carried out on the substrate 400 formed thereon.

[0042] Next, a film having a thickness of 2 nm to 200 nm, preferably 5 nm or more, is formed on the gate insulating layer 402. An oxide semiconductor layer of 30 nm or less is formed on the top.

[0043] Before the oxide semiconductor layer was formed by sputtering, argon gas was introduced. Reverse sputtering is performed to generate plasma, and a film is deposited on the surface of the gate insulating layer 402. It is preferable to remove the powdery substances (also called particles or dust) that are present in the sputtering. The term "gas welding" refers to the process of applying no voltage to the target side and using an RF power supply on the substrate side in an argon atmosphere. This is a method of modifying the surface by applying a voltage to generate plasma near the substrate. Instead of the argon atmosphere, nitrogen, helium, oxygen, etc. may be used.

[0044] The oxide semiconductor used for the oxide semiconductor layer is a quaternary metal oxide, In-Sn-G a-Zn-O oxide semiconductors and In-Ga-Zn-O oxides, which are ternary metal oxides Semiconductors, In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors, Sn-Ga-Zn-O oxide semiconductor, Al-Ga-Zn-O oxide semiconductor, Sn-A l-Zn-O based oxide semiconductors and In-Zn-O based oxide semiconductors, which are binary metal oxides , Sn-Zn-O based oxide semiconductor, Al-Zn-O based oxide semiconductor, Zn-Mg-O based oxide oxide semiconductors, Sn-Mg-O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, and In- Use of O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. The oxide semiconductor may contain SiO2. Ga-Zn-O oxide semiconductors are semiconductors containing indium (In), gallium (Ga), and zinc (Z n), and the stoichiometric ratio is not particularly important. It may contain elements other than Ga and Zn.

[0045] The oxide semiconductor layer has the chemical formula InMO3(ZnO) m (m>0 and m must be a natural number. The thin film represented by the formula (I) can be used, where M is Ga, Al, Mn, and C. o represents one or more metal elements selected from the group consisting of Ga, Ga and Al, Examples include Ga and Mn, or Ga and Co.

[0046] In this embodiment, an In—Ga—Zn—O-based metal oxide target is used as the oxide semiconductor layer. The oxide semiconductor layer is formed by a sputtering method using a rare gas (typically, The sample was sputtered under an atmosphere of oxygen, or a mixture of rare gas and oxygen. It can be formed by a tarring method.

[0047] Examples of targets for forming an oxide semiconductor layer by sputtering include those having the following composition: The metal oxide ternary phase was prepared with a molar ratio of In2O3:Ga2O3:ZnO=1:1:1. The target is used to form an In-Ga-Zn-O film. The composition is not limited to, for example, In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]. A metal oxide target may also be used.

[0048] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. By using a metal oxide target with a high filling rate, the oxide film formed is The compound semiconductor layer can be a dense film.

[0049] The sputtering gas used for forming the oxide semiconductor layer is hydrogen, water, a hydroxyl group, or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0050] The substrate is held in a film-forming chamber maintained in a reduced pressure state, and the substrate temperature is preferably set to 100°C or more and 600°C or less. The temperature is preferably 200°C or higher and 400°C or lower. The concentration of impurities contained in the oxide semiconductor layer can be reduced. Damage caused by coating is reduced. The removed sputtering gas is introduced, and an oxide semiconductor is deposited on the substrate 400 using the target. To remove residual moisture in the deposition chamber, an adsorption type vacuum pump, e.g. It is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. The exhaust means is a turbo molecular pump with a cold trap added. The deposition chamber evacuated using a cryopump may contain, for example, hydrogen atoms, water (H2O), etc. Because compounds containing hydrogen atoms (and more preferably compounds containing carbon atoms) are exhausted, Therefore, the concentration of impurities contained in the oxide semiconductor layer formed in the deposition chamber can be reduced.

[0051] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed DC power supply is used, powdery substances (particles, etc.) generated during film formation are This is preferable because it can reduce the thickness (also called "slippage") and make the film thickness distribution uniform.

[0052] Next, the oxide semiconductor layer is subjected to a second photolithography process to form island-shaped oxide semiconductor layers 4 In addition, in order to form the island-shaped oxide semiconductor layer 441, The resist mask for this purpose may be formed by an ink-jet method. When the film is formed by the PET method, no photomask is used, and therefore the manufacturing cost can be reduced.

[0053] In addition, when a contact hole is formed in the gate insulating layer 402, the process is performed using an oxide semiconductor This can be done simultaneously with the processing of layer 441.

[0054] The etching of the oxide semiconductor layer here can be performed by either dry etching or wet etching. For example, a wet etching method for an oxide semiconductor layer may be used. The etching solution used is a mixture of phosphoric acid, acetic acid, and nitric acid, and ammonia hydrogen peroxide (31% by weight). A mixture of hydrogen peroxide solution: 28% by weight ammonia solution: water (5:2:2) can be used. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0055] Next, a source electrode layer and a drain electrode layer are formed over the gate insulating layer 402 and the oxide semiconductor layer 441. A conductive film is formed to become the source electrode layer (including wiring formed in the same layer). The conductive film used for the gate electrode layer and the drain electrode layer may be, for example, Al, Cr, Cu, Ta, or T. Metal film containing an element selected from I, Mo, and W, or metal nitride containing the above elements as components Films such as titanium nitride, molybdenum nitride, and tungsten nitride can be used. In addition, Ti, Mo, W, etc. may be applied to either or both of the upper and lower sides of the metal film such as Al or Cu. High melting point metal films or their metal nitride films (titanium nitride film, molybdenum nitride film, titanium nitride film, The source electrode layer and the drain electrode layer may be formed by laminating a gate insulating film (Tungsten film) thereon. The conductive film used for the layer may be formed of a conductive metal oxide. Examples include indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), Indium oxide tin oxide alloy (In2O3-SnO2, abbreviated as ITO), indium oxide In2O3-ZnO alloys or silicon oxide in these metal oxide materials can be used.

[0056] A resist mask is formed on the conductive film by a third photolithography process, and selective etching is performed. After forming the source electrode layer 405a and the drain electrode layer 405b by etching, Remove the mask.

[0057] The third photolithography process involves exposure to ultraviolet light or KrF laser light when forming a resist mask. The source electrodes adjacent to each other on the oxide semiconductor layer 441 may be formed by using a laser beam or an ArF laser beam. The width of the gap between the bottom end of the drain electrode layer and the bottom end of the drain electrode layer determines the width of the gap between the bottom end of the drain electrode layer and the bottom end of the transistor to be formed later. The channel length L is determined. When performing exposure with a channel length L of less than 25 nm, Extreme ultraviolet rays have extremely short wavelengths ranging from a few nm to a few tens of nm. et) is used to perform exposure during resist mask formation in the third photolithography process. Extreme ultraviolet light exposure provides high resolution and a large depth of focus. The channel length L of the transistor can be set to 10 nm or more and 1000 nm or less. The operating speed of the circuit can be increased.

[0058] In addition, in order to reduce the number of photomasks and steps used in the photolithography process, The resist mask is formed by a multi-tone mask, which is an exposure mask that allows the incident light to have multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes to process different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of exposure masks can be reduced. Since the corresponding photolithography process can also be eliminated, the process can be simplified.

[0059] Note that when the conductive film is etched, the oxide semiconductor layer 441 is etched and divided. However, it is desirable to optimize the etching conditions so that the conductive film alone does not It is difficult to achieve a condition in which the oxide semiconductor layer 441 is etched while the oxide semiconductor layer 442 is not etched at all. When the conductive film is etched, only a part of the oxide semiconductor layer 441 is etched, and the groove In some cases, the oxide semiconductor layer may have a recess (concave portion).

[0060] In this embodiment, a Ti film is used as the conductive film, and an In—Ga— Since a Zn-O-based oxide semiconductor was used, the etching solution was ammonia hydrogen peroxide (ammonia hydrogen peroxide). A mixture of water, water, and hydrogen peroxide is used.

[0061] Next, plasma treatment is performed using gases such as N2O, N2, or Ar to remove the exposed Water adsorbed on the surface of the oxide semiconductor layer 441 may be removed by plasma treatment. In this case, the oxide insulating layer 441 is in contact with part of the oxide semiconductor layer 441 without being exposed to the air. Form 407.

[0062] The oxide insulating layer 407 has a thickness of at least 1 nm and is formed by an oxide method such as a sputtering method. The insulating layer 407 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed in. When hydrogen is contained in the oxide insulating layer 407, the hydrogen can penetrate into the oxide semiconductor layer or The oxygen in the oxide semiconductor layer is extracted by hydrogen, and the back channel of the oxide semiconductor layer is formed. This may result in a low resistance (N-type) and the formation of a parasitic channel. The oxide insulating layer 407 is formed by a method that does not use hydrogen so that the layer contains as little hydrogen as possible. It is important that

[0063] The oxide insulating layer 407 is typically an insulating film such as a silicon oxide film or a silicon oxynitride film. An organic insulating film can be used.

[0064] In this embodiment, a silicon oxide film with a thickness of 200 nm is used as the oxide insulating layer 407. The substrate temperature during film formation should be between room temperature and 300°C. In this embodiment, the temperature is set to 100° C. The silicon oxide film is formed by sputtering. , in a rare gas (typically argon) atmosphere, in an oxygen atmosphere, or in a mixed atmosphere of rare gas and oxygen. The target may be a silicon oxide target or For example, a silicon target can be used to A silicon oxide film can be formed by sputtering in an atmosphere containing silicon.

[0065] Similar to the formation of the oxide semiconductor layer, residual moisture in the deposition chamber for the oxide insulating layer 407 is removed. To achieve this, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The impurity concentration in the oxide insulating layer 407 formed in a deposition chamber evacuated using an opto-pump In addition, an exhaust method for removing residual moisture in the deposition chamber of the oxide insulating layer 407 can be used. The stage may be a turbomolecular pump plus a cold trap.

[0066] The oxide insulating layer 407 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or a hydrogenated It is preferable to use a high-purity gas from which impurities such as ions have been removed.

[0067] Next, oxygen 421 is introduced into the oxide semiconductor layer 441 through the oxide insulating layer 407. (See Figure 1(C)).

[0068] The oxygen 421 can be introduced by ion implantation or ion doping. In the ion implantation method, a source gas is made into plasma, and the ions contained in this plasma are injected into the Ion species are extracted, mass separated, and ion species with a predetermined mass are accelerated to form an ion beam. The ion doping method is a method in which a source gas is injected into the object to be processed. The plasma is then generated, and ion species are extracted from the plasma by the action of a predetermined electric field. This method accelerates ion species without mass separation and injects them into the object to be treated as an ion beam. By introducing oxygen using ion implantation with volume separation, impurities such as metal elements are removed by oxygen. In addition, it is possible to prevent the ion doping from being added to the oxide semiconductor layer. The ion beam irradiation area can be made larger in the ion beam irradiation method than in the ion implantation method. By adding oxygen using the ion doping method, the tact time can be shortened. can be done.

[0069] In order to introduce oxygen into the oxide semiconductor layer 441 through the stacked oxide insulating layer 407, Therefore, the depth of oxygen introduction (introduction region) can be controlled, and oxygen can be introduced into the oxide semiconductor layer 441. The oxygen introduction depth can be controlled by adjusting the introduction conditions such as the acceleration voltage and the dose. The thickness of the oxide insulating layer through which the oxygen gas passes may be appropriately set and controlled. When oxygen is introduced by ion implantation using a laser, the dose is set to 1×10 13 ions / cm 2 5x10 or more 15 ions / cm 2 The following would suffice.

[0070] In particular, hydrogen, water, a hydroxyl group, hydride, or the like in a channel formation region of the oxide semiconductor layer Since it is important to exclude impurities, the bottom gate transistor 410 In the compound semiconductor layer 441, a large amount of oxygen is introduced near the interface with the gate insulating layer 402. is preferred.

[0071] The peak of the oxygen concentration introduced into the oxide semiconductor layer is 1×10 18 / cm 3 ~3×10 20 / cm 3 (preferably 1×10 18 / cm 3 ~1×10 20 / cm 3 ) can be preferable.

[0072] The above oxygen concentration was determined by introducing an oxygen isotope with a mass number of 18 as oxygen and measuring the secondary ion mass distribution. Analysis method (SIMS: Secondary Ion Mass Spectroscopy) The concentration of the oxygen isotope with mass number 18 in the oxide semiconductor layer after the introduction was analyzed by the method described above. This is a measurement value that can be calculated by

[0073] Next, the oxide semiconductor layer 441 to which oxygen has been introduced is partially covered with the oxide insulating layer 407 (channel formation layer). The heat treatment is performed with the two surfaces (area) in contact with each other.

[0074] The temperature of the heat treatment is 250°C or more and 700°C or less, or 400°C or more and 700°C or less, or For example, the substrate is introduced into an electric furnace, which is a type of heat treatment device, and The oxide semiconductor layer 441 is subjected to heat treatment at 450° C. in a nitrogen atmosphere for one hour.

[0075] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device that heats the object to be treated by radiation may be used. For example, a GRTA (Gas Reactor Tank Apparatus) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp or other lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. Inert gases such as argon or nitrogen that do not react with the material to be treated by heat treatment An active gas is used.

[0076] For example, as a heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650 to 700°C. After heating for several minutes, GRTA may be performed in which the substrate is taken out of the inert gas.

[0077] Heat treatment is carried out in nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). m or less, preferably 10 ppb or less air), or noble gases (argon, helium, etc.) However, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas atmosphere may be used. It is preferable that the gas does not contain nitrogen, oxygen, or hydrogen. The purity of the rare gas is 6N (99.9999%) or more, preferably 7N (99.99999%). %) or more (i.e., the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). preferable.

[0078] By introducing oxygen, the bond between the metal and hydrogen constituting the oxide semiconductor or the bond between the metal and hydrogen The bond between the hydroxyl groups is broken and these hydrogens or hydroxyl groups react with oxygen. Therefore, the impurities, hydrogen and water, are removed by the subsequent heating process. The acid group can be easily removed as water.

[0079] By introducing oxygen and performing heat treatment, the oxide semiconductor layer can be dehydrated or dehydrogenated. and impurities such as hydrogen, moisture, hydroxyl groups, or hydrides can be removed from the oxide insulating layer. can.

[0080] Further, heat treatment was performed while the oxide semiconductor layer 441 and the oxide insulating layer 407 containing oxygen were in contact with each other. In order to perform this process, the oxide semiconductor layer 441, which is reduced at the same time as the impurity removal process, is formed. Oxygen, which is one of the main components of the oxide semiconductor, is introduced into the oxide insulating layer 407 containing oxygen. Through the above steps, the oxide semiconductor layer 441 is highly purified and can be supplied to the oxide semiconductor layer 441. The oxide semiconductor layer 403 is obtained by being electrically made i-type (intrinsic).

[0081] The highly purified oxide semiconductor layer 403 contains very few carriers (close to zero). The carrier concentration is 1×10 14 / cm 3 Less than 1 x 10 12 / cm 3 Less than, more Preferably 1 x 10 11 / cm 3 is less than.

[0082] Through the above steps, the transistor 410 is formed (see FIG. 1D). 0 is an oxide semiconductor that contains impurities such as hydrogen, water, hydroxyl groups, or hydrides (also called hydrogen compounds). A transistor including a highly purified oxide semiconductor layer 403 intentionally removed from a conductor layer Therefore, the transistor 410 has suppressed fluctuations in electrical characteristics and is electrically stable. is.

[0083] Impurities such as moisture and hydrogen are further mixed into the oxide semiconductor layer 403 on the oxide insulating layer 407. To prevent these from entering from the outside, a protective insulating layer 409 is formed. It is preferable that the protective insulating layer 409 be an inorganic insulating film. Silicon nitride film, aluminum oxide film, etc. can be used. For example, RF sputtering The RF sputtering method is suitable for mass production, so it is safe. This is a preferable method for forming the protective insulating layer 409.

[0084] After the protective insulating layer 409 is formed, heat treatment may be performed. For example, heat treatment is performed in air at 100° C. or higher for 2 Heat treatment may be performed at 00°C or less for 1 hour to 30 hours. The heating temperature may be maintained at 100°C or higher and 200°C or lower. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times.

[0085] The transistor using the highly purified oxide semiconductor layer 403 manufactured in accordance with this embodiment is The current value in the off state (off current value) of the sta 410 is calculated as follows: It can be reduced to less than 10zA / μm at 85°C and less than 100zA / μm at 85°C. can.

[0086] In addition, the transistor 410 including the oxide semiconductor layer 403 has relatively high field-effect mobility. Therefore, the above transistors are used in the pixel portions of liquid crystal display devices. By using a highly purified oxide, high-quality images can be obtained. A driver circuit section or a pixel section is formed on the same substrate by using a transistor including a compound semiconductor layer 403. Since the components can be separately manufactured, the number of components in the semiconductor device can be reduced.

[0087] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0088] (Embodiment 2) In this embodiment mode, another mode of a semiconductor device will be described with reference to FIG. The same parts or parts having similar functions and steps can be performed in the same manner as in the above-described embodiment. Therefore, repeated explanations will be omitted. Also, detailed explanations of the same parts will be omitted.

[0089] The transistor 450 shown in FIGS. 2A to 2D has a top-gate structure. It is also called a tag-type thin film transistor.

[0090] The transistor 450 includes a source electrode layer 405a and a The drain electrode layer 405b, the oxide semiconductor layer 403, the oxide insulating layer 437, and the protective insulating layer 43 8, the gate electrode layer 401. The oxide insulating layer 437 and the protective insulating layer 438 are gate insulating layers. It acts as a layer.

[0091] 2A to 2D illustrate an example of a method for manufacturing the transistor 450. FIG.

[0092] First, an insulating layer 436 is formed over a substrate 400 having an insulating surface.

[0093] The source electrode layer 405a and the drain electrode layer 405b are formed over the insulating layer 436. 6, the oxide semiconductor layer 441 is formed over the source electrode layer 405a and the drain electrode layer 405b. In this embodiment, an oxide semiconductor layer 451 is formed on the In—Ga—Zn—O-based metal oxide layer 451. An In-Ga-Zn-O oxide film was formed by sputtering using an oxide target. The oxide semiconductor layer 451 is formed by depositing a thin film of the oxide semiconductor layer 451 on the oxide semiconductor layer 451 and processing the film into an island shape (see FIG. 2A).

[0094] An oxide insulating layer 437 serving as a gate insulating layer is formed over the oxide semiconductor layer 451. The oxide insulating layer 437 is formed in a manner similar to that of the oxide insulating layer 407. A silicon oxide film having a thickness of 200 nm is formed as an insulating layer 437 by sputtering. do.

[0095] Next, oxygen 421 is introduced into the oxide semiconductor layer 451 through the oxide insulating layer 437. (See FIG. 2(B)). The oxygen 421 can be introduced by ion implantation or ion doping. In this embodiment, an ion implantation method using oxygen gas can be used. Oxygen is introduced using the

[0096] Oxygen is introduced into the oxide semiconductor layer 451 through the stacked oxide insulating layer 437. Therefore, the depth of oxygen introduction (introduction region) can be controlled, and oxygen can be introduced into the oxide semiconductor layer 451. The oxygen introduction depth can be determined by the introduction conditions such as the acceleration voltage and the dose. The conditions and the thickness of the oxide insulating layer 437 to be passed through can be set appropriately. When oxygen is introduced by ion implantation using oxygen gas, the dose is 1×10 13 i ons / cm 2 5x10 or more 15 ions / cm 2 The following would suffice.

[0097] In particular, hydrogen, water, a hydroxyl group, hydride, or the like in a channel formation region of the oxide semiconductor layer Since it is important to exclude impurities, the top-gate structure transistor 450 A large amount of oxygen is introduced into the oxide semiconductor layer 451 near the interface with the oxide insulating layer 437. It is preferable that:

[0098] The peak concentration of oxygen introduced into the oxide semiconductor layer is 1×10 18 / cm 3 ~3×10 20 / cm 3 (preferably 1×10 18 / cm 3 ~1×10 20 / cm 3 ) can be preferable.

[0099] The above oxygen concentration was determined by introducing an oxygen isotope with a mass number of 18 as oxygen and measuring the secondary ion mass distribution. Analysis method (SIMS: Secondary Ion Mass Spectroscopy) The concentration of the oxygen isotope with mass number 18 in the oxide semiconductor layer after the introduction was analyzed by the method described above. This is a measurement value that can be calculated by

[0100] Next, the oxide semiconductor layer 451 to which oxygen has been added is subjected to heat treatment in a state in contact with the oxide insulating layer 437. Carry out the process.

[0101] The temperature of the heat treatment is 250°C or more and 700°C or less, or 400°C or more and 700°C or less, or The temperature must be below the strain point of the substrate. The heat treatment is carried out in a gas atmosphere containing nitrogen, oxygen, and ultra-dry air (water content 20p / cm²). pm or less, preferably 1 ppm or less, preferably 10 ppb or less of air), or noble gases The process can be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air, or It is also preferable that the rare gas atmosphere does not contain water, hydrogen, etc. The substrate is placed in an electric furnace, which is one of the apparatuses, and the oxide semiconductor layer 451 is heated to 4000 K under a nitrogen atmosphere. Heat treatment is carried out at 50°C for 1 hour.

[0102] By introducing oxygen, the bond between the metal and hydrogen constituting the oxide semiconductor or the bond between the metal and hydrogen The bond between the hydroxyl groups is broken and these hydrogens or hydroxyl groups react with oxygen. Therefore, the impurities, hydrogen and water, are removed by the subsequent heating process. The acid group can be easily removed as water.

[0103] The oxide semiconductor layer 451 is dehydrated or dehydrogenated by the introduction of oxygen and heat treatment. Impurities such as hydrogen, moisture, hydroxyl groups, or hydrides can be removed from the oxide insulating layer. It is possible.

[0104] Further, heat treatment was performed while the oxide semiconductor layer 451 and the oxide insulating layer 437 containing oxygen were in contact with each other. In order to perform the process, the main components of the oxide semiconductor, which are simultaneously reduced by the impurity removal process, Oxygen, which is one of the component materials, is added to the oxide insulating layer 437 containing oxygen, and the oxide semiconductor layer 451 Through the above steps, the oxide semiconductor layer 451 is highly purified and can be electrically An intrinsic oxide semiconductor layer 403 is obtained (see FIG. 2C).

[0105] Impurities such as moisture and hydrogen are further mixed into the oxide semiconductor layer 403 on the oxide insulating layer 437. To prevent these from entering from the outside, a protective insulating layer 438 is formed. The protective insulating layer 438 is preferably formed as a gate insulating layer, similar to the oxide insulating layer 437. For example, the protective insulating layer 438 may be formed by RF sputtering silicon nitride. A film is formed.

[0106] The gate electrode layer 401 is formed over the protective insulating layer 438 which overlaps with the oxide semiconductor layer 403 .

[0107] Through the above steps, the transistor 450 is formed (see FIG. 2D). 0 is an oxide semiconductor that contains impurities such as hydrogen, water, hydroxyl groups, or hydrides (also called hydrogen compounds). A transistor including a highly purified oxide semiconductor layer 403 intentionally removed from a conductor layer Therefore, the transistor 450 has suppressed fluctuations in electrical characteristics and is electrically stable. is.

[0108] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0109] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0110] (Embodiment 3) In this embodiment mode, another mode of a semiconductor device will be described with reference to FIG. The same parts or parts having similar functions and steps can be performed in the same manner as in the above-described embodiment. Therefore, repeated explanations will be omitted. Also, detailed explanations of the same parts will be omitted.

[0111] The transistor 420 shown in FIGS. 3A to 3E is a channel-protective transistor (channel-stop transistor). It is one of the bottom gate structures known as inverted staggered thin film transistors. say.

[0112] The transistor 420 includes a gate electrode layer 401, a gate The insulating layer 402, the oxide semiconductor layer 403, and the insulating layer 402 are formed on the oxide semiconductor layer 403. The oxide insulating layer 427, which functions as a channel protection layer, the source electrode layer 405a, and the drain electrode layer 405b are formed on the insulating layer 427. A protective insulating layer 409 is formed to cover the transistor 420. It is being done.

[0113] 3A to 3E illustrate an example of a method for manufacturing the transistor 420. FIG.

[0114] First, a gate electrode layer 401 is formed on a substrate 400 having an insulating surface. A gate insulating layer 402 is formed on the silicon substrate 1.

[0115] Next, the oxide semiconductor layer 422 is formed over the gate insulating layer 402 in the same manner as the oxide semiconductor layer 441. In this embodiment, an In-Ga-Zn-O based metal oxide target is used for sputtering. An In-Ga-Zn-O oxide film is formed by the deposition method, and then processed into an island shape to form an oxide semiconductor. The body layer 422 is formed.

[0116] The oxide insulating layer 426 is formed over the oxide semiconductor layer 422 in a manner similar to that of the oxide insulating layer 407. In this embodiment, the oxide insulating layer 426 is a 200-nm-thick oxide insulating layer. The silicon film is formed by sputtering.

[0117] Next, oxygen 421 is introduced into the oxide semiconductor layer 422 through the oxide insulating layer 426. (See FIG. 3(B)). The oxygen 421 can be introduced by ion implantation or ion doping. In this embodiment, an ion implantation method using oxygen gas can be used. Oxygen is introduced using the

[0118] Oxygen is introduced into the oxide semiconductor layer 422 through the stacked oxide insulating layer 426. Therefore, the depth of oxygen introduction (introduction region) can be controlled, and oxygen can be introduced into the oxide semiconductor layer 422. The oxygen introduction depth can be determined by the introduction conditions such as the acceleration voltage and the dose. The conditions and the thickness of the oxide insulating layer 426 to be passed through can be set appropriately. When oxygen is introduced by ion implantation using oxygen gas, the dose is 1×10 13 i ons / cm 2 5x10 or more 15 ions / cm 2 The following would suffice.

[0119] In particular, hydrogen, water, a hydroxyl group, or hydride in the channel formation region of the oxide semiconductor layer 422 Therefore, it is important to eliminate impurities such as In the oxide semiconductor layer 422, a large amount of oxygen is introduced near the interface with the gate insulating layer 402. It is preferable to do so.

[0120] The peak concentration of introduced oxygen in the oxide semiconductor layer 422 is 1×10 18 / cm 3 ~3 x10 20 / cm 3 (preferably 1×10 18 / cm 3 ~1×10 20 / cm 3 ) It is preferable.

[0121] The above oxygen concentration was determined by introducing an oxygen isotope with a mass number of 18 as oxygen and measuring the secondary ion mass distribution. Analysis method (SIMS: Secondary Ion Mass Spectroscopy) The concentration of the oxygen isotope with mass number 18 in the oxide semiconductor layer after the introduction was analyzed by the method described above. This is a measurement value that can be calculated by

[0122] Next, the oxide semiconductor layer 422 to which oxygen has been added is subjected to heat treatment in a state in contact with the oxide insulating layer 426. Carry out the process.

[0123] The temperature of the heat treatment is 250°C or more and 700°C or less, or 400°C or more and 700°C or less, or The temperature must be below the strain point of the substrate. The heat treatment is carried out in a gas atmosphere containing nitrogen, oxygen, and ultra-dry air (water content 20p / cm²). pm or less, preferably 1 ppm or less, preferably 10 ppb or less of air), or noble gases The process can be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air, or It is also preferable that the rare gas atmosphere does not contain water, hydrogen, etc. The substrate is placed in an electric furnace, which is one of the apparatuses, and the oxide semiconductor layer 422 is heated to 4000 K under a nitrogen atmosphere. Heat treatment is carried out at 50°C for 1 hour.

[0124] By introducing oxygen, the bond between the metal and hydrogen constituting the oxide semiconductor or the bond between the metal and hydrogen The bond between the hydroxyl groups is broken and these hydrogens or hydroxyl groups react with oxygen. Therefore, the impurities, hydrogen and water, are removed by the subsequent heating process. The acid group can be easily removed as water.

[0125] The oxide semiconductor layer 422 is dehydrated or dehydrogenated by the introduction of oxygen and heat treatment. impurities such as hydrogen, moisture, a hydroxyl group, or hydride can be removed from the oxide semiconductor layer 422. can be eliminated.

[0126] Further, heat treatment was performed while the oxide semiconductor layer 422 and the oxide insulating layer 426 containing oxygen were in contact with each other. In order to perform the process, the main components of the oxide semiconductor, which are simultaneously reduced by the impurity removal process, Oxygen, which is one of the component materials, is added to the oxide insulating layer 426 containing oxygen, and the oxide semiconductor layer 42 Through the above steps, the oxide semiconductor layer 422 is highly purified and can be electrically An i-type (intrinsic) oxide semiconductor layer 403 is obtained.

[0127] The oxide insulating layer 426 is processed by a photolithography process to form a thin film of the oxide semiconductor layer 403. An oxide insulating layer 427 is formed to cover the channel forming region and function as a channel protection layer (see FIG. 3(D)). In the etching process of the oxide insulating layer 426, the oxide semiconductor In some cases, a portion of the insulating layer 403 is also removed. In this case, the insulating layer 427 is covered with the insulating layer 427. The thickness of the oxide semiconductor layer 403 in the region where the oxide semiconductor layer 403 is not formed is reduced.

[0128] The source electrode layer 405a and the drain electrode layer 405b are formed over the oxide semiconductor layer 403 and the oxide insulating layer 427. Layer 405b is formed.

[0129] Through the above steps, the transistor 420 is formed (see FIG. 3E). impurities such as hydrogen, water, hydroxyl groups, or hydrides (also called hydrogen compounds) are added to oxide semiconductors. The transistor includes a highly purified oxide semiconductor layer 403 that is intentionally removed from the semiconductor layer. Therefore, the transistor 420 has suppressed fluctuations in electrical characteristics and is electrically stable. be.

[0130] Water is further deposited on the oxide insulating layer 427, the source electrode layer 405a, and the drain electrode layer 405b. In order to prevent impurities such as carbon and hydrogen from re-entering the oxide semiconductor layer 403, It is preferable to form a protective insulating layer 409 to block the penetration of oxygen (see FIG. 3(E)). For example, a silicon nitride film is formed as the protective insulating layer 409 by RF sputtering. Form.

[0131] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0132] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0133] (Fourth embodiment) In this embodiment, another mode of a semiconductor device will be described with reference to FIGS. A transistor is shown as an example of a semiconductor device. The functional parts and steps can be performed in the same manner as in the above-described embodiment, and the repeated explanations will not be given. Also, detailed explanations of the same parts will be omitted.

[0134] The structure of the transistor is not particularly limited, and may be, for example, a top gate structure or a bottom gate structure. The transistor can be of a staggered type or a planar type. The structure can be a single gate structure with one gate region or a double gate structure with two gate regions. A triple gate structure may be formed with three gates above and below the channel region. It may be a dual gate type having two gate electrode layers disposed with a gate insulating layer interposed therebetween. .

[0135] Note that examples of cross-sectional structures of the transistors 430 and 440 are shown in FIGS. The transistors 430 and 440 shown in FIGS. 4A and 4B are the same as those described in the first to third embodiments. As with Transistors 410, 420, and 450, hydrogen, moisture, hydroxyl groups, or hydrides (hydrogen compounds) (also referred to as "high purity") from the oxide semiconductor layer. Therefore, the transistors 430 and 440 are transistors including a conductor layer. Therefore, a highly reliable semiconductor device can be provided. It is possible.

[0136] The transistor 430 shown in FIG. 4A is a bottom-gate transistor. A gate electrode layer 401, a gate insulating layer 402, a source electrode layer 403, a gate insulating layer 404, a gate insulating layer 405, a gate insulating layer 406, a gate insulating layer 407, a gate insulating layer 408, a gate insulating layer 409, a gate insulating layer 410, a gate insulating layer 411, a gate insulating layer 412, a gate insulating layer 413, a gate insulating layer 414, a The gate electrode layer 405 includes a gate electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403. An oxide insulating layer 407 is provided to cover the transistor 430 and to be in contact with the oxide semiconductor layer 403. A protective insulating layer 409 is further formed over the oxide insulating layer 407.

[0137] In transistor 430, gate insulating layer 402 is formed between substrate 400 and gate electrode layer 400. 1, a source electrode layer 405a and a drain electrode layer 405b are provided on the gate insulating layer 402. The gate insulating layer 402 and the source electrode layer 405b are provided in contact with each other. 5a, an oxide semiconductor layer 403 is provided over a drain electrode layer 405b.

[0138] The transistor 440 shown in FIG. 4B is a top-gate transistor. The transistor 440 is formed on a substrate 400 having an insulating surface, an insulating layer 436, an oxide semiconductor layer 438, and a gate insulating layer 439. The gate insulating layer 403, the source electrode layer 405a, the drain electrode layer 405b, and the gate insulating layer 406 are formed. the oxide insulating layer 467, the protective insulating layer 468, the gate electrode layer 401, and the source electrode layer The wiring layer 465a and the wiring layer 465b are in contact with the drain electrode layer 405a and the drain electrode layer 405b, respectively. The gate electrode layer 401, the wiring layer 465a, and the wiring layer 465b are electrically connected to each other. A protective insulating layer 469 is formed to cover the top.

[0139] The oxide semiconductor used for the oxide semiconductor layer 403 is a quaternary metal oxide, In-S n-Ga-Zn-O system, ternary metal oxides In-Ga-Zn-O system, In-Sn -Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn- O-based, Sn-Al-Zn-O-based, and binary metal oxides such as In-Zn-O-based and Sn-Z nO series, Al-Zn-O series, Zn-Mg-O series, Sn-Mg-O series, In-Mg-O series In—O-based, Sn—O-based, Zn—O-based, etc. can also be used. The semiconductor may contain SiO2. For example, an In-Ga-Zn-O-based oxide semiconductor The oxide is an oxide containing at least In, Ga, and Zn, and there is no particular limitation on the composition ratio. Furthermore, elements other than In, Ga, and Zn may be contained.

[0140] The oxide semiconductor layer 403 is formed of a material having the chemical formula InMO3(ZnO) m (m>0 and m is natural Thin films expressed as a metal (not a number) can be used, where M is Ga, Al, Mn, and and Co. For example, M may be Ga, Ga, and Examples include Al, Ga and Mn, or Ga and Co.

[0141] In the bottom gate transistor 430, the insulating film serving as the base film is connected to the substrate and the gate electrode. The underlayer has the function of preventing the diffusion of impurity elements from the substrate. , a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or a silicon oxynitride film It can be formed by a laminated structure of one or more selected films.

[0142] A substrate 400, a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, a drain electrode layer 405c, a drain electrode layer 405d, a drain electrode layer 405e, a drain electrode layer 405f, a drain electrode layer 405g, a drain electrode layer 405h, a drain electrode layer 405m ... The electrode layer 405b can be formed using the same material and method as in the first embodiment.

[0143] The wiring layer 465a and the wiring layer 465b are connected to the source electrode layer 405a and the drain electrode layer 405b, respectively. The conductive film such as 5b is also made of the same material as the source electrode layer 405a and the drain electrode layer 405b. It can be used.

[0144] The insulating layer 436 and the oxide insulating layer 467 functioning as a gate insulating layer are formed by the oxide insulating layer 407 The same materials as those mentioned above can be used, and typically, silicon oxide films, silicon oxynitride films, etc. The inorganic insulating film may be used.

[0145] The protective insulating layer 468 and the protective insulating layer 469 functioning as gate insulating layers are formed using a silicon nitride film, Aluminum nitride film, silicon nitride oxide film, aluminum nitride oxide film, aluminum oxide An inorganic insulating film such as a film can be used.

[0146] In addition, a planarizing insulating film is formed on the protective insulating layer 409 to reduce surface irregularities caused by the transistor. The planarization insulating film may be formed using a material such as polyimide, acrylic, or benzocyclobutene. In addition to the above organic materials, low dielectric constant materials (low In addition, multiple insulating films made of these materials can be stacked. A planarization insulating film may be formed by performing the above-mentioned process.

[0147] In the transistors 430 and 440, the oxide semiconductor layer 403 is Oxygen is introduced through the oxide insulating layer 407 and the oxide insulating layer 467, and heat treatment is performed. By doing this, impurities such as hydrogen, moisture, hydroxyl groups, or hydrides (also called hydrogen compounds) are removed. The oxide semiconductor layer is a highly purified oxide semiconductor layer in which oxygen is intentionally removed from the oxide semiconductor layer. By introducing the metal, the bond between the metal and hydrogen constituting the oxide semiconductor or the bond between the metal and hydroxyl group The bond between these hydrogen atoms is broken, and these hydrogen atoms or hydroxyl groups react with oxygen to form water. In order to produce hydrogen or hydroxyl groups, which are impurities, the subsequent heat treatment is carried out to remove them. This can facilitate the desorption.

[0148] Since oxygen is introduced into the oxide semiconductor layer through the stacked oxide insulating layer, The introduction depth (introduction region) can be controlled, and oxygen can be introduced efficiently into the oxide semiconductor layer. It is possible.

[0149] The oxide semiconductor layer is bonded to the oxide insulating layer 407 containing oxygen and the oxide insulating layer 467. The heat treatment is carried out in this state, so the oxides that are reduced at the same time as the impurity removal process Oxygen, which is one of the main component materials of a semiconductor, is used as the oxide insulating layer 407 containing oxygen, and The oxide insulating layer 467 can supply the oxide semiconductor layer with the oxygen. The layer 403 becomes more highly purified and electrically becomes I-type (intrinsic).

[0150] The transistors 430 and 440 using the highly purified oxide semiconductor layer 403 are in an off state. The current value (off-state current value) can be reduced.

[0151] Furthermore, the transistors 430 and 440 using the highly purified oxide semiconductor layer 403 are Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using the transistor in the pixel portion, a high-quality image can be provided. The transistor can be separately formed in a driver circuit portion or a pixel portion over the same substrate. This allows the number of parts in the display device to be reduced.

[0152] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0153] (Embodiment 5) In this embodiment, another embodiment of the semiconductor device will be described with reference to FIGS. The same parts as those in the embodiment or parts having similar functions and steps are performed in the same manner as in the above embodiment. Therefore, repeated explanations will be omitted, and detailed explanations of the same parts will be omitted.

[0154] In this embodiment, a conductive layer (arrangement layer) is formed in a source electrode layer and / or a drain electrode layer of a transistor. In this embodiment, the transistors are connected to the wiring layer, the pixel electrode layer, and the like. The transistor 410 shown in Embodiment 1 will be used as the transistor. The present invention can also be applied to any of the transistors shown in 2 to 4.

[0155] As shown in FIG. 5A, a transistor 410 is formed on a substrate 400 having an insulating surface. a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, and a source electrode layer 405a. The transistor 410 includes an oxide insulating layer 407 and a drain electrode layer 405b. A protective insulating layer 409 is laminated in this order.

[0156] As described in Embodiment 1, in the manufacturing process of the transistor 410, the oxide insulating layer 4 07 over the oxide semiconductor layer 403, the source electrode layer 405a, and the drain electrode layer 405b. oxygen 421 is introduced into the oxide semiconductor layer 441 through the oxide insulating layer 407; Heat treatment is performed (see FIGS. 1(B) to 1(D)). In this oxygen introduction and heat treatment process, The oxygen 421 is introduced into the oxide semiconductor layer 403, the source electrode layer 405a, the drain electrode layer 405b, and the oxide semiconductor layer 405c. 5b and is irradiated (introduced near the surface). The surfaces of the source electrode layer 405a and the drain electrode layer 405b irradiated with the light 421 are oxidized. Oxidized metal regions 404a, 404b may be formed between the oxide insulating layers 407. The metal regions 404a, 404b may be in the form of a membrane.

[0157] In the case of FIG. 5A, the source electrode layer 405a and the drain electrode layer 405b are formed over the protective insulating layer 409. The openings 455a and 455b for forming the conductive layer connected to the pole layer 405b are formed by using a high resistance The oxidized metal regions 404a and 404b are also removed, and the source electrode layer 405a and the drain electrode layer 406 are removed. It is preferable to form the opening 45 until the electrode layer 405b is exposed (see FIG. 5(B)). 5a, 455b are the protective insulating layer 409, the oxide insulating layer 407, and the metal oxide regions 404a, 40 It is formed by removing a part of 4b.

[0158] Next, the source electrode layer 405a and the drain electrode layer 405b exposed in the openings 455a and 455b are Conductive layers 456a and 456b are formed in contact with the electrode layer 405b (see FIG. 5C). The conductive layers 456a and 456b are directly connected to the metal oxide regions 404a and 404b, without passing through the highly resistive metal oxide regions 404a and 404b. Since the source electrode layer 405a and the drain electrode layer 405b are in contact with each other and have low contact resistance, Therefore, good electrical connection (contact) can be achieved.

[0159] A protective insulating layer 45 is formed on the conductive layers 456a and 456b to cover the transistor 410 as a protective layer. 5D). Furthermore, by covering the insulating layer 457, the opening 4 Impurities such as hydrogen and moisture enter the oxide semiconductor layer 403 through the portions 55a and 455b. This can prevent the following.

[0160] In addition, the surfaces of the source electrode layer 405a and the drain electrode layer 405b that are irradiated with oxygen are A conductive film (typically a tungsten film or a tantalum film) into which atoms are difficult to be introduced may be provided. For example, the source electrode layer 405a and the drain electrode layer 405b are made of a titanium film and a tungsten film. By providing a tungsten film on the oxygen introduction side, a high resistance metal oxide region The formation of can be suppressed.

[0161] As described above, the oxide having good electrical connection and stable electrical characteristics of the transistor Therefore, a semiconductor device using the semiconductor can be provided. can be provided.

[0162] (Embodiment 6) In this embodiment mode, another embodiment of a method for manufacturing a semiconductor device will be described. A part or a part having the same function and a step can be performed in the same manner as in the above embodiment. Therefore, repeated explanations will be omitted, and detailed explanations of the same parts will be omitted.

[0163] Note that in this embodiment, the transistors 410 and 411 shown in any of Embodiments 1 to 5 are Also applicable to 20, 430, 440, and 450.

[0164] In this embodiment, the transistors 410, 420, 430, 440, and 450 are manufactured by In this case, oxide insulating layers 407, 437, 426, and 467 are formed in contact with the oxide semiconductor layer. An example in which heat treatment is performed on the oxide semiconductor layer before the oxide semiconductor layer is heated will be described.

[0165] This heat treatment can be performed after the oxide semiconductor layer is formed and before the oxide insulating layer is formed. The island-shaped oxide semiconductor layer may be replaced with an oxide semiconductor layer before processing. In this case, the formation may be performed before or after the source electrode layer 405a and the drain electrode layer 405b are formed. .

[0166] The temperature of the heat treatment is 400°C or higher and 750°C or lower, or 400°C or higher and lower than the distortion point of the substrate. For example, the substrate is placed in an electric furnace, which is a type of heat treatment apparatus, and the oxide semiconductor layer is Then, heat treatment is carried out at 450°C for 1 hour in a nitrogen atmosphere. After the heat treatment, do not expose the specimen to the air. It is preferable to form an oxide insulating layer without using a heat treatment, thereby preventing water or hydrogen from re-entering the oxide semiconductor layer. It's nice.

[0167] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device that heats the object to be treated by radiation may be used. For example, a GRTA (Gas Reactor Tank Apparatus) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp or other lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. Inert gases such as argon or nitrogen that do not react with the material to be treated by heat treatment An active gas is used.

[0168] For example, as a heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650 to 700°C. After heating for several minutes, the substrate was removed from the inert gas heated to a high temperature. good.

[0169] Heat treatment is carried out in nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). m or less, preferably 10 ppb or less air), or noble gases (argon, helium, etc.) However, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas atmosphere may be used. It is preferable that the gas does not contain nitrogen, oxygen, or hydrogen. The purity of the rare gas is 6N (99.9999%) or more, preferably 7N (99.99999%). %) or more (i.e., the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). preferable.

[0170] By this heat treatment, impurities such as moisture or hydrogen in the oxide semiconductor layer are reduced. It is possible.

[0171] Furthermore, an oxide insulating layer is formed on the oxide semiconductor layer, and an oxide insulating film is formed on the oxide semiconductor layer. By introducing oxygen into the semiconductor layer, the bond between the metal and hydrogen that make up the oxide semiconductor, Alternatively, the bond between the metal and the hydroxyl group may be broken and the hydrogen or hydroxyl group may be replaced with oxygen. The reaction produces water, and then, by introducing oxygen and then further heating, the solid This makes it easier to remove impurities such as hydrogen or hydroxyl groups remaining in the solution as water. can.

[0172] Since heat treatment is performed in a state where the oxide semiconductor layer and the oxide insulating layer containing oxygen are in contact with each other, impurities are It is one of the main components of oxide semiconductors that is reduced at the same time by the removal process. The oxygen can be supplied to the oxide semiconductor layer from the oxide insulating layer containing oxygen.

[0173] Therefore, the oxide semiconductor layer is subjected to heat treatment before the formation of the oxide insulating layer and the oxide insulating layer. If heat treatment is performed after forming the film and introducing oxygen, impurities such as moisture and hydrogen are further released. In addition, an oxide semiconductor layer that is an I-type (intrinsic semiconductor) or an oxide semiconductor layer that is extremely close to an I-type can be obtained.

[0174] Therefore, in a transistor including a highly purified oxide semiconductor layer, fluctuations in electrical characteristics are suppressed. Therefore, a highly reliable semiconductor device can be provided. do.

[0175] (Embodiment 7) A semiconductor device having a display function using the transistor as an example described in any of Embodiments 1 to 6 A semiconductor device (also called a display device) can be manufactured. Part or all of the circuitry is integrated onto the same substrate as the pixel section to form a system-on-panel. It is possible.

[0176] In FIG. 6A, a pixel portion 4002 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided and the substrate is sealed with a second substrate 4006. In A), the area surrounded by the sealant 4005 on the first substrate 4001 and are formed in different regions using a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are mounted on the substrate. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a signal line driver circuit 4005 are applied to the pixel portion 4002. Various signals and potentials are transmitted through the FPC (Flexible Printed Circuit )4018a, 4018b are supplied.

[0177] 6B and 6C, a pixel portion 4002 provided on a first substrate 4001 and a scanning A sealing material 4005 is provided so as to surround the line driver circuit 4004. A second substrate 4006 is provided on the substrate 4002 and the scanning line driver circuit 4004. The pixel portion 4002 and the scanning line driver circuit 4004 are formed by the first substrate 4001 and the sealing material 4004. The display element is sealed by the second substrate 4005 and the second substrate 4006. In C), the area surrounded by the sealant 4005 on the first substrate 4001 and are formed in different regions using a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. In FIG. 6(B) and (C), a signal line driver circuit 4003 is mounted. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a signal line driver circuit 4005 are applied to the pixel portion 4002. The various signals and potentials are supplied from the FPC4018.

[0178] 6B and 6C, the signal line driver circuit 4003 is formed separately, and the first substrate 4 001, but the present invention is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed and mounted. It may be formed separately and mounted.

[0179] The method of connecting the separately formed drive circuit is not particularly limited, and may be ip On Glass) method, wire bonding method, or TAB (Tape A The C This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 6(B) shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 6(C) shows an example in which a signal line driver circuit 4003 is mounted by the COG method. ) is an example in which the signal line driver circuit 4003 is mounted by the TAB method.

[0180] The display device also includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above are mounted.

[0181] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. Also refers to connectors, such as FPC or TAB tape. Modules with TCP attached, TAB tape or TCP with a printed wiring board attached The IC (integrated circuit) is directly mounted on the module or display element using the COG method. All such modules are also included in the display device.

[0182] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described as an example in any of Embodiments 1 to 6 can be used. do.

[0183] The display element provided in the display device may be a liquid crystal element (also called a liquid crystal display element), a light-emitting element ( The light-emitting element emits light by applying a current or a voltage. This category includes elements whose brightness can be controlled, specifically inorganic EL (Electroluminescent) Luminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium whose contrast changes depending on use can also be applied.

[0184] One embodiment of a semiconductor device will be described with reference to FIGS. 7 to 9. FIGS. 7 to 9 are the same as those in FIG. B) corresponds to the cross section at MN.

[0185] As shown in FIGS. 7 to 9, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrode 4015 and the terminal electrode 4016 are terminals of the FPC 4018. and are electrically connected to each other via an anisotropic conductive film 4019 .

[0186] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 016 is the same conductor as the source electrode layer and the drain electrode layer of the transistors 4010 and 4011. It is formed of a conductive film.

[0187] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 7 to 9, the transistors included in the pixel portion 4002 are 4004 and a transistor 4010 included in the scanning line driver circuit 4004. In FIG. 7, an oxide insulating layer 4020 and a protective insulating layer 4030 are formed on the transistors 4010 and 4011. An edge layer 4024 is provided and in FIGS. 8 and 9 an insulating layer 4021 is also provided. Note that the insulating layer 4023 is an insulating film that functions as a base film.

[0188] In this embodiment, the transistors 4010 and 4011 are the transistors The transistors shown in any of the above to 6 can be used.

[0189] In the transistors 4010 and 4011, an oxide semiconductor layer is stacked Oxygen is introduced through the oxide insulating layer 4020, and heat treatment is performed to remove water. impurities such as hydrogen, moisture, a hydroxyl group, or hydride (also called a hydrogen compound) are removed from the oxide semiconductor layer. The oxide semiconductor layer is a highly purified oxide semiconductor layer in which oxygen is intentionally removed. Breaking the bond between the metal constituting the conductor and hydrogen, or the bond between the metal and hydroxyl groups At the same time, these hydrogen or hydroxyl groups react with oxygen to produce water, The heat treatment makes it easy to remove impurities such as hydrogen or hydroxyl groups as water. It can be made easier.

[0190] In order to introduce oxygen into the oxide semiconductor layer through the stacked oxide insulating layer 4020, The oxygen introduction depth (introduction region) can be controlled, and oxygen can be efficiently introduced into the oxide semiconductor layer. It can be easily implemented.

[0191] Further, heat treatment is performed in a state where the oxide semiconductor layer is in contact with the oxide insulating layer 4020 containing oxygen. Therefore, the main components that make up the oxide semiconductor are reduced at the same time during the impurity removal process. Oxygen, which is one of the materials, is supplied to the oxide semiconductor layer from the oxide insulating layer 4020 containing oxygen. Therefore, the oxide semiconductor layer can be further purified and electrically made i-type (intrinsic). do.

[0192] Therefore, the transistor 4010 and the transistor 4020 each include a highly purified oxide semiconductor layer. 011 has suppressed fluctuations in electrical characteristics and is electrically stable. As the semiconductor device of this embodiment shown in FIG. 9, a highly reliable semiconductor device can be provided. do.

[0193] In this embodiment, the transistor 4011 for the driver circuit is formed over the insulating layer 4023. In this example, a conductive layer is provided so as to overlap with a channel formation region of the oxide semiconductor layer. By providing the conductive layer at a position overlapping with the channel formation region of the oxide semiconductor layer, This allows the amount of change in the threshold voltage of the transistor 4011 before and after the test to be further reduced. The conductive layer may have the same potential as the gate electrode layer of the transistor 4011. The conductive layer may be different from the first gate electrode layer and may function as the second gate electrode layer. The potential may be GND, 0V, or may be in a floating state.

[0194] The conductive layer also shields the external electric field, i.e., the external electric field is blocked by the internal (thin film transistor) It also has a function to prevent the device from affecting the circuitry (including the circuitry) (especially the electrostatic shielding function against static electricity). The shielding function of the conductive layer prevents the transistor from being affected by external electric fields such as static electricity. This can prevent fluctuations in the electrical characteristics.

[0195] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display, and various display elements can be used. It can be used.

[0196] FIG. 7 shows an example of a liquid crystal display device using liquid crystal elements as display elements. The liquid crystal element 4013 is made up of a first electrode layer 4030, a second electrode layer 4031, an insulating layer 4032, and a 4032, an insulating layer 4033, and a liquid crystal layer 4008. Insulating layers 4032 and 4033 functioning as alignment films are provided so that the second electrode layer 4031 is provided on the second substrate 4006 side, and the first electrode layer 4030 and the second electrode layer 40 The liquid crystal layer 4008 is laminated with the liquid crystal display panel 31 .

[0197] 4035 is a columnar spacer obtained by selectively etching the insulating film. It is provided to control the film thickness (cell gap) of the liquid crystal layer 4008. A pacer may be used.

[0198] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, etc. The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, the liquid crystal material can be in a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0199] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. To achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used in the liquid crystal layer. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a short response time of 1 msec or less. Since the liquid crystal display is optically isotropic, no alignment treatment is required and the viewing angle dependency is small. Since there is no need to provide a rubbing treatment, the This can prevent electrostatic breakdown, which may occur during the manufacturing process, thereby reducing defects and damage to the liquid crystal display device. Therefore, it is possible to improve the productivity of the liquid crystal display device. The electrical characteristics of a transistor that uses a conductor layer are significantly affected by static electricity. Therefore, the transistor using an oxide semiconductor layer may fluctuate and deviate from the design range. It is more effective to use a blue phase liquid crystal material in a liquid crystal display device having the above structure.

[0200] The specific resistance of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, and more preferably 1×10 12 Ω·cm or more. The resistivity values ​​in this document are those measured at 20°C.

[0201] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. It is set so that the charge can be held for a predetermined period, taking into consideration the current and other factors. The size of the high-purity oxide semiconductor layer can be set in consideration of the off-state current of the transistor and the like. By using a transistor having It is sufficient to provide a storage capacitor having a capacity preferably 1 / 5 or less of the capacity of the storage capacitor.

[0202] The transistor including the highly purified oxide semiconductor layer used in this embodiment has an off state. Therefore, the current value (off-state current value) at the time of the image signal or the like can be reduced. The data retention time can be extended, and the write interval can also be set longer when the power is on. This reduces the frequency of refresh operations, which has the effect of reducing power consumption. It plays a key role.

[0203] In addition, the transistor using the highly purified oxide semiconductor layer used in this embodiment has a relatively low Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using the above transistor in the pixel portion, a high-quality image can be provided. In addition, the transistors can be separately formed in a driver circuit portion and a pixel portion on the same substrate. This allows the number of components in the liquid crystal display device to be reduced.

[0204] There are two types of LCD displays: TN (Twisted Nematic) mode, IPS (In-P lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0205] Furthermore, normally black type liquid crystal display devices, for example, those employing vertical alignment (VA) mode The liquid crystal display device may be a transmission type. For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode In addition, it can be applied to VA type liquid crystal display devices. A VA type liquid crystal display device is a device that controls the alignment of liquid crystal molecules in a liquid crystal display panel. VA type LCD displays have a characteristic that the panel surface is not electrically connected to the LCD panel when no voltage is applied. The liquid crystal molecules are aligned vertically. The multi-domain structure is designed to divide the device into sub-pixels (pixels) and tilt the molecules in different directions. A method known as multi-domain or multi-domain design can be used.

[0206] In addition, in display devices, black matrices (light-shielding layers), polarizing members, phase difference members, reflecting members, Optical members (optical substrates) such as a protection member are provided as appropriate. For example, a polarizing substrate and a retardation substrate are provided as appropriate. Alternatively, a backlight or a sidelight may be used as the light source. It's fine.

[0207] In addition, the display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (R is It is not limited to the three colors (red, green, and blue). For example, RGBW (W stands for white). , or RGB plus one or more colors such as yellow, cyan, magenta, etc. The size of the display area may differ for each dot of the color element. The present invention is not limited to display devices with a monochromatic display, but can also be applied to display devices with a monochrome display. can.

[0208] Furthermore, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. The light-emitting element using electroluminescence can be applied to a light-emitting material They are distinguished by whether they are organic or inorganic compounds, and generally, the former are organic E The latter is called an inorganic EL element.

[0209] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0210] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0211] The light emitting element only needs to have at least one of the pair of electrodes transparent in order to extract light. Then, a transistor and a light emitting element are formed on the substrate, and light is extracted from the surface opposite the substrate. Top emission, bottom emission where light is extracted from the surface on the substrate side, and surface on the substrate side and the opposite side of the substrate There are light emitting devices with a double-sided emission structure that extracts light from the It is possible.

[0212] FIG. 8 shows an example of a light-emitting device using a light-emitting element as a display element. The transistor 513 is electrically connected to the transistor 4010 provided in the pixel portion 4002 . The light-emitting element 4513 includes a first electrode layer 4030, an electroluminescent layer 4511, a second electrode layer 4032, and a second electroluminescent layer 4513. The electrode layer 4031 has a laminated structure, but is not limited to the structure shown. The configuration of the light emitting element 4513 can be changed as appropriate according to the direction of emitted light.

[0213] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material, particularly a photosensitive resin. An opening is formed on the first electrode layer 4030 using a material, and the sidewall of the opening has a continuous curved surface. It is preferable to form the inclined surface so as to have a certain slope.

[0214] The electroluminescent layer 4511 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0215] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. A protective film may be formed on the insulating film 4031 and the partition wall 4510. The protective film may be made of silicon nitride. A silicon nitride film, a silicon oxide film, a DLC film, etc. can be formed on the first substrate 400. The space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005 is filled with a filler 45. 14 is provided and sealed. In this way, it is highly airtight and degassed so as not to be exposed to the outside air. Protective films with low wear (laminating films, UV-curing resin films, etc.) and covering materials It is preferable to package (enclose) the

[0216] Filler 4514 can be an inert gas such as nitrogen or argon, or an ultraviolet curing resin or Thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide Mido, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA (Elastomer) For example, nitrogen may be used as a filler. stomach.

[0217] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0218] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display (electrophoretic display), and is a paper It is possible to make it as easy to read as a digital camera, consume less power than other display devices, and have a thinner and lighter form factor. This has the advantage that

[0219] The electrophoretic display device may have various forms, but it has a structure in which first particles having a positive charge and and a second particle having a negative charge. By applying an electric field to the microcapsules, The particles in the cell are moved in opposite directions to each other, and only the color of the particles that gather on one side is displayed. The first particles or the second particles contain a dye, and when there is no electric field, they move. The color of the first particle and the color of the second particle are different (including colorless). )

[0220] In this way, the electrophoretic display device moves materials with high dielectric constants to areas with high electric fields, so-called This is a display that utilizes the dielectrophoretic effect.

[0221] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0222] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from magnetochromic materials, magnetophoretic materials, or a composite material thereof Just use it.

[0223] In addition, a display device using a twist ball display method can also be applied as electronic paper. The twist ball display method uses spherical particles painted in black and white as the display element. The first electrode layer and the second electrode layer are disposed between the first electrode layer and the second electrode layer. This is a display method that controls the orientation of spherical particles by creating a potential difference between the electrode layers. be.

[0224] FIG. 9 shows an active matrix electronic paper as one mode of a semiconductor device. The electronic paper in the above is an example of a display device that uses the twist ball display method. The display method uses spherical particles painted in black and white placed between the electrode layers used for the display element. A display is performed by controlling the orientation of the spherical particles by generating a potential difference between the electrode layers. It is the law.

[0225] A first electrode layer 4030 connected to the transistor 4010 and a second electrode layer 4031 provided on the second substrate 4006 The second electrode layer 4031 has a black area 4615a and a white area 4615b. 4613, which includes a liquid-filled cavity 4612 therearound. The spherical particles 4613 are filled with a filler 4614 such as a resin. The second electrode layer 4031 corresponds to a common electrode (opposite electrode). are electrically connected.

[0226] 7 to 9, the first substrate 4001 and the second substrate 4006 are made of glass. In addition to a glass substrate, a flexible substrate can also be used. For example, a light-transmitting plastic substrate can be used. As for plastic, FRP (Fibreglass) s-Reinforced Plastics) plate, PVF (Polyvinyl Fluoride) A film, a polyester film or an acrylic resin film can be used. Also, a sheet with a structure in which aluminum foil is sandwiched between PVF film or polyester film. can also be used.

[0227] The oxide insulating layer 4020 and the protective insulating layer 4024 function as protective films for the transistor.

[0228] The oxide insulating layer 4020 is formed as a layer for removing impurities such as hydrogen, moisture, a hydroxyl group, or hydride. The oxygen that is simultaneously reduced from the oxide semiconductor layer during the process is supplied to the oxide semiconductor layer. It also has functions.

[0229] The oxide insulating layer 4020 may be a silicon oxide layer, a silicon oxynitride layer, or the like. The insulating layer containing the conductive film may be formed by a sputtering method.

[0230] The protective insulating layer 4024 is designed to protect against contaminants such as organic matter, metals, and water vapor floating in the air. The protective insulating layer 4024 is formed by spattering. Using the tarring method, silicon nitride film, silicon nitride oxide film, aluminum oxide film, nitride film A single layer or multilayer of an aluminum film, an aluminum oxynitride film, or an aluminum nitride oxide film It may be formed in layers.

[0231] The insulating layer 4021 functioning as a planarizing insulating film is formed of a material selected from the group consisting of acrylic, polyimide, and benzosilane. Heat-resistant organic materials such as clobutene, polyamide, and epoxy can be used. In addition to the above organic materials, low-k materials, siloxane resins, and PS G (phosphorus glass), BPSG (boron phosphorus glass), etc. can be used. The insulating layer may be formed by stacking a plurality of insulating films made of these materials.

[0232] The methods for forming the oxide insulating layer 4020, the protective insulating layer 4024, and the insulating layer 4021 are not particularly limited. Depending on the material, the method can be sputtering, SOG, spin coating, dipping, or spraying. - Coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor -Knife, roll coater, curtain coater, knife coater, etc. can be used .

[0233] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film provided in the part are resistant to light in the visible light wavelength range. It shall be translucent.

[0234] A first electrode layer 4030 and a second electrode layer 4031 (pixel electrode layer) for applying a voltage to a display element In the case of a layer (also called a common electrode layer, counter electrode layer, etc.), the direction of the light to be extracted is determined by the electrode layer provided. The light transmission property or reflectivity can be selected depending on the location where the electrode layer is to be used and the pattern structure of the electrode layer.

[0235] The first electrode layer 4030 and the second electrode layer 4031 are made of an indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide (hereinafter referred to as ITO) ), indium zinc oxide, indium tin oxide with silicon oxide added, etc. A conductive material that can be used can be used.

[0236] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), It can be formed by using one or more of the metals, alloys thereof, or metal nitrides thereof. Cut.

[0237] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or a derivative thereof Conductors and the like are examples.

[0238] In addition, since transistors are easily damaged by static electricity, a protection circuit for protecting the drive circuit is required. It is preferable that the protection circuit is configured using a non-linear element.

[0239] As described above, by using the transistor described in any of Embodiments 1 to 6, various It is possible to provide semiconductor devices having various functions.

[0240] (Embodiment 8) The transistor exemplified in any one of the first to sixth embodiments is used to read information on an object. Therefore, a semiconductor device having an image sensor function for detecting a pixel can be manufactured.

[0241] FIG. 10A shows an example of a semiconductor device having an image sensor function. FIG. 10(B) is a cross-sectional view showing a part of the photosensor. .

[0242] The photodiode 602 has one electrode connected to a photodiode reset signal line 658 and the other One electrode is electrically connected to the gate of transistor 640. One of the source and drain is connected to the photosensor reference signal line 672, and the other of the source and drain is connected to the photosensor reference signal line 673. The other terminal is electrically connected to one of the source and drain terminals of the transistor 656. The transistor 656 has a gate connected to a gate signal line 659 and a source or drain connected to a photodiode. The signal line 671 is electrically connected to the sensor output signal line 671.

[0243] Note that in the circuit diagrams in this specification, a transistor including an oxide semiconductor layer is not clearly shown. To make it easier to distinguish, the symbol for a transistor using an oxide semiconductor layer is written as “OS.” In FIG. 10A, the transistor 640 and the transistor 656 are made of oxide semiconductors. It is a transistor that uses layers.

[0244] FIG. 10B shows a photodiode 602 and a transistor 640 in the photosensor. 6 is a cross-sectional view of a substrate 601 (TFT substrate) having an insulating surface, on which a sensor function is provided. A photodiode 602 and a transistor 640 are provided. A substrate 613 is provided on the board 602 and the transistor 640 using an adhesive layer 608. There are.

[0245] On the transistor 640, an insulating layer 631, a protective insulating layer 632, an interlayer insulating layer 633, and an interlayer insulating layer 634 are formed. An insulating layer 633 is provided on the photodiode 602. The electrode layer 641 formed on the interlayer insulating layer 633 and the electrode layer 642 formed on the interlayer insulating layer 634 are Between the electrode layer 642, a first semiconductor layer 606a, a second semiconductor layer 606b, and a second semiconductor layer 606c are provided in this order from the interlayer insulating layer 633 side. The second semiconductor layer 606b and the third semiconductor layer 606c are stacked.

[0246] The electrode layer 641 is electrically connected to the conductive layer 643 formed on the interlayer insulating layer 634. 642 is electrically connected to the gate electrode layer 645 via the electrode layer 641. Layer 645 is electrically connected to the gate electrode layer of transistor 640 and The node 602 is electrically connected to a transistor 640 .

[0247] Here, the first semiconductor layer 606a is a semiconductor layer having a p-type conductivity, and the second semiconductor layer 606b is a high resistance semiconductor layer (I-type semiconductor layer), and the third semiconductor layer 606c is an n-type A pin-type photodiode in which semiconductor layers having different conductivity types are stacked is shown as an example.

[0248] The first semiconductor layer 606a is a p-type semiconductor layer, and is made of amorphous silicon containing an impurity element that imparts p-type conductivity. The first semiconductor layer 606a can be formed from a group 13 silicon film. Using semiconductor material gas containing impurity elements (e.g., boron (B)), plasma CVD is used. Silane (SiH4) can be used as the semiconductor material gas. Alternatively, i2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may be used. In addition, after forming an amorphous silicon film that does not contain impurity elements, the film is formed by diffusion or ion implantation. Impurity elements may be introduced into the amorphous silicon film by using a method such as ion implantation. It is preferable to diffuse the impurity element by heating or the like after introducing the impurity element. In this case, the amorphous silicon film can be formed by LPCVD, vapor phase growth, Alternatively, sputtering or the like may be used. The thickness of the first semiconductor layer 606a is 10 nm or more and 5 nm or less. It is preferable to form it so that the thickness is 0 nm or less.

[0249] The second semiconductor layer 606b is an I-type semiconductor layer (intrinsic semiconductor layer) and is made of amorphous silicon. The second semiconductor layer 606b is formed by an amorphous film using a semiconductor material gas. A thick silicon film is formed by plasma CVD. The semiconductor material gas is silane. (SiH4) can be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, S The second semiconductor layer 606b may be formed by LPCVD. The second semiconductor layer 606b may be formed by vapor deposition, sputtering, or the like. It is preferable to form the film so that the thickness is 00 nm or more and 1000 nm or less.

[0250] The third semiconductor layer 606c is an n-type semiconductor layer and is an amorphous layer containing an impurity element that imparts n-type conductivity. The third semiconductor layer 606c is formed of a thick silicon film. It is formed by the plasma CVD method using a semiconductor material gas containing silicon (e.g., phosphorus (P)). Silane (SiH4) can be used as the semiconductor material gas. SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain elements, the film is then doped with silicon using diffusion or ion implantation. An impurity element may be introduced into the amorphous silicon film by ion implantation or the like. After the element is introduced, the impurity element may be diffused by heating or the like. The amorphous silicon film can be formed by LPCVD, vapor phase growth, or sputtering. The thickness of the third semiconductor layer 606c is 20 nm or more and 200 nm or less. It is preferable to form it so that it faces downward.

[0251] The first semiconductor layer 606a, the second semiconductor layer 606b, and the third semiconductor layer 606c are Instead of an amorphous semiconductor, it may be formed using a polycrystalline semiconductor, or a microcrystalline (semi-amorphous) semiconductor. Rufus (Semi Amorphous Semiconductor: SAS) Semiconductor It may also be formed using a conductor.

[0252] Considering the Gibbs free energy, microcrystalline semiconductors are metastable, intermediate between amorphous and single crystal. In other words, a semiconductor with a third state that is stable in terms of free energy It has a short-range order and lattice distortion. Microcrystalline silicon, a typical example of a microcrystalline semiconductor, is characterized by its Raman scattering. The spectrum shows single-crystal silicon at 520 cm -1 It is shifted to the lower wavenumber side. That is, 520 cm, which indicates single crystal silicon -1 and 480 cm, which indicates amorphous silicon - 1 The Raman spectrum of microcrystalline silicon has a peak between these two. Contains at least 1 atomic % or more of hydrogen or halogen to terminate the bonding bonds. It also contains rare gas elements such as helium, argon, krypton, and neon. By increasing the lattice distortion, the stability is increased and a good microcrystalline semiconductor film can be obtained. .

[0253] This microcrystalline semiconductor film is formed by a high-frequency plasma CVD method with a frequency of several tens to several hundreds of MHz, or Alternatively, it can be formed by a microwave plasma CVD device with a frequency of 1 GHz or more. Representative examples include SiH4, Si2H6, SiH2Cl2, SiHCl3, SiCl4, and S It can be formed by diluting silicon hydride such as iF4 with hydrogen. In addition to hydrogen, one or more of helium, argon, krypton, and neon A microcrystalline semiconductor film can be formed by diluting the silicon hydride with a rare gas element. The flow rate ratio of hydrogen to nitrogen is 5 to 200 times, preferably 50 to 150 times, More preferably, it is 100 times. Furthermore, in the gas containing silicon, CH4, C2H6 It is also possible to mix in carbide gases such as GeH4, GeF4, germanium gases such as F2, etc. stomach.

[0254] In addition, the mobility of holes generated by the photoelectric effect is smaller than that of electrons, so the pin-type Photodiodes exhibit better characteristics when the p-type semiconductor layer side is used as the light receiving surface. From the surface of the substrate 601 on which the in-type photodiode is formed to the photodiode 602 This shows an example of converting the light received by the semiconductor layer into an electrical signal. Since light from the semiconductor layer side having the pattern becomes disturbance light, the electrode layer uses a conductive film with light blocking properties. It is also possible to use the n-type semiconductor layer side as the light-receiving surface.

[0255] The insulating layer 631, the protective insulating layer 632, the interlayer insulating layer 633, and the interlayer insulating layer 634 are made of insulating materials. Depending on the material, various methods such as sputtering, SOG, spin coating, and direct coating are used. Spray coating, droplet ejection method (inkjet method, screen printing, offset printing etc.), using a doctor knife, roll coater, curtain coater, knife coater, etc. It can be formed.

[0256] The insulating layer 631 may be a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or A single layer or stacked layer of an oxide insulating layer such as an aluminum oxynitride layer can be used.

[0257] The protective insulating layer 632 may be made of an inorganic insulating material such as a silicon nitride layer or silicon nitride oxide. a single layer of a nitride insulating layer such as an aluminum nitride layer, an aluminum nitride layer, or an aluminum nitride oxide layer; or Lamination can be used. High density plasma CVD using microwaves (2.45 GHz) is also possible. is preferable because it can form a dense, high-quality insulating layer with high dielectric strength.

[0258] The interlayer insulating layers 633 and 634 function as planarizing insulating films to reduce surface irregularities. The interlayer insulating layers 633 and 634 are preferably made of, for example, polyimide or acrylic. Heat-resistant organic insulating materials such as benzocyclobutene, polyamide, and epoxy are used. In addition to the above organic insulating materials, low-k materials, white Single layer or laminate of xanthane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. A layer can be used.

[0259] By detecting the light incident on the photodiode 602, information on the detected object is read. It is possible to read the information of the detected object using a light source such as a backlight. It is possible.

[0260] The transistor 640 may be any of the transistors described in any of the first to sixth embodiments. Impurities such as hydrogen, water, hydroxyl groups, or hydrides (also called hydrogen compounds) can be removed by oxidizing. The transistor which includes the highly purified oxide layer intentionally removed from the oxide semiconductor layer is The fluctuation of the electrical characteristics of the transistor is suppressed, and the transistor is electrically stable. Therefore, a semiconductor device with a high resistance can be provided.

[0261] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0262] (Embodiment 9) The liquid crystal display device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television (also called digital receivers), computer monitors, digital cameras, digital video cameras cameras such as digital cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices) (c), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the liquid crystal display device described in the above embodiment include: I will explain.

[0263] FIG. 11A shows an electronic book (also called an e-book), which includes a housing 9630, a display portion 963 1, can have an operation key 9632, a solar cell 9633, and a charge / discharge control circuit 9634 The electronic book shown in Figure 11(A) contains various information (still images, videos, text images, etc.). Function to display the calendar, date, time, etc. on the display, The ability to manipulate or edit the information stored, and to control processing using various software (programs) In FIG. 11A, the charge and discharge control circuit 9634 As an example, the battery 9635 and the DC-DC converter (hereafter referred to as the converter) 963 6. The semiconductor device shown in any one of the first to eighth embodiments By applying the above to the display portion 9631, a highly reliable e-book reader can be provided.

[0264] By using the structure shown in FIG. 11A, the display portion 9631 can be a semi-transmissive or reflective type. When using a liquid crystal display device, it is expected that it will be used in relatively bright conditions, and the solar cell 963 3 and charging the battery 9635 can be performed efficiently, which is preferable. The solar cell 9633 can be appropriately provided in a free space (on the front or back) of the housing 9630. This allows for efficient charging of the Battery 9635. It is preferable to use a lithium-ion battery as the battery 9635, as this will reduce the size. This has the advantage of being able to

[0265] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 11(A) will be described with reference to FIG. 11(B). A block diagram is shown in Figure 11(B) and will be explained. 5, converter 9636, converter 9637, switches SW1 to SW3, display unit 96 31 shows the battery 9635, converter 9636, converter 963 7. Switches SW1 to SW3 correspond to the charge / discharge control circuit 9634.

[0266] First, an example of operation when power is generated by the solar cell 9633 using external light will be described. The power generated by the solar cell 9633 is used to generate the voltage needed to charge the battery 9635. The voltage is increased or decreased by a converter 9636. When power is being used from the solar cell 9633, switch SW1 is turned on and the converter 9 637 increases or decreases the voltage to the voltage required for the display unit 9631. When not displaying on the 9631, turn SW1 off, turn SW2 on, and turn off the battery. It is sufficient to configure it to charge the 9635.

[0267] Next, an example of operation when external light does not generate electricity by the solar cell 9633 will be described. The power stored in Battery 9635 is converted by turning on switch SW3. The voltage is increased or decreased by the power supply 9637. Power will be drawn from Lee 9635.

[0268] Although the solar cell 9633 is shown as an example of a charging means, it may be possible to charge the battery by other means. It may be configured to charge the Terry 9635. It may also be configured to charge the Terry 9635 in combination with other charging means. This may also be configured as follows.

[0269] FIG. 12A shows a notebook personal computer, which includes a main body 3001 and a housing 300 2, a display unit 3003, a keyboard 3004, etc. By applying the semiconductor device shown in any one of the above to 8 to the display portion 3003, high reliability can be achieved. The computer may be a small notebook-sized personal computer.

[0270] FIG. 12B shows a personal digital assistant (PDA), which has a main body 3021 including a display unit 3023 and a An external interface 3025 and operation buttons 3024 are provided. The stylus 3022 is an accessory of the semiconductor device shown in any one of the first to eighth embodiments. By applying the body device to the display unit 3023, a more reliable personal digital assistant (PDA) can be obtained. ) can be used.

[0271] FIG. 12C shows an example of an electronic book. For example, an electronic book 2700 is housed in a housing 27 It consists of two housings, housing 2701 and housing 2703. 3 is integrated with a shaft portion 2711, and performs opening and closing operations around the shaft portion 2711. With this configuration, it is possible to operate like a paper book.

[0272] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 12C), and An image can be displayed on the display portion (the display portion 2707 in FIG. 12C). The semiconductor device shown in any one of 1 to 8 can be applied to the display portion 2705 and the display portion 2707. This makes it possible to provide a highly reliable e-book 2700.

[0273] FIG. 12C shows an example in which an operation unit and the like are provided in the housing 2701. For example, The housing 2701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The surface may be provided with a keyboard, a pointing device, etc. On the back and sides, there are external connection terminals (earphone terminal, USB terminal, etc.), storage media insertion port, etc. Furthermore, the electronic book 2700 may have a function as an electronic dictionary. A similar configuration may also be used.

[0274] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0275] FIG. 12(D) shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 contains a display panel 2802, a speaker 2803, a microphone, and 2804, pointing device 2806, camera lens 2807, external connection terminal The housing 2800 also includes a solar panel for charging the portable information terminal. It is equipped with a battery cell 2810, an external memory slot 2811, etc. The antenna is also attached to the case. The semiconductor device shown in any one of the first to eighth embodiments is built in the body 2801. By applying this to the display panel 2802, a highly reliable mobile phone can be achieved.

[0276] The display panel 2802 is equipped with a touch panel, and the image displayed in FIG. The multiple operation keys 2805 are indicated by dotted lines. It also has a boost circuit to boost the voltage required for each circuit.

[0277] The display direction of the display panel 2802 changes appropriately depending on the usage mode. The camera lens 2807 is located on the same surface as the camera lens 2802, so video calls are possible. The speaker 2803 and microphone 2804 are not limited to voice calls, but also to video calls, Recording and playback are possible. Furthermore, the housing 2800 and the housing 2801 can be slid apart. As shown in 12(D), it can be folded from the unfolded state to the overlapped state, making it suitable for carrying. This makes it possible to miniaturize the device.

[0278] The external connection terminal 2808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 2811, it is possible to store and transfer a larger amount of data. do.

[0279] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0280] FIG. 12(E) shows a digital video camera, which includes a main body 3051, a display unit (A) 3057, Eyepiece 3053, operation switch 3054, display unit (B) 3055, battery 3056, etc. The semiconductor device according to any one of the first to eighth embodiments is configured as a display device. By applying it to (A) 3057 and display (B) 3055, highly reliable digital video The camera can be a video camera.

[0281] FIG. 12(F) shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this case, the housing 9601 is supported by a stand 9605. The semiconductor device according to any one of the first to eighth embodiments is configured as a display unit 960. 3, the television device 9600 can be made highly reliable.

[0282] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by a remote control operator. A display unit for displaying the output information may be provided.

[0283] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0284] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is. [Example]

[0285] In this example, a transistor having a top gate structure shown in FIG. 4(B) of the fourth embodiment is fabricated. At the same time as the transistor was fabricated, a TEG (Test Element) for sheet resistance evaluation was also fabricated. The sheet resistance of the oxide semiconductor layer was evaluated by introducing oxygen. First, a method for manufacturing a transistor and a TEG will be described with reference to FIGS. 13A and 13B. and explain.

[0286] As shown in FIG. 13A, a transistor 540 is formed on a substrate 500 having an insulating surface. An underlayer 536, an oxide semiconductor layer 503, a source electrode layer 505a, and a drain electrode layer 505b , a gate insulating layer 567, a gate electrode layer 501, a protective insulating layer 569, a wiring layer 565a, and It is configured by the wiring layer 565b.

[0287] The TEG 550 includes a substrate 500 having an insulating surface, an underlayer 536, an oxide semiconductor The electrode layer 503, the source electrode layer 505a, and the drain electrode layer 505b are formed at the same time. 13A. The TEG 550 is a cross section taken along dashed line AA1-AA2 shown in FIG. 13(B).

[0288] 13B is a plan view of the TEG 550 shown in FIG. 3, an electrode layer 505c is formed in a comb-like shape, and a potential is applied to the electrode layer 505c. The sheet resistance of the oxide semiconductor layer 503 can be measured. In the unfilled area, L / W=100 / 50000 μm.

[0289] Next, a method for manufacturing the transistor 540 and the TEG 550 shown in FIG. 13 will be described. .

[0290] First, silicon oxide is deposited on the substrate 500 as an underlayer 536 by sputtering. The film (thickness: 300 nm) was formed at 100°C.

[0291] Next, an In-Ga-Zn-O based metal oxide target (In2O3:G a2O3:ZnO=1:1:1) at a pressure of 0.4 Pa and a direct current (DC) power supply of 0.5 kJ W, argon and oxygen (argon:oxygen = 30 sccm: 15 sccm) atmosphere, 20 Deposition was performed at 0° C. to form an oxide semiconductor layer with a thickness of 30 nm.

[0292] Next, the oxide semiconductor layer was selectively etched to form an island-shaped oxide semiconductor layer 503. Then, a conductive film serving as a source electrode layer and a drain electrode layer was formed on the oxide semiconductor layer 503. As a conductive film, a tungsten film (film thickness 50 nm) was deposited at 200°C using the sputtering method. Here, the tungsten film is selectively etched to form the source electrode layer 505a and the drain electrode layer 505b. A rain electrode layer 505b and an electrode layer 505c were formed.

[0293] Next, the source electrode layer 505a, the drain electrode layer 505b, the electrode layer 505c, and the partially exposed A gate insulating layer 567 was formed over the oxide semiconductor layer 503 and the base layer 536. The insulating layer 567 is a silicon oxynitride film (thickness: 30 nm) formed by plasma CVD. In this example, the insulating layer shown in FIG. No protective insulating layer is formed.

[0294] Next, oxygen is introduced into the oxide semiconductor layer 503 through the gate insulating layer 567 (oxygen introduction). The oxygen was introduced by ion implantation, and 16O2 (16 O + The treatment was carried out at an acceleration voltage of 25 keV. With element introduction (dose 4.5 × 10 14 ions / cm 2 ), and oxygen introduction (dor Amount 4.5 x 10 15 ions / cm 2 ) were tested under three conditions and three samples were prepared.

[0295] Next, a first heat treatment is performed in a nitrogen atmosphere at 450° C. for 1 hour, and then the gate insulating layer 567 is formed. A tantalum nitride film (thickness 30 nm) was deposited on the gate electrode layer using a sputtering system. ) and a tungsten film (thickness 370 nm) are laminated and selectively etched to form a gate. A top electrode layer 501 was formed.

[0296] Next, a protective insulating layer 569 and a gate insulating layer 567 are formed in contact with the gate electrode layer 501 and the gate insulating layer 567. Then, a silicon oxide film (thickness: 300 nm) was formed at 200°C using the sputtering method. Here, the silicon oxide film that is the protective insulating layer 569 and the gate insulating layer 567 are selectively The silicon dioxide was then etched to form an opening in the contact region.

[0297] Next, a titanium film (50 nm thick) and an aluminum film were deposited as connection wiring using the sputtering method. Three layers are stacked in order: a 100 nm thick aluminum film, a 5 nm thick titanium film, and a 5 nm thick titanium film. Etching was performed to form a wiring layer 565a and a wiring layer 565b.

[0298] Through the above steps, the transistor 540 and the TEG 550 are formed.

[0299] The sheet resistance of the oxide semiconductor layer 503 was measured using the TEG 550 shown in FIG. The results of the sheet resistance measurements are shown in Figure 14.

[0300] In the graph shown in FIG. 14, the vertical axis indicates the measurement results of the sheet resistance, and the horizontal axis indicates the oxygen introduction conditions. The plot 571 on the horizontal axis indicates the case without oxygen introduction, and the plot 572 indicates the case with oxygen introduction. Included (dose 4.5 x 10 14 ions / cm 2 conditions), plot 573 shows the oxygen conductance Included (dose 4.5 x 10 15 ions / cm 2 conditions) are shown respectively. Each plot shows data for 13 TEGs for sheet resistance evaluation formed on a glass substrate. is doing.

[0301] From FIG. 14, in the case of plot 571 without oxygen introduction, the sheet resistance is 1.0×10 7 ~ 1.7×10 8 Ω / cm 2 With oxygen introduction in plot 572 (dose 4.5 × 1 0 14 ions / cm 2 Under these conditions, the sheet resistance is 1.0×10 8 ~1.0×10 9 Ω / cm 2With oxygen introduction in plot 573 (dose 4.5 × 10 15 ion s / cm 2 Under these conditions, the sheet resistance is 1.0×10 8 ~1.0×10 10 Ω / cm 2 It is as follows.

[0302] As described above, the gate insulating layer 567, which is an oxide insulating layer, is formed on the oxide semiconductor layer 503. The sheet resistance of the oxide semiconductor layer 503 is increased by introducing oxygen through the oxygen-containing gas. In addition, the sheet resistance of the oxide semiconductor layer 503 can be controlled by adjusting the concentration of oxygen introduced. It was confirmed that this is possible.

[0303] Based on the above results, an oxide insulating layer (gate insulating layer) is formed in contact with the oxide semiconductor layer, and an oxide By introducing oxygen through the oxide insulating layer (oxygen introduction) and performing heat treatment, Oxygen, which is one of the main components of the oxide insulating layer, is used to form the oxide semiconductor layer. Therefore, the oxide semiconductor layer is further purified and electrically becomes an I-type (true) oxide semiconductor layer. The oxide semiconductor layer is becoming more conductive, and the sheet resistance of the oxide semiconductor layer is increasing.

[0304] Therefore, a semiconductor device using an oxide semiconductor and having stable electrical characteristics and a highly reliable A semiconductor device can be provided.

[0305] This embodiment can be implemented by being appropriately combined with the configurations described in other embodiment modes. do. [Explanation of symbols]

[0306] 400 boards 401 Gate electrode layer 402 Gate insulating layer 403 Oxide semiconductor layer 404a Metal oxide region 405a Source electrode layer 405b Drain electrode layer 407 Oxide insulating layer 409 Protective Insulation Layer 410 Transistor 420 transistors 421 Oxygen 422 Oxide semiconductor layer 426 Oxide insulating layer 427 Oxide insulating layer 430 transistors 436 Insulating Layer 437 Oxide insulating layer 438 Protective Insulation Layer 440 transistors 441 Oxide semiconductor layer 450 transistors 451 Oxide semiconductor layer 455a aperture 455b aperture 456a Conductive layer 456b Conductive layer 457 Protective Insulation Layer 465a Wiring layer 465b wiring layer 467 Oxide insulating layer 468 Protective Insulation Layer 469 Protective Insulation Layer 500 boards 501 gate electrode layer 503 Oxide semiconductor layer 505a Source electrode layer 505b Drain electrode layer 505c electrode layer 536 Base layer 540 transistor 550 TEG 565a wiring layer 565b wiring layer 567 Gate insulating layer 569 Protective Insulation Layer 571 plots 572 plots 573 plots 601 Substrate 602 Photodiode 606a Semiconductor layer 606b Semiconductor layer 606c Semiconductor layer 608 Adhesive layer 613 Substrate 631 Insulating Layer 632 Protective insulation layer 633 Interlayer insulation layer 634 Interlayer insulation layer 640 transistors 641 Electrode layer 642 Electrode layer 643 Conductive Layer 645 gate electrode layer 656 Transistor 658 Photodiode reset signal line 659 Gate signal line 671 Photo sensor output signal line 672 Photo sensor reference signal line 2700 e-books 2701 Housing 2703 Housing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation Key 2725 Speaker 2800 chassis 2801 Case 2802 Display panel 2803 Speaker 2804 Microphone 2805 Operation Key 2806 Pointing Device 2807 Camera lenses 2808 External connection terminal 2810 solar cell 2811 External Memory Slot 3001 main unit 3002 Case 3003 Display section 3004 Keyboard 3021 Main Unit 3022 stylus 3023 Display section 3024 Operation button 3025 External Interface 3051 Main Unit 3053 Eyepiece 3054 Operation switch 3055 Display section (B) 3056 Battery 3057 Display section (A) 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 transistor 4011 transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4018a FPC 4019 Anisotropic conductive film 4020 oxide insulating layer 4021 Insulation layer 4023 Insulation layer 4024 Protective insulation layer 4030 Electrode layer 4031 Electrode layer 4032 Insulation layer 4033 Insulation layer 4510 Bulkhead 4511 Electroluminescent layer 4513 Light-emitting element 4514 Filling material 4612 Cavity 4613 Spherical particles 4614 Filling material 4615a Black area 4615b White area 9600 Television Equipment 9601 Housing 9603 Display section 9605 Stand 9630 chassis 9631 Display section 9632 Operation Key 9633 Solar Cells 9634 Charge / Discharge Control Circuit 9635 Battery 9636 Converter 9637 Converter

Claims

[Claim 1] forming an oxide semiconductor layer; forming a first insulating layer that is an oxide insulating layer in contact with the oxide semiconductor layer; introducing oxygen into the oxide semiconductor layer through the first insulating layer; heat treatment is performed on the first insulating layer and the oxide semiconductor layer; forming a second insulating layer over the first insulating layer;

Images