Display device and manufacturing method thereof

Abstract

The display device includes a first substrate having a display region and a non-display region located around the display region; a second substrate disposed on the first substrate; and a sealing member disposed in a sealing region of the non-display region and bonding the first substrate to the second substrate, the first substrate including a first base portion, a first conductive layer including a first signal wiring and a lower light-shielding layer on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer overlapping with the lower light-shielding layer on the buffer layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including a second signal wiring and a third signal wiring electrically connected to the first signal wiring on the gate insulating layer, and a gate electrode overlapping with the semiconductor layer, the first signal wiring being disposed between the second signal wiring and the third signal wiring on a plane, and the first signal wiring being disposed overlapping with the sealing member.

Description

[Technical field]

[0001] The present invention relates to a display device and a manufacturing method thereof. [Background technology]

[0002] Display devices are becoming increasingly important with the development of multimedia. In response to this, various display devices such as liquid crystal display devices (LCDs) and organic light emitting diode display devices (OLEDs) have been developed.

[0003] Among display devices, a self-emitting display device includes a self-emitting element, e.g., an organic light-emitting element. The self-emitting element may include two electrodes facing each other and an emission layer interposed therebetween. When the self-emitting element is an organic light-emitting element, electrons and holes provided from the two electrodes recombine in the emission layer to generate excitons, and the generated excitons may change from an excited state to a ground state to emit light.

[0004] Self-luminous display devices do not require a light source such as a backlight unit, so they can be constructed in a thin, lightweight manner with low power consumption. They also have high-quality characteristics such as a wide viewing angle, high brightness and contrast, and fast response speed, and are attracting attention as the next-generation display devices. Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide a display device having improved moisture permeability through a sealing region from the outside.

[0006] Another object of the present invention is to provide a method for manufacturing a display device that is improved in terms of moisture permeation through a sealing region from the outside.

[0007] The object of the present invention is not limited to the technical objects mentioned above, and other technical objects not mentioned will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0008] A display device according to one embodiment for solving the above problem includes a first substrate having a display region and a non-display region located around the display region; a second substrate disposed on the first substrate; and a sealing member disposed in a sealing region of the non-display region and bonding the first substrate and the second substrate, the first substrate including a first base portion, a first conductive layer including a first signal wiring and a lower light-shielding layer on the first base portion, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer overlapping with the lower light-shielding layer, a gate insulating layer on the semiconductor layer, and a second conductive layer including a second signal wiring and a third signal wiring electrically connected to the first signal wiring on the gate insulating layer, and a gate electrode overlapping with the semiconductor layer, the first signal wiring being disposed between the second signal wiring and the third signal wiring on a plane, and the first signal wiring being disposed overlapping with the sealing member.

[0009] According to an embodiment of the present invention, a method for manufacturing a display device includes the steps of: preparing a first substrate having a display region and a non-display region located around the display region; and bonding a second substrate to the first substrate by a sealing member disposed in a sealing region of the non-display region, the step of preparing the first substrate includes the steps of forming a first conductive layer including a first signal wiring and a lower light-shielding layer on a first base portion; forming a buffer layer on the first conductive layer; forming a semiconductor layer overlapping the lower light-shielding layer on the buffer layer; forming a gate insulating layer on the semiconductor layer; and bonding the second substrate to the first substrate by a sealing member disposed in a sealing region of the non-display region. the step of forming a second conductive layer on a semiconductor layer, the second conductive layer including a second signal wiring and a third signal wiring electrically connected to the first signal wiring, a first pad connected to an outer end of the second signal wiring, and a gate electrode overlapping the semiconductor layer, forming a protective layer on the second conductive layer, and forming a via layer on the protective layer, wherein the first signal wiring is disposed between the second signal wiring and the third signal wiring on a plane, and the first signal wiring is disposed overlapping the sealing member, and in the step of forming the via layer, a thickness of the via layer on the sealing region is smaller than a thickness of the via layer on a region excluding the sealing region.

[0010] Specific details of other embodiments are included in the detailed description and drawings. Effect of the Invention

[0011] According to an embodiment of the present invention, moisture permeation from the outside through the sealing area can be improved.

[0012] The effects of the embodiments are not limited to the above-mentioned examples, and more diverse effects are included in the present specification. [Brief description of the drawings]

[0013] [Figure 1] 1 is a cross-sectional view illustrating a schematic layered structure of a display device according to an embodiment. [Diagram 2] 1 is a plan view of a display device according to an embodiment; [Diagram 3] 1 is a pixel circuit diagram of a display device according to an embodiment. [Figure 4] 3 is an enlarged plan view of a portion Q1 in FIG. 2, and more specifically, a schematic plan view of a display substrate included in the display device in FIG. 2. [Diagram 5] 3 is an enlarged plan view of a portion Q1 in FIG. 2, and more specifically, a schematic plan view of a color conversion substrate included in the display device in FIG. [Figure 6] FIG. 5 is a plan view showing a modified example of FIG. [Figure 7] FIG. 6 is a plan view showing a modification of FIG. 5. [Figure 8] FIG. 3 is an enlarged plan view of a portion Q3 in FIG. [Figure 9] 6 is a cross-sectional view of the display device according to the embodiment taken along line X1-X1' in FIG. 5. [Figure 10] FIG. 10 is an enlarged cross-sectional view of a portion Q4 in FIG. [Figure 11] FIG. 10 is a cross-sectional view showing a modified example of the structure in FIG. [Figure 12] 9 is a cross-sectional view of the display device according to the embodiment taken along line X3-X3' in FIG. 8. [Figure 13] 10 is a plan view showing a schematic arrangement of third color filters in a color conversion substrate of a display device according to one embodiment. FIG. [Figure 14] 1 is a plan view showing a schematic arrangement of first color filters in a color conversion substrate of a display device according to an embodiment. [Figure 15] 10 is a plan view showing a schematic arrangement of second color filters in a color conversion substrate of a display device according to an embodiment. FIG. [Figure 16] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 17] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 18] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 19] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 20] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 21] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 22] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Diagram 23] 1A to 1C are cross-sectional views illustrating process steps of a method for manufacturing a display device according to an embodiment. [Figure 24] FIG. 11 is a cross-sectional view of a display device according to another embodiment. [Diagram 25] 13 is a plan view showing a non-display area and a display area of ​​a display device according to still another embodiment. FIG. [Figure 26] 26 is a cross-sectional view of the display device according to the embodiment taken along line X3-X3' in FIG. 25. [Figure 27] 13 is a plan view showing a non-display area and a display area of ​​a display device according to still another embodiment. FIG. [Figure 28] 28 is a cross-sectional view of the display device according to the embodiment taken along line X3-X3' in FIG. 27. [Figure 29] FIG. 11 is a cross-sectional view of a display device according to yet another embodiment. [Diagram 30] FIG. 11 is a cross-sectional view of a display device according to yet another embodiment. [Diagram 31] FIG. 11 is a cross-sectional view of a display device according to yet another embodiment. [Diagram 32] FIG. 11 is a cross-sectional view of a display device according to yet another embodiment. [Diagram 33] FIG. 11 is a cross-sectional view of a display device according to yet another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The advantages and features of the present invention, as well as the methods for achieving them, will become clear from the detailed description of the embodiments described below in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be realized in various different forms. The embodiments are provided merely to complete the disclosure of the present invention and to fully inform those skilled in the art of the invention of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0015] When elements or layers are referred to as "on" other elements or layers, this includes all cases where they are directly on or in between other layers or elements. Conversely, when an element is referred to as "directly on," this includes cases where there are no intervening elements or layers. Like reference numbers refer to like components throughout the specification.

[0016] Spatially relative terms such as "below," "beneath," "lower," "above," "upper," and the like, are used to easily describe the relationship of one element or component to another element or component as depicted in the drawings. Spatially relative terms should be understood to include different orientations of elements when used in addition to the orientation depicted in the drawings. For example, if an element depicted in the drawings is turned over, an element described as "below" or "beneath" another element may be located "above" the other element. Thus, the exemplary term "below" can include both an orientation of below and above.

[0017] Although the terms "first", "second", "third", "fourth" and the like are used to describe various components, it is of course not intended that these components be limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it is of course possible for the first component referred to below to be any one of the second component, the third component, and the fourth component within the technical spirit of the present invention.

[0018] The embodiments described herein will be described with reference to plan views and cross-sectional views which are ideal schematic diagrams of the present invention. Therefore, the shapes of the illustrated diagrams may be modified depending on manufacturing techniques and / or tolerances. Therefore, the embodiments of the present invention are not limited to the specific shapes shown in the drawings, but also include changes in shapes that are generated according to the manufacturing process. Therefore, the regions illustrated in the drawings have schematic attributes, and the shapes of the regions illustrated in the drawings are intended to illustrate the specific shapes of the regions of the elements, and are not intended to limit the scope of the invention.

[0019] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0020] FIG. 1 is a cross-sectional view for explaining a schematic layered structure of a display device according to an embodiment.

[0021] 1, the display device 1 can be applied to various electronic devices such as small and medium-sized electronic devices such as tablet PCs, smartphones, automobile navigation units, cameras, center information displays (CIDs) provided in automobiles, wristwatch-type electronic devices, PDAs (Personal Digital Assistants), PMPs (Portable Multimedia Players), and game consoles, as well as medium and large-sized electronic devices such as televisions, external billboards, monitors, personal computers, and notebook computers. This is merely presented as an embodiment, and the present invention can of course be applied to other electronic devices without departing from the concept of the present invention.

[0022] The display device 1 may include a display area DA that displays an image, and a non-display area NDA that does not display an image. In some embodiments, the non-display area NDA may be located on the periphery of the display area DA and may surround the display area DA. The image displayed in the display area DA can be viewed by a user from the third direction Z, which is the direction indicated by the arrow in the drawing.

[0023] Describing the general layered structure of the display device 1, in some embodiments, as shown in FIG. 1, the display device 1 includes a display substrate 10 and a color conversion substrate 30 facing the display substrate 10, and may further include a sealing member 50 that bonds the display substrate 10 and the color conversion substrate 30, and a filler 70 embedded between the display substrate 10 and the color conversion substrate 30.

[0024] The display substrate 10 may include elements and circuits for displaying an image, for example, pixel circuits such as switching elements, a pixel defining film for defining a light-emitting region and a non-light-emitting region in the display area DA, and a self-light-emitting element. In an exemplary embodiment, the self-light-emitting element may include at least one of an organic light-emitting diode, a quantum dot light-emitting diode, an inorganic-based micro light-emitting diode (e.g., micro LED), and a nano-sized inorganic-based light-emitting diode (e.g., nano LED). Hereinafter, for convenience of explanation, a case where the self-light-emitting element is an organic light-emitting element will be described as an example.

[0025] The color conversion substrate 30 may be located on the display substrate 10 and face the display substrate 10. In some embodiments, the color conversion substrate 30 may include a color conversion pattern that converts the color of incident light. In some embodiments, the color conversion substrate 30 may include at least one of a color filter and a wavelength conversion pattern as the color conversion pattern. In some embodiments, the color conversion substrate 30 may include both the color filter and the wavelength conversion pattern.

[0026] In the non-display area NDA, a sealing member 50 may be located between the display substrate 10 and the color conversion substrate 30. The sealing member 50 may be disposed along edges of the display substrate 10 and the color conversion substrate 30 in the non-display area NDA and may surround the display area DA on a plane. The display substrate 10 and the color conversion substrate 30 may be bonded to each other via the sealing member 50.

[0027] In some embodiments, the sealing member 50 is made of an organic material. For example, the sealing member 50 may be made of, but is not limited to, an epoxy-based resin. In other embodiments, the sealing member 50 may be applied in the form of a frit including glass.

[0028] A filler 70 may be positioned in the space between the display substrate 10 and the color conversion substrate 30, the space being surrounded by the sealing member 50. The filler 70 may fill the space between the display substrate 10 and the color conversion substrate 30.

[0029] In some embodiments, the filler 70 is made of a material that can transmit light. In some embodiments, the filler 70 is made of an organic material. Exemplary filler materials 70 may include a silicon-based organic material, an epoxy-based organic material, or a mixture of a silicon-based organic material and an epoxy-based organic material, etc.

[0030] In some embodiments, the filler 70 is made of a material having an extinction coefficient of substantially 0. The refractive index and the extinction coefficient are correlated, and as the refractive index decreases, the extinction coefficient also decreases. When the refractive index is 1.7 or less, the extinction coefficient may substantially converge to 0. In some embodiments, the filler 70 is made of a material having a refractive index of 1.7 or less, thereby preventing or minimizing absorption of light provided from the self-luminous element through the filler 70. In some embodiments, the filler 70 is made of an organic material having a refractive index of 1.4 to 1.6.

[0031] Although FIG. 1 illustrates the display device 1 including a display substrate 10, a color-conversion substrate 30, a sealing member 50, and a filler 70, in some embodiments, the display device 1 can omit the sealing member 50 and the filler 70, and arrange the components of the color-conversion substrate 30, excluding the second base portion 310, on the display substrate 10.

[0032] FIG. 2 is a plan view of a display device according to an embodiment. FIG. 3 is a pixel circuit diagram of a display device according to an embodiment. FIG. 4 is an enlarged plan view of a Q1 portion of FIG. 2, more specifically, a schematic plan view of a display substrate included in the display device of FIG. 2. FIG. 5 is an enlarged plan view of a Q1 portion of FIG. 2, more specifically, a schematic plan view of a color conversion substrate included in the display device of FIG. 2. FIG. 6 is a plan view showing a modified example of FIG. 4. FIG. 7 is a plan view showing a modified example of FIG. 5. FIG. 8 is an enlarged plan view of a Q3 portion of FIG. 2.

[0033] 2 to 8 in addition to FIG. 1, in some embodiments, the display device 1 has a rectangular shape on a plane as shown in FIG. 2. The display device 1 may include two sides, a first side L1 and a third side L3, extending in a first direction X, and two sides, a second side L2 and a fourth side L4, extending in a second direction Y intersecting the first direction X. A corner where the sides of the display device 1 meet may be a right angle, but is not limited to this. In some embodiments, the length of the first side L1 and the third side L3 and the length of the second side L2 and the fourth side L4 may be different from each other. For example, the first side L1 and the third side L3 may be relatively longer than the second side L2 and the fourth side L4. The planar shape of the display device 1 is not limited to the one illustrated, and may be a circle or other different shapes.

[0034] In some embodiments, the display device 1 may further include a flexible circuit board FPC and a driving chip IC.

[0035] The display area DA may include a plurality of pixels. The pixels may include a plurality of sub-pixels (SPXn in FIG. 3). The sub-pixels SPXn may include a first sub-pixel, a second sub-pixel, and a third sub-pixel, and each of the sub-pixels SPXn may be formed corresponding to a plurality of light-emitting regions LA1, LA2, and LA3 of the display substrate 10, which will be described later.

[0036] As shown in FIG. 4, in the display area DA, the display substrate 10 may be defined with a plurality of light-emitting areas LA1, LA2, LA3 and a non-light-emitting area NLA.

[0037] In some embodiments, a first light-emitting area LA1, a second light-emitting area LA2, and a third light-emitting area LA3 may be defined in the display area DA of the display substrate 10. The first light-emitting area LA1, the second light-emitting area LA2, and the third light-emitting area LA3 may be areas where light generated by the light-emitting elements of the display substrate 10 is emitted to the outside of the display substrate 10, and the non-light-emitting area NLA may be an area where light is not emitted to the outside of the display substrate 10. In some embodiments, the non-light-emitting area NLA may surround each of the first light-emitting area LA1, the second light-emitting area LA2, and the third light-emitting area LA3 within the display area DA.

[0038] In some embodiments, the light emitted from the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 to the outside may be a third color light. In some embodiments, the third color light may be blue light and may have a peak wavelength in the range of about 440 nm to about 480 nm. Here, the peak wavelength refers to the wavelength at which the light intensity is maximum.

[0039] In some embodiments, the first light-emitting area LA1, the second light-emitting area LA2, and the third light-emitting area LA3 form a group, and a plurality of such groups may be defined in the display area DA.

[0040] As shown in FIG. 4, the first light-emitting region LA1 and the third light-emitting region LA3 are adjacent to each other along the first direction X, and the second light-emitting region LA2 may be located on one side of the first light-emitting region LA1 and the third light-emitting region LA3 along the second direction Y. However, the present invention is not limited thereto, and the arrangement of the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 may be variously changed. As shown in FIG. 6 as an example, the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 may be sequentially located along the first direction X. In some embodiments, the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 in the display area DA may be repeatedly arranged in one group along the first direction X and the second direction Y.

[0041] In the following, a case where the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 are arranged as shown in FIG. 4 will be described as an example.

[0042] 5, a plurality of light-transmitting regions TA1, TA2, and TA3 and a light-shielding region BA may be defined in the color conversion substrate 30 in the display region DA. The light-transmitting regions TA1, TA2, and TA3 may be regions through which light emitted from the display substrate 10 passes through the color conversion substrate 30 and is provided to the outside of the display device 1. The light-shielding region BA may be a region through which the light emitted from the display substrate 10 does not pass.

[0043] In some embodiments, the color conversion substrate 30 may be defined with a first light-transmitting region TA1, a second light-transmitting region TA2, and a third light-transmitting region TA3.

[0044] The first light-transmitting region TA1 may correspond to or overlap with the first light-emitting region LA1. Similarly, the second light-transmitting region TA2 may correspond to or overlap with the second light-emitting region LA2, and the third light-transmitting region TA3 may correspond to or overlap with the third light-emitting region LA3.

[0045] As shown in FIG. 3, the first light-emitting region LA1 and the third light-emitting region LA3 are adjacent to each other along the first direction X, and the second light-emitting region LA2 is located on one side of the first light-emitting region LA1 and the third light-transmitting region LA3 along the second direction Y. As shown in FIG. 5, the first light-transmitting region TA1 and the third light-transmitting region TA3 may be adjacent to each other along the first direction X, and the second light-transmitting region TA2 may be located on one side of the first light-transmitting region TA1 and the third light-transmitting region TA3 along the second direction Y.

[0046] In some embodiments, when the first light-emitting region LA1, the second light-emitting region LA2, and the third light-emitting region LA3 are sequentially positioned along the first direction X as shown in FIG. 6, the first light-transmitting region TA1, the second light-transmitting region TA2, and the third light-transmitting region TA3 may also be sequentially positioned along the first direction X as shown in FIG. 7.

[0047] In some embodiments, the planar shape of the first light-transmitting region TA1, the second light-transmitting region TA2, and the third light-transmitting region TA3 may be a rectangle. For example, the rectangle may be a rectangle or a square. However, the planar shape of the first light-transmitting region TA1, the second light-transmitting region TA2, and the third light-transmitting region TA3 may be a circle, an ellipse, or other polygonal shape.

[0048] In some embodiments, the third color light provided from the display substrate 10 may be transmitted through the first light-transmitting region TA1, the second light-transmitting region TA2, and the third light-transmitting region TA3 to be provided to the outside of the display device 1. When the light emitted from the first light-transmitting region TA1 to the outside of the display device 1 is called the first emitted light, the light emitted from the second light-transmitting region TA2 to the outside of the display device 1 is called the second emitted light, and the light emitted from the third light-transmitting region TA3 to the outside of the display device 1 is called the third emitted light, the first emitted light may be light of a first color, the second emitted light may be light of a second color different from the first color, and the third emitted light may be light of the third color. In some embodiments, the third color light may be blue light having a wavelength range of 380 nm to 500 nm and a peak wavelength range of 440 nm to 480 nm, the first color light may be red light having a wavelength range of 600 nm to 780 nm and a peak wavelength range of 610 nm to 650 nm, and the second color light may be green light having a wavelength range of 500 nm to 600 nm and a peak wavelength range of 510 nm to 550 nm.

[0049] In the display area DA, a light-shielding area BA may be located around the first light-transmitting area TA1, the second light-transmitting area TA2, and the third light-transmitting area TA3 of the color conversion substrate 30. In some embodiments, the light-shielding area BA may surround the first light-transmitting area TA1, the second light-transmitting area TA2, and the third light-transmitting area TA3. The light-shielding area BA may also be located in the non-display area NDA of the display device 1.

[0050] 5, a plurality of light-transmitting regions TA1, TA2, TA3 and a light-shielding region BA may be defined in the display region DA of the color conversion substrate 30. The light-transmitting regions TA1, TA2, TA3 may be regions through which the light emitted from the display substrate 10 passes through the color conversion substrate 30 and is provided to the outside of the display device 1. The light-shielding region BA may be a region through which the light emitted from the display substrate 10 does not pass.

[0051] 3, the non-display area NDA of the display device 1 may include a sealing area SA. A sealing member 50 may be disposed in the sealing area SA, and a dam member DM may also be disposed in the non-display area NDA.

[0052] The dam member DM can block the overflow of organic matter (or monomer) during the process of forming the sealing layer to be placed in the display area DA, thereby preventing the organic matter of the sealing layer from extending to the edge of the display device 1.

[0053] In some embodiments, the dam member DM may be positioned to completely surround the display area DA on a plane.

[0054] The sealing member 50 can bond the display substrate 10 and the color conversion substrate 30 together as described above.

[0055] The sealing member 50 may be located outside the dam member DM in the non-display area NDA, and may be disposed so as to completely surround the dam member DM and the display area DA on a plane.

[0056] The non-display area NDA of the display device 1 may include a pad area PDA, in which a plurality of pad electrodes PD may be located.

[0057] In some embodiments, the pad electrode PD may be located in a portion adjacent to a long side of the non-display area NDA, for example, in an area adjacent to a first side L1 of the non-display area NDA. The pad electrode PD may be electrically connected to pixel circuits and the like located in the display area DA via connecting wires and the like.

[0058] The display substrate (10 in FIG. 1) of the display device 1 may include the above-mentioned dam member DM and pad electrodes PD.

[0059] The flexible circuit board FPC may be connected to the pad electrodes PD. The flexible circuit board FPC may electrically connect the display substrate (10 in FIG. 1) to a circuit board or the like that provides signals, power, and the like for driving the display device 1.

[0060] The driver chip IC may be electrically connected to the circuit board, etc. to receive data and signals, etc. In some embodiments, the driver chip IC may be a data driver chip, which may receive data control signals and image data, etc. from the circuit board, etc., and generate and output data voltages, etc. corresponding to the image data.

[0061] In some embodiments, the driving chip IC may be mounted on the flexible printed circuit board FPC, for example, the driving chip IC may be mounted on the flexible printed circuit board FPC in a chip on film (COF) form.

[0062] A data voltage provided from a driving chip IC, a power supply provided from the circuit board, etc. can be transmitted to the pixel circuits of the display substrate (10 in FIG. 1) via a flexible circuit board FPC and pad electrodes PD.

[0063] As described above, each sub-pixel SPXn may be formed corresponding to a plurality of light-emitting regions LA1, LA2, and LA3 of the display substrate 10, which will be described later. Each sub-pixel SPXn includes three transistors T1, T2, and T3 and one storage capacitor Cst in addition to a light-emitting element ED.

[0064] The light-emitting element ED emits light in response to a current supplied via the first transistor T1. The light-emitting element ED includes a first electrode, a second electrode, and at least one organic layer disposed therebetween. The light-emitting element ED can emit light of a specific wavelength band in response to an electrical signal transmitted from the first electrode and the second electrode.

[0065] One end of the light-emitting element ED is connected to the source electrode of the first transistor T1, and the other end can be connected to a second voltage line VL2 to which a low potential voltage (hereinafter, a second power supply voltage) lower than the high potential voltage (hereinafter, a first power supply voltage) of the first voltage line VL1 is supplied.

[0066] The first transistor T1 adjusts a current flowing from a first voltage line VL1 to which a first power supply voltage is supplied to the light emitting element ED according to a voltage difference between the gate electrode and the source electrode. As an example, the first transistor T1 may be a driving transistor for driving the light emitting element ED. The gate electrode of the first transistor T1 may be connected to a source electrode of the second transistor T2, the source electrode may be connected to a first electrode of the light emitting element ED, and the drain electrode may be connected to the first voltage line VL1 to which the first power supply voltage is applied.

[0067] The second transistor T2 is turned on by a scan signal of the scan line SL to connect the data line DTL to the gate electrode of the first transistor T1. The gate electrode of the second transistor T2 may be connected to the scan line SL, the source electrode may be connected to the gate electrode of the first transistor T1, and the drain electrode may be connected to the data line DTL.

[0068] The third transistor T3 is turned on by a scan signal of the scan line SL to connect the initialization voltage line VIL to one end of the light emitting element ED. The gate electrode of the third transistor T3 is connected to the scan line SL, the drain electrode is connected to the initialization voltage line VIL, and the source electrode is connected to one end of the light emitting element ED or the source electrode of the first transistor T1.

[0069] In one embodiment, the source electrode and the drain electrode of each of the transistors T1, T2, and T3 are not limited to the above, and may be the opposite. Each of the transistors T1, T2, and T3 may be formed as a thin film transistor. Although FIG. 3 illustrates the transistors T1, T2, and T3 being formed as N-type metal oxide semiconductor field effect transistors (MOSFETs), the present invention is not limited thereto. That is, each of the transistors T1, T2, and T3 may be formed as a P-type MOSFET, or some of the transistors may be formed as N-type MOSFETs and the other part may be formed as P-type MOSFETs.

[0070] The storage capacitor Cst is formed between the gate electrode and the source electrode of the first transistor T1 and stores a difference voltage between the gate voltage and the source voltage of the first transistor T1.

[0071] In the embodiment of FIG. 3, the gate electrodes of the second transistor T2 and the third transistor T3 may be connected to the same scan line SL. Although the second transistor T2 and the third transistor T3 are simultaneously turned on by the scan signal applied to the same scan line, the gate electrode of the second transistor T2 may be connected to the first scan line and the gate electrode of the third transistor T3 may be connected to the second scan line. Here, the first scan line and the second scan line are different scan lines, and the second transistor T2 and the third transistor T3 may be turned on by the scan signal applied to the different scan lines. However, the present invention is not limited thereto.

[0072] As described above, the pad electrode PD receives a driving signal or a power source transmitted through the flexible printed circuit board FPC and transmits the driving signal or the power source to the light emitting element ED in the display area DA. For example, when the pad electrode PD receives a driving signal, the pad electrode PD may be a driving pad electrode, and when the pad electrode PD receives a power source, the pad electrode PD may be a power source pad electrode. As described above in FIG. 3, two voltage wirings VL1 and VL2 (or power source wirings) are connected to the light emitting element ED, and each of the voltage wirings VL1 and VL2 may receive a first power source voltage or a second power source voltage through the power source pad electrode and transmit the voltage to the light emitting element ED. Therefore, the power source pad electrode may include a first power source pad electrode connected to the first voltage wiring VL1 and a second power source pad electrode connected to the second voltage wiring VL2. The pad electrode PD shown in FIG. 8 is the second power source pad electrode, but is not limited thereto. Further, as shown in Fig. 8, the pad electrodes PD may be connected to light emitting elements (see ED1, ED2, and ED3 in Fig. 9) in the display area DA via signal wirings WR1, WR2, and WR3. Fig. 8 will be described in detail below together with Fig. 12, which will be described later.

[0073] The structure of the display device 1 will be described in more detail below.

[0074] Fig. 9 is a cross-sectional view of a display device according to an embodiment taken along line X1-X1' in Fig. 5. Fig. 10 is an enlarged cross-sectional view of a portion Q4 in Fig. 9. Fig. 11 is a cross-sectional view showing a modified example of the structure in Fig. 9. Fig. 12 is a cross-sectional view of a display device according to an embodiment taken along line X3-X3' in Fig. 8.

[0075] Referring further to Figures 9 to 12 in addition to Figures 1 to 8, the display device 1 includes a display substrate 10 and a color conversion substrate 30 as described above, and may further include a filler 70 located between the display substrate 10 and the color conversion substrate 30.

[0076] The display substrate 10 will now be described.

[0077] The first base part 110 is made of a material having light transmitting properties. In some embodiments, the first base part 110 may be a glass substrate or a plastic substrate. When the first base part 110 is a plastic substrate, the first base part 110 may be flexible.

[0078] In some embodiments, the first base part 110 in the display area DA may be defined with a plurality of light emitting areas LA1, LA2, LA3 and a non-light emitting area NLA, as described above.

[0079] In some embodiments, the first side L1, the second side L2, the third side L3, and the fourth side L4 of the display device 1 may be the same as the four sides of the first base part 110. That is, the first side L1, the second side L2, the third side L3, and the fourth side L4 of the display device 1 can also be referred to as the first side L1, the second side L2, the third side L3, and the fourth side L4 of the first base part 110.

[0080] A first conductive layer may be disposed on the first base portion 110. The first conductive layer may include a lower light-shielding layer BML and a second signal wiring WR2. The lower light-shielding layer BML may block external light or light from a light-emitting element from entering a semiconductor layer ACT, which may prevent or reduce leakage current caused by light in thin film transistors (T1, T2, and T3 in FIG. 3).

[0081] In some embodiments, the first conductive layer is made of a material that blocks light and has conductivity. For example, the first conductive layer may include a single material selected from metals such as silver (Ag), nickel (Ni), gold (Au), platinum (Pt), aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), and neodymium (Nd), or an alloy thereof. In some embodiments, the first conductive layer has a single-layer or multi-layer structure. For example, when the first conductive layer has a multi-layer structure, the first conductive layer may be a titanium (Ti) / copper (Cu) / indium tin oxide (ITO) stacked structure or a titanium (Ti) / copper (Cu) / aluminum oxide (Au) stacked structure. 2 O3 ) laminated structure, but is not limited thereto.

[0082] In some embodiments, the lower light blocking layer BML may be provided in a plurality of layers corresponding to the semiconductor layers ACT and may overlap the semiconductor layers ACT. In some embodiments, the width of the lower light blocking layer BML may be wider than the width of the semiconductor layers ACT. The lower light blocking layer BML may be connected to anode electrodes AE1, AE2, and AE3, which will be described later.

[0083] The second signal wiring WR2 may be connected to signal wirings WR1 and WR3, which will be described later. In one embodiment, the second signal wiring WR2 may overlap the sealing area SA and may be disposed overlapping the sealing member 50. The first and third signal wirings WR1 and WR3, which will be described later, may not overlap the sealing member 50.

[0084] A buffer layer 111 may be further positioned on the first conductive layer. The buffer layer 111 may be positioned on the first base portion 110 and disposed in the display area DA and the non-display area NDA. The buffer layer 111 may block foreign matter or moisture that may penetrate through the first base portion 110. For example, the buffer layer 111 may be made of SiO 2 , SiNx, SiON, and may be formed in a single layer or in multiple layers.

[0085] A semiconductor layer ACT may be located on the buffer layer 111. In some embodiments, the semiconductor layer ACT may be disposed to correspond to the first light emitting region LA1, the second light emitting region LA2, and the third light emitting region LA3 in the display area DA, respectively.

[0086] In some embodiments, the semiconductor layer ACT may include an oxide semiconductor. Exemplarily, the semiconductor layer ACT may be formed of a Zn oxide-based material such as Zn oxide, In-Zn oxide, Ga-In-Zn oxide, etc., and may be an IGZO (In-Ga-Zn-O) semiconductor in which metals such as indium (In) and gallium (Ga) are contained in ZnO. However, the semiconductor layer ACT is not limited thereto, and may include amorphous silicon, polysilicon, etc.

[0087] In some embodiments, the semiconductor layer ACT is disposed so as to overlap with each lower light-shielding layer BML, and therefore, generation of photocurrent in the semiconductor layer ACT can be suppressed.

[0088] A gate insulating layer 115 may be located on the semiconductor layer ACT. In some embodiments, the gate insulating layer 115 may be located in the display area DA and the non-display area NDA. In some embodiments, the gate insulating layer 115 may be disposed to correspond to an electrode of a second conductive layer, which will be described later. That is, the gate insulating layer 115 may be disposed only in an area overlapping with the electrode of the second conductive layer. However, the present invention is not limited to this, and the gate insulating layer 115 may be formed over the entire surface regardless of the arrangement of the electrode of the second conductive layer. The gate insulating layer 115 may be formed of SiO 2 , SiNx, SiON, Al 2 O 3 , TiO 2 , Ta 2 O, HfO 2 , ZrO 2 It may contain inorganic substances such as

[0089] A second conductive layer may be disposed on the gate insulating layer 115. The second conductive layer may include gate electrodes GE of the thin film transistors T1, T2, and T3, a first pad electrode PD1 of the pad electrode PD, and signal wirings WR1 and WR3.

[0090] The gate electrode GE may be located in the display area DA and may be arranged to overlap with the semiconductor layer ACT. The first pad electrode PD1 may be located in the non-display area NDA and may be located outside the sealing area SA on a plane. The first signal wiring WR1 may be connected to the first pad electrode PD1. That is, an outer end portion (outer direction based on the sealing area SA) of the first signal wiring WR1 may be directly connected to the first pad electrode PD1. The first signal wiring WR1 may be located in the non-display area NDA and may be located outside the sealing area SA on a plane. The third signal wiring WR3 may be located in the non-display area NDA and may be located inside the sealing area SA on a plane. The first pad electrode PD1 may be connected to the second pad electrode PD2 of the pad electrode PD, the first signal wiring WR1 may be connected to the second signal wiring WR2 via the first connecting electrode CNE1, and the third signal wiring WR3 may be connected to the second signal wiring WR2 via the second connecting electrode CNE2.

[0091] The second conductive layer may include one or more of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu) in consideration of adhesion with adjacent layers, surface flatness of the laminated layers, and processability, and may be formed as a single layer or multiple layers.

[0092] A protective layer 117 may be located on the second conductive layer. The protective layer 117 may be located in the display area DA and the non-display area NDA. The protective layer 117 may be a protective layer that protects the components PD1, WR1, WR3, and GE of the first conductive layer thereunder.

[0093] In some embodiments, the protective layer 117 may include an inorganic material. For example, the protective layer 117 may include any of the inorganic materials exemplified in the description of the first insulating layer 113. However, without being limited thereto, the protective layer 117 may include an organic material. The protective layer 117 may have an upper surface 117u defined therein, and the protective layer 117 may have a predetermined thickness t117. In some embodiments, the protective layer 117 includes an inorganic material, and therefore the thickness t117 may be substantially uniform across the entire region, unlike that shown in the drawing.

[0094] A via layer 130 may be disposed on the protective layer 117. The via layer 130 may cover the thin film transistors T1, T2, and T3 in the display area DA. In some embodiments, the via layer 130 may be a planarization film. In some embodiments, the via layer 130 is made of an organic material. For example, the via layer 130 may include an acrylic resin, an epoxy resin, an imide resin, an ester resin, and the like. In some embodiments, the via layer 130 may include a photosensitive organic material.

[0095] In the display area DA, a third conductive layer may be disposed on the via layer 130. The third conductive layer may include anode electrodes AE1, AE2, and AE3, connecting electrodes CNE1, CNE2, and CNE3, and a second pad electrode PD2. The anode electrodes AE1, AE2, and AE3 may include a first anode electrode AE1, a second anode electrode AE2, and a third anode electrode AE3. Each of the anode electrodes AE1, AE2, and AE3 may be connected to the lower light-shielding layer BML through a contact hole penetrating the via layer 130, the protective layer 117, and the buffer layer 111, and each of the anode electrodes AE1, AE2, and AE3 may be connected to the semiconductor layer ACT through a contact hole penetrating the via layer 130 and the protective layer 117. The semiconductor layer ACT includes a channel region overlapping with the gate electrode GE, a source region on one side of the channel region, and a drain region on the other side of the channel region, and each anode electrode AE1, AE2, and AE3 can be connected to the drain region or the source region of the semiconductor layer ACT through a contact hole penetrating the via layer 130 and the protective layer 117.

[0096] The first anode electrode AE1 overlaps the first light-emitting area LA1 and may extend at least partially to the non-light-emitting area NLA, the second anode electrode AE2 overlaps the second light-emitting area LA2 and may extend at least partially to the non-light-emitting area NLA, and the third anode electrode AE3 overlaps the third light-emitting area LA3 and may extend at least partially to the non-light-emitting area NLA.

[0097] The connecting electrodes CNE1, CNE2, CNE3 may include a first connecting electrode CNE1, a second connecting electrode CNE2, and a third connecting electrode CNE3. The first connecting electrode CNE1 may overlap with the first signal wiring WR1 and the second signal wiring WR2, respectively. The first connecting electrode CNE1 may be connected to the first signal wiring WR1 through a second contact hole CNT2 penetrating the via layer 130 and the protective layer 117, and may be connected to the second signal wiring WR2 through a third contact hole CNT3 penetrating the via layer 130, the protective layer 117, and the buffer layer 111. The second connecting electrode CNE2 may overlap with the second signal wiring WR2 and the third signal wiring WR3, respectively. The second connecting electrode CNE2 may be connected to the third signal wiring WR3 through a fifth contact hole CNT5 penetrating the via layer 130 and the protective layer 117, and may be connected to the second signal wiring WR2 through a fourth contact hole CNT4 penetrating the via layer 130, the protective layer 117, and the buffer layer 111. The third signal wiring WR3 may be electrically connected to the light emitting elements ED1, ED2, and ED3. In the embodiment, since the pad electrode PD is the second power supply pad electrode, the signal wirings WR1, WR2, and WR3 connected to the pad electrode PD may be a second voltage wiring VL2 that provides the second power supply voltage applied to the pad electrode PD to the light emitting elements ED1, ED2, and ED3. For this purpose, the third signal wiring WR3 may be connected to the light emitting elements ED1, ED2, and ED3 through the third connecting electrode CNE3. The third connecting electrode CNE3 may be connected to the third signal wiring WR3 through a contact hole penetrating the via layer 130 and the protective layer 117. The third connecting electrode CNE3 may be connected to a cathode electrode CE, which will be described later. In FIG. 12, the connection between the cathode electrode CE and the third connecting electrode CNE3 and the connection between the third connecting electrode CNE3 and the third signal line WR3 are illustrated as being performed in the non-display area NDA, but the present invention is not limited thereto and may be performed in the display area DA.

[0098] In some embodiments, the third conductive layer may be a reflective electrode, in which case the third conductive layer may be a metal layer including metals such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, and Cr. In other embodiments, the third conductive layer may further include a metal oxide layer stacked on the metal layer. In an exemplary embodiment, the third conductive layer may have a multi-layer structure, e.g., a two-layer structure of ITO / Ag, Ag / ITO, ITO / Mg, or ITO / MgF, or a three-layer structure of ITO / Ag / ITO. When the third conductive layer includes a reflective electrode, a portion of external light (LO in FIG. 15) incident on the outside of the display device 1 may be reflected from the electrodes of the third conductive layer, as described below.

[0099] A bank layer 150 may be located on the third conductive layer. The bank layer 150 may include an opening exposing the first anode electrode AE1, an opening exposing the second anode electrode AE2, and an opening exposing the third anode electrode AE3, and may define a first light-emitting region LA1, a second light-emitting region LA2, a third light-emitting region LA3, and a non-light-emitting region NLA. That is, the region of the first anode electrode AE1 that is exposed without being covered by the bank layer 150 may be the first light-emitting region LA1. Similarly, the region of the second anode electrode AE2 that is exposed without being covered by the bank layer 150 may be the second light-emitting region LA2, and the region of the third anode electrode AE3 that is exposed without being covered by the bank layer 150 may be the third light-emitting region LA3. The region where the bank layer 150 is located may be the non-light-emitting region NLA.

[0100] Furthermore, the upper surface of the second pad electrode PD2 may be exposed from the bank layer 150. Since the upper surface of the second pad electrode PD2 is exposed by the bank layer 150, the second pad electrode PD2 may be connected to the flexible circuit board FPC of FIG. 2, although not shown.

[0101] In one embodiment, the via layer 130 and the bank layer 150 may each include an open portion OPa, OPb penetrating in the thickness direction. The open portions OPa, OPb may overlap the sealing area SA and be disposed to overlap the sealing member 50. The upper surface 117u of the protective layer 117 is exposed through the first open portion OPa, and the sealing member 50 may be in direct contact with the exposed upper surface 117u of the protective layer 117.

[0102] In some embodiments, the bank layer 150 may include an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamides resin, a polyimides resin, an unsaturated polyesters resin, a polyphenylenes resin, a polyphenylenesulfides resin, or benzocyclobutene (BCB).

[0103] In some embodiments, the bank layer 150 may overlap a light blocking pattern 250, which will be described later. In some embodiments, the bank layer 150 may also overlap a bank pattern 370, which will be described later.

[0104] As shown in FIGS. 9 and 12, an emitting layer OL may be located on the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3.

[0105] In some embodiments, the light-emitting layer OL may have a shape of a continuous film formed across the plurality of light-emitting areas LA1, LA2, LA3 and the non-light-emitting area NLA. Although the drawings show the light-emitting layer OL located only in the display area DA, this is not limiting. In some other embodiments, a portion of the light-emitting layer OL may be further located in the non-display area NDA. A more detailed description of the light-emitting layer OL will be provided below.

[0106] A cathode electrode CE may be located on the light emitting layer OL. A part of the cathode electrode CE may further be located within the non-display area NDA.

[0107] In some embodiments, the cathode electrode CE may be semi-transparent or transparent. When the cathode electrode CE is semi-transparent, the cathode electrode CE may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, or a compound or mixture thereof, for example, a mixture of Ag and Mg. When the cathode electrode CE has a thickness of several tens to several hundreds of angstroms, the cathode electrode CE may be semi-transparent.

[0108] When the cathode electrode CE has transparency, the cathode electrode CE may include a transparent conductive oxide (TCO). For example, the cathode electrode CE may include a transparent conductive oxide (TCO), a tungsten oxide (WxOx), a TiO 2 (Titanium oxide), ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), ITZO (indium tin zinc oxide), MgO (magnesium oxide), etc.

[0109] In some embodiments, the cathode electrode CE may completely cover the light-emitting layer OL. In some embodiments, as shown in FIG. 12, an edge of the cathode electrode CE may be located relatively outward from an edge of the light-emitting layer OL, and the edge of the light-emitting layer OL may be completely covered by the cathode electrode CE.

[0110] The first anode electrode AE1, the light emitting layer OL, and the cathode electrode CE form a first light emitting element ED1, the second anode electrode AE2, the light emitting layer OL, and the cathode electrode CE form a second light emitting element ED2, and the third anode electrode AE3, the light emitting layer OL, and the cathode electrode CE form a third light emitting element ED3. The first light emitting element ED1, the second light emitting element ED2, and the third light emitting element ED3 can each emit output light LE.

[0111] 10, the output light LE finally output from the light emitting layer OL may be a mixed light of a first component LE1 and a second component LE2. The first component LE1 and the second component LE2 of the output light LE may each have a peak wavelength of 440 nm or more and less than 480 nm. That is, the output light LE may be blue light.

[0112] As shown in Fig. 10, in some embodiments, the light-emitting layer OL has a structure in which a plurality of light-emitting layers are arranged in a superimposed manner, for example, a tandem structure. For example, the light-emitting layer OL may include a first stack ST1 including a first light-emitting layer EML1, a second stack ST2 located on the first stack ST1 and including a second light-emitting layer EML2, a third stack ST3 located on the second stack ST2 and including a third light-emitting layer EML3, a first charge generation layer CGL1 located between the first stack ST1 and the second stack ST2, and a second charge generation layer CGL2 located between the second stack ST2 and the third stack ST3. The first stack ST1, the second stack ST2, and the third stack ST3 may be arranged to overlap each other.

[0113] The first emitting layer EML1, the second emitting layer EML2, and the third emitting layer EML3 can be disposed so as to overlap one another.

[0114] In some embodiments, the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 can all emit light of the first color, for example, blue light. Exemplarily, the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 can each be a blue light-emitting layer and can include an organic material.

[0115] In some embodiments, at least one of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may emit a first blue light having a first peak wavelength, and at least another of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may emit a second blue light having a second peak wavelength different from the first peak wavelength. Exemplarily, one of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may emit the first blue light having a first peak wavelength, and the remaining two of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may emit the second blue light having a second peak wavelength. That is, the emitted light LE finally emitted from the light emitting layer OL may be a mixed light of the first component LE1 and the second component LE2, where the first component LE1 may be a first blue light having a first peak wavelength and the second component LE2 may be a second blue light having a second peak wavelength.

[0116] In some embodiments, the range of one of the first peak wavelength and the second peak wavelength may be 440 nm or more and less than 460 nm, and the range of the other of the first peak wavelength and the second peak wavelength may be 460 nm or more and less than 480 nm. However, the range of the first peak wavelength and the range of the second peak wavelength are not limited thereto. For example, the range of the first peak wavelength and the range of the second peak wavelength may both include 460 nm. In some embodiments, one of the first blue light and the second blue light may be a deep blue color light, and the other of the first blue light and the second blue light may be a sky blue color light.

[0117] According to some embodiments, the emitted light LE emitted from the light emitting layer OL is blue light and can include long wavelength components and short wavelength components. Therefore, the light emitting layer OL can finally emit blue light having a broader emission peak as the emitted light LE. This has the advantage of improving color visibility at a side viewing angle (viewing angle from the side) compared to a conventional light emitting device that emits blue light having a sharp emission peak.

[0118] In some embodiments, the first emitting layer EML1, the second emitting layer EML2, and the third emitting layer EML3 may each include a host and a dopant. The host is not particularly limited as long as it is a commonly used substance, and examples of the host include Alq3 (tris(8-hydroxyquinolino)aluminum), CBP (4,4'-bis(N-carbazolyl)-1,1'-biphenyl), PVK (poly(n-vinylcabazole)), ADN (9,10-di(naphthalene-2-yl)anthracene), TCTA (4,4',4"-Tris(carbazol-9-yl)-triphenylamine), TPBi(1 ,3,5-tris(N-phenylbenzimidazole-2-yl)benzene), TBADN (3-tert-butyl-9,10-di(naphth-2-yl)anthracene), DSA (distyrylarylene), CDBP (4,4'-bis(9-carbazolyl)-2,2'-dimethyl-biphenyl), MADN (2-Methyl-9,10-bis(naphthalen-2-yl)anthracene), etc. can be used.

[0119] The first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 that emit blue light may each contain a fluorescent material including any one selected from the group consisting of spiro-DPVBi, spiro-6P, DSB (distyryl-benzene), DSA (distyryl-arylene), PFO (Polyfluorene)-based polymers, and PPV (poly(p-phenylene vinylene)-based polymers. As another example, they may also contain a phosphorescent material including an organometallic complex such as (4,6-F2ppy)2Irpic.

[0120] As described above, at least one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 emits blue light in a wavelength range different from that of at least another one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3. In order to emit blue light in different wavelength ranges, the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may contain the same material and a method of adjusting the resonance distance may be used. Alternatively, in order to emit blue light in different wavelength ranges, at least one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may contain different materials from at least another one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3.

[0121] However, this is not limited to the above, and the blue light emitted by each of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may all have a peak wavelength of 440 nm to 480 nm and may be made of the same material.

[0122] In still other embodiments, at least one of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 emits first blue light having the first peak wavelength, the other of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 emits second blue light having a second peak wavelength different from the first peak wavelength, and the remaining one of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 emits third blue light having a third peak wavelength different from the first peak wavelength and the second peak wavelength. In some other embodiments, the range of any one of the first peak wavelength, the second peak wavelength, and the third peak wavelength may be greater than or equal to 440 nm and less than 460 nm. The other range among the first peak wavelength, the second peak wavelength, and the third peak wavelength may be greater than or equal to 460 nm and less than 470 nm, and the other range among the first peak wavelength, the second peak wavelength, and the third peak wavelength may be greater than or equal to 470 nm and less than or equal to 480 nm.

[0123] In some other embodiments, the emitted light LE from the light emitting layer OL is blue light and includes long wavelength components, intermediate wavelength components, and short wavelength components. Therefore, the light emitting layer OL can finally emit blue light having a broader emission peak as the emitted light LE, thereby improving color visibility at a side viewing angle.

[0124] The above-described embodiment has the advantage of increasing light efficiency and improving the life span of the display device compared to conventional light-emitting devices that do not adopt a tandem structure, i.e., a structure in which multiple light-emitting layers are stacked.

[0125] Alternatively, in some or other embodiments, at least one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may emit the third color light, for example, blue light, and at least one other of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may emit the third color light, for example, green light. In some or other embodiments, the peak wavelength of the blue light emitted by at least one of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may range from 440 nm to 480 nm, or from 460 nm to 480 nm. The green light emitted by at least one other of the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may have a peak wavelength in the range of 510 nm to 550 nm.

[0126] For example, any one of the first emitting layer EML1, the second emitting layer EML2, and the third emitting layer EML3 may be a green emitting layer that emits green light, and the remaining two of the first emitting layer EML1, the second emitting layer EML2, and the third emitting layer EML3 may be blue emitting layers that emit blue light. When the remaining two of the first emitting layer EML1, the second emitting layer EML2, and the third emitting layer EML3 are blue emitting layers, the peak wavelength ranges of blue light emitted by the two blue emitting layers may be the same or may be different from each other.

[0127] According to some other embodiments, the output light LE output from the light emitting layer OL may be a mixed light obtained by mixing a first component LE1, which is blue light, and a second component LE2, which is green light. For example, when the first component LE1 is a deep blue light and the second component LE2 is a green light, the output light LE may be a light having a sky blue color. As in the above-described embodiment, the output light LE output from the light emitting layer OL includes a long wavelength component and a short wavelength component as a mixed light of blue light and green light. Thus, the light emitting layer OL may finally output blue light having a broader emission peak as the output light LE, thereby improving color visibility at a side viewing angle. In addition, since the second component LE2 of the output light LE is green light, the green light component of the light provided to the outside from the display device 1 may be complemented, and thus the color reproducibility of the display device 1 may be improved.

[0128] In some other embodiments, the green light-emitting layer among the first light-emitting layer EML1, the second light-emitting layer EML2, and the third light-emitting layer EML3 may include a host and a dopant. The host included in the green light-emitting layer is not particularly limited as long as it is a commonly used substance, and examples thereof include Alq3 (tris(8-hydroxyquinolino)aluminum), CBP (4,4'-bis(N-carbazolyl)-1,1'-biphenyl), PVK (poly(n-vinylcabazole)), ADN (9,10-di(naphthalene-2-yl)anthracene), TCTA (4,4',4"-Tris(carbazol-9-yl)-triphenylamine), TPBi (1,3,5-tris(N-phenylbenzimidazole-2-yl)benzene), TBADN (3-tert-butyl-9,10-di(naphth-2-yl)anthracene), DSA (distyrylarylene), CDBP (4,4'-bis(9-carbazolyl)-2,2'-dimethyl-biphenyl), MADN (2-Methyl-9,10-bis(naphthalen-2-yl)anthracene), etc. can be used.

[0129] Examples of the dopant contained in the green light-emitting layer include a fluorescent substance containing Alq3 (tris-(8-hydroyquinolato) aluminum (III)), and a phosphorescent substance such as Ir(ppy)3 (fac tris(2-phenylpyridine)iridium), Ir(ppy)2(acac) (Bis(2-phenylpyridine)(acetylacetonate)iridium (III)), and Ir(mpyp)3 (2-phenyl-4-methyl-pyridine iridium).

[0130] The first charge generation layer CGL1 may be located between the first stack ST1 and the second stack ST2. The first charge generation layer CGL1 may serve to inject charges into each light-emitting layer. The first charge generation layer CGL1 may serve to adjust the charge balance between the first stack ST1 and the second stack ST2. The first charge generation layer CGL1 may include an n-type charge generation layer CGL11 and a p-type charge generation layer CGL12. The p-type charge generation layer CGL12 may be disposed on the n-type charge generation layer CGL11 and may be located between the n-type charge generation layer CGL11 and the second stack ST2.

[0131] The first charge generation layer CGL1 may have a junction structure in which the n-type charge generation layer CGL11 and the p-type charge generation layer CGL12 are joined to each other. The n-type charge generation layer CGL11 is disposed adjacent to the anode electrodes AE1, AE2, and AE3 among the anode electrodes AE1, AE2, and AE3 and the cathode electrode CE. The p-type charge generation layer CGL12 is disposed adjacent to the cathode electrode CE among the anode electrodes AE1, AE2, and AE3 and the cathode electrode CE. The n-type charge generation layer CGL11 supplies electrons to the first light-emitting layer EML1 adjacent to the anode electrodes AE1, AE2, and AE3, and the p-type charge generation layer CGL12 supplies holes to the second light-emitting layer EML2 included in the second stack ST2. The first charge generation layer CGL1 is disposed between the first stack ST1 and the second stack ST2, and provides charges to each light-emitting layer, thereby increasing the light-emitting efficiency and reducing the driving voltage.

[0132] The first stack ST1 may be located on the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3, and may further include a first hole transport layer HTL1, a first electron blocking layer BIL1, and a first electron transport layer ETL1.

[0133] The first hole transport layer HTL1 may be located on the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3. The first hole transport layer HTL1 serves to facilitate the transport of holes and may include a hole transport material. The hole transport material may include, but is not limited to, carbazole derivatives such as N-phenylcarbazole and polyvinylcarbazole, fluorene derivatives, triphenylamine derivatives such as TPD (N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1-biphenyl]-4,4'-diamine) and TCTA (4,4',4"-tris(N-carbazolyl)triphenylamine), NPB (N,N'-di(1-naphthyl)-N,N'-diphenylbenzidine), and TAPC (4,4'-Cyclohexylidenebis[N,N-bis(4-methylphenyl)benzenamine]), etc.

[0134] The first electron blocking layer BIL1 may be located on the first hole transport layer HTL1, and may be located between the first hole transport layer HTL1 and the first emissive layer EML1. The first electron blocking layer BIL1 includes a hole transport material and a metal or a metal compound to prevent electrons generated in the first emissive layer EML1 from transferring to the first hole transport layer HTL1. In some embodiments, the first hole transport layer HTL1 and the first electron blocking layer BIL1 may be formed of a single layer in which the respective materials are mixed.

[0135] The first electron-transporting layer ETL1 can be located on the first emissive layer EML1 and can be located between the first charge-generation layer CGL1 and the first emissive layer EML1. In some embodiments, the first electron-transporting layer ETL1 can be selected from the group consisting of Alq3 (Tris(8-hydroxyquinolinato)aluminum), TPBi (1,3,5-Tri(1-phenyl-1H-benzo[d]imidazol-2-yl)phenyl), BCP (2,9-Dimethyl-4,7-diphenyl-1,10-phenanthroline), Bphen (4,7-Diphenyl-1,10-phenanthroline), TAZ (3-(4-Biphenylyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole), NTAZ (4-(Naphthalen-1-yl)-3,5-diphenyl-4H-1,2,4-triazole), tBu-PBD (2-(4-Bi The second stack ST2 may include an electron transport material such as Bis(2-methyl-8-quinolinolato-N1,O8)-(1,1'-biphenyl-4-olato)aluminum, BAlq2 (berylliumbis(benzoquinolin-10-olate), ADN(9,10-di(naphthalene-2-yl)anthracene), and mixtures thereof. However, the present invention is not limited to the type of electron transport material. The second stack ST2 may be located on the first charge generation layer CGL1 and may further include a second hole transport layer HTL2, a second electron blocking layer BIL2, and a second electron transport layer ETL2.

[0136] The second hole transport layer HTL2 may be located on the first charge generation layer CGL1. The second hole transport layer HTL2 may be made of the same material as the first hole transport layer HTL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first hole transport layer HTL1. The second hole transport layer HTL2 may be made of a single layer or multiple layers.

[0137] The second electron blocking layer BIL2 may be located on the second hole transport layer HTL2, or may be located between the second hole transport layer HTL2 and the first light emitting layer EML1. The second electron blocking layer BIL2 may be made of the same material and have the same structure as the first electron blocking layer BIL1, or may contain one or more materials selected from the materials exemplified for the first electron blocking layer BIL1.

[0138] The second electron-transporting layer ETL2 may be located on the second light-emitting layer EML2, and may be located between the second charge generation layer CGL2 and the second light-emitting layer EML2. The second electron-transporting layer ETL2 may be made of the same material and have the same structure as the first electron-transporting layer ETL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first electron-transporting layer ETL1. The second electron-transporting layer ETL2 may be made of a single layer or multiple layers.

[0139] The second charge generation layer CGL2 may be located on the second stack ST2 and between the second stack ST2 and the third stack ST3.

[0140] The second charge generation layer CGL2 may have the same structure as the first charge generation layer CGL1 described above. For example, the second charge generation layer CGL2 may include an n-type charge generation layer CGL21 arranged adjacent to each other via a second stack ST2, and a p-type charge generation layer CGL22 arranged adjacent to each other via a cathode electrode CE. The p-type charge generation layer CGL22 may be arranged on the n-type charge generation layer CGL21.

[0141] The second charge generation layer CGL2 can have a structure in which an n-type charge generation layer CGL21 and a p-type charge generation layer CGL22 are in contact with each other. The first charge generation layer CGL1 and the second charge generation layer CGL2 may be made of different materials or the same material.

[0142] The second stack ST2 may be located on the second charge generation layer CGL2 and may further include a third hole transport layer HTL3 and a third electron transport layer ETL3.

[0143] The third hole transport layer HTL3 may be located on the second charge generation layer CGL2. The third hole transport layer HTL3 may be made of the same material as the first hole transport layer HTL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first hole transport layer HTL1. The third hole transport layer HTL3 may be made of a single layer or multiple layers. When the third hole transport layer HTL3 is made of multiple layers, each layer may contain a different material.

[0144] The third electron-transporting layer ETL3 may be located on the third emission layer EML3, and may be located between the cathode electrode CE and the third emission layer EML3. The third electron-transporting layer ETL3 may be made of the same material and have the same structure as the first electron-transporting layer ETL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first electron-transporting layer ETL1. The third electron-transporting layer ETL3 may be made of a single layer or multiple layers. When the third electron-transporting layer ETL3 is made of multiple layers, each layer may contain a different material.

[0145] Although not shown in the drawings, a hole injection layer may be further disposed between the first stack ST1 and the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3, between the second stack ST2 and the first charge generation layer CGL1, and between the third stack ST3 and the second charge generation layer CGL2. The hole injection layer may serve to more smoothly inject holes into the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3. In some embodiments, the hole injection layer may be made of at least one selected from the group consisting of, but not limited to, CuPc (cupper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), and NPD (N,N-dinaphthyl-N,N'-diphenyl benzidine). In some embodiments, the hole injection layer may be located between the first stack ST1 and the first anode electrode AE1, the second anode electrode AE2, and the third anode electrode AE3, between the second stack ST2 and the first charge generation layer CGL1, and between the third stack ST3 and the second charge generation layer CGL2.

[0146] Although not shown in the drawing, an electron injection layer may be further disposed between the third electron transport layer ETL3 and the cathode electrode CE, between the second charge generation layer CGL2 and the second stack ST2, and between the first charge generation layer CGL1 and the first stack ST1. The electron injection layer serves to facilitate the injection of electrons, and may be, but is not limited to, Alq3 (tris(8-hydroxyquinolino)aluminum), PBD, TAZ, spiro-PBD, BAlq, or SAlq. The electron injection layer may also be a metal halide compound, for example, MgF 2The electron injection layer may be, but is not limited to, any one or more selected from the group consisting of LiF, NaF, KF, RbF, CsF, FrF, LiI, NaI, KI, RbI, CsI, FrI, and CaF2. The electron injection layer may also include a lanthanide material such as Yb, Sm, or Eu. Alternatively, the electron injection layer may simultaneously include a metal halide material and a lanthanide material, such as RbI:Yb, KI:Yb, etc. When the electron injection layer includes both a metal halide material and a lanthanide material, the electron injection layer may be formed by co-deposition of the metal halide material and the lanthanide material. In some embodiments, the electron injection layer may be located between the third electron transport layer ETL3 and the cathode electrode CE, between the second charge generation layer CGL2 and the second stack ST2, and between the first charge generation layer CGL1 and the first stack ST1, respectively.

[0147] In addition to the above-mentioned structure, the structure of the light emitting layer OL may be modified. For example, the light emitting layer OL may be modified to an light emitting layer OLa shown in Fig. 11. Unlike the structure shown in Fig. 10, the light emitting layer OLa shown in Fig. 11 may further include a fourth stack ST4 on the third stack ST3, and may further include a third charge generation layer CGL3 located between the third stack ST3 and the fourth stack ST4.

[0148] The fourth stack ST4 may include a fourth emissive layer EML4, and may further include a fourth hole-transporting layer HTL4, a third electron blocking layer BIL3, and a fourth electron-transporting layer ETL4.

[0149] The first light-emitting layer EML1, the second light-emitting layer EML2, the third light-emitting layer EML3, and the fourth light-emitting layer EML4 included in the light-emitting layer OL can each emit light of the first color, for example, blue light. At least one of the first light-emitting layer EML1, the second light-emitting layer EML2, the third light-emitting layer EML3, and the fourth light-emitting layer EML4 and at least another of the first light-emitting layer EML1, the second light-emitting layer EML2, the third light-emitting layer EML3, and the fourth light-emitting layer EML4 can emit blue light of different peak wavelength ranges.

[0150] Alternatively, at least one of the first emitting layer EML1, the second emitting layer EML2, the third emitting layer EML3, and the fourth emitting layer EML4 can emit green light, and at least one other of the first emitting layer EML1, the second emitting layer EML2, the third emitting layer EML3, and the fourth emitting layer EML4 can emit blue light. For example, one of the first emitting layer EML1, the second emitting layer EML2, the third emitting layer EML3, and the fourth emitting layer EML4 can be a green emitting layer, and the remaining three emitting layers can all be blue emitting layers.

[0151] Alternatively, the fourth emitting layer EML4 can be a green emitting layer, and the first emitting layer EML1, the second emitting layer EML2 and the third emitting layer EML3 can all be blue emitting layers.

[0152] The fourth hole transport layer HTL4 may be located on the second charge generation layer CGL2. The fourth hole transport layer HTL4 may be made of the same material as the first hole transport layer HTL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first hole transport layer HTL1. The fourth hole transport layer HTL4 may be made of a single layer or multiple layers. When the fourth hole transport layer HTL4 is made of multiple layers, each layer may contain a different material.

[0153] The third electron blocking layer BIL3 may be located on the fourth hole transport layer HTL4, or may be located between the fourth hole transport layer HTL4 and the fourth emitting layer EML4. The third electron blocking layer BIL3 may be made of the same material and have the same structure as the first electron blocking layer BIL1, or may contain one or more materials selected from the materials exemplified as materials contained in the first electron blocking layer BIL1. In some other embodiments, the third electron blocking layer BIL3 may be omitted.

[0154] The fourth electron-transporting layer ETL4 may be located on the fourth emitting layer EML4, and may be located between the third charge generation layer CGL3 and the fourth emitting layer EML4. The fourth electron-transporting layer ETL4 may be made of the same material and have the same structure as the first electron-transporting layer ETL1, or may contain one or more materials selected from the materials exemplified as the materials contained in the first electron-transporting layer ETL1. The fourth electron-transporting layer ETL4 may be made of a single layer or multiple layers. When the fourth electron-transporting layer ETL4 is made of multiple layers, each layer may contain a different material.

[0155] The third charge generation layer CGL3 may have the same structure as the first charge generation layer CGL1 described above. For example, the third charge generation layer CGL3 may include an n-type charge generation layer CGL31 arranged adjacent to each other via a second stack ST2, and a p-type charge generation layer CGL32 arranged adjacent to each other via a cathode electrode CE. The p-type charge generation layer CGL32 may be arranged on the n-type charge generation layer CGL31.

[0156] Although not shown in the drawing, the electron injection layer may be further disposed between the fourth stack ST4 and the third charge generation layer CGL3, and the hole injection layer may be further disposed between the fourth stack ST4 and the second charge generation layer CGL2.

[0157] In some embodiments, the light-emitting layer OL shown in Fig. 10 and the light-emitting layer OLa shown in Fig. 11 may not include a red light-emitting layer in common, and therefore may not emit the first color light, for example, red light. That is, the emitted light LE may not include a light component having a peak wavelength in the range of 610 nm to about 650 nm, and the emitted light LE may only include a light component having a peak wavelength in the range of 440 nm to 550 nm.

[0158] 12, a dam member DM may be located in the non-display area NDA on the protective layer 117. In a plan view, the dam member DM may be located in the non-display area NDA between the sealing area SA and the display area DA.

[0159] In some embodiments, the dam member DM may include multiple dams. For example, the dam member DM may include a first dam D1 and a second dam D2.

[0160] The first dam D1 may partially overlap the power supply wiring VSL and may be separated from the via layer 130 with the power supply wiring VSL therebetween. In some embodiments, the first dam D1 may include a first lower dam pattern D11 located on the protective layer 117 and a first upper dam pattern D12 located on the first lower dam pattern D11.

[0161] The second dam D2 may be located outside the first dam D1 and may be spaced apart from the first dam D1. In some embodiments, the second dam D2 may include a second lower dam pattern D21 located on the protective layer 117 and a second upper dam pattern D22 located on the second lower dam pattern D21.

[0162] In some embodiments, the first lower dam pattern D11 and the second lower dam pattern D21 may be made of the same material as the via layer 130 and may be formed simultaneously with the via layer 130.

[0163] In some embodiments, the first upper dam pattern D12 and the second upper dam pattern D22 may be made of the same material as the bank layer 150 and may be formed simultaneously with the bank layer 150.

[0164] In some embodiments, the heights of the first dam D1 and the second dam D2 may be different from each other. For example, the height of the second dam D2 may be higher than the height of the first dam D1. That is, the height of the dam included in the dam member DM may gradually increase as it gets farther from the display area DA, so that the overflow of organic matter can be more effectively prevented during the formation of the organic layer 173 included in the sealing layer 170 described below.

[0165] 9 and 12, a first capping layer 160 may be positioned on the cathode electrode CE. The first capping layer 160 may be commonly disposed in the first light-emitting region LA1, the second light-emitting region LA2, the third light-emitting region LA3 and the non-light-emitting region NLA, thereby improving viewing angle characteristics and increasing external light-emitting efficiency.

[0166] The first capping layer 160 may include at least one of an inorganic material and an organic material having optical transparency. That is, the first capping layer 160 may be an inorganic layer or an organic layer, and may be an organic layer containing inorganic particles. For example, the first capping layer 160 may include a triamine derivative, a carbazole biphenyl derivative, an arylenediamine derivative, or an aluminum quinolium complex (Alq3), etc.

[0167] The first capping layer 160 may also be made of a mixture of a high refractive index material and a low refractive index material, or may include two layers having different refractive indices, for example, a high refractive index layer and a low refractive index layer.

[0168] In some embodiments, the first capping layer 160 can completely cover the cathode electrode CE.

[0169] An encapsulation layer 170 may be disposed on the first capping layer 160. The encapsulation layer 170 protects components located under the encapsulation layer 170, such as the light emitting elements ED1, ED2, and ED3, from external foreign substances such as moisture. The encapsulation layer 170 is commonly disposed in the first light emitting region LA1, the second light emitting region LA2, the third light emitting region LA3, and the non-light emitting region NLA. In some embodiments, the encapsulation layer 170 may directly cover the cathode electrode CE. In some embodiments, a capping layer (not shown in the drawings) that covers the cathode electrode CE may be further disposed between the encapsulation layer 170 and the cathode electrode CE, and in this case, the encapsulation layer 170 may directly cover the capping layer. The encapsulation layer 170 may be a thin film encapsulation layer.

[0170] In some embodiments, the encapsulation layer 170 can include a lower inorganic layer 171 , an organic layer 173 , and an upper inorganic layer 175 stacked in sequence on the first capping layer 160 .

[0171] In some embodiments, the lower inorganic layer 171 may cover the first light emitting element ED1, the second light emitting element ED2, and the third light emitting element ED3 in the display area DA. The lower inorganic layer 171 may cover the dam member DM in the non-display area NDA and extend to the outside of the dam member DM.

[0172] In some embodiments, the lower inorganic layer 171 may completely cover the first capping layer 160. In some embodiments, an edge of the lower inorganic layer 171 may be located relatively outward from an edge of the first capping layer 160, and the edge of the first capping layer 160 may be completely covered by the lower inorganic layer 171.

[0173] The lower inorganic layer 171 may include a plurality of stacked films. An organic layer 173 may be located on the lower inorganic layer 171. The organic layer 173 may cover the first light emitting element ED1, the second light emitting element ED2, and the third light emitting element ED3 in the display area DA. In some embodiments, a portion of the organic layer 173 may be located in the non-display area NDA, but may not be located outside the dam member DM. Although a portion of the organic layer 173 is shown to be located inside the first dam D1, this is not limiting. In some other embodiments, a portion of the organic layer 173 may be accommodated in the space between the first dam D1 and the second dam D2, and an end of the organic layer 173 may be located in the area between the first dam D1 and the second dam D2.

[0174] An upper inorganic layer 175 may be located on the organic layer 173. The upper inorganic layer 175 may cover the organic layer 173. In some embodiments, the upper inorganic layer 175 may be in direct contact with the lower inorganic layer 171 in the non-display area NDA to form an inorganic-inorganic bond. In some embodiments, an edge of the upper inorganic layer 175 and an edge of the lower inorganic layer 171 may be substantially aligned. The upper inorganic layer 175 may include multiple stacked films.

[0175] In some embodiments, the lower inorganic layer 171 and the upper inorganic layer 175 are each comprised of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, silicon oxynitride (SiON), lithium fluoride, or the like.

[0176] In some embodiments, organic layer 173 comprises acrylics, methacrylics, polyisoprene, vinyls, epoxys, urethanes, cellulosics, perylenes, and the like.

[0177] The color conversion substrate 30 will be described below with reference to FIGS. 13 to 15 in addition to FIGS.

[0178] Fig. 13 is a plan view showing a schematic arrangement of a third color filter in a color conversion substrate of a display device according to an embodiment. Fig. 14 is a plan view showing a schematic arrangement of a first color filter in a color conversion substrate of a display device according to an embodiment. Fig. 15 is a plan view showing a schematic arrangement of a second color filter in a color conversion substrate of a display device according to an embodiment.

[0179] The second base portion 310 shown in FIG. 8 and FIG. 12 is made of a light-transmitting material.

[0180] In some embodiments, the second base portion 310 may include a glass substrate or a plastic substrate. In some embodiments, the second base portion 310 may further include a separate layer, for example an insulating layer such as an inorganic film, disposed on the glass substrate or the plastic substrate.

[0181] As described above, in some embodiments, a plurality of light-transmitting regions TA1, TA2, TA3 and a light-shielding region BA may be defined in the second base portion 310. When the second base portion 310 includes a glass substrate, the refractive index of the second base portion 310 may be about 1.5.

[0182] 9 and 12, a color filter layer may be disposed on one surface of the second base part 310 facing the display substrate 10. The color filter layer may include color filters 231, 233, and 235 and a light blocking pattern 250.

[0183] As shown in FIG. 9, FIG. 12, FIG. 13 to FIG. 15, the color filters 231, 233, and 235 may be arranged to overlap the light-transmitting regions TA1, TA2, and TA3, respectively. The light-shielding pattern 250 may be arranged to overlap the light-shielding region BA. The first color filter 231 may overlap the first light-transmitting region TA1, the second color filter 233 may overlap the second light-transmitting region TA2, and the third color filter 235 may overlap the third light-transmitting region TA3. The light-shielding pattern 250 may be arranged to overlap the light-shielding region BA to block the transmission of light. In some embodiments, the light-shielding pattern 250 may be arranged in a generally lattice pattern on a plane. In an embodiment, the light-shielding pattern 250 may include a first light-shielding pattern portion 235a on one surface of the second base portion 310, a second light-shielding pattern portion 231a on the first light-shielding pattern portion 235a, and a third light-shielding pattern portion 233a on the second light-shielding pattern portion 231a. The first light-shielding pattern portion 235a may include the same material as the third color filter 235, the second light-shielding pattern portion 231a may include the same material as the first color filter 231, and the third light-shielding pattern portion 233a may include the same material as the second color filter 233. That is, the light-shielding pattern 250 may include a structure in which the first light-shielding pattern portion 235a, the second light-shielding pattern portion 231a, and the third light-shielding pattern portion 233a are sequentially stacked on one surface of the second base portion 310 on the light-shielding region BA. If the light-shielding pattern 250 has a structure in which the first light-shielding pattern portion 235a, the second light-shielding pattern portion 231a, and the third light-shielding pattern portion 233a are sequentially stacked on one surface of the second base portion 310 on the light-shielding region BA, when external light La is incident on the light-shielding region BA, as shown in FIG. 8, the first color light and the second color light except the third color light are all absorbed by the first light-shielding pattern portion 235a as they pass through the first light-shielding pattern portion 235a, and the third color light is also absorbed while passing through the second and third light-shielding pattern portions 231a and 233a. However, although not shown in the drawing, there may be some light that is not transmitted by the first light-shielding pattern portion 235a and is reflected to the outside at the interface between the first light-shielding pattern portion 235a and the second base portion 310. This light may be the third color light.

[0184] In some other embodiments, the light blocking pattern 250 may include an organic light blocking material and may be formed by coating an organic light blocking material and exposing the same, etc. For example, the organic light blocking material may include a black matrix.

[0185] The first color filter 231 may function as a blocking filter that blocks blue light and green light. In some embodiments, the first color filter 231 may selectively transmit the first color light (e.g., red light) and block or absorb the second color light (e.g., green light) and the third color light (e.g., blue light). Exemplarily, the first color filter 231 may be a red color filter and may include a red colorant. The first color filter 231 may include a base resin and a red colorant dispersed in the base resin.

[0186] The second color filter 233 may function as a blocking filter that blocks blue light and red light. In some embodiments, the second color filter 233 may selectively transmit the second color light (e.g., green light) and block or absorb the third color light (e.g., blue light) and the first color light (e.g., red light). Exemplarily, the second color filter 233 may be a green color filter and may include a green colorant.

[0187] The third color filter 235 can selectively transmit the third color light (e.g., blue light) and block or absorb the first color light (e.g., red light) and the second color light (e.g., green light). In some embodiments, the third color filter 235 can be a blue color filter and can include a blue colorant such as a blue dye or a blue pigment. In this specification, the term "colorant" includes both a dye and a pigment.

[0188] 9 and 12, a low refractive layer 391 covering the light blocking pattern 250, the first color filter 231, the second color filter 233, and the third color filter 235 may be located on one surface of the second base portion 310. In some embodiments, the low refractive layer 391 may be in direct contact with the first color filter 231, the second color filter 233, and the third color filter 235. In some embodiments, the low refractive layer 391 may also be in direct contact with the light blocking pattern 250.

[0189] The low refractive layer 391 may have a lower refractive index than the wavelength conversion patterns 340 and 350 and the light transmission pattern 330. For example, the low refractive layer 391 is made of an inorganic material. For example, the low refractive layer 391 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. In some embodiments, a plurality of hollow particles may be formed inside the low refractive layer 391 to reduce the refractive index of the low refractive layer 391.

[0190] A low refractive capping layer 392 may be further disposed between the low refractive layer 391 and the wavelength converting patterns 340, 350, and between the low refractive layer 391 and the light transmitting pattern 330. In some embodiments, the low refractive capping layer 392 may be in direct contact with the wavelength converting patterns 340, 350 and the light transmitting pattern 330. In some embodiments, the low refractive capping layer 392 may also be in direct contact with the bank pattern 370.

[0191] The low refractive capping layer 392 may have a lower refractive index than the wavelength conversion patterns 340, 350 and the light transmission pattern 330. For example, the low refractive capping layer 392 is made of an inorganic material. For example, the low refractive capping layer 392 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. In some embodiments, a plurality of hollow particles may be formed inside the low refractive capping layer 392 to reduce the refractive index of the low refractive capping layer 392.

[0192] The low refractive capping layer 392 can prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the first color filter 231, the second color filter 233, and the third color filter 235. In addition, the low refractive capping layer 392 can prevent color materials contained in the first color filter 231, the second color filter 233, and the third color filter 235 from diffusing into a configuration different from the first color filter 231, the second color filter 233, and the third color filter 235, such as the first wavelength conversion pattern 340 and the second wavelength conversion pattern 350.

[0193] In some embodiments, the low refractive layer 391 and the low refractive capping layer 392 may surround the sides of the light blocking pattern 250 in the non-display area NDA. In some embodiments, the low refractive layer 391 may be in direct contact with the second base portion 310 in the non-display area NDA.

[0194] A bank pattern 370 may be located on one side of the low refractive capping layer 392 facing the display substrate 10. In some embodiments, the bank pattern 370 may be located directly above one side of the low refractive capping layer 392 and may be in direct contact with the low refractive capping layer 392.

[0195] In some embodiments, the bank pattern 370 may be arranged to overlap the non-light-emitting area NLA or the light-shielding area BA. In some embodiments, the bank pattern 370 may surround the first light-transmitting area TA1, the second light-transmitting area TA2, and the third light-transmitting area TA3 on a plane as shown in Fig. 9. The bank pattern 370 may define a space in which the first wavelength-converting pattern 340, the second wavelength-converting pattern 350, and the light-transmitting pattern 330 are arranged.

[0196] In some embodiments, the bank pattern 370 may be formed of, but is not limited to, a single pattern that is integrally connected to one another. In other embodiments, the portion of the bank pattern 370 surrounding the first transparent region TA1, the portion of the bank pattern 370 surrounding the second transparent region TA2, and the portion of the bank pattern 370 surrounding the third transparent region TA3 may be formed of separate patterns.

[0197] When the first wavelength converting pattern 340, the second wavelength converting pattern 350 and the light transmitting pattern 330 are formed by a method of ejecting an ink composition using a nozzle, i.e., an inkjet printing method, the bank pattern 370 can function as a guide for stably positioning the ejected ink composition at a desired position. That is, the bank pattern 370 can function as a partition.

[0198] In some embodiments, the bank pattern 370 may overlap the bank layer 150 .

[0199] 12, in some embodiments, the bank pattern 370 may be further located in the non-display area NDA. The bank pattern 370 may overlap the light blocking pattern 250 in the non-display area NDA.

[0200] In some embodiments, the bank pattern 370 may include an organic material having photocurability. In some embodiments, the bank pattern 370 may include an organic material having photocurability and including a light-shielding material. When the bank pattern 370 has a light-shielding property, it is possible to prevent light from penetrating between adjacent light-emitting regions in the display area DA. For example, the bank pattern 370 may prevent the emitted light LE emitted from the second light-emitting element ED2 from entering the first wavelength conversion pattern 340 overlapping with the first light-emitting area LA1. In addition, the bank pattern 370 may block or prevent external light from penetrating into the non-light-emitting area NLA and the non-display area NDA by being configured to be located below the bank pattern 370.

[0201] 9 and 12, a first wavelength converting pattern 340, a second wavelength converting pattern 350, and a light transmitting pattern 330 may be located on the lower part of the low refractive layer 391. In some embodiments, the first wavelength converting pattern 340, the second wavelength converting pattern 350, and the light transmitting pattern 330 may be located within the display area DA.

[0202] The light-transmitting pattern 330 may overlap the third light-emitting region LA3 or the third light-emitting element ED3. The light-transmitting pattern 330 may be located within a space defined by the bank pattern 370 in the third light-transmitting region TA3.

[0203] In some embodiments, the light-transmitting pattern 330 is an island-shaped pattern. Although the drawings show that the light-transmitting pattern 330 does not overlap the light-shielding area BA, this is merely an example. In some other embodiments, a portion of the light-transmitting pattern 330 may overlap the light-shielding area BA.

[0204] The light-transmitting pattern 330 can transmit incident light. The output light LE provided from the third light-emitting element ED3 may be blue light as described above. The output light LE, which is blue light, is output to the outside of the display device 1 through the light-transmitting pattern 330 and the third color filter 235. That is, the third light LE output from the third light-emitting area LA3 to the outside of the display device 1 may be blue light.

[0205] In some embodiments, the light transmitting pattern 330 may include a third base resin 331 and may further include a third scatterer 333 dispersed in the third base resin 331. In the following, the base resin, scatterer, and / or wavelength shifter contained in the light transmitting pattern 330 and the wavelength converting patterns 340 and 350 are named, and the ordinal numbers "first," "second," and "third" are attached to each configuration to distinguish between the light transmitting pattern 330 and the wavelength converting patterns 340 and 350, but the ordinal numbers "first," "second," and "third" written along with each configuration of the light transmitting pattern 330 and the wavelength converting patterns 340 and 350 are not limited thereto, and the order of the ordinal numbers can be changed and written along with each configuration.

[0206] The third base resin 331 is made of a material having high light transmittance. In some embodiments, the third base resin 331 is made of an organic material. For example, the third base resin 331 may include an organic material such as an epoxy-based resin, an acrylic-based resin, a cardo-based resin, or an imide-based resin.

[0207] The third scatterer 333 has a refractive index different from that of the third base resin 331 and can form an optical interface with the third base resin 331. For example, the third scatterer 333 can be light scattering particles. The third scatterer 333 is not particularly limited as long as it is a material that scatters at least a part of transmitted light, and can be, for example, metal oxide particles or organic particles. The metal oxide can be titanium oxide (TiO 2 ), zirconium oxide (ZrO 2 ), aluminum oxide (Al 2 O 3 ), indium oxide (In 2 O3 ), zinc oxide (ZnO) or tin oxide (SnO 2 ), and the material of the organic particles may be acrylic resin or urethane resin. For example, the third scatterer 333 according to an embodiment may be titanium oxide (TiO 2 ).

[0208] The third scatterer 333 can scatter light in random directions regardless of the direction of incidence of the incident light without substantially converting the wavelength of the light passing through the light-transmitting pattern 330. In some embodiments, the light-transmitting pattern 330 can be in direct contact with the bank pattern 370.

[0209] The first wavelength converting pattern 340 may overlap the first light emitting region LA1, the first light emitting element ED1, or the first light transmitting region TA1.

[0210] In some embodiments, the first wavelength conversion pattern 340 may be located within a space bounded by the bank pattern 370 in the first light transmitting region TA1.

[0211] In some embodiments, the first wavelength converting pattern 340 has an island pattern shape. Although the drawings show that the first wavelength converting pattern 340 does not overlap the light blocking area BA, this is only an example. In some other embodiments, a portion of the first wavelength converting pattern 340 may overlap the light blocking area BA. In some embodiments, the first wavelength converting pattern 340 may directly contact the bank pattern 370.

[0212] The first wavelength conversion pattern 340 may convert or shift the peak wavelength of the incident light to light with another specific peak wavelength by a first wavelength shifter 345 described below, and output the converted light. In some embodiments, the first wavelength conversion pattern 340 may convert the output light LE provided from the first light emitting element ED1 into red light having a peak wavelength in the range of 610 nm to 650 nm, and output the converted light.

[0213] In some embodiments, the first wavelength conversion pattern 340 may include a first base resin 341 and a first wavelength shifter 345 dispersed within the first base resin 341, and may further include a first scatterer 343 dispersed within the first base resin 341.

[0214] The first base resin 341 is made of a material having high light transmittance. In some embodiments, the first base resin 341 is made of an organic material. In some embodiments, the first base resin 341 may be made of the same material as the third base resin 331 or may include at least one of the materials exemplified as the constituent materials of the third base resin 331.

[0215] Examples of the first wavelength shifter 345 include quantum dots, quantum rods, phosphors, etc. For example, quantum dots can be particles that emit a specific color as electrons transition from the conduction band to the valence band.

[0216] The quantum dots may be semiconductor nanocrystal materials. The quantum dots have a specific band gap depending on their composition and size, and can emit light having a specific wavelength after absorbing light. Examples of the semiconductor nanocrystals of the quantum dots include group IV nanocrystals, group II-VI compound nanocrystals, group III-V compound nanocrystals, group IV-VI nanocrystals, or combinations thereof.

[0217] The II-VI compounds are bi-element compounds selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS and mixtures thereof; InZnP, AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHg ternary compounds selected from the group consisting of Se, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS, and mixtures thereof; and quaternary compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe, and mixtures thereof.

[0218] The III-V compound may be selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof; ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InAlP, InNAs, InNSb, InPAs, InPSb, GaAlNP, and mixtures thereof; and quaternary compounds selected from the group consisting of GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof.

[0219] The IV-VI compound may be selected from the group consisting of binary compounds selected from the group consisting of S, nS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof; ternary compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof; and quaternary compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof. The IV group element may be selected from the group consisting of Si, Ge, and mixtures thereof. The IV group compound may be a binary compound selected from the group consisting of SiC, SiGe, and mixtures thereof.

[0220] In this case, the two-element compound, three-element compound, or four-element compound may be present in the particle with a uniform concentration, or may be present in the same particle with partially different concentration distributions. Also, a quantum dot may have a core / shell structure in which one quantum dot surrounds another quantum dot. The interface between the core and shell may have a concentration gradient in which the concentration of the element present in the shell decreases toward the center.

[0221] In some embodiments, the quantum dot may have a core-shell structure including a core containing the nanocrystals described above and a shell surrounding the core. The shell of the quantum dot may act as a protective layer to prevent chemical denaturation of the core and maintain the semiconductor properties and / or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be a single layer or multiple layers. The interface between the core and the shell may have a concentration gradient in which the concentration of the elements present in the shell decreases toward the center. Examples of the shell of the quantum dot include metal or nonmetal oxides, semiconductor compounds, or combinations thereof.

[0222] For example, the metal or nonmetal oxide is SiO 2 , Al 2 O 3 , TiO 2, ZnO, MnO, Mn 2 O 3 , Mn 3 O 4 , CuO, FeO, Fe 2 O 3 , Fe 3 O 4 , CoO, Co 3 O 4 , binary compounds such as NiO, or MgAl 2 O 4 , CoFe 2 O 4 , NiFe 2 O 4 , CoMn 2 O 4 However, the present invention is not limited thereto.

[0223] Examples of the semiconductor compound include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, and AlSb, but the present invention is not limited thereto.

[0224] The light emitted by the first wavelength shifter 345 may have an emission wavelength spectrum full width of half maximum (FWHM) of about 45 nm or less, about 40 nm or less, or about 30 nm or less, thereby improving the color purity and color reproducibility of the color displayed by the display device 1. In addition, the light emitted by the first wavelength shifter 345 may be emitted in multiple directions regardless of the direction of incidence of the incident light. As a result, the side visibility of the first color displayed in the first light-transmitting region TA1 may be improved.

[0225] A portion of the output light LE provided from the first light emitting element ED1 may be emitted through the first wavelength conversion pattern 340 without being converted into red light by the first wavelength shifter 345. A component of the output light LE that is not converted by the first wavelength conversion pattern 340 and enters the first color filter 231 may be blocked by the first color filter 231. On the other hand, the red light of the output light LE converted by the first wavelength conversion pattern 340 is transmitted through the first color filter 231 and emitted to the outside. That is, the first light LE emitted to the outside of the display device 1 through the first light transmitting region TA1 may be red light.

[0226] The first scatterer 343 may have a refractive index different from that of the first base resin 341 and form an optical interface with the first base resin 341. For example, the first scatterer 343 may be a light scattering particle. Apart from that, a detailed description of the first scatterer 343 is omitted because it is substantially the same as or similar to the description of the third scatterer 333.

[0227] The second wavelength conversion pattern 350 may be located in a space partitioned by the bank pattern 370 in the second light transmitting region TA2.

[0228] In some embodiments, the second wavelength converting pattern 350 has an island pattern shape as shown in Fig. 19. In some embodiments, unlike the illustrated embodiment, a portion of the second wavelength converting pattern 350 may overlap the light blocking area BA. In some embodiments, the second wavelength converting pattern 350 may directly contact the bank pattern 370.

[0229] The second wavelength conversion pattern 350 may convert or shift the peak wavelength of the incident light to light of another specific peak wavelength using a second wavelength shifter 355 described below. In some embodiments, the second wavelength conversion pattern 350 may convert the output light LE provided from the second light emitting element ED2 into green light in the range of about 510 nm to about 550 nm and output the green light.

[0230] In some embodiments, the second wavelength conversion pattern 350 may include a second base resin 351 and a second wavelength shifter 355 dispersed within the second base resin 351, and may further include a second scatterer 353 dispersed within the second base resin 351.

[0231] The second base resin 351 is made of a material having high light transmittance. In some embodiments, the second base resin 351 is made of an organic material. In some embodiments, the second base resin 351 may be made of the same material as the third base resin 331 or may include at least one of the materials exemplified as the constituent materials of the third base resin 331.

[0232] Examples of the second wavelength shifter 355 include quantum dots, quantum rods, phosphors, etc. A more detailed description of the second wavelength shifter 355 is omitted because it is substantially the same as or similar to the description of the first wavelength shifter 345 described above.

[0233] In some embodiments, the first wavelength shifter 345 and the second wavelength shifter 355 are both made of quantum dots. In such cases, the particle size of the quantum dots that make up the second wavelength shifter 355 may be smaller than the particle size of the quantum dots that make up the first wavelength shifter 345.

[0234] The second scatterer 353 may have a refractive index different from that of the second base resin 351 and may form an optical interface with the second base resin 351. For example, the second scatterer 353 may be light scattering particles. A detailed description of the second scatterer 353 is substantially the same as or similar to the description of the first scatterer 343 and will therefore be omitted.

[0235] The second wavelength conversion pattern 350 is provided with the output light LE emitted from the third light emitting element ED3, and the second wavelength shifter 355 can convert the output light LE provided from the third light emitting element ED3 into green light having a peak wavelength in the range of about 510 nm to about 550 nm and emit it.

[0236] A portion of the output light LE, which is blue light, may pass through the second wavelength conversion pattern 350 without being converted into green light by the second wavelength shifter 355, and may be blocked by the second color filter 233. On the other hand, the green light converted by the second wavelength conversion pattern 350 of the output light LE passes through the second color filter 233 and is emitted to the outside. Therefore, the second light LE emitted to the outside of the display device 1 from the second light transmitting region TA2 may be green light.

[0237] In some embodiments, the capping layer 393 may surround the outer surface of the bank pattern 370 in the non-display area NDA. Also, the capping layer 393 may be in direct contact with the low refractive capping layer 392 in the non-display area NDA.

[0238] In some embodiments, the capping layer 393 is made of an inorganic material. In some embodiments, the capping layer 393 is made of the same material as the low refractive layer 391 or can include at least one of the materials mentioned in the description of the low refractive layer 391. When the low refractive layer 391 and the capping layer 393 are both made of inorganic materials, the low refractive layer 391 and the capping layer 393 can be in direct contact with each other in the non-display area NDA to form an inorganic-inorganic bond.

[0239] As described above, the sealing member 50 may be disposed between the color conversion substrate 30 and the display substrate 10 in the non-display area NDA.

[0240] The sealing member 50 may overlap the sealing layer 170. More specifically, the sealing member 50 may overlap the lower inorganic layer 171 and the upper inorganic layer 175, but not overlap the organic layer 173. In some embodiments, the sealing member 50 may be in direct contact with the sealing layer 170. More specifically, the sealing member 50 may be located directly above and in direct contact with the upper inorganic layer 175.

[0241] In some embodiments, the upper inorganic layer 175 and the lower inorganic layer 171 underlying the sealing member 50 may extend to the outside of the sealing member 50 .

[0242] The sealing member 50 may overlap the color pattern 250, the first color filter 231, and the bank pattern 370 in the non-display area NDA. In some embodiments, the sealing member 50 may be in direct contact with the capping layer 393 that covers the bank pattern 370.

[0243] As described above, the sealing member 50 may be in direct contact with the exposed upper surface 117u of the protective layer 117. The sealing member 50 may be arranged to overlap the second signal wiring WR2 arranged on the first conductive layer, but may not be arranged to overlap the first and third signal wirings WR1 and WR3 arranged on the second conductive layer. The sealing member 50 includes an organic insulating material, for example, the sealing member 50 may include a sealant. The protective layer 117 in contact with the sealing member 50 may include an inorganic material. Since the sealing member 50 is in direct contact with the protective layer 117 including an inorganic material, tight adhesion (or tight bonding) between the lower surface of the sealing member 50 and the upper surface 117u of the protective layer 117 is possible without an empty space being interposed between the lower surface of the sealing member 50 and the upper surface 117u of the protective layer 117. This significantly reduces the possibility that outside air or moisture entering from outside the sealing area SA passes between the sealing member 50 and the protective layer 117 and enters the display area DA, as shown in FIG.

[0244] In order to form a structure in which the sealing member 50 and the protective layer 117 are in direct contact with each other in the sealing region SA, as in the manufacturing method of the display device 1 in Figs. 16 to 18 described later, the thickness t130b of the via layer 130b in the sealing region SA is formed to be smaller than the thickness t130a of the via layer 130a in other regions (see Fig. 16), and after forming the contact holes CNT1 to CNT5 in the via layer 130' in Fig. 16 (see Fig. 17), the thickness is reduced over the entire surface of the via layer 130'_1. The process of reducing the thickness of the via layer 130'_1 is performed by an ashing process, and the via layer in the sealing region SA is removed by the ashing process (forming the first open portion OPa of the via layer 130), and the thickness t130 of the via layer 130 in the remaining region becomes smaller than the thickness t130a of the via layer 130a' before the ashing process. In addition, in the process of removing the via layer in the sealing area SA by the ashing process, the protective layer 117 below the via layer (see 130b in FIG. 17) may also be partially and / or entirely removed. Unlike the embodiment, if the second signal wiring WR2 is located in the second conductive layer or the second signal wiring WR2 is omitted and the signal wiring connected to the pad electrode PD is made of only the second conductive layer, when the protective layer 117 below the via layer (see 130b in FIG. 17) is partially and / or entirely removed in the process of removing the via layer in the sealing area SA by the ashing process, the signal wiring made of the second conductive layer may be exposed in the sealing area SA. In this case, not only is it difficult to expect the above-mentioned sealing member 50 to have a moisture permeation prevention function and / or an outside air intrusion prevention function, but corrosion of the signal wiring exposed in the sealing area SA may also occur.

[0245] However, in the case of the display device 1 according to the embodiment, as described above, the second signal wiring WR2 disposed on the first conductive layer is connected to the pad electrode PD outside the sealing area SA on the plane, and is connected to the first signal wiring WR1 of the second conductive layer, and the second signal wiring WR2 can be connected to the third signal wiring WR3 of the second conductive layer inside the sealing area SA on the plane. As a result, even if the protective layer 117 below the via layer (see 130b in FIG. 17) is also partially and / or entirely removed during the process of removing the via layer in the sealing area SA by the ashing process, the possibility that the second signal wiring WR2 disposed below the buffer layer 111 is exposed to the outside is greatly reduced, so that the above-mentioned sealing member 50 can easily perform the moisture permeation prevention and / or outside air intrusion prevention function, and there is an advantage that corrosion of the signal wirings WR1, WR2, and WR3 can also be prevented in advance.

[0246] As mentioned above, the filler 70 may be located in the space between the color conversion substrate 30, the display substrate 10, and the sealing member 50. In some embodiments, the filler 70 may be in direct contact with the capping layer 393 and the upper inorganic layer 175 of the encapsulation layer 170, as shown in Figures 9 and 12.

[0247] An anti-reflection film AF may be further disposed on a surface of the second base part 310 opposite to a surface in contact with the color filters 231, 233, and 235 of the display device 1 according to an embodiment. The anti-reflection film AF is disposed on a surface of the second base part 310 opposite to a surface in contact with the color filters 231, 233, and 235, and can minimize external light from entering the inside of the display device 1. The anti-reflection film AF includes a first surface located on the display surface side and a second surface (a surface in contact with the second base part 310) opposite to the first surface, and can minimize the external light from entering the inside of the display device 1 based on the principle of mutual interference between the external light reflected from the first surface and the external light reflected from the second surface. Although not shown in the drawings, the anti-reflection film AF is composed of a plurality of layers with adjusted refractive indexes, but is not limited thereto.

[0248] A method for manufacturing the display device 1 will now be described.

[0249] 16 to 23 are cross-sectional views illustrating steps of a method for manufacturing a display device according to an embodiment. When describing a method for manufacturing the display device 1 with reference to FIGS. 16 to 23, reference will also be made to FIGS.

[0250] A manufacturing method of a display device 1 according to one embodiment may include the steps of: preparing a display substrate 10 having a display area DA and a non-display area NDA located around the display area DA; bonding a color conversion substrate 30 to the display substrate 10 using a sealing member 50 disposed in a sealing area SA of the non-display area NDA; and filling a filler 70 between the sealing member 50, the display substrate 10, and the color conversion substrate 30.

[0251] As shown in Figures 12 and 16, the steps of preparing the display substrate 10 may include forming a first conductive layer including a second signal wiring WR2 and a lower light-shielding layer BML on a first base portion 110, forming a buffer layer 111 on the first conductive layer, forming a semiconductor layer ACT overlapping the lower light-shielding layer BML on the buffer layer 111, forming a gate insulating layer 115 on the semiconductor layer ACT, forming a second conductive layer on the gate insulating layer 115, including a first signal wiring WR1 and a third signal wiring WR3 electrically connected to the second signal wiring WR2, a first pad electrode PD1 connected to the outer end of the first signal wiring WR1, and a gate electrode GE overlapping the semiconductor layer ACT, forming a protective layer 117 on the second conductive layer, and forming a via layer 130' on the protective layer 117.

[0252] On a plane, the second signal wiring WR2 is disposed between the first signal wiring WR1 and the third signal wiring WR3, and the second signal wiring WR2 is disposed in the sealing area SA and may be disposed overlapping the sealing member 50 (see FIG. 12).

[0253] As shown in FIG. 16, in the step of forming the via layer 130', the thickness t130b of the via layer 130b on the sealing region SA may be smaller than the thickness t130a of the via layer 130a on the region other than the sealing region SA.

[0254] Next, as shown in Figures 12 and 17, the step of forming the display substrate 10 may further include a step of forming contact holes CNT1, CNT2, CNT3, CNT4, and CNT5 in the via layer 130' of Figure 16 after the step of forming the via layer 130'.

[0255] 12 and 18, the step of forming the display substrate 10 includes a step of forming contact holes CNT1, CNT2, CNT3, CNT4, and CNT5 in the via layer 130', followed by a step of reducing the thickness of the via layer 130'_1. This step is performed by an ashing process, in which the via layer in the sealing region SA is removed (forming the first open portion OPa of the via layer 130), and the thickness t130 of the via layer 130 in the remaining region becomes lower than the thickness t130a of the via layer 130a' before the ashing process.

[0256] 12 and 18, the step of forming the display substrate 10 may further include a step of forming the third conductive layer after the step of reducing the thickness of the via layer 130'_1. The third conductive layer may include a second pad electrode PD2, connecting electrodes CNE1, CNE2, and CNE3, and anode electrodes AE1, AE2, and AE3.

[0257] 12 and 20, the step of forming the display substrate 10 may further include, after the step of forming the third conductive layer, forming a bank layer 150. The bank layer 150 may include the above-mentioned second opening portion OPb. The arrangement and material of the bank layer 150 have been described in more detail above in the description of FIGS. 8 and 12, and therefore will not be described in detail below.

[0258] Next, as shown in Figures 12 and 21, the step of forming the display substrate 10 may further include, after the step of forming the bank layer 150, forming an emitting layer OL, a cathode electrode CE, a first capping layer 160, and a sealing layer 170 on the bank layer 150.

[0259] 12 and 22, the step of forming the display substrate 10 may further include disposing a sealing member 50 in the sealing region SA after the step of forming the encapsulation layer 170. As described above, the sealing member 50 may be in direct contact with the exposed upper surface 117u of the protective layer 117. The sealing member 50 may be arranged to overlap the second signal wiring WR2 arranged on the first conductive layer, but may not be arranged to overlap the first and third signal wirings WR1 and WR3 arranged on the second conductive layer. The sealing member 50 may include an organic insulating material, for example, the sealing member 50 may include a sealant. The protective layer 117 in contact with the sealing member 50 may include an inorganic material. Since the sealing member 50 is in direct contact with the protective layer 117 containing an inorganic substance, no empty space is present between the lower surface of the sealing member 50 and the upper surface 117u of the protective layer 117, allowing for close adhesion (or close bonding) between the lower surface of the sealing member 50 and the upper surface 117u of the protective layer 117.

[0260] In the case of the manufacturing method of the display device 1 according to the embodiment, as described above, the pad electrode PD is connected to the first signal wiring WR1 of the second conductive layer via the second signal wiring WR2 disposed on the first conductive layer outside the sealing area SA on the plane, and the second signal wiring WR2 can be connected to the third signal wiring WR3 of the second conductive layer inside the sealing area SA on the plane. As a result, even if the protective layer 117 below the via layer (see 130b in FIG. 17) is also partially and / or entirely removed during the process of removing the via layer in the sealing area SA by the ashing process, the second signal wiring WR2 disposed under the buffer layer 111 is significantly less likely to be exposed to the outside, so that the sealing member 50 can easily perform the function of preventing moisture permeation and / or preventing the intrusion of outside air, and there is an advantage that the corrosion of the signal wirings WR1, WR2, and WR3 can also be prevented in advance.

[0261] Other embodiments of the display device 1 will be described below.

[0262] FIG. 24 is a cross-sectional view of a display device according to another embodiment.

[0263] 24, the pad electrode PD_1 of the display device 2 according to the present embodiment is different from the display device 1 according to FIG 12 in that it may be the first power pad electrode or the driving pad electrode. Thus, the third signal wiring WR3 connected to the pad electrode PD_1 is not connected to the cathode electrode CE, unlike the third signal wiring WR3 of FIG 12, and may be electrically connected to the first voltage wiring VL1 of FIG 3.

[0264] The rest of the description has been given above in connection with FIG. 12, so a detailed description will be omitted below.

[0265] 25 is a plan view showing a non-display area and a display area of ​​a display device according to still another embodiment, and FIG 26 is a cross-sectional view of the display device according to the embodiment taken along line X3-X3' in FIG 25.

[0266] Referring to Figures 25 and 26, the display device 3 according to this embodiment differs from the display device 1 according to Figures 8 and 12 in that the first signal wiring WR1_1 and the second signal wiring WR2_1 can be directly connected via the second contact hole CNT2_1.

[0267] In the display device 3 according to the present embodiment, the first connecting electrode CNE1 in FIG. 12 can be omitted.

[0268] The rest of the description has been given above in connection with FIG. 12, so a detailed description will be omitted below.

[0269] 27 is a plan view showing a non-display area and a display area of ​​a display device according to still another embodiment, and FIG 28 is a cross-sectional view of the display device according to the embodiment taken along line X3-X3' in FIG 27.

[0270] Referring to Figures 27 and 28, the display device 4 according to this embodiment differs from the display device 3 according to Figures 25 and 26 in that the second signal wiring WR2_2 and the third signal wiring WR3_1 can be directly connected via the fourth contact hole CNT4_1.

[0271] In the display device 4 according to the present embodiment, the second connecting electrode CNE2 in FIGS. 25 and 26 can be omitted.

[0272] The rest of the description has been given above in connection with Figures 12, 25, and 26, so detailed description will be omitted below.

[0273] FIG. 29 is a cross-sectional view of a display device according to still another embodiment.

[0274] Referring to FIG. 29, the upper surface 117u_1 of the protective layer 117_1 of the display device 5 according to this embodiment differs from the display device 1 according to FIG. 12 in that it may include a first upper surface 117ua in the area excluding the sealing area SA, and a second upper surface 117ub in the sealing area SA.

[0275] The roughness of the second upper surface 117ub may be greater than that of the first upper surface 117ua. The reason why the roughness of the second upper surface 117ub is greater than that of the first upper surface 117ua is that in the process of forming the via layer 130 by the ashing process of Fig. 18, the second upper surface 117ub of the exposed protective layer 117_1 in the sealing region SA is physically in contact with the surface of the second upper surface 117ub by the ashing gas or the like used in the ashing process.

[0276] The rest of the description has been given above in connection with FIG. 12, so a detailed description will be omitted below.

[0277] FIG. 30 is a cross-sectional view of a display device according to still another embodiment.

[0278] 30, the protective layer 117_2 of the display device 6 according to this embodiment differs from the display device 1 according to FIG. 12 in that the thickness t117_1 in the sealing area SA is smaller than the thickness t117 in the remaining area.

[0279] The reason why the thickness t117_1 of the protective layer 117_2 in the sealing region SA is smaller than the thickness t117 in the remaining region is that, during the process of forming the via layer 130 by the ashing process of Figure 18, the ashing gas used in the ashing process physically comes into contact with the exposed protective layer 117_2 in the sealing region SA, thereby reducing the thickness t117_1 of the protective layer 117_2 on the sealing region SA.

[0280] The rest of the description has been given above in connection with FIG. 12, so a detailed description will be omitted below.

[0281] FIG. 31 is a cross-sectional view of a display device according to still another embodiment.

[0282] Referring to FIG. 31, the upper surface 117u_1 of the protective layer 117_3 of the display device 7 according to this embodiment differs from the display device 6 according to FIG. 30 in that it includes a first upper surface 117ua in the area excluding the sealing area SA, and a second upper surface 117ub in the sealing area SA.

[0283] The roughness of the second upper surface 117ub may be greater than that of the first upper surface 117ua. The reason why the roughness of the second upper surface 117ub is greater than that of the first upper surface 117ua is that, in the process of forming the via layer 130 by the ashing process of FIG. 18, the second upper surface 117ub of the exposed protective layer 117_1 in the sealing region SA is physically contacted with the surface of the second upper surface 117ub by an ashing gas or the like used in the ashing process.

[0284] The rest of the description has been given above in connection with FIG. 30, so detailed description will be omitted below.

[0285] FIG. 32 is a cross-sectional view of a display device according to still another embodiment.

[0286] 32, the protective layer 117_4 of the display device 8 according to this embodiment differs from the display device 6 according to FIG. 30 in that it is not disposed in the sealing area SA.

[0287] 18, the thickness of the protective layer 117_4 on the sealing area SA is reduced and the protective layer 117_4 is removed because the ashing gas used in the ashing process physically contacts the exposed protective layer 117_4 in the sealing area SA during the formation of the via layer 130 by the ashing process of Fig. 18. Since the protective layer 117_4 is not disposed in the sealing area SA, the upper surface 111u of the buffer layer 111 is exposed in the sealing area SA, and the exposed upper surface 111u may directly contact the sealing member 50.

[0288] The rest of the description has been given above in connection with FIG. 30, so detailed description will be omitted below.

[0289] FIG. 33 is a cross-sectional view of a display device according to still another embodiment.

[0290] Referring to FIG. 33, the upper surface 111u_1 of the buffer layer 111_1 of the display device 9 according to this embodiment differs from the display device 8 according to FIG. 32 in that it may include a first upper surface 111ua in the area excluding the sealing area SA, and a second upper surface 111ub in the sealing area SA.

[0291] The roughness of the second upper surface 111ub may be greater than that of the first upper surface 111ua. The reason why the roughness of the second upper surface 111ub is greater than that of the first upper surface 111ua is that, in the process of forming the via layer 130 by the ashing process of FIG. 18, ashing gas or the like used in the ashing process physically contacts the surface of the second upper surface 111ub of the exposed buffer layer 111_1 in the sealing region SA.

[0292] The rest of the description has been given above in connection with FIG. 32, so a detailed description will be omitted below.

[0293] Although the embodiment of the present invention has been described above with reference to the accompanying drawings, those skilled in the art will understand that the present invention can be embodied in other specific forms without changing the technical idea or essential features of the present invention. Therefore, it should be understood that the above embodiment is illustrative in all respects and is not limiting.

Claims

1. a first substrate defining a display area and a non-display area located around the display area; a second substrate disposed on the first substrate; and a sealing member disposed in a sealing region of the non-display region and connecting the first substrate and the second substrate; The first substrate is A first base portion, a first conductive layer including a first signal wiring and a lower light-shielding layer on the first base portion; a buffer layer on the first conductive layer; a semiconductor layer on the buffer layer overlapping the lower light-shielding layer; a gate insulating layer on the semiconductor layer; and a second signal wiring and a third signal wiring electrically connected to the first signal wiring on the gate insulating layer, and a second conductive layer including a gate electrode overlapping the semiconductor layer; the first signal wiring is disposed between the second signal wiring and the third signal wiring on a plane; The display device, wherein the first signal wiring is arranged to overlap the sealing member.

2. The display device of claim 1 , wherein the second conductive layer further comprises a first pad connected to an outer end of the second signal line.

3. The display device according to claim 2 , wherein the first substrate further comprises a protective layer on the second conductive layer.

4. The display device according to claim 3 , wherein the first substrate further includes a via layer on the protective layer.

5. The display device of claim 4 , wherein the via layer comprises an organic insulating material.

6. The display device according to claim 5 , wherein the via layer does not overlap the sealing member.

7. The display device according to claim 6 , wherein the sealing member is in direct contact with the protective layer.

8. 5. The display device of claim 4, wherein the first substrate further includes a third conductive layer that is connected to a second pad, a first connecting electrode, a second connecting electrode, and the lower light-shielding layer and the semiconductor layer, respectively, on the via layer, and includes a first electrode on the display area.

9. The display device of claim 8 , wherein the second pad overlaps the first pad and is connected to the first pad through a first contact hole penetrating the via layer and the protection layer.

10. The display device of claim 8 , wherein the first connecting electrode overlaps with the second signal wiring and the first signal wiring.

11. 11. The display device of claim 10, wherein the first connecting electrode is connected to the second signal wiring through a second contact hole penetrating the via layer and the protective layer, and is connected to the first signal wiring through a third contact hole penetrating the via layer, the protective layer, and the buffer layer.

12. 12. The display device of claim 11, wherein the second connecting electrode is connected to the first signal wiring through a fourth contact hole penetrating the via layer, the protective layer, and the buffer layer, and is connected to the first signal wiring through a fifth contact hole penetrating the via layer and the protective layer.

13. 13. The display device of claim 12, wherein the first substrate further includes a bank that partially exposes an upper surface of the first electrode in the display region, an organic layer disposed on the upper surface of the first electrode exposed by the bank, and a second electrode on the organic layer, and the first electrode, the organic layer, and the second electrode constitute a light-emitting element.

14. The display device according to claim 13 , wherein the third signal wiring is electrically connected to the light emitting element.

15. The display device of claim 13 , wherein the bank is disposed up to the non-display region, exposing an upper surface of the second pad in the non-display region and exposing an upper surface of the protective layer in the sealing region.

16. The display device of claim 1 , wherein the second substrate comprises a second base portion facing the first base portion, a color filter layer on the second base portion, and a light conversion pattern layer on the color filter layer.

17. The display device of claim 16 , further comprising a filler material between the first substrate and the second substrate.

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