Integrated Circuit for Flat Panel Display

Abstract

An integrated circuit (10) for a flat panel display, the integrated circuit (10) comprising: a light-emitting optoelectronic device (15); a thin-film transistor (20) formed on the optoelectronic device (15) and operatively connected to the optoelectronic device (15); and a reflective layer (30) positioned above the optoelectronic device (15) and arranged to reflect light emitted by the optoelectronic device (15) towards the thin-film transistor (20) in a direction towards the optoelectronic device (15). An integrated circuit for a flat panel display.

Description

Technical Field

[0001] The present invention relates to integrated circuits for flat panel displays, and more particularly to monolithic displays.

Background Art

[0002] Micro-LED displays are a new flat panel display technology that uses an array of tiny LEDs to form individual pixels. Micro-LED displays have many advantages compared to previous liquid crystal displays (LCDs). For example, since power is supplied only when the pixel is lit and can be completely turned off otherwise, micro-LED displays are much more energy-efficient and have an excellent contrast ratio. Furthermore, since micro-LED displays have a fast response time, they are suitable for extended reality (AR) and virtual reality (VR) applications where high pixel density and high frame rate are particularly useful.

[0003] Micro-LED displays are often made by transferring micro-LEDs from a source wafer onto a receiver substrate (display backplane). This allows an RGB display to be made from individual red, green, and blue source micro-LED wafers. Since the pitch of the micro-LEDs on the source wafer often differs from the pixel pitch of the backplane, technology is required to transfer them to the correct positions.

[0004] However, moving the pixels individually can be quite time-consuming and increase the cost of the display by using an expensive "pick and place" machine to manufacture one display. To reduce the manufacturing time, using an adhesive film to transport multiple pixels onto the substrate at once has also been considered.

[0005] However, the above process has many problems. In particular, the yield of the transfer process is not 100%, and as a result, a backplane with missing or misaligned pixels is produced. This results in further repair work to manufacture a fully functional display, significantly increasing the manufacturing cost of these components. Since a display has up to 24 million sub-pixels, a success rate of at least 99.99999% is required. Currently, the best success rate would be around 99%. Such problems are particularly prominent when manufacturing displays with very high resolutions, pixel densities, and contrast ratios, such as displays for augmented reality (AR) or virtual reality (VR) devices. Since the demand for such devices is likely to increase in the future, a better method for manufacturing micro-LED displays is needed.

[0006] One way to avoid transferring LEDs from the source wafer to the backplane is to directly process the backplane on top of the micro-LEDs on the source wafer to manufacture a monolithic display. For example, a sapphire substrate may form the lower layer of a monolithic display on which micro-LEDs and thin-film transistors (TFTs) are deposited. Since TFTs are usually opaque to light, the area of each pixel needs to be shared by the TFT and the micro-LED, reducing the current that can be driven from the display. Furthermore, if high-mobility TFTs (such as LTPS) are used to reduce the footprint of the TFTs, the high-temperature processes required for LTPS manufacturing will significantly degrade the performance of the micro-LEDs.

[0007] A further problem with the above monolithic displays is that since light is emitted from the LEDs in all directions, only a part of it is transmitted in the intended direction from the monolithic display. SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] Therefore, an object of the present invention is to overcome one or more of the above problems.

Means for Solving the Problem

[0009] According to a first aspect of the present invention, there is provided an integrated circuit for a flat panel display, the integrated circuit including a light-emitting optoelectronic device having a bottom surface facing an upper surface, a thin-film transistor formed on the upper surface of the light-emitting optoelectronic device, the thin-film transistor being operably connected to the optoelectronic device, and a reflective layer formed between the upper surface of the optoelectronic device and the thin-film transistor, the reflective layer being arranged to reflect light emitted by the optoelectronic device such that the reflected light is emitted in a direction corresponding to the bottom surface of the integrated circuit from the integrated circuit.

[0010] In other words, the reflective layer reflects the upwardly propagating light from the optoelectronic device downward. Thus, the present invention departs from the arrangement of conventional micro-LED circuits arranged such that light is emitted upward (i.e., in a direction corresponding to the growth direction and opposite to the substrate). Instead, by using the reflective layer, all or most of the light can be emitted downward through the bottom surface of the integrated circuit. In this way, the reflective layer causes a larger proportion of the light from the optoelectronic device to be directed downward, thereby increasing the efficiency of the integrated circuit and, as a result, the efficiency of the resulting flat panel display.

[0011] By improving the efficiency of the integrated circuit, the optoelectronic device can be operated at a low temperature to obtain the same output light, thereby improving the performance and lifespan of the integrated circuit. Further, since the light from the optoelectronic device is emitted downward, the thin-film transistor does not absorb or scatter the emitted light from the optoelectronic device, reducing the possibility of any high-intensity light damaging the thin-film transistor. This also means that there is no need to share the area of the integrated circuit between the thin-film transistor and the optoelectronic device, which is similar to known monolithic micro-LED displays that have an upward emission direction and where the transistors have to be deposited so as not to block most of the upwardly emitted light. In this way, the thin-film transistor can cover a larger area of the integrated circuit without blocking the light from the optoelectronic device, enabling the thin-film transistor to supply more current to the integrated circuit.

[0012] The integrated circuit comprises a monolithic device in which an optoelectronic device and a thin-film transistor are grown on the same substrate (where the substrate may be removed later). Thus, the term "formed on" as used herein preferably means that these components are not separately manufactured and joined together at separate manufacturing steps, but rather that the components are grown or deposited on a particular layer. Thus, the thin-film transistor is deposited on a layer above the light-emitting optoelectronic device.

[0013] Alternatively, the integrated circuit comprises a light-emitting optoelectronic device, preferably an LED, and a thin-film transistor deposited on the optoelectronic device such that the optoelectronic device and the thin-film transistor overlap. More specifically, the optoelectronic device and the thin-film transistor overlap when viewed along the growth direction. There may be one or more layers deposited between the optoelectronic device and the thin-film transistor.

[0014] As used herein, the terms "top," "bottom," "upper," and "lower" refer to the directions and relative positions as depicted in the figures. It will be understood that these terms do not require that any of the embodiments described herein be operated only in a particular direction. The term "top" indicates the growth direction, i.e., the growth direction with respect to the substrate (which may or may not be removed). In other words, the growth direction is perpendicular to the plane defined by the substrate, optoelectronic device, reflective layer, and / or thin film transistor. The "direction corresponding to the bottom surface of the light-emitting diode" is intended to refer to the bottom surface of the integrated circuit and requires that the light emitted upward be reflected by the reflective layer and directed out from the bottom surface of the integrated circuit. As used herein, the term "integrated circuit" encompasses all features (such as optoelectronic devices and thin film transistors) described in appended claim 1. It will be understood that the term "integrated circuit" may also refer to some of these features or to a circuit having any number of additional components, such as additional thin film transistors and / or one or more capacitors. The term "backplane" may encompass all components of the integrated circuit deposited on the optoelectronic device to control the function of the optoelectronic device. The backplane may include, for example, one or more thin film transistors and capacitors.

[0015] The light-emitting optoelectronic device preferably comprises a number of semiconductor layers deposited sequentially, and the thin film transistor comprises a plurality of layers deposited sequentially on the optoelectronic device.

[0016] The integrated circuit may further include a substrate having a top surface and an opposing bottom surface, the optoelectronic device is formed on the top surface of the substrate, and the reflective layer is arranged such that the reflected light is emitted through the bottom surface of the substrate. In this way, the substrate provides a base layer on which a plurality of integrated circuits can be formed, thereby simplifying the manufacture of flat panel displays. In particular, the integrated circuit is monolithically formed of a light-emitting optoelectronic device deposited on the substrate and a thin-film transistor deposited on the light-emitting element, and a reflective layer is deposited therebetween. In contrast to conventional upward-emitting monolithic LED displays, in the present invention, light is reflected so as to be emitted through the substrate. Therefore, when the substrate is in a predetermined position of the integrated device, the substrate is at least partially transparent. By removing the substrate from the remainder of the integrated circuit (and flat panel display), the LED and the integrated circuit can be transferred to a flexible substrate to make a flexible display.

[0017] The substrate may be a sapphire wafer substrate, preferably a sapphire wafer substrate with a polished bottom surface. The substrate may be thinned by backgrinding or chemical thinning after the manufacture of the integrated circuit. The substrate is preferably at least 70% transparent. The substrate may be patterned on the top surface, thereby reducing the stress of the layer that will grow on the substrate later.

[0018] The integrated circuit may further include one or more color filters provided on the bottom surface of the substrate. In this way, a flat panel display having color pixels can be easily provided without the need to provide different types of optoelectronic devices in the integrated circuit. The integrated circuit may further include one or more lenses disposed under the bottom surface of the substrate, and the one or more lenses are arranged to parallelize the light propagating through the substrate.

[0019] The thin-film transistor may be operatively connected to the optoelectronic device by one or more interlayer connections, for example, by one or more vias penetrating the reflective layer. In particular, the integrated circuit may comprise a cathode layer and an anode layer. The cathode layer may be disposed on the bottom surface of the optoelectronic device, and the anode layer may be disposed on the upper surface of the optoelectronic device. The integrated circuit may comprise a first via connecting the thin-film transistor to the cathode layer and a second via connecting the thin-film transistor to the anode layer. Alternatively, the thin-film transistor may be disposed between the reflective layer and the optoelectronic device.

[0020] The thin-film transistor may comprise an organic thin-film transistor. Advantageously, the organic thin-film transistor may be deposited on the integrated circuit at a temperature much lower than the temperature required to deposit an inorganic thin-film transistor. By forming the organic thin-film transistor at a low temperature, the reflective layer and / or the optoelectronic device are not damaged by high-temperature treatment. The use of an organic thin-film transistor is particularly suitable for the present invention because the higher evaporation temperature required for the formation of an inorganic TFT can cause movement of a part of the material of the reflective layer from the intended position.

[0021] The organic thin-film transistor preferably comprises an organic semiconductor layer disposed between a source terminal and a drain terminal and a gate electrode disposed to control the current in the organic semiconductor layer upon voltage application. The organic thin-film transistor may be of the type described in WO2022 / 101644, may comprise a front gate and a back gate, or may comprise only a single gate. The organic semiconductor layer preferably may comprise a small-molecule organic semiconductor and an organic binder. Preferably, the organic binder comprises a semiconductor binder having a dielectric constant k in the range of 3.4 ≦ k ≦ 8.0.

[0022] The organic semiconductor layer of the OTFT preferably comprises a low-molecular organic semiconductor and an organic binder. The term "low-molecular" means a low-molecular weight organic compound having a molecular weight of up to, for example, 900 Daltons, in the ordinary sense in the art. The organic semiconductor (OSC) layer of the OTFT preferably comprises at least one semiconductor ink containing a low-molecular organic semiconductor and an organic binder. Preferably, the OSC layer comprises a polycrystalline low-molecular organic semiconductor, preferably in combination with an organic binder. Preferably, the polycrystalline low-molecular organic semiconductor comprises a polyacene compound. Preferably, the organic binder is an organic semiconductor binder, preferably comprising a triarylamine moiety.

[0023] Preferably, the semiconductor ink of the organic semiconductor layer comprises a formulation of discrete polyacene molecules and / or an organic (oligomer / polymer) binder. More preferably, the semiconductive ink forming the OSC layer comprises a polymer binder containing polyacene and at least one triarylamine moiety. The triarylamine moiety preferably contains one or more functional groups selected from the group consisting of CN and C1-4 alkoxy. Preferably, the ink comprises a low-molecular polyacene and / or a polytriarylamine binder formulation. Preferred semiconductor inks include those described in WO2010 / 0020329, WO2012 / 003918, WO2012 / 164282, WO2013 / 000531, WO2013 / 124682, WO2013 / 124683, WO2013 / 124684, WO2013 / 124685, WO2013 / 124686, WO2013 / 124687, WO2013 / 124688, WO2013 / 159863, WO2014 / 083328, WO2015 / 028768, WO2015 / 058827, WO2014 / 005667, WO2012 / 160383, WO2012 / 160382, WO2016 / 015804, WO2017 / 0141317, WO2018 / 078080.

[0024] The reflective layer may be a metal layer, preferably comprising one or more of Al, Ag, Mo, and / or Au. Alternatively, the reflective layer may comprise a distributed Bragg reflector. The distributed Bragg reflector may be particularly advantageous when the integrated circuit is used as part of a liquid crystal display since the distributed Bragg reflector provides polarization of the reflected light.

[0025] The integrated circuit may comprise an anode layer deposited above the optoelectronic device and below the reflective layer, the anode layer preferably having a transparency of at least 70%. Preferably, the anode comprises indium tin oxide (ITO).

[0026] The integrated circuit may comprise one or more additional transistors formed on the optoelectronic device. The integrated circuit may comprise a capacitor formed on the optoelectronic device. In particular, the integrated circuit according to the present invention may comprise an optoelectronic device and a backplane formed on the optoelectronic device and operatively connected to the optoelectronic device, the backplane comprising at least one transistor. The backplane may comprise a single transistor and one capacitor per LED to form a 1T-1C backplane arrangement, or two transistors and one capacitor (e.g., a switch TFT and a drive TFT) to form a 2T-1C backplane arrangement. In the present invention, the backplane is directly processed on top of the optoelectronic device on the substrate wafer, with a reflective layer disposed between the optoelectronic device and the components of the backplane to reflect the upwardly emitted light downward.

[0027] Preferably, the reflective layer covers at least 50% of the area of the optoelectronic device. More specifically, the surface of the reflective layer parallel to the plane of the substrate (perpendicular to the growth direction) covers at least 50% of the area of the optoelectronic device. In other words, the reflective layer is offset vertically from the optoelectronic device and overlaps the optoelectronic device, so that at least 50% of the area of the optoelectronic device in the plane parallel to the substrate is located under the reflective layer. By providing a reflective layer that covers a larger proportion of the optoelectronic device, more of the light propagating upward from the optoelectronic device is reflected downward, further enhancing the efficiency of the integrated circuit.

[0028] The reflective layer may provide the gate electrode of the thin-film transistor. In particular, the reflective layer may be provided with a reflective and conductive material so as to provide both a reflective function of reflecting the light emitted upward by the optoelectronic device and an electrical contact for connecting to the thin-film transistor. In particular, the reflective layer may be provided with a surface that provides the back-gate contact of the thin-film transistor. By doing so, the structure of the integrated circuit may be simplified and the manufacturing time may be shortened.

[0029] The optoelectronic device may include an LED. Preferably, the optoelectronic device may be a micro-LED. Alternatively, the optoelectronic device may include a QD-LED, an organic LED, or other types of LEDs of any suitable size.

[0030] The optoelectronic device may be configured to emit light at a predetermined wavelength or within a predetermined wavelength band. In this way, multiple integrated circuits each emitting light at a different wavelength or wavelength band may be provided, thereby providing a color display. For example, the optoelectronic device may be configured to emit red, green, and blue light for an RGB display.

[0031] According to another aspect of the present invention, there is provided a flat panel display component comprising an array of integrated circuits as described above. In particular, the flat panel display component may comprise a monolithic flat panel display component. The flat panel display component may comprise a plurality of integrated circuits as defined in the appended claims, fabricated on a single substrate. In particular, the display component may comprise a substrate and a plurality of sequentially deposited layers fabricated to form an array of integrated circuits as defined in any of the appended claims. The flat panel display component may comprise a single reflective layer deposited on an array of optoelectronic devices.

[0032] The array of integrated circuits may be deposited on a single substrate to form a monolithic display. The integrated circuits may be removed from the substrate after fabrication.

[0033] The flat panel display component may further comprise a circuit adhered to the upper surface of the flat panel display component for driving the display electronics. The circuit may comprise additional transistors, capacitors, and / or any further circuitry for individually addressing each of the integrated circuits. The circuit may be referred to as the "backplane" of the flat panel display.

[0034] According to another aspect of the present invention, there is provided a method of manufacturing a flat panel display component, comprising depositing an array of light-emitting optoelectronic devices on an upper surface of a substrate, disposing a reflective layer on the array of optoelectronic devices, depositing an array of thin film transistors on the reflective layer, and operably connecting each thin film transistor to a corresponding optoelectronic device.

[0035] By providing a reflective layer between the optoelectronic device and the thin-film transistor, the reflective layer reflects the upward light from the optoelectronic device downward. In a conventional monolithic device, the upper surface of the component (with the TFT) faces the display direction, whereas in this method, the display component may be arranged such that the lower side of the display component faces the display direction. The reflective layer directs a larger proportion of the light from the optoelectronic device downward, enhancing the efficiency of the flat panel display. By improving the efficiency of the integrated circuit, the optoelectronic device can be operated at a lower temperature to obtain the same output of light, improving the performance and lifespan of the flat panel display. Further, since the light from each optoelectronic device is emitted downward, the thin-film transistor does not absorb or scatter the emitted light from the optoelectronic device, and the possibility of high-brightness light damaging the thin-film transistor is also reduced. This also means that it is not necessary to share the area of each integrated circuit between the corresponding thin-film transistor and optoelectronic device. In this way, the thin-film transistor may cover a larger area of each integrated circuit without blocking the light from the optoelectronic device, whereby the thin-film transistor can supply more current to the flat panel display.

[0036] The deposition may be performed by chemical vapor deposition or vapor phase epitaxy.

[0037] This method may further include peeling the substrate from the layer on the substrate. This can be done using a laser. Advantageously, this enables the transfer of the LED and the integrated circuit to another substrate, such as a flexible substrate, to fabricate a flexible display.

[0038] This method may further include etching a plurality of vias through the reflective layer to provide an electrical path from each thin-film transistor to its respective anode layer and cathode layer.

[0039] The above aspects relate to integrated circuits for flat panel displays, flat panel display components, and methods of manufacturing flat panel display components. However, it will be understood that the optoelectronic device may be a photodetective optoelectronic device rather than a light-emitting optoelectronic device. Thus, an optical sensor such as a CCD array may be provided. For example, an integrated circuit for an optical sensor is provided, the integrated circuit including a photosensitive optoelectronic device having a top surface and an opposing bottom surface, a thin film transistor formed on the top surface of the photosensitive optoelectronic device and operably connected to the optoelectronic device, and a reflective layer formed between the top surface of the optoelectronic device and the thin film transistor and arranged to reflect light propagating toward the thin film transistor in a direction toward the optoelectronic device.

[0040] The photodetective optoelectronic device may be a photodiode.

[0041] Those skilled in the art will understand that the features of any of the devices described herein may be provided as features of a method, and vice versa. Also, it will be understood that certain combinations of the various features described and defined in any aspect herein may be implemented and / or supplied and / or used independently.

[0042] Furthermore, it is to be understood that the present invention has been described herein purely by way of example and that modifications in detail are possible within the scope of the present invention.

Brief Description of the Drawings

[0043]

Figure 1

Figure 2A

Figure 2B

Figure 3

Figure 4

Figure 5

Figure 6

DETAILED DESCRIPTION OF THE INVENTION

[0044] Next, purely by way of example, one or more embodiments will be described with reference to the accompanying drawings.

[0045] In the following description and the accompanying drawings, corresponding features will preferably be identified using corresponding reference numerals, obviating the need to describe the common features in detail for each embodiment.

[0046] For clarity and brevity, the terms "top", "bottom", "upper", and "lower" refer to the directions and relative positions depicted in the figures. It will be understood that these terms do not require that any of the embodiments described herein be operated only in a particular orientation. Further, unless explicitly specified otherwise, terms such as "positioned", "positioned", "arranged", etc. are merely intended to express the relative position of two components or layers and do not exclude the possibility that other components are arranged between the two components.

[0047] FIG. 1 is a schematic view of a display component 1 comprising an array of pixels 5. Only an array having 40 pixels 5 is depicted in FIG. 1, but it will be understood that any number of pixels 5 may be present in the array to provide a particular resolution. As will be described in more detail below, the pixel 5 may comprise sub-pixels configured to emit light in a predetermined color, for example to provide an RGB display. Further, the pixels may be arranged at a particular pixel density and / or pixel pitch to provide a display suitable for various devices. For example, a high density of pixels 5 would be particularly suitable for the display of a VR or AR headset. To provide a display device, other components may be combined with the display component 1. For example, a protective layer, a frame, electrical connections, and / or any other suitable components may be combined with the display component 1.

[0048] Each pixel 5 (or sub-pixel) of the display component 1 can be individually addressed, and the state of each pixel 5 is controlled by one or more thin-film transistors (TFTs). The TFTs are used as switching devices for controlling the operation of each pixel and / or as driving devices for driving the pixels. For example, the TFTs function as switches and current drivers for a micro-LED display, an organic LED (OLED) display, or a quantum dot light-emitting diode (QD-LED) display. Each pixel of the display component 1 is provided by one or more integrated circuits 10 provided on the substrate 12. For example, one integrated circuit 10 may provide the pixels 5 of the display component 1, or a plurality of integrated circuits 10 may be used to provide a plurality of sub-pixels of the display component 1. As shown in FIG. 1 for an exemplary pixel 5, three integrated circuits 10 are provided for each pixel 5. Two methods of configuring the integrated circuit 10 for a color display will be described in more detail in connection with FIGS. 5 and 6. The TFTs may be used to operate the LEDs that provide the backlight zones of a liquid crystal display (LCD). In this case, each LED provides backlight to a plurality of LCD pixels. By dividing the backlight into a plurality of backlight zones and controlling each zone with a separate TFT, the zones can be completely turned off when not needed, thereby improving the energy efficiency and contrast ratio of the LCD. For example, one TFT may be used to switch the LED backlight of a zone of about 100 LCD pixels. Therefore, the term "integrated circuit 10" as used herein may refer to an individual pixel 5 of the display or to a backlight zone provided by an LED, and each backlight zone corresponds to a plurality of LCD pixels.

[0049] The display component 1 in FIG. 1 is a monolithic display component 1, and the integrated circuit 10 is deposited (or "grown") on the substrate 12 rather than being transferred to the substrate 12 from a separate ("source wafer"). Thus, the substrate 12 of the display component 1 may be referred to as a source wafer. In a monolithic display, the integrated circuit 10 may be manufactured by forming a number of layers on the substrate 12. This may be achieved using chemical vapor deposition (CVD) techniques such as plasma-enhanced chemical vapor deposition (PECVD) or metal-organic chemical vapor deposition (MOCVD), or epitaxy techniques such as metal-organic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE). By these techniques, thin films (or "layers") of material can be deposited on the substrate 12 to form each integrated circuit 10. Subsequently, a part of the layer may be selectively removed in a process known as patterning, which may be achieved by (dry) etching. In this way, adjacent integrated circuits can be electrically insulated from each other, and channels for electrical paths through the layers can be formed.

[0050] Next, the process of individually addressing the pixels 5 will be described in more detail with reference to FIGS. 2A and 2B. FIG. 2A shows a transistor array 100 for the backplane of a display, and the transistor array 100 comprises a plurality of integrated circuits 102 arranged in a regular array of rows and columns. Each integrated circuit 102 includes a thin film transistor (TFT) 108. Similar to a conventional active matrix display, each TFT serves as a switch that controls the application of current to the corresponding pixel capacitor 101, and each integrated circuit 102 may comprise a 1T-1C, 2T-1C, or other combination of transistors and capacitors.

[0051] The backplane includes a series of row (scan or gate) lines 103 connected to the gates of each TFT 108 in a common row, and each row line 103 is connected to a row driver 104 for applying a voltage to the gates of each TFT in a specific row. The source or drain terminals of each TFT 108 in a specific column are connected to column (or data) lines 105. A row driver 106 is connected to each gate line 105, and a column driver 106 is connected to each data line 105. Each integrated circuit 102 is individually addressable by supplying a voltage pulse with the row driver 104 while supplying the necessary data voltage to the source or drain terminal of each TFT 108 to turn on each TFT 108 in the row. By scanning each row in sequence and applying a data voltage to each data line 105, data signals can be written to the pixel capacitors 101 of the matrix. In this way, the transistors and capacitors of each integrated circuit 102 may maintain the state of the pixel while other pixels are being addressed.

[0052] Figure 2B shows an example of a 2T-1C integrated circuit 102 including a select or switch TFT 108, a drive TFT 20, and a storage capacitor 101. When the row (scan) line is turned on, the data signal V Data can write a voltage to the storage capacitor 101 that is also connected to the gate of the drive TFT 20. When the voltages of V DD and V SS are applied, due to the change in the resistance of the drive TFT 20, a current flows through the LED 15 in relation to the voltage applied to the gate of the drive TFT 20, and the amount of light emitted from the display is adjusted.

[0053] Figure 3 shows an example of a typical integrated circuit 10' that may form part of the monolithic display component 1 as described above. The integrated circuit 10' includes a substrate layer 12' having a top surface 12a' and a bottom surface 12b'.

[0054] Optoelectronic devices such as micro-LED 15’ are disposed on the upper surface 12a’ of the substrate 12’ and output light in the direction of the arrow from the display. The optoelectronic device 15’ is positioned between the cathode layer 16’ and the anode layer 18’. In this embodiment, the cathode layer 16’ is directly deposited on the upper surface 12a’ of the substrate 12’, and the anode layer 18’ is deposited on the upper surface of the optoelectronic device 15’. A thin-film transistor (TFT) 20’ is disposed on the substrate 12’ and functions as a switch and / or driver for controlling the operation of the optoelectronic device 15’. It will be understood that the integrated circuit 10’ may also have other components, such as those described in connection with FIG. 2B. For example, although only a single TFT is depicted in FIG. 3, it will be understood that the integrated circuit 10’ may have any number of TFTs to provide proper switching and driving of the optoelectronic device 15’. Further, additional components such as storage capacitors may be included.

[0055] The TFT 20’ is connected to the cathode layer 16’ by a first via 22a’ and to the anode layer 18’ by a second via 22b’. The layers and vias described above may be embedded within the base layer 11’ to provide physical integrity to the display component 1. In a monolithic display device, the layers forming the micro-LED 15’ are deposited on the substrate 12’ and patterned to form an array of a large number (possibly millions) of micro-LEDs 15’ arranged in an array on the substrate 12’. Subsequent layers are deposited and patterned to form an array of TFTs 20’, and each TFT 20’ is operably connected to a respective micro-LED 15’.

[0056] As used herein, the term "integrated circuit" may refer to all of the features described above in connection with FIG. 3, including optoelectronic devices and thin-film transistors. It will also be understood that the term "integrated circuit" may refer to some of these features, or to a circuit having any number of additional components, such as additional thin-film transistors and / or one or more capacitors.

[0057] Since both the TFT 20' and the via 22' are substantially opaque to light, it is necessary to share the area of the integrated circuit 10' between the TFT 20' and the optoelectronic device 15' so that the TFT 20' and the via 22' do not block the light from the optoelectronic device 15'. As a result, the available output area of the optoelectronic device 15' is reduced, and the current that can be driven through the TFT 20' is also reduced. Furthermore, the optoelectronic device 15' emits light in other directions than the direction of the arrow, and all this light is wasted. Therefore, the circuit 10' depicted in FIG. 3 showing a prior art approach to a monolithic micro-LED display has limitations in efficiency.

[0058] FIG. 4 shows an embodiment of an integrated circuit 10 that may form part of a monolithic display component 1 such as the display component 1 described in relation to FIG. 1. The integrated circuit 10 shares some features with the integrated circuit 10' of FIG. 3. For example, the integrated circuit 10 includes a substrate layer 12 having a top surface 12a and a bottom surface 12b. However, the integrated circuit 10 shown in FIG. 4 is configured to emit light downward. Thus, the substrate layer 12 is at least partially transparent, preferably at least 70% transparent. A suitable material for the substrate layer 12 is sapphire, but other materials such as zinc oxide or silicon carbide may also be used. The substrate layer 12 is preferably polished on the bottom surface 12b so as not to affect the quality of the image from the display component 1. The substrate layer 12 may be polished on both the top and bottom surfaces 12a, 12b to reduce stress on the layer growing on the substrate 12, or the top surface 12a may be patterned. More specifically, the substrate 12 may be a c-oriented cone-patterned sapphire substrate (CPSS) or a conventional unpatterned planar sapphire substrate (USS). Optionally, one or more lenses (not shown) and / or color filters may be provided on the bottom surface 12b of the substrate 12 to collimate or focus the light or to adjust the wavelength of the light exiting the substrate 12. Optionally, the substrate layer 12 may be thinned by backgrinding or chemical etching prior to polishing to reduce the distance between the LED and the optical element. In some embodiments, the substrate 12 may be removed from the integrated circuit 10 at a later stage of the manufacturing process.

[0059] Optoelectronic devices such as micro-LED 15 are disposed on the upper surface 12a of the substrate layer 12. Alternatively, the optoelectronic device may comprise an OLED, QD-LED, or any other suitable type of light-emitting device. The micro-LED 15 may comprise a number of layers such as a multiple quantum well (MQW) structure of InGan / Gan layers. The optoelectronic device 15 is located between the cathode layer 16 and the anode layer 18. In this embodiment, the cathode layer 16 is deposited directly on the upper surface 12a of the substrate layer 12 and the anode layer 18 is deposited on the upper surface of the optoelectronic device 15, although it will be understood that these layers may be exchanged. To maximize the output of light from the optoelectronic device 15, the materials of both the cathode layer 16 and the anode layer 18 are preferably transparent, more preferably at least 70% transparent. The cathode layer 16 may comprise n-gallium nitride (n-GaN) and may be grown on the sapphire wafer 12 by appropriate lattice matching of GaN and sapphire crystal. The anode layer 18 may comprise indium tin oxide (ITO).

[0060] The reflective layer 30 is disposed above the optoelectronic device 15. The reflective layer 30 is arranged to reflect the light propagating upwardly emitted from the optoelectronic device 15 and instead propagates downwardly from the bottom surface 12b of the substrate 12 through the substrate 12. The reflective layer 30 preferably covers at least 50% of the area of the optoelectronic device 15. The reflective layer 30 may be a metal layer and may comprise Al, Ag, Mo, and / or Au. Alternatively, the reflective layer 30 may comprise a distributed Bragg reflector having polarization characteristics useful for illuminating a liquid crystal display (LCD) disposed under the LED display device.

[0061] The thin-film transistor (TFT) 20 is disposed above the optoelectronic device 15 and the substrate 12 and functions as a switch and / or driver for controlling the operation of the optoelectronic device 15. It will be understood that the integrated circuit 10 may also have other components, such as those described in connection with FIG. 2B. For example, although only a single TFT is depicted in FIG. 4, it will be understood that the integrated circuit 10 may have any number of TFTs to provide proper switching and driving of the optoelectronic device 15. Further, additional components such as storage capacitors may be included. Additional components such as additional TFTs and capacitors may be deposited on the optoelectronic device 15 in the same manner as the illustrated TFT 20.

[0062] The TFT may include a semiconductor layer disposed between a source terminal and a drain terminal. The TFT may include a gate electrode disposed to control the flow of current in the semiconductor layer. The TFT may be a dual-gate device in which a front gate electrode is disposed on one side of the semiconductor layer and a back gate electrode is disposed on the opposite side of the semiconductor layer, as described in WO2022 / 101644, and the application of an appropriate voltage to the front gate electrode and / or the back gate electrode may be used to control the flow of current in the semiconductor layer between the source and the drain. The back gate electrode is defined as the electrode under the semiconductor layer closest to the substrate.

[0063] The TFT is deposited directly on the optoelectronic device 15. In particular, a monolithic device is formed by sequentially depositing the layers forming the optoelectronic device 15 and the TFT 20 on the same substrate 12. In some embodiments, the reflective layer 30 may provide a back gate contact for the TFT. In particular, the reflective layer may be a metal layer suitable for reflecting light, but also provides an electrical contact for the TFT. In this case, the reflective layer 30 may be connected to the TFT, for example, by vias.

[0064] In this embodiment, the TFT 20 is connected to the cathode layer 16 by the first via 22a and to the anode layer 18 by the second via 22b. The above-described layers and vias may be embedded in the base layer 11 to provide physical integrity to the display component 1. Materials suitable for the base layer 11 may be silicon nitride, silicon oxide, or an organic polymer that may be optionally crosslinked by ultraviolet light or heat. Examples of suitable crosslinked organic polymers include polymers having acrylate functionality as found in WO2020 / 002914. The vias 22 may be patterned by a process of photolithography and chemical development or may be patterned using dry etching in combination with a patterning protective layer such as a photoresist.

[0065] Preferably, the TFT is deposited on the reflective layer 30 such that the reflective layer 30 is positioned between the TFT 20 and the optoelectronic device 15. This is because, since the TFT is not normally transparent, it is desirable to reflect light towards the substrate 12 before the light is blocked or scattered by the TFT. Further, it is preferable to protect the TFT from light that may degrade the performance of the TFT over time. This phenomenon may occur by causing a change in the turn-on voltage of the device that affects the current driving behavior of the device due to high-intensity light generated within the organic semiconductor. As a result, the performance of the display may become unpredictable or ghosting may occur. In this configuration, the reflective layer 30 may have openings for the vias 22a, 22b to connect to the cathode layer 16 and the anode layer 18. Alternatively, the reflective layer 30 may be positioned on top of the TFT, which may simplify the connection between the TFT and the optoelectronic device 15, but may not be able to efficiently reflect light towards the substrate 12.

[0066] As used herein, the term "integrated circuit" may refer to all of the features described above in connection with FIG. 4, including optoelectronic devices and thin film transistors. It will also be understood that the term "integrated circuit" may refer to some of these features, or to a circuit having any number of additional components, such as additional thin film transistors and / or one or more capacitors.

[0067] The above-described embodiments provide many advantages. First, using the reflective layer 30 to return the upwardly emitted light through the substrate means that the TFT 20 may cover a large area of each pixel without blocking the optoelectronic device 15. Thus, in the present invention, the TFT 20 can supply more current to each pixel compared to prior art monolithic devices where the area of the TFT is limited. Second, the light emitted in the direction opposite to the intended emission direction is no longer wasted, but is reflected so that a greater proportion of the light emitted by the LED 15 is emitted in the intended emission direction, thereby producing a more efficient display component 1. This means that the optoelectronic device may operate at a lower temperature to produce the same light output, thereby reducing stress on the TFT and improving the performance and lifespan of the integrated circuit 10.

[0068] One problem associated with the manufacture of monolithic displays is that the metals used in the reflective layer 30 and the optoelectronic device 15 may be damaged by high temperatures exceeding 150°C. In the case of inorganic TFTs such as amorphous silicon (a-Si), low temperature polycrystalline silicon (LTPS), and / or indium gallium zinc oxide (IGZO), a high quality SiN x dielectric layer is deposited using a PECVD process. However, this is only effective at temperatures exceeding 300°C and will damage the optoelectronic device 15 and / or the reflective layer 30 already present within the integrated circuit 10.

[0069] Therefore, it is particularly beneficial if the TFT is an organic TFT (OTFT). The OTFT can be deposited on the display component 1 at a much lower temperature than that used when depositing an inorganic TFT, and it is possible to avoid damage to the reflective layer 30 and / or the optoelectronic device 15. For example, since only heating is required to remove the coating solvent from the formulated ink, the OTFT can be processed at a low temperature of 80°C. The low-temperature deposition process of the OTFT is particularly beneficial for forming a monolithic device using the OTFT to ensure that the reflective layer and the LED are not damaged.

[0070] Structures and materials suitable for OTFTs are described in WO2022 / 101644 and WO2020 / 002914. For example, the OTFT may include an organic semiconductor (OSC) layer, an organic gate insulator (OGI) layer, a sputter resistance layer (SRL), a substrate, and a base layer. The OSC layer may include at least one semiconductor ink containing a small molecule organic semiconductor and an organic binder. The OGI layer of the OTFT may include materials as described in WO2020 / 002914. The SRL may include a crosslinked organic layer as described in WO2020 / 002914. The crosslinked organic layer can preferably be obtained by polymerization of a solution containing at least one non-fluorinated polyfunctional acrylate, a non-acrylate organic solvent, a crosslinkable fluorine-based surfactant, and a silicone surfactant, where the silicone surfactant is preferably a crosslinkable silicone surfactant and may be a non-fluorine-based surfactant. The silicone surfactant may be an acrylate and / or methacrylate functionalized silicone surfactant. The substrate may include glass or a polymer. The base layer may include an organic crosslinked layer containing suitable materials as described in WO2020 / 002914.

[0071] Next, as will be described in connection with FIGS. 5 and 6, a color sub-pixel may be provided using the integrated circuit 10 as described above, thereby manufacturing the color display component 1.

[0072] FIG. 5 shows three integrated circuits 10, and each of the optoelectronic devices 15 is configured to emit light of a predetermined color, such as light having a specific wavelength or light within a specific wavelength band. For example, the first optoelectronic device 15-1 emits red light, the second optoelectronic device 15-2 emits green light, and the third optoelectronic device 15-3 emits blue light, but other colors may be used for each of the optoelectronic devices 15. The layers required for each optoelectronic device may be sequentially deposited. The first optoelectronic device 15-1 is controlled by the first TFT 20-1, preferably the first OTFT 20-1. The second optoelectronic device 15-2 is controlled by the second TFT 20-2, preferably the second OTFT 20-2. The third optoelectronic device 15-3 is controlled by the third TFT 20-3, preferably the third OTFT 20-3. In this way, the luminance of each of the three integrated circuits 10 may be individually controlled by the OTFT 20, and the pixels formed by the three sub-pixels can display various colors. The three integrated circuits 10 may be sequentially deposited on the substrate 12 and patterned to the required size. A bias may be formed from the TFT to the anode contact.

[0073] FIG. 6 shows three integrated circuits 10, and each optoelectronic device 15 is configured to emit light of substantially the same color. Advantageously, all of the integrated circuits 10 may be deposited on the substrate 12 in the same process, so the manufacturing process of the display may be simplified. For example, all optoelectronic devices can emit blue light. To provide colored sub-pixels, one or more color filters 35 are provided on the bottom surface 12a of the substrate 12. In this embodiment, a red filter 35-1 is provided below the first optoelectronic device 15-1, and a green filter 35-2 is provided below the second optoelectronic device 15-2. Although no filter is provided below the third optoelectronic device 15-3, it will be understood that a filter may be present. Further, different colors may be used for any of the filters 35. The color filter 35 may be formed by photolithographic printing or inkjet printing. Since the bottom surface 12b of the substrate 12 is flat and polished, it is much easier to arrange the filter 35 on the substrate 12 than to arrange the filter 35 on top of the backplane array as required for a top-emission display. The first optoelectronic device 15-1 is controlled by the first TFT 20-1, preferably the first OTFT 20-1. The second optoelectronic device 15-2 is controlled by the second TFT 20-2, preferably the second OTFT 20-2. The third optoelectronic device 15-3 is controlled by the third TFT 20-3, preferably the third OTFT 20-3. In this way, the luminance of each of the three integrated circuits 1 may be individually controlled by the (O) TFT 20, whereby the pixel 5 formed by the three sub-pixels can display various colors. In some embodiments, both the filter 35 and the color optoelectronic device 15 may be used simultaneously.

[0074] In both FIGS. 5 and 6, although a common cathode layer 16 is shared among the three sub-pixels, it will be understood that separate vias may connect each of the TFTs 20 to an individual cathode layer 12. The common cathode layer 16 may be shared across the entire display component 1, which may simplify the manufacture of the display component 1. In other embodiments, the cathode layer 16 may be patterned to provide an individual cathode layer 16 for each (sub-)pixel. This may be beneficial as the optoelectronic devices 15 can be arranged in series, potentially improving the current efficiency.

[0075] Next, a method of manufacturing the flat panel display component 1 will be described in detail. The display component 1 includes a plurality of integrated circuits 10 described in connection with FIG. 4.

[0076] First, a substrate 12 such as the aforementioned sapphire wafer is provided. The upper surface 12a of the substrate 12 may be patterned to reduce the stress of the layers that will grow on the substrate 12 later. For example, CPSS may be prepared using a thermal photoresist (PR) reflow and dry etching method, thereby providing a pattern of conical bumps. Also, the bottom surface 12b of the substrate 12 may be polished at any stage during the manufacture of the flat panel display component.

[0077] To provide the electrode contacts of the optoelectronic device 15, a cathode layer 16 may be deposited on the substrate 12 using a chemical vapor deposition (CVD) technique such as PECVD or MOCVD. In an exemplary MOCVD process, trimethylgallium, trimethylindium, and ammonia may be used as precursors for gallium, indium, and nitrogen, respectively. Bis(cyclopentadienyl)magnesium and disilane may be used as p-type and n-type dopant sources, respectively, and hydrogen may be used as a carrier gas.

[0078] Due to lattice matching with the sapphire wafer, the cathode layer 16 may comprise n-GaN that may be grown directly on the upper surface 12a of the substrate 12. The common cathode layer 16 may be provided across the entire flat panel display component 1. When individual portions of the cathode layer 16 are provided corresponding to each optoelectronic device 15, the cathode layer 16 may be patterned to provide separate portions. The patterning step may be performed before the optoelectronic device 15 is deposited, but preferably is performed after the optoelectronic device is deposited and patterned.

[0079] Thereafter, an array of optoelectronic devices 15 is deposited on the cathode layer 16, which may be performed in several deposition stages. For example, a micro-LED may be composed of a GaN nucleation layer (e.g., 25 nm thick), an undoped GaN layer (e.g., 2.5 μm thick), a highly doped n-type GaN layer (e.g., 2 μm thick), a plurality of pairs of In-type GaN layers (e.g., 2 μm thick), a plurality of pairs of InGaN(4.6 nm) / GaN(5.2 nm) MQWs (e.g., 13 pairs), a p-type AlGaN electron blocking layer (e.g., 25 nm thick), and a Mg-doped GaN layer (e.g., 100 nm thick).

[0080] The optoelectronic device 15 may be patterned by dry etching such as using inductively coupled plasma (ICP) dry etching technology. This is used to etch the p-GaN layer and the MQW active region until the n-GaN layer is exposed. Thereafter, an anode layer 18 is deposited on the p-GaN layer of the array of optoelectronic devices 15 using an electron beam evaporation apparatus. The anode layer may comprise indium tin oxide (ITO). The base layer 11 may be deposited around the other layers described above to provide physical integrity to the display component 1. Thereafter, another patterning process may be performed to separate each optoelectronic device 15 from the adjacent layers.

[0081] The reflective layer 30 is also deposited on the array or optoelectronic device 15, such as on top of the anode layer 18. The reflective layer 30 may be a metal layer and may comprise Al, Ag, Mo, and / or Au.

[0082] The via 22 may be etched through the base layer 11 and / or the reflective layer 30 to provide a path between the cathode layer 16 and the anode layer 18. A metal layer is then deposited, patterned, and etched into the path to provide electrical contact between the cathode layer 16 and the anode layer 18. The via 22 may be etched in several stages through the preceding steps.

[0083] The array of TFTs is deposited on the reflective layer, and each TFT in the array corresponds to one of the optoelectronic devices 15. Each TFT is operably connected to its respective optoelectronic device 15, such as by the via 22. The deposition of the array of TFTs may comprise several steps. For example, a method for depositing an OTFT having a front gate and a back gate will be described, although a single-gate OTFT could be used similarly. First, the back gate electrode is deposited, which may comprise a metal layer similar to the reflective layer 30. In some embodiments, the reflective layer 30 may provide the back gate electrode of the TFT. Next, a dielectric base layer is deposited on the back gate, and the source and drain electrodes are patterned on the base layer. Thereafter, an organic semiconductor (OSC) layer is deposited to cover the source and drain electrodes and fill the space between the source and drain electrodes, providing the active channel of the device. Next, one or more organic dielectric layers are deposited on the OSC layer, and the front gate layer is patterned for the front gate electrode. Thereafter, the OSC layer, dielectric layer, and gate layer are further patterned using dry etching to remove the organic layers outside the TFT device. Next, a passivation layer is deposited in the same manner as previously described to surround the previously deposited layers, and a number of vias are patterned in the passivation layer to provide access to the necessary electrodes. Thereafter, the final metal layer interconnects are applied and patterned to bond the layers of the OTFT to the LED.

[0084] Optionally, the substrate 12 may be detached from the upper layers such as the cathode layer 16 and the optoelectronic device 15. The substrate may be removed via any suitable etching technique or may be achieved using a laser such as laser ablation. In this way, the integrated circuit 10 is released from the substrate, and the light emitted downward does not need to pass through the substrate, further improving the efficiency.

[0085] The above is directed to an exemplary embodiment of the present invention, but it is understood that the present invention is described herein for illustrative purposes only and that modifications in details are possible within the scope of the present invention. Further, those skilled in the art will understand that the present invention will not be limited by the details shown in the embodiments disclosed herein, or in the accompanying drawings which are not described in detail herein or defined in the claims. Indeed, such additional features can be deleted from the figures without detracting from the present invention.

[0086] Furthermore, other additional embodiments of the present invention will be apparent to those skilled in the art upon consideration of this specification and will be devised without departing from the basic scope determined by the claims that follow.

Claims

1. An integrated circuit for a flat panel display, wherein the integrated circuit is A light-emitting optoelectronic device having an upper surface and an opposing lower surface, A thin-film transistor formed on the upper surface of the light-emitting photoelectron device, wherein the thin-film transistor is operably connected to the light-emitting photoelectron device, An integrated circuit for a flat panel display, comprising: a reflective layer formed between the upper surface of the light-emitting optoelectronic device and a thin-film transistor, the reflective layer being arranged to reflect light emitted by the light-emitting optoelectronic device such that the reflected light is emitted from the integrated circuit in a direction corresponding to the bottom surface of the light-emitting optoelectronic device.

2. The integrated circuit according to claim 1, further comprising a substrate having an upper surface and an opposing lower surface, wherein the light-emitting optoelectronic device is formed on the upper surface of the substrate, and the reflective layer is arranged such that the reflected light is emitted through the lower surface of the substrate.

3. The integrated circuit according to claim 2, wherein the substrate is a sapphire wafer substrate, preferably with a polished bottom surface.

4. The integrated circuit according to claim 2, further comprising one or more color filters on the bottom surface of the substrate.

5. The integrated circuit according to claim 2, further comprising one or more lenses located below the bottom surface of the substrate, the lenses being arranged to make the light propagating through the substrate parallel.

6. The integrated circuit according to claim 1, wherein the thin-film transistor is operably connected to the light-emitting optoelectronic device by one or more vias penetrating the reflective layer.

7. The integrated circuit according to claim 1, wherein the thin-film transistor comprises an organic thin-film transistor.

8. The integrated circuit according to claim 1, wherein the reflective layer is a metal layer, preferably comprising one or more of Al, Ag, Mo, and / or Au.

9. The integrated circuit according to claim 1, wherein the reflective layer comprises a distributed Bragg reflector.

10. The integrated circuit according to claim 1, comprising an anode layer deposited above the light-emitting photoelectronic device and below the reflective layer, wherein the anode layer preferably has a transparency of at least 70%.

11. The integrated circuit according to claim 1, wherein the reflective layer covers at least 50% of the area of ​​the light-emitting optoelectronic device.

12. The integrated circuit according to claim 1, wherein the reflective layer comprises a surface that provides a back gate contact for the thin-film transistor.

13. The integrated circuit according to claim 1, wherein the light-emitting optoelectronic device comprises an LED.

14. The integrated circuit according to claim 1, wherein the light-emitting photoelectronic device is configured to emit light at a predetermined wavelength or a predetermined wavelength band.

15. A flat panel display component comprising an array of integrated circuits according to any one of claims 1 to 14.

16. The flat panel display component according to claim 15, wherein the array of integrated circuits is arranged on a single substrate to form a monolithic display.

17. The flat panel display component according to claim 15, further comprising an electrical circuit bonded to the upper surface of the flat panel display component for driving the electronic equipment of the flat panel display.

18. An array of light-emitting optoelectronic devices is deposited on the upper surface of the substrate. A reflective layer is placed on the array of light-emitting photoelectronic devices, A method for manufacturing a flat panel display component, comprising depositing an array of thin-film transistors on the reflective layer and operably connecting each thin-film transistor to a corresponding light-emitting optoelectronic device.

19. The method according to claim 18, further comprising peeling the substrate from the layer on top of the substrate.

20. The method according to claim 18 or 19, further comprising etching a plurality of vias penetrating the reflective layer to provide electrical paths from each thin-film transistor to their respective anode and cathode layers.

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