Systems and methods for measuring the signal-to-noise ratio (SNR) of an uplink receiver chain

Abstract

[0003] The present disclosure relates to a system and method for measuring a signal-to-noise ratio (SNR) of an uplink receiver chain. The system receives at least one demodulation reference signal (DMRS) symbol from at least one signal among a plurality of signals transmitted by a plurality of user equipments (UEs) in the uplink receiver chain, determines a received signal strength indicator (RSSI) of the at least one signal for each UE based on the at least one DMRS symbol, determines a mean noise variance (NV) of the at least one signal for each UE in response to determining the RSSI of the at least one signal for each UE, and measures the SNR of the at least one signal for each UE in the uplink receiver chain based on the RSSI of the at least one signal and the mean NV of the at least one signal.

Description

[Technical Field]

[0001] [Reserved Rights] Portions of the disclosure of this patent document contain material that is subject to intellectual property rights owned by Jio Platforms Limited (JPL) or its affiliates (collectively, the Patent Holder), including, but not limited to, copyright, design, trademark, integrated circuit (IC) layout design, and / or trade dress protection. The Patent Holder does not object to the reproduction by any third party of the patent document or the patent disclosure as contained in the Patent and Trademark Office patent file or records, but otherwise reserves all rights. All rights to such intellectual property are fully reserved by the Patent Holder.

[0002] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to wireless communication systems, and more particularly to a system and method for measuring the signal-to-noise ratio (SNR) of an uplink receiver chain. [Background technology]

[0003] The following description of related art is intended to provide background information related to the field of the present disclosure. This section may include specific aspects of technology that may be related to various aspects of the present disclosure. However, this section is intended solely to enhance the reader's understanding of the present disclosure and is not an admission of prior art.

[0004] Generally, signal-to-noise ratio (SNR) is a measure of the ratio of signal power to noise power. A higher SNR ratio indicates better signal quality and less noise in a radio frequency (RF) environment. Furthermore, a low SNR ratio reduces the quality of the received signal, increasing the block error rate (BLER) and reducing throughput. For a given SNR, the probability of errors may increase as the modulation order increases (i.e., from binary phase shift keying (BPSK) to 256 quadrature amplitude modulation (QAM)). Similarly, for a given modulation order, the probability of errors may increase as the SNR decreases.

[0005] Furthermore, based on the correlation between the channel quality indicator (CQI) reported by the user equipment (UE) and the SNR measured and reported by the uplink receiver chain of the g-Node B (gNB), the gNB will change the code rate of higher layers by lowering the modulation and coding scheme (MCS) when the CQI value decreases (and vice versa). Therefore, the SNR can be a very important metric indicating the throughput rate.

[0006] Therefore, there is a need to provide a system and method for managing users in a network that can overcome the shortcomings of the existing prior art. Purpose of disclosure

[0007] Some of the objectives of the present disclosure that are met by at least one embodiment herein are listed below.

[0008] An object of the present disclosure is to provide a system and method for measuring the signal-to-noise ratio (SNR) of an uplink receiver chain.

[0009] An objective of the present disclosure is to enable accurate SNR reporting to higher layers of the core network in order to improve reception performance.

[0010] An objective of the present disclosure is to enable optimal implementation of an SNR unit using fewer field programmable gate array (FPGA) resources.

[0011] The objective of this disclosure is to achieve good performance for reporting in the negative range of SNR using various methods implemented in FPGA.

[0012] The objective of this disclosure is to determine a received signal strength indicator (RSSI) value and a noise variance (NV) value in an FPGA to determine the SNR.

[0013] The objective of this disclosure is to be able to measure the SNR value for each user and to save FPGA resources by serializing the measurements.

[0014] It is an object of the present disclosure to provide a system and method that can add an offset to the calculated SNR value and adjust the report according to the noise figure of the radio and the quantization noise in the analog-to-digital converter (ADC). Summary of the Invention

[0015] This section is provided to introduce in a simplified form certain objects and aspects of the disclosure that are more fully described in the Detailed Description. This Summary is not intended to identify key features or the scope of the claimed subject matter.

[0016] In one aspect, the present disclosure relates to a system for measuring a signal-to-noise ratio (SNR) of an uplink receiver chain. The system includes a processor and a memory operably coupled to the memory. The memory includes processor-executable instructions that, when executed, cause the one or more processors to perform the following steps: receive at least one demodulation reference signal (DMRS) symbol from at least one signal of a plurality of signals transmitted by a plurality of user equipments (UEs) in the uplink receiver chain; determine a received signal strength indicator (RSSI) of the at least one signal for each UE of the plurality of UEs based on the at least one DMRS symbol; determine a mean noise variance (NV) of the at least one signal for each UE in response to determining the RSSI of the at least one signal for each UE; and measure the SNR of the at least one signal for each UE in the uplink receiver chain based on the RSSI of the at least one signal and the mean NV of the at least one signal.

[0017] In one embodiment, the RSSI of the at least one signal may be the average signal strength of the at least one signal.

[0018] In one embodiment, the one or more processors may determine the average NV of at least one signal for each UE by being configured to estimate one or more smoothed channels of at least one signal and one or more frequency-interpolated channels of at least one signal based on at least one DMRS symbol, determine a noise mean power per antenna per resource element (RE) from the estimated one or more smoothed channels and the estimated one or more frequency-interpolated channels, and determine the average NV of at least one signal for each UE based on the noise mean power per antenna per RE.

[0019] In one embodiment, the one or more processors may determine the power of at least one signal for each UE based on the RSSI of the at least one signal, and measure the SNR of at least one signal for each UE in the uplink receiver chain based on the power of the at least one signal for each UE and the noise average power per antenna per RE.

[0020] In one embodiment, the one or more processors may be configured to determine the power of at least one signal for each UE by estimating a user identification (UID) flag value and a concatenated RSSI value from the RSSI of the at least one signal to set an internal RSSI flag, estimating a concatenated NV value from an average NV of the at least one signal to set an internal NV flag, setting an internal enable signal based on the internal RSSI flag and the internal NV flag, processing the UID flag value, the concatenated RSSI value, and the concatenated NV value based on the internal enable signal, and determining the power of at least one signal for each UE based on the processed values.

[0021] In one embodiment, the memory includes processor-executable instructions that, when executed, cause the one or more processors to perform the steps of transmitting, via a Functional Application Platform Interface (FAPI), an SNR measurement report for each UE in an uplink receiver chain to one or more upper layers of the base station.

[0022] In one embodiment, the memory includes processor-executable instructions that, when executed, cause the one or more processors to perform the steps of adding an offset to the measured SNR, thereby adjusting the SNR measurement report for each UE according to the noise figure of the radio and quantization noise in the analog-to-digital converter (ADC).

[0023] In another aspect, the present disclosure relates to a method for measuring an SNR of an uplink receiver chain, the method including: receiving, by a processor associated with a system, at least one DMRS symbol from at least one signal of a plurality of signals transmitted by a plurality of UEs in the uplink receiver chain; determining, by the processor, an RSSI of the at least one signal for each UE of the plurality of UEs based on the at least one DMRS symbol; determining, by the processor, a mean noise variance (NV) of the at least one signal for each UE in response to determining the RSSI of the at least one signal for each UE; and measuring, by the processor, the SNR of the at least one signal for each UE in the uplink receiver chain based on the RSSI of the at least one signal and the mean NV of the at least one signal.

[0024] In one embodiment, the RSSI of the at least one signal may be the average signal strength of the at least one signal.

[0025] In one embodiment, determining by the processor the average NV of at least one signal of each UE may include estimating by the processor one or more smoothed channels of the at least one signal and one or more frequency-interpolated channels of the at least one signal based on at least one DMRS symbol; determining by the processor a noise average power per antenna per resource element (RE) from the estimated one or more smoothed channels and the estimated one or more frequency-interpolated channels; and determining by the processor the average NV of the at least one signal of each UE based on the noise average power per antenna per RE.

[0026] In one embodiment, measuring the SNR of at least one signal of each UE by the processor may include determining, by the processor, a power of the at least one signal of each UE based on the RSSI of the at least one signal; and measuring, by the processor, the SNR of the at least one signal of each UE in the uplink receiver chain based on the power of the at least one signal of each UE and an average noise power per antenna per RE.

[0027] In one embodiment, the step of determining the power of at least one signal of each UE by the processor may include the steps of: estimating, by the processor, a user ID (UID) flag value and a concatenated RSSI value from the RSSI of the at least one signal and setting an internal RSSI flag; estimating, by the processor, the concatenated NV value from an average NV of the at least one signal and setting an internal NV flag; setting, by the processor, an internal enable signal based on the internal RSSI flag and the internal NV flag; processing, by the processor, the UID flag value, the concatenated RSSI value and the concatenated NV value based on the internal enable signal; and determining, by the processor, the power of the at least one signal of each UE based on the processed values.

[0028] In one embodiment, the method may include transmitting, by the processor, via the FAPI, an SNR measurement report for each UE in the uplink receiver chain to one or more upper layers of the base station.

[0029] In one embodiment, the method includes adding an offset to the SNR measured by the processor, thereby adjusting the SNR measurement report for each UE according to the noise figure of the radio and the quantization noise in the analog-to-digital converter (ADC).

[0030] In one aspect, the present disclosure relates to a user equipment (UE) including one or more processors and a memory operatively coupled to the one or more processors, the memory including processor-executable instructions that, when executed, cause the one or more processors to perform steps of transmitting a plurality of signals to a system over a wireless network. The one or more processors are communicatively coupled to the system, the system being configured to: receive at least one DMRS symbol from at least one signal of the plurality of signals; determine an RSSI of the at least one signal for the UE based on the at least one DMRS symbol; determine an average NV of the at least one signal for the UE in response to determining the RSSI of the at least one signal for the UE; and measure an SNR of the at least one signal for the UE in an uplink receiver chain based on the RSSI of the at least one signal and the average NV of the at least one signal.

[0031] In one aspect, the present disclosure relates to a non-transitory computer-readable medium including processor-executable instructions that cause a processor to perform the following steps: receiving at least one DMRS symbol from at least one signal of a plurality of signals transmitted by a plurality of user equipments (UEs) (104) in an uplink receiver chain; determining an RSSI of the at least one signal for each UE of the plurality of UEs based on the at least one DMRS symbol; determining an average NV of the at least one signal for each UE in response to determining the RSSI of the at least one signal for each UE; and measuring an SNR of the at least one signal for each UE in the uplink receiver chain based on the RSSI of the at least one signal and the average NV of the at least one signal.

[0032] The accompanying drawings, which are incorporated herein and constitute a part of this disclosure, illustrate exemplary embodiments of the disclosed methods and systems, with like reference numerals referring to like parts between the different drawings. The components in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of the disclosure. Some drawings use block diagrams to illustrate components and may not depict the internal circuitry of each component. Those skilled in the art will appreciate that the disclosure of such drawings includes disclosure of electrical or electronic components or circuits commonly used to implement such components. The drawings are for purposes of illustration only and are not intended to limit the disclosure. [Brief explanation of the drawings]

[0033] [Figure 1] An example of a proposed network architecture (100) is shown. [Figure 2A] 2 illustrates an example block diagram (200A) of a system for measuring a signal-to-noise ratio (SNR) of an uplink receiver chain, according to one embodiment of the present disclosure. [Figure 2B]2 illustrates an exemplary block diagram (200B) of functional elements of a base station according to one embodiment of the present disclosure. [Figure 3A] 3 illustrates an exemplary block diagram (300A) of a symbol rate processing (SRP) unit according to one embodiment of the present disclosure. [Figure 3B] 3 illustrates an exemplary block diagram (300B) of an SNR measurement unit implemented in a field programmable gate array (FPGA), according to one embodiment of the present disclosure. [Figure 4] An exemplary block diagram of a computer system (400) in which or by which embodiments of the present disclosure may be implemented is shown. DETAILED DESCRIPTION OF THE INVENTION

[0034] The above will become more apparent from the more detailed description of the disclosure that follows. For purposes of explanation, numerous specific details are set forth below to provide a thorough understanding of embodiments of the present disclosure. However, it will be apparent that embodiments of the present disclosure may be practiced without these specific details. Some of the features described below may be used independently or in combination with other features. Individual features may not address all of the problems described above, or may only address some of the problems described above. Some of the aforementioned challenges may not be completely resolved by any of the features described below.

[0035] The following description provides exemplary embodiments only and is not intended to limit the scope, applicability, or configuration of the present disclosure. Rather, it is intended to provide those skilled in the art with a useful description for implementing exemplary embodiments. It should be understood that various changes can be made in the function and arrangement of elements without departing from the spirit and scope of the disclosure as described.

[0036] In the following description, specific details are provided to provide a thorough understanding of the embodiments. However, it will be understood by those skilled in the art that the embodiments may be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may be shown as components in block diagram form so as not to obscure the embodiments in unnecessary detail. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail so as not to obscure the embodiments.

[0037] It should be noted that particular embodiments may be described as a process that is depicted as a flowchart, flow diagram, data flow diagram, structure diagram, or block diagram. While a flowchart describes operations as a sequential process, many of the operations may be performed in parallel or simultaneously. Also, the order of operations may be changed. A process terminates when the operations are completed, but there may be additional steps not included in the diagram. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc. When a process refers to a function, its termination refers to the return of the function to the calling function or the main function.

[0038] As used herein, the words "exemplary" and / or "demonstrative" mean an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. Moreover, any aspect or design described herein as "exemplary" and / or "demonstrative" should not necessarily be construed as preferred or advantageous over other aspects or designs, nor is it intended to exclude equivalent exemplary structures and techniques known to those skilled in the art. Furthermore, to the extent that the terms "includes," "has," "contains," and other similar words are used in either the detailed description or the claims, such terms are intended to be inclusive in the same manner as the open conjunction "comprising," without excluding additional or other elements.

[0039] References throughout this specification to "one embodiment" or "embodiment" or "instance" or "one instance" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the present disclosure. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0040] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. Furthermore, as used herein, the terms "comprises" and / or "comprising" specify the presence of stated features, integers, steps, operations, elements, and / or components, but are understood not to exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0041] Generally, the signal-to-noise ratio (SNR) can be the ratio of signal power to noise power, expressed in decibels (dB). A higher SNR ratio means better signal quality and less noise in the radio frequency (RF) environment. A low SNR ratio means poor received signal quality, resulting in a block error rate (BLER) and throughput loss. For a given SNR, the probability of errors may increase as the modulation order increases (i.e., from binary phase shift keying (BPSK) to 256 quadrature amplitude modulation (QAM)). Similarly, for a given modulation order, the probability of errors may increase as the SNR decreases. Furthermore, based on the correlation between the channel quality indicator (CQI) reported by the user equipment (UE) and the SNR measured and reported by the g-Node B (gNB) uplink receiver chain, the gNB may change the code rate of higher layers by lowering the modulation and coding scheme (MCS) when the CQI value decreases (and vice versa). Therefore, SNR can be a very important metric indicating throughput rate. Therefore, it is necessary to accurately measure the SNR value for reporting to higher layers in the gNB.

[0042] The present invention provides a system and method for measuring the SNR ratio of an uplink receiver chain, which performs an SNR measurement for each UE in the uplink receiver chain, passes the SNR measurement results up to the protocol stack (PS) / upper layers, and reports the SNR to the core network via a Functional Application Platform Interface (FAPI).

[0043] Furthermore, the present invention enables accurate SNR reporting to higher layers of the core network, improving receiver performance. The present disclosure enables optimal implementation of an SNR unit using fewer field-programmable gate array (FPGA) resources. The present disclosure achieves excellent performance for reporting in the negative range of SNR using various methods implemented in the FPGA. The present disclosure provides systems and methods for calculating received signal strength indicator (RSSI) values ​​and noise variance (NV) values ​​in the FPGA to determine the SNR. The present disclosure enables per-user SNR value calculations, saving FPGA resources by serializing the calculations. The present disclosure provides systems and methods for adding an offset to the calculated SNR value to adjust reporting according to the radio's noise figure and quantization noise in the analog-to-digital converter (ADC).

[0044] Certain terms and phrases are used throughout the disclosure and have the following meanings within the context of the disclosure proceeding:

[0045] The term "SNR" can refer to the signal-to-noise ratio, which represents the ratio of signal power to noise power, and is usually expressed in decibels (dB).

[0046] The term "RSSI" may refer to a received signal strength indicator or received signal strength indication, which is a measurement of the power present in a received radio signal.

[0047] The term "NV" may refer to the average noise variance calculated from the smoothed channel estimate and the frequency-interpolated channel estimate.

[0048] Various embodiments throughout this disclosure are described in more detail with reference to FIGS.

[0049] 1 illustrates an exemplary network architecture 100 for a system (also referred to as network architecture 100) for measuring signal-to-noise ratios (SNRs) in which a system 110 of the present disclosure may be implemented or implemented by a system of the present disclosure. As illustrated, the exemplary architecture 100 may be equipped with a system 110 for managing users within a network for one or more subscribers, such as one or more users 102-1, 102-2, 102-3, ..., 102-N (individually referred to as users 102 and collectively referred to as users 102) associated with one or more first computing devices 104-1, 104-2, ..., 104-N (individually referred to as first computing devices 104 and collectively referred to as first computing devices 104). The first computing devices 104 may be connected to a core network (not shown in FIG. 1). The networks may include, but are not limited to, third generation (3G), fourth generation (4G), fifth generation (5G), sixth generation (6G), new radio (NR), narrowband internet of things (NB-IoT), open radio access network (O-RAN), etc.

[0050] In one embodiment, the one or more first computing devices (104-1, 104-2... 104-N) are also referred to as one or more user equipment (UE) (104-1, 104-2... 104-N). The user equipment (104) may include smart devices operating in a smart environment, such as an Internet of Things (IoT) system. In such an embodiment, the user equipment (104) may include, but is not limited to, a smartphone, a smart watch, a smart sensor (e.g., mechanical, thermal, electrical, magnetic, etc.), a networked appliance, a networked peripheral, a networked lighting system, a communication device, a networked vehicle accessory, a networked vehicle device, a smart accessory, a tablet, a smart television (TV), a computer, a smart security system, a smart home system, other devices for monitoring or interacting with the user (102), or any combination thereof.

[0051] Those skilled in the art will appreciate that the user equipment (104) may include, but are not limited to, intelligent, multi-sensing, network-connected devices that can seamlessly integrate with each other and / or with a central server, cloud computing system, or other network-connected devices.

[0052] In one embodiment, the user equipment (104) may include, but is not limited to, handheld wireless communication devices (e.g., mobile phones, smartphones, phablet devices, etc.), wearable computing devices (e.g., head-mounted display computing devices, head-mounted camera devices, wristwatch computing devices, etc.), global positioning system (GPS) devices, laptop computers, tablet computers, or other types of portable computers, media playback devices, portable gaming systems, and / or other types of computing devices with wireless communication capabilities. In one embodiment, the user equipment (104) may include, but is not limited to, any electrical, electronic, electromechanical, or appliance, or combination of one or more of the above devices, such as a virtual reality (VR) device, an augmented reality (AR) device, a laptop, a general-purpose computer, a desktop, a personal digital assistant, a tablet computer, a mainframe computer, or other computing device. The user equipment (104) includes one or more built-in or externally coupled accessories, including, but not limited to, a camera, an audio assistive device, a visual assistive device such as a microphone, a keyboard, and an input device for receiving input from a user (102) or entity, such as a touchpad, a touch-enabled screen, an electronic pen, etc.

[0053] Those skilled in the art will appreciate that the computing device (104) is not limited to the devices mentioned above, and various other devices may be used.

[0054] Referring to FIG. 1 , the user equipment (104) may communicate with the system (110), e.g., an SNR ratio measurement system, via a communications network (106). In one embodiment, the communications network (106) may include a 5G network or the like. The network (106) may enable the user equipment (104) to communicate with other devices and / or the system (110) within the network architecture (100). The communications network (106) may include a wireless card or other transceiver connection to facilitate this communication. In another embodiment, the communications network (106) may be implemented as or include any of a variety of communications technologies, such as a wide area network (WAN), a local area network (LAN), a wireless network, a mobile network, a virtual private network (VPN), the Internet, a public switched telephone network (PSTN), or the like.

[0055] In one exemplary embodiment, the communications network (106) may include, by way of example and not limitation, at least a portion of one or more networks having one or more nodes that transmit, receive, forward, generate, buffer, store, route, switch, process, or combinations thereof, one or more messages, packets, signals, waves, voltage or current levels, combinations thereof, etc. The communications network (106) may include, but is not limited to, one or more of a wireless network, a wired network, the Internet, an intranet, a public network, a private network, a packet-switched network, a circuit-switched network, an ad-hoc network, an infrastructure network, a public switched telephone network (PSTN), a cable network, a cellular network, a satellite network, a fiber optic network, or combinations thereof.

[0056] In one embodiment, the system 110 may be communicatively connected to a core network (not shown in FIG. 1 ), such as 3G, 4G, 5G, 6G, NR, NB-IoT, or O-RAN, to manage users in the network. The system 110 may calculate RSSI and NV values ​​using an FPGA unit. The system 110 may be connected to the FPGA unit.

[0057] In one embodiment, the system (110) may calculate an SNR value for each UE (104) and serialize the calculations to conserve FPGA resources.

[0058] In one embodiment, the system (110) reports SNR values ​​to higher layers to improve receiver performance and may achieve good performance when reporting SNR values ​​in the negative range by implementing different SNR calculation methods.

[0059] In one embodiment, the system (110) may add an offset to the calculated SNR value, thereby adjusting the report according to the noise figure of the radio and the quantization noise in the analog-to-digital converter (ADC).

[0060] In one embodiment, the system 110 may be, but is not limited to, a system-on-chip (SoC) system. In another embodiment, the on-site data capture, storage, matching, processing, decision-making, and actuation logic may be coded using, but is not limited to, a microservices architecture (MSA). To support portability, multiple microservices may be containerized and event-based.

[0061] Although Figure 1 illustrates exemplary components of network architecture (100), in other embodiments, network architecture (100) may have a different number, type, or arrangement of components than Figure 1, or may include additional functionality not present in Figure 1. Additionally or alternatively, functions described herein as being performed by one or more components of network architecture (100) may be performed by one or more other components of network architecture (100).

[0062] FIG. 2 illustrates an exemplary block diagram (200A) of a system (110) for measuring an SNR ratio of an uplink receiver chain, according to one embodiment of the present disclosure.

[0063] In one aspect, the system (110) may include one or more processor(s) (202). The one or more processor(s) (202) may be implemented as one or more microprocessors, microcomputers, microcontrollers, edge or fog microcontrollers, digital signal processors, central processing units, logic circuits, and / or any device that processes data based on operational instructions. Among other functions, the one or more processor(s) (202) may be configured to retrieve and execute computer-readable instructions stored in the memory (204) of the system (110). The memory (204) may be configured to store one or more computer-readable instructions or routines on a non-transitory computer-readable storage medium, which may be retrieved and executed to create or share data packets via a network service. The memory (204) may include any non-transitory storage device, including, for example, volatile memory such as random access memory (RAM), or non-volatile memory such as erasable programmable read-only memory (EPROM), flash memory, etc.

[0064] In one embodiment, the system 110 may include interface(s) 206. The interface(s) 206 may include various interfaces, such as for data input / output (I / O) devices and storage devices. The interface(s) 206 may facilitate communication in the system 110. The interface(s) 206 may also provide a communication path for one or more components of the system 110. Examples of such components may include, but are not limited to, processing unit / engine(s) 208, databases 210, etc.

[0065] The processing engine(s) 208 may be implemented as a combination of hardware and programming (e.g., programmable instructions) to implement one or more functions of the processing engine(s) 208. In the examples described herein, such a combination of hardware and programming may be implemented in several different ways. For example, the programming of the processing engine(s) 208 may be processor-executable instructions stored on a non-transitory machine-readable storage medium, and the hardware of the processing engine(s) 208 may include processing resources (e.g., one or more processors) for executing such instructions. In this example, the machine-readable storage medium may store instructions that, when executed by the processing resources, implement the processing engine(s) 208. In such an example, the system 110 may include a machine-readable storage medium that stores instructions and the processing resources for executing the instructions, and the machine-readable storage medium may be separate from or accessible to the system 110 and the processing resources. In other examples, the processing engine(s) 208 may be implemented by electronic circuitry.

[0066] The processing engine (208) may include one or more engines selected from a data acquisition engine (212), an SNR measurement engine (214), and / or other engines / units (216).

[0067] In one embodiment, the data acquisition engine (212) may receive demodulation reference signal (DMRS) symbols from at least one of a plurality of signals transmitted by the UE (104) in the uplink receiver chain.

[0068] In one embodiment, the SNR measurement engine (214) may determine an RSSI of at least one signal for each of the plurality of UEs (104) based on at least one DMRS symbol. In response to determining the RSSI of the at least one signal for each UE (104), the SNR measurement engine (214) may determine an average NV of the at least one signal for each UE (104) and measure an SNR value for each of the UEs (104), thereby saving FPGA resources by serializing the measurements. In one embodiment, the SNR measurement engine (214) may report SNR values ​​to upper layers to improve receiver performance and achieve better performance when reporting SNR values ​​in the negative range by implementing different methods of SNR measurement. In one embodiment, the SNR measurement engine (214) may add an offset to the measured SNR value, thereby adjusting the report according to the noise figure of the radio and the quantization noise in the ADC.

[0069] In one embodiment, the database (210) may include data stored or generated as a result of functions implemented by the processor(s) (202) or processing engine(s) (208) or any component of the system (110).

[0070] Although Figure 2A shows an example block diagram (200) of SNR ratio measurement system (110), in other embodiments, SNR ratio measurement system (110) may include fewer components, different components, components arranged differently, or additional functional components than those shown in Figure 2A. Additionally or alternatively, one or more components of SNR ratio measurement system (110) may perform functions described as being performed by one or more other components of SNR ratio measurement system (110).

[0071] FIG. 2B illustrates an exemplary block diagram (200B) of functional elements of a base station according to one embodiment of the present disclosure.

[0072] With reference to FIG. 2B , the base station may be, for example, a high-level gNodeB (gNB). The higher-level gNB (small cell) may be composed of multiple “layers,” such as a hardware layer, an embedded platform software layer, a 5G protocol stack, and an application layer. The hardware layer may include a radio frequency (RF) front end (power amplifier (PA), low noise amplifier (LNA), filter, etc.) and antenna (250), an RF system-on-chip (SoC) (252) (digital up-converter (DUC), digital down-converter (DDC), digital pre-distortion (DPD), crest factor reduction (CFR), programmable logic for interfaces, etc.), a baseband processor SoC (254) (digital signal processing (DSP) cluster, network, network processor, etc.), and memory and peripherals (256) (random access memory (RAM), flash memory, Ethernet physical layer memory, etc.).

[0073] In one embodiment, the embedded software platform layer may include a real-time operating system (RTOS), device drivers for various peripherals including Peripheral Component Interconnect Express (PCIe), Ethernet, memory, Radio Frequency System-on-Chip (RFSoC) programming / configuration, FPGA, etc.

[0074] In one embodiment, the 5G protocol stack may include a new radio physical layer (NR-PHY) (230-6), an NR medium access control (NR-MAC) (230-5), a MAC scheduler (232), an NR radio link control (NR-RLC) (230-4), an NR packet data convergence protocol (NR-PDCP) (230-3), an NR radio resource control (NR-RRC) (230-2), and an NR service data adaptation protocol (NR-SDAP) (230-1).

[0075] A layered view of a small cell may include Layer 1 (physical layer (PHY)), which may be hosted on an FPGA. The PHY may include two main components: processor cores (called the processing system) and FPGA fabric (programmable logic). The processing system (PS) may include the functional application platform interface (FAPI) layer, the Layer 1 controller, and processor cores that host some components or physical layer processing. The programmable logic (PL) / FPGA-based computing fabric may host the PHY's downlink and uplink signal processing chains. The PS may include system logic cells, configurable logic block (CLB) flip-flops, CLB look-up tables (LUTs), digital signal processor (DSP) slices, block random access memory (RAM), and a form of memory called UltraRAM. Some integrated RFSoCs may incorporate analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) in the PL space. The RFSoc may also include PCIe, Serial Advanced Technology Attachment (SATA), Serial Gigabit Media Independent Interface (SGMII), Universal Asynchronous Receiver / Transmitter (UART), Universal Serial Bus (USB), Inter-Integrated Circuit (I2C), Serial Peripheral Interface (SPI), General-Purpose Input / Output (GPIO), and 10 Gigabit (10G) Ethernet ports as connectivity options.

[0076] Additionally, in the control plane (234-1), interfaces may include X2 Application Protocol (X2AP) (234-2), Xn-AP (234-3), NG-AP (234-4), Stream Control Transmission Protocol / Internet Protocol (SCTP / IP) (234-5), etc. Additionally, in the user plane (236), interfaces may include X2, S1, Xn, NG, GPRS Tunneling Protocol User Plane (GTP-U) / User Datagram Protocol (UDP) / Internet Protocol (IP) (238), etc.

[0077] In one embodiment, the application layer may include a radio resource management (RRM) module (224), which may include functions such as call processing functions (222), self-organizing network (SON) functions (226), and operation and maintenance (O&M) functions (228) (element management functions, faults, configuration, performance, etc.).

[0078] Although Figure 2B illustrates the functional elements of a base station, in other embodiments, a gNB may include fewer, different, differently arranged, or additional functional components than those illustrated in Figure 2B. Additionally or alternatively, one or more components of the gNB may perform functions described as being performed by one or more other components of the gNB.

[0079] FIG. 3A illustrates an example block diagram (300A) of a symbol rate processing (SRP) unit according to one embodiment of the present disclosure.

[0080] With reference to FIG. 3A, the SRP unit may include a symbol separation unit (302). The symbol separation unit (302) may separate data symbols and demodulation reference signal (DMRS) symbols of a signal. The data may be processed using various techniques, such as digital downconversion (DDC), cyclic prefix (CP) removal, fast Fourier transform (FFT), FFT shift, etc. The SNR may be measured over one or all DMRS symbols. The SRP unit may be considered as performing the SNR measurement after receiving the first DMRS symbol. The SRP unit may also include other units, such as a DMRS generation unit (312), a time interpolation unit (314), an equalization unit (316), a user separation unit (320), a bit rate processing unit (318), and controllers (322A, 322B), to perform the SNR measurement.

[0081] The SNR measurement can be performed in the following way. a. Approach 1: The system (110) may measure the SNR of the signal received from an RSSI measurement unit (not shown in FIG. 3A) and a noise variance (NV) value received from an NV unit (304), which is determined using Equation 1 below. SNR(dB)=10log10((RSSI-NV) / NV)…Equation 1 In the above equation 1, RSSI may be the average received signal strength determined from the output of the symbol separation unit (302), and NV may be the average noise variance determined from the smoothed channel estimate received from the channel smoothing unit (306) and the frequency-interpolated channel estimate received from the frequency interpolation unit (308). b. Approach 2: The system (110) measures the SNR of the received signal from the RSSI measurement unit and the NV value received from the NV unit (304), which is determined using Equation 2. SNR(dB)=10log10(H2 / σ2)…Equation 2 In the above equation, "H2" may be the mean square of the estimated channel (output of the channel estimation unit (310)) across all antennas and REs. Furthermore, "σ2" may be the noise average power per antenna per RE calculated from the smoothed channel estimate and the frequency-interpolated channel estimate. c. Approach 3: Approach 3 may be an enhancement of Approach 2, applying curve fitting to the output of Approach 2 to achieve better reporting performance in the negative SNR range. The curve fitting may be determined as a polynomial, as shown in Equation 3. Y=Ax 2 +Bx+C…………Formula 3 d. Approach 4: The system (110) measures the SNR of the signal received from the output of the channel smoothing unit (306) and calculates the noise as YH.X, where "Y" is the received signal, "H" is the output of the channel smoothing unit (306), and "X" is the DMRS-generated signal received from the DMRS generation unit (312), which is calculated using Equation 4 below. SNR(dB)=10 log10(H2 / σ2)…Equation 4

[0082] Although Figure 3A shows an example block diagram (300A) of an SRP unit, in other embodiments, the SRP unit may include fewer components, different components, components in a different arrangement, or additional functional components than those shown in Figure 3 A. Additionally or alternatively, one or more components of the SRP unit may perform functions described as being performed by one or more other components of the SRP unit.

[0083] 3B illustrates a representation of an exemplary sequence diagram for managing users in a network, according to one embodiment of the present disclosure. The SNR measurement unit (300B) may measure the SNR of the signal coming from the RSSI measurement unit and the NV from the NV block. The measured SNR value may be sent to the PS, which reports it to higher layers according to the FAPI standard described below. [Table 1] Details of SNR reporting for PUSCH by FAPI

[0084] Each time an RSSI data valid signal pulse arrives from the RSSI measurement unit (311), the SNR unit may capture a user ID (UID) flag value and a concatenated RSSI value. Similarly, each time an NV data valid pulse arrives from the NV unit (313), the SNR unit may capture a concatenated NV value. The RSSI value and the NV value may be processed sequentially for each UE. After processing the SNR dB, an output may be obtained along with a valid flag. Each subcomponent of the SNR measurement unit implemented in FPGA (for Approach 1) is described in detail below.

[0085] When an RSSI valid pulse arrives (311), the RSSI data and a UID flag may be stored in a register, and an internal RSSI flag may be set. When an NV valid pulse arrives (313), the NV data may be saved, and an internal NV flag may be set. If both the RSSI flag and the NV flag are set high, an internal enable signal may be set. Corresponding RSSI and NV values ​​for each UE may be sequentially passed for further processing based on the enabled signal. Based on the counter value, the RSSI and NV values ​​may be passed to a subtractor IP (315). Furthermore, in the case of Approach 1, an RSSI-NV operation may be performed to obtain signal power. Furthermore, the signal power and NV may be passed to a fixed-point to floating-point converter (317). A signal power / NV division operation may be performed using a divider (319) in floating-point single-precision format. A natural logarithm (log) (321) may be performed on the result obtained from the signal power / NV division operation. The resulting value may be converted from floating-point precision to fixed-point precision using a floating-point to fixed-point converter (323). The converted value may be multiplied by 4.342 using a multiplier (325) to obtain the SNR value in dB. The above steps may be repeated to obtain eight RSSI and NV values ​​(or the most significant bit (MSB) for UE8 and the least significant bit for UE1, depending on the bitmap of the received UID_Flag). This is an example and is not limited to processing eight UEs (104).

[0086] In Approach 2 and Approach 3, SNR (dB) = RSSI average / NV average. Therefore, the subtraction shown above in the block of Figure 3B may not be used. Alternatively, one could take the logarithm first and subtract the values ​​in such a way that a division block does not need to be used. For example, 10*(log10(RSSI 平均 )-log10(NV 平均)). In addition, an offset value can be added to the SNR value calculated in the PS or PL, thereby adjusting the report according to the noise figure of the radio and the quantization noise in the ADC. For example, SNR_report = SNR_fapi + offset. Therefore, good performance of the SNR report can be achieved.

[0087] Although Figure 3B shows an example block diagram (300B) of an SNR measurement unit, in other embodiments, the SNR measurement unit may include fewer components, different components, components arranged in a different manner, or additional functional components than those shown in Figure 3B. Additionally or alternatively, one or more components of the SNR measurement unit may perform functions described as being performed by one or more other components of the SNR measurement unit.

[0088] FIG. 4 illustrates an exemplary computer system (400) in which or by which embodiments of the present disclosure may be implemented.

[0089] As shown in FIG. 4, the computer system (400) may include an external storage device (410), a bus (420), a main memory (430), a read-only memory (440), a mass storage device (450), a communication port (460), and a processor (470).

[0090] Those skilled in the art will appreciate that computer system 400 may include multiple processors and communication ports. Processor 470 may include various modules associated with embodiments of the present disclosure.

[0091] The communications port (460) may be an RS-232 port for use with a modem-based dial-up connection, a 10 / 100 Ethernet port, a Gigabit or 10 Gigabit port using copper or fiber optics, a serial port, a parallel port, or any other existing or future port. The communications port (460) may be selected depending on the network, such as a local area network (LAN), a wide area network (WAN), or any network to which the computer system (400) is connected.

[0092] In one embodiment, main memory (430) may be random access memory (RAM) or any other dynamic storage device(s) commonly known in the art. Read-only memory (440) may be any static storage device, such as, but not limited to, a programmable read-only memory (PROM) chip for storing static information such as startup or basic input / output system (BIOS) instructions for processor (470).

[0093] The mass storage device (450) can be any current or future mass storage device solution that can be used to store information and / or instructions. Exemplary mass storage solutions include, but are not limited to, Parallel Advanced Technology Attachment (PATA) or Serial Advanced Technology Attachment (SATA) hard disk drives, or solid state drives (internal or external, e.g., with Universal Serial Bus (USB) and / or Firewire interfaces).

[0094] In one embodiment, the bus (420) may communicatively couple the processor(s) (470) with other memory, storage, and communication blocks. The bus (420) may be, for example, a Peripheral Component Interconnect (PCI) / PCI Expansion (PCI-X) bus, a Small Computer System Interface (SCSI), USB, etc. for connecting expansion cards, drives, and other subsystems, or other buses such as a Front Side Bus (FSB) that connect the processor(s) (470) to the computer system (400).

[0095] Optionally, operator and administrative interfaces (such as a display, keyboard, joystick, cursor control device, etc.) may also be coupled to bus 420 to support direct operator interaction with computer system 400. Other operator and administrative interfaces may be provided through a network connection connected via communications port 460. The above components are intended only to illustrate various possibilities. The foregoing exemplary computer system 400 in no way limits the scope of the present disclosure.

[0096] While the foregoing has described various embodiments of the present disclosure, other and further embodiments of the present disclosure may be devised without departing from the basic scope thereof. The scope of the present disclosure is determined by the claims that follow. The present disclosure is not limited to the described embodiments, versions, or examples, which are included to enable one skilled in the art to make and use the disclosure in combination with the information and knowledge available to that person. Benefits of Disclosure

[0097] The present disclosure provides systems and methods for measuring the signal-to-noise ratio (SNR) of an uplink receiver chain.

[0098] The present invention provides accurate SNR reporting to higher layers in the core network, improving receiver performance.

[0099] The present disclosure enables optimal implementation of an SNR unit using fewer field programmable gate array (FPGA) resources.

[0100] The present disclosure uses various methods implemented in FPGA to achieve good performance for reporting in the negative range of SNR.

[0101] The present invention determines a received signal strength indicator (RSSI) value and a noise variance (NV) value in an FPGA to efficiently determine the SNR.

[0102] This disclosure makes it possible to measure the SNR value for each user, thereby saving FPGA resources by serializing the measurement results.

[0103] The present disclosure provides systems and methods for adding an offset to the calculated SNR value, which may adjust the report according to the noise figure of the radio and the quantization noise in the analog-to-digital converter (ADC).

Claims

1. 1. A system (110) for measuring a signal-to-noise ratio (SNR) of an uplink receiver chain, the system (110) comprising: one or more processors (202); a memory (204) operably coupled to the one or more processors (202), the memory (204) storing processor-executable instructions that, when executed, receiving at least one demodulation reference signal (DMRS) symbol from at least one signal of a plurality of signals transmitted by a plurality of user equipments (UEs) (104) in the uplink receiver chain; determining a received signal strength indicator (RSSI) of at least one signal for each UE of the plurality of UEs (104) based on the at least one DMRS symbol; determining a mean noise variance (NV) of at least one signal of each UE (104) in response to determining the RSSI of the at least one signal of each UE (104); measuring an SNR of at least one signal for each UE (104) in the uplink receiver chain based on the RSSI of the at least one signal and an average NV of the at least one signal; The system (110) causes the one or more processors (202) to execute the following:

2. The system (110) of claim 1, wherein the RSSI of the at least one signal is an average signal strength of the at least one signal.

3. The one or more processors (202) estimating one or more smoothed channels of the at least one signal and one or more frequency-interpolated channels of the at least one signal based on the at least one DMRS symbol; determining a noise average power per antenna per resource element (RE) from the estimated one or more smoothed channels and the estimated one or more frequency-interpolated channels; determining an average noise power (NV) for at least one signal of each UE (104) based on the average noise power per antenna per RE; 2. The system (110) of claim 1, configured to determine an average NV of the at least one signal for each UE (104).

4. The one or more processors (202) determining a power of the at least one signal based on an RSSI of the at least one signal for each UE; measuring an SNR of the at least one signal for each UE (104) in the uplink receiver chain based on the power of the at least one signal for each UE (104) and a noise average power per antenna per RE; 4. The system (110) of claim 3, configured to measure the SNR of the at least one signal for each UE (104).

5. The one or more processors (202) estimating a User ID (UID) flag value and a concatenated RSSI value from the RSSI of the at least one signal and setting an internal RSSI flag; estimating a concatenated NV value from the average NV of the at least one signal and setting an internal NV flag; setting an internal enable signal based on the internal RSSI flag and the internal NV flag; processing the UID flag value, the concatenated RSSI value, and the concatenated NV value based on the internal enable signal; determining a power of at least one signal for each UE based on the processed values; 5. The system (110) of claim 4, configured to determine a power of the at least one signal for each UE (104).

6. 2. The system of claim 1, wherein the memory includes processor-executable instructions that, when executed, cause the one or more processors to perform the steps of transmitting, via a Functional Application Platform Interface (FAPI), an SNR measurement report for each UE in the uplink receiver chain to one or more upper layers of a base station.

7. 2. The system of claim 1, wherein the memory includes processor-executable instructions that, when executed, cause one or more processors to perform the steps of adding an offset to the measured SNR, thereby adjusting the SNR measurement report of each UE according to a radio noise figure and quantization noise in an analog-to-digital converter (ADC).

8. 1. A method for measuring a signal-to-noise ratio (SNR) of an uplink receiver chain, the method comprising: receiving, by a processor (202) associated with the system (110), at least one demodulation reference signal (DMRS) symbol from at least one signal of a plurality of signals transmitted by a plurality of user equipments (UEs) (104) in the uplink receiver chain; determining, by the processor (202), a received signal strength indicator (RSSI) of the at least one signal for each UE of the plurality of UEs (104) based on at least one DMRS symbol; determining, by the processor (202), a mean noise variance (NV) of the at least one signal for each UE (104) in response to determining the RSSI of the at least one signal for each UE (104); measuring, by the processor (202), an SNR of the at least one signal for each UE (104) in the uplink receiver chain based on the RSSI of the at least one signal and an average NV of the at least one signal; A method comprising:

9. The method of claim 8 , wherein the RSSI of the at least one signal is an average signal strength of the at least one signal.

10. The step of determining, by the processor (202), an average NV of at least one signal of each UE (104) comprises: estimating, by the processor (202), one or more smoothed channels of the at least one signal and one or more frequency-interpolated channels of the at least one signal based on the at least one DMRS symbol; determining, by the processor (202), a noise average power per antenna per resource element (RE) from the estimated one or more smoothed channels and the estimated one or more frequency-interpolated channels; determining, by the processor (202), an average noise power (NV) of at least one signal for each UE (104) based on the average noise power per antenna per RE; The method of claim 8, comprising:

11. The step of measuring, by the processor (202), the SNR of at least one signal of each UE (104) comprises: determining, by the processor (202), a power of the at least one signal for each UE (104) based on an RSSI of the at least one signal; measuring, by the processor (202), an SNR of at least one signal of each UE (104) in the uplink receiver chain based on a power of at least one signal of each UE (104) and a noise average power per antenna per RE; The method of claim 10, comprising:

12. The step of determining, by the processor (202), the power of at least one signal of each UE (104) comprises: estimating, by the processor (202), the User ID (UID) flag value and a concatenated RSSI value from the RSSI of the at least one signal and setting the internal RSSI flag; estimating, by the processor (202), a concatenated NV value from the average NV of the at least one signal and setting the internal NV flag; setting, by the processor (202), the internal enable signal based on the internal RSSI flag and the internal NV flag; processing, by the processor (202), the UID flag value, the concatenated RSSI value, and the concatenated NV value based on the internal enable signal; determining, by the processor (202), a power of at least one signal of each UE (104) based on the processed values; The method of claim 11 , comprising:

13. 9. The method of claim 8, comprising transmitting, by the processor (202) via a Functional Application Platform Interface (FAPI), an SNR measurement report for each UE (104) in the uplink receiver chain to one or more upper layers of the base station.

14. 9. The method of claim 8, further comprising adding, by the processor (202), an offset to the measured SNR, thereby adjusting the SNR measurement report of each UE (104) according to a noise figure of the radio and quantization noise in an analog-to-digital converter (ADC).

15. A user equipment (104), one or more processors; a memory operably coupled to the one or more processors, the memory storing processor-executable instructions that, when executed, causing the one or more processors (202) to transmit a plurality of signals to a system (110) over a communications network (106); The one or more processors are communicatively coupled to the system (110), the system (100) comprising: receiving at least one demodulation reference signal (DMRS) symbol from at least one signal of the plurality of signals; determining a received signal strength indicator (RSSI) of the at least one signal at the UE (104) based on the at least one DMRS symbol; determining a mean noise variance (NV) of the at least one signal of the UE (104) in response to determining the RSSI of the at least one signal of the UE (104); measuring a signal-to-noise ratio (SNR) of at least one signal of a UE (104) in the uplink receiver chain based on the RSSI of the at least one signal and an average NV of the at least one signal; User equipment (104).

16. A non-transitory computer-readable medium comprising processor-executable instructions, the instructions comprising: receiving at least one demodulation reference signal (DMRS) symbol from at least one of a plurality of signals transmitted by a plurality of user equipments (UEs) (104) in an uplink receiver chain; determining a received signal strength indicator (RSSI) of at least one signal for each UE (104) of the plurality of UEs (104) based on the at least one DMRS symbol; determining a mean noise variance (NV) of the at least one signal of each UE (104) in response to determining the RSSI of the at least one signal of each UE (104); measuring a signal-to-noise ratio (SNR) of at least one signal for each UE (104) in the uplink receiver chain based on the RSSI of the at least one signal and an average NV of the at least one signal; A non-transitory computer-readable medium that causes a processor to execute the

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