Semiconductor device

The semiconductor device design addresses cracking issues in MEMS devices by aligning the diaphragm and beam structures with the substrate's cleavage plane at a 15° angle, reducing stress concentrations and improving manufacturing yield and performance.

JP2026011265APending Publication Date: 2026-01-23ROHM CO LTD
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Patent Information

Application Number
JP2024111727
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-11
Publication Date
2026-01-23

AI Technical Summary

Technical Problem

MEMS devices are prone to cracking due to compressive or tensile stress during layer stacking, leading to reduced manufacturing yield and device performance, particularly in high-frequency applications like FBAR filters, due to differences in lattice constants of layered materials.

Method used

A semiconductor device design with a diaphragm, peripheral member, and beam structure, where the diaphragm and beam are made of a single-crystal layer different from the substrate, and the orientation of the first line and perpendicular line intersect with the cleavage plane direction of the substrate at a predetermined angle, specifically 15°, to minimize cracking.

Benefits of technology

The design significantly reduces the likelihood of cracking in the laminated film, enhancing the manufacturing yield and performance of high-frequency devices by aligning the structural elements to avoid stress concentrations along cleavage planes.

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Abstract

To provide a structure in which a laminated film is hardly broken.SOLUTION: The diaphragm 1 includes a diaphragm 1a part, a peripheral member 1a part disposed around the diaphragm 1e part via an air gap 14, and a bridge 1a part disposed in a part of the air gap 14 and connecting the diaphragm 1e part and the peripheral member 1c part. Each of the vibrating plate 1a, the peripheral member 1e, and the beam 1c has a structure in which a substrate 11 and a single-crystal layer 12 disposed on a main surface of the substrate 11 and made of a material different from that of the substrate 11 are stacked, and a first straight line 2 passing through a width-direction center of the beam 1c and a width-direction center of the vibrating plate 1a and a perpendicular line 3 of the first straight line 2 intersect a representative cleavage plane direction 4 of the substrate 11 at a predetermined angle.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] TECHNICAL FIELD Embodiments of the present disclosure relate to semiconductor devices. [Background technology]

[0002] Conventionally, MEMS (Micro Electro Mechanical Systems) devices, also known as microelectromechanical systems, have been used in a variety of applications. MEMS devices are devices that use microfabrication technology to form tiny three-dimensional structures on a single substrate, integrating mechanical components, electronic circuits, sensors, actuators, and other elements, and are constructed by layering functional materials such as piezoelectrics on structures such as silicon (Si) substrates.

[0003] Examples of applications of MEMS devices in the high-frequency field include high-frequency switches or filters, oscillators, and resonators. In resonators and filters, good crystallinity of the constituent laminated films is one of the important factors in reducing parasitic resistance and achieving a high Q value. On the other hand, aluminum nitride, a piezoelectric material, has a high Q value and is therefore used in FBAR (Film Bulk Acoustic Resonator) high-frequency filters for mobile communications. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent Publication No. 2022-51000

[0005] [overview] However, during the process of stacking each layer, compressive or tensile stress is applied to each layer due to the difference in the lattice constant of the crystal of each layer. Depending on the strength of the stress or external stimuli, cracks may occur in the layer to which tensile stress is applied, resulting in a problem of reduced manufacturing yield and device performance.

[0006] In view of the above-mentioned problems found by the inventors of the present disclosure, an object of the present disclosure is to provide a semiconductor device having a structure that is less likely to crack in a laminated film.

[0007] A semiconductor device according to one embodiment of the present disclosure includes a diaphragm, a peripheral member disposed around the diaphragm with a gap therebetween, and a beam disposed in part of the gap and connecting the diaphragm to the peripheral member. The diaphragm, the peripheral member, and the beam each have a laminated structure of a substrate and a single-crystal layer disposed on a major surface of the substrate and made of a material different from that of the substrate. A first line passing through the center of the beam in the width direction and the center of the diaphragm in the width direction and a perpendicular line to the first line each intersect with the cleavage plane direction of the substrate at a predetermined angle. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a plan view of a semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the semiconductor device according to the first embodiment. [Figure 3A] FIG. 3A is a plan view of the semiconductor device according to the first embodiment, from which electrodes are removed. [Figure 3B] FIG. 3B is an enlarged plan view of region 1d in FIG. 3A. [Figure 4] FIG. 4 is a diagram showing the direction of the cleavage plane of a single crystal silicon wafer in which the (111) plane is exposed. [Figure 5A] FIG. 5A is a plan view of the region 1d when the first straight line 2 is arranged to be parallel to the Y direction. [Figure 5B] FIG. 5B is a plan view of the region 1d when the first straight line 2 is rotated 30° to the left with respect to the Y direction. [Figure 5C] FIG. 5C is a plan view of the region 1d when the first straight line 2 is rotated 45° to the left with respect to the Y direction. [Figure 5D] FIG. 5D is a plan view of the region 1d when the first straight line 2 is rotated 60° to the left with respect to the Y direction. [Figure 5E]FIG. 5E is a plan view of the region 1d when the first straight line 2 is rotated 90 degrees to the left with respect to the Y direction. [Figure 6] FIG. 6 is a diagram showing the relationship between the orientation of the connection portions of the diaphragm, beam, and peripheral member of the semiconductor device and the number of defects. [Figure 7] FIG. 7 is a plan view of the area 1d when the first straight line 2 is rotated 15° to the left with respect to the Y direction. [Figure 8] FIG. 8 is a cross-sectional view of the semiconductor device according to the second embodiment. [Figure 9] FIG. 9 is a cross-sectional view of a semiconductor device according to the third embodiment. [Figure 10] FIG. 10 is a cross-sectional view of a semiconductor device according to the fourth embodiment.

[0009] [Detailed explanation] The embodiments will be described with reference to the drawings. In the following description of the drawings, the same or similar parts will be denoted by the same or similar reference numerals, and the description thereof will be omitted. The drawings are schematic.

[0010] Furthermore, the embodiments shown below are merely examples of devices or methods for embodying the technical ideas, and do not specify the materials, shapes, structures, arrangements, etc. of each component part. Various modifications can be made to these embodiments within the scope of the claims.

[0011] [First embodiment] (Configuration of semiconductor devices) Fig. 1 is a plan view of a semiconductor device 1 according to a first embodiment. The semiconductor device 1 in Fig. 1 is a resonator. Fig. 2 is a cross-sectional view of the semiconductor device 1 according to the first embodiment taken along line II-II in Fig. 1.

[0012] In the following description, an XYZ coordinate system, which is an example of a Cartesian coordinate system, is used. That is, a plane parallel to the main surface of the substrate 11 constituting the semiconductor device 1 is defined as the XY plane, and a normal direction perpendicular to the XY plane is defined as the Z direction. The X axis and Y axis are defined as two orthogonal directions in the XY plane.

[0013] The semiconductor device 1 includes a substrate 11, a single-crystal layer 12 stacked on the main surface of the substrate 11, and electrodes 13a and 13b disposed on the main surface of the single-crystal layer 12.

[0014] The substrate 11 is, for example, a single crystal silicon substrate with the (111) plane exposed, and is cut out from a single crystal silicon wafer with the (111) plane exposed (hereinafter referred to as a "single crystal silicon (111) wafer").

[0015] The single crystal layer 12 is made of a material different from that of the substrate 11, for example, a piezoelectric film made of single crystal aluminum nitride AlN, which is a piezoelectric material. The single crystal layer 12 is formed, for example, by epitaxial growth, inheriting the crystalline structure of the substrate 11. Because the single crystal layer 12 is an epitaxially grown layer, the crystallinity of the single crystal layer 12 is improved, which is suitable for obtaining a high Q value, for example, when the semiconductor device 1 operates at high frequencies. The single crystal layer 12 is arranged inside the outer edge of the substrate 11 when viewed from the Z direction so that it can be deposited on the substrate 11 even if there is a misalignment during manufacturing. Similarly, the electrodes 13a and 13b are arranged inside the outer edge of the single crystal layer 12 when viewed from the Z direction so that it can be deposited on the single crystal layer 12 even if there is a misalignment during manufacturing.

[0016] The semiconductor device 1 includes a rectangular diaphragm 1a. In a resonator, the diaphragm 1a is referred to as a resonance plate. A gap 14 is provided around the diaphragm 1a along the outer periphery of the diaphragm 1a. The area of ​​the semiconductor device 1 outside the gap 14, which is separated by the gap 14, is referred to as the peripheral member 1e. Line II-II in FIG. 1 passes through the center of the diaphragm 1a in the longitudinal direction and is drawn in a direction parallel to the short side of the diaphragm 1a, crossing the peripheral member 1e, gap 14, diaphragm 1a, gap 14, and peripheral member 1e. As shown in FIG. 2, the gap 14 is provided so as to penetrate the substrate 11, the single-crystal layer 12, and the electrodes 13a and 13b in the Z direction.

[0017] In Figure 1, the upper side of line II-II in the drawing is the "positive side," and the lower side is the "negative side" (the same applies below). Diaphragm 1a is connected to peripheral member 1e at the center of the short side of diaphragm 1a by beam 1b, which is located in part of the gap on the positive side of line II-II, and beam 1c, which is located in part of the gap on the negative side. Beams 1b and 1c fix and support diaphragm 1a to peripheral member 1e, and are also called anchors.

[0018] Here, the line passing through the widthwise center of beam 1c and the widthwise center of diaphragm 1a shown in FIG. 1 is defined as first line 2. First line 2 is parallel to the longitudinal direction of diaphragm 1a and also passes through the widthwise center of beam 1b. Furthermore, perpendicular line 3 to first line 2 is parallel to the short-side direction of diaphragm 1a. The direction of first line 2 is rotated a predetermined angle with respect to the Y direction, specifically, it is rotated 15° to the left.

[0019] Although details will be described later with reference to Fig. 4, one of the cleavage plane directions of the substrate 11 included in the semiconductor device 1 is defined as a representative cleavage plane direction 4. In Fig. 1, the representative cleavage plane direction 4 is parallel to the Y direction. That is, the direction of the first straight line 2 is rotated by a predetermined angle with respect to the representative cleavage plane direction 4, specifically, the direction is rotated 15° to the left.

[0020] Electrodes 13a and 13b are arranged on the diaphragm 1a, separated by a first straight line 2. Here, the right side of the first straight line 2 in the drawing is referred to as the "positive side," and the left side is referred to as the "negative side" (the same applies below). With respect to the first straight line 2 as a reference, electrode 13a is arranged on the negative side, and electrode 13b is arranged on the positive side. Electrode 13a extends to the peripheral member 1e via the beam 1b, and is separated in two directions to surround the periphery of the gap 14. Electrode 13b extends to the peripheral member 1e via the beam 1c in the negative direction relative to line II-II along the first straight line 2. Electrode 13a, which extends in two directions to surround the periphery of the gap 14, turns parallel to electrode 13b at a position close to electrode 13b, which extends from the beam 1c to the peripheral member 1e along the first straight line 2, and is then extended in the negative direction relative to line II-II.

[0021] 1 is a connection portion between the diaphragm 1a, the beam 1c, and the peripheral member 1e. The region 1d will be described later with reference to FIGS.

[0022] The semiconductor device 1 is a resonator having a TPOS (thin film piezoelectric on silicon) structure. The semiconductor device 1 mainly utilizes a contour mode resonance in which a substrate 11 included in a diaphragm 1a, also called a resonance plate, vibrates laterally in response to an action from a single crystal layer 12, which is a piezoelectric film laminated on the main surface of the substrate 11 and connected to electrodes 13a and 13b.

[0023] Figure 3A is a plan view of the semiconductor device 1 of Figure 1, excluding electrodes 13a and 13b. The same components as those in Figure 1 are denoted by the same reference numerals, and a description thereof will be omitted. The semiconductor device 1 includes a laminated film of a substrate 11 and a single-crystal layer 12.

[0024] Figure 3B is an enlarged plan view of region 1d in Figure 3A. Region 1d is the connection between diaphragm 1a, beam 1c, and peripheral member 1e. First line 2 passes through the center of beam 1c in the width direction and faces a direction rotated 15° to the left with respect to representative cleavage plane direction 4.

[0025] Here, the reason why, in the present disclosure, the direction of the first straight line 2 is rotated 15° to the left with respect to the representative cleavage plane direction 4 when the semiconductor device 1 is formed on the main surface of the substrate 11 as shown in Figures 1, 3A, and 3B will be explained. For the explanation, a comparative study conducted by the inventors of the present disclosure will be described below.

[0026] The purpose of the comparative study was to obtain a semiconductor device 1 having a structure that is resistant to cracking in the laminated film of the substrate 11 and the single crystal layer 12. The outline of the comparative study was to manufacture multiple semiconductor devices 1 arranged at different angles relative to the orientation of the single crystal silicon (111) wafer, and evaluate and compare the number of defects in the semiconductor devices 1 arranged at different angles. In the comparative study, a laminated film was used in which a single crystal layer 12, which is a piezoelectric film made of single crystal aluminum nitride AlN, was laminated on the main surface of a single crystal silicon (111) wafer.

[0027] First, the premise of the study will be explained. Figure 4 is a diagram showing the cleavage plane directions of a single crystal silicon (111) wafer. The single crystal silicon (111) wafer in Figure 4 has its main surface facing the Z direction and its orientation flat facing the negative direction of the Y axis. The cleavage planes of the single crystal silicon (111) wafer include the first cleavage plane (-110), the second cleavage plane (-101), and the third cleavage plane (0-11). Here, the first to third cleavage planes are names used for convenience. The first cleavage plane (-110) is parallel to the Y direction and is indicated by a dashed line. The second cleavage plane (-101) is in the direction obtained by rotating the first cleavage plane (-110) line 60 degrees to the left around the center of the single crystal silicon (111) wafer and is indicated by a two-dot chain line. The third cleavage plane (0-11) is in the direction obtained by rotating the first cleavage plane (-110) line by 60 degrees to the right, and is indicated by a solid line.

[0028] 1, 3A, and 3B show the case where the representative cleavage plane direction 4 is the direction of the first cleavage plane (-110) plane parallel to the Y direction among the three cleavage plane directions shown in Fig. 4. However, the following discussion also applies to the case where the representative cleavage plane direction 4 is the direction of the second cleavage plane (-101) plane or the direction of the third cleavage plane (0-11) plane.

[0029] Next, the details of the comparative study that was conducted will be described. Figures 5A to 5E are plan views showing the region 1d, which is the connection portion between the diaphragm 1a, the beam 1c, and the peripheral member 1e, when the semiconductor device 1 is arranged with the first straight line 2 at five different angles relative to the representative cleavage plane direction 4, which is parallel to the Y direction. Figure 5A shows the case where the semiconductor device 1 is arranged so that the first straight line 2 is parallel to the representative cleavage plane direction 4. Figures 5B, 5C, 5D, and 5E show the cases where the semiconductor device 1 is arranged so that the first straight line 2 is rotated 30°, 45°, 60°, and 90° to the left with respect to the representative cleavage plane direction 4, respectively.

[0030] For the comparative study, multiple samples of semiconductor devices 1 arranged at the angles shown in Figures 5A to 5E were fabricated in equal numbers as follows. The semiconductor devices 1 were fabricated by arranging the same number of semiconductor devices 1 on a single crystal silicon (111) wafer at the angles shown in Figures 5A to 5E, and a laminate film including a substrate 11 on which the semiconductor devices 1 are formed and a single crystal layer 12 was cut out. Here, multiple wafers may be fabricated with the semiconductor devices 1 arranged at different angles, or multiple semiconductor devices 1 may be fabricated by arranging the semiconductor devices 1 at different angles on the same single crystal silicon (111) wafer.

[0031] 5A to 5E, the first corners, which are two corners on the negative and positive sides of the first line 2 at the connection between the diaphragm 1a and the beam 1c in region 1d, and the second corners, which are two corners at the connection between the beam 1c and the peripheral member 1e, respectively include a line parallel to the first line 2 and a line perpendicular to the first line 2. In FIGS. 5A to 5E, at the first corner at the connection between the diaphragm 1a and the beam 1c, the angle formed by the line parallel to the first line 2 passing through the vertex of the first corner and the line parallel to the perpendicular line 3 to the first line 2, and the direction from the first cleavage plane (-110) to the third cleavage plane (0-11) is shown. The second corner at the connection between the beam 1c and the peripheral member 1e is either line-symmetric or similar with respect to the first corner at the connection between the diaphragm 1a and the beam 1c and the line parallel to the perpendicular line 3 to the first line 2 as the axis of symmetry. The angles formed by the second corner of the connection between the beam 1c and the peripheral member 1e and the directions of the first to third cleavage planes are not shown in the drawing.

[0032] 5A, the lines passing through each of the two first corners and parallel to the first line 2 are parallel to the direction of the first cleavage plane (-110). At the first corners on the positive side of the first line 2, the lines passing through the vertices of the first corners and parallel to the first line 2 are rotated 60° to the right with respect to the direction of the second cleavage plane (-101). In this case, the lines parallel to the first line 2 at the first corners on the positive side of the first line 2 are defined as having an angle of -60° with respect to the direction of the second cleavage plane (-101).

[0033] Furthermore, at the first corner on the negative side of the first line 2, the line parallel to the first line 2 that passes through the vertex of the first corner is rotated 60° to the left with respect to the direction of the third cleavage plane (0-11) plane. In this case, the line parallel to the first line 2 at the first corner on the negative side of the first line 2 is defined as having an angle of +60° with respect to the direction of the third cleavage plane (0-11) plane.

[0034] A line parallel to the first line 2 passing through each of the two first corners intersects the direction of the second cleavage plane (-101) plane at an angle of -60° or intersects the direction of the third cleavage plane (0-11) plane at an angle of +60°. Here, when the cleavage planes and the positive and negative angles used as references for each of the two first corners are not distinguished, the above is collectively referred to as a line parallel to the first line 2 intersecting the direction of the second cleavage plane (-101) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±60°. Similarly, a perpendicular line 3 to the first line 2 intersects the direction of the second cleavage plane (-101) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±30°.

[0035] 5B, a line parallel to the first line 2 passing through each of the two first corners intersects with the direction of the first cleavage plane (-110) plane and the direction of the second cleavage plane (-101) plane at an angle of ±30°. A line parallel to the first line 2 passing through each of the two first corners intersects with the direction of the third cleavage plane (0-11) plane at an angle of ±90°. A line parallel to the perpendicular line 3 to the first line 2 passing through each of the two first corners intersects with the direction of the first cleavage plane (-110) plane and the direction of the second cleavage plane (-101) plane at an angle of ±60°.

[0036] 5C, a line parallel to the first line 2 passing through the vertex of one of the two first corners located on the negative side of the first line 2 intersects with the direction of the first cleavage plane (-110) at an angle of +45°. A line parallel to the first line 2 passing through the vertex of the one of the two first corners located on the positive side of the first line 2 intersects with the direction of the second cleavage plane (-101) at an angle of -15° and with the direction of the third cleavage plane (0-11) at an angle of -75°.

[0037] A perpendicular line 3 to the first line 2, which passes through the vertex of the first corner that is on the negative side of the first line 2, intersects with the direction of the first cleavage plane (-110) plane at an angle of -45°. A perpendicular line 3 to the first line 2, which passes through the vertex of the first corner that is on the positive side of the first line 2, intersects with the direction of the second cleavage plane (-101) plane at an angle of 75° and intersects with the direction of the third cleavage plane (0-11) plane at an angle of 15°.

[0038] 5D, a line parallel to the first line 2 passing through each corner of the two first corners is parallel to the direction of the second cleavage plane (-101) plane. A line parallel to the first line 2 passing through the vertices of the two first corners intersects with the direction of the first cleavage plane (-110) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±60°. Furthermore, a perpendicular line 3 to the first line 2 intersects with the direction of the first cleavage plane (-110) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±30°.

[0039] In Fig. 5D, a line parallel to the first line 2 passing through the vertex of the first corner of the connection between the diaphragm 1a and the beam 1c intersects with the cleavage plane direction at the same angle, which is 60° different from Fig. 5A. Assuming that the susceptibility to cracking in the three cleavage plane directions is equal, Fig. 5D is equivalent to Fig. 5A, and in analyzing the results of the comparative study, the average value of the results for the arrangements in Fig. 5A and Fig. 5D is used.

[0040] 5E, a line parallel to the first line 2 passing through each of the two first corners intersects with the direction of the second cleavage plane (-101) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±30°. A line parallel to the first line 2 passing through each of the two first corners intersects with the direction of the first cleavage plane (-110) plane at an angle of ±90°. A perpendicular line 3 to the first line 2 passing through each of the two first corners intersects with the direction of the second cleavage plane (-101) plane and the direction of the third cleavage plane (0-11) plane at an angle of ±60°.

[0041] In Figure 5E, a line parallel to the first line 2 passing through the vertex of the first corner of the connection between the diaphragm 1a and the beam 1c intersects with the cleavage plane direction at the same angle, which is 60° different from Figure 5B. Assuming that the susceptibility to cracking in the three cleavage plane directions is equal, Figure 5E is equivalent to Figure 5B, and in analyzing the results of the comparative study, the average value of the results for the arrangements in Figure 5B and Figure 5E is used.

[0042] 6 shows the ratio of the number of defects that occurred in multiple semiconductor devices 1 when the semiconductor devices 1 were fabricated by forming them on the main surfaces of multiple substrates 11 included in a single crystal silicon (111) wafer at the angles shown in Figures 5A to 5E. The number of defects is normalized by assuming that the number of defects in the case of (1) in Figure 6 is 1.

[0043] In (1) of Figure 6, the average number of defects when the semiconductor device 1 is placed at the angle shown in Figure 5A and when it is placed at the angle shown in Figure 5D is set to 1. In (2) of Figure 6, the average number of defects when the semiconductor device 1 is placed at the angle shown in Figure 5B and when it is placed at the angle shown in Figure 5E is divided by the number of defects in (1). In (3) of Figure 6, the average number of defects when the semiconductor device 1 is placed at the angle shown in Figure 5C is divided by the number of defects in (1).

[0044] 6 (1), (2), and (3) also show the breakdown of the angle at which the crack occurred relative to a line parallel to the first line 2 when the defect occurred. For example, in the bar graph of FIG. 6 (1), all of the cracks occurred at an angle of ±60° relative to a direction parallel to the first line 2.

[0045] The defect count ratio in FIG. 6 will be considered with reference to FIGS. 5A to 5E.

[0046] In the bar graph of FIG. 6, the case (1) has the largest number of defects. In FIG. 6 (1), all cracks occur at angles of ±60° with respect to the direction parallel to the first line 2. Referring to FIGS. 5A and 5D, at the two first corners of the connection between the diaphragm 1a and the beam 1c, a line parallel to the first line 2 intersects at an angle of ±60° with either the direction of the first cleavage plane (-110), the direction of the second cleavage plane (-101), or the direction of the third cleavage plane (0-11). Although not shown in FIGS. 5A and 5D, at the two second corners of the connection between the beam 1c and the peripheral member 1e, a line parallel to the first line 2 also intersects at an angle of ±60° with either the direction of the cleavage plane. That is, the direction of the cracks in the defect (1) in Figure 6 all coincides with the cleavage plane direction passing through the apex of the first corner or the second corner, and is caused by cracks occurring in the cleavage plane direction from the apex of the first corner or the second corner.

[0047] Here, the mechanism by which cracks occur in the first or second corner of the region 1d, which is the connection between the diaphragm 1a, the beam 1c, and the peripheral member 1e, will be explained.

[0048] The single crystal layer 12 formed on the main surface of the substrate 11 included in the single crystal silicon (111) wafer is formed while inheriting the crystal structure of the single crystal silicon (111), and therefore is prone to cracks occurring in the same direction as the cleavage plane of the single crystal silicon (111). That is, the single crystal layer 12 formed on the main surface of the substrate 11 is prone to cracks occurring in the directions of the first cleavage plane (-110), the second cleavage plane (-101), and the third cleavage plane (0-11) shown in Figures 4 and 5A to 5E.

[0049] In addition, in the comparative study, the lattice constant of the single-crystal aluminum nitride AlN, which is the piezoelectric film used as the single-crystal layer 12, is smaller than the lattice constant of single-crystal silicon (111), so the single-crystal layer 12 receives tensile stress from the substrate 11.

[0050] The tensile stress that the single-crystal layer 12 receives from the substrate 11 increases as the length of the single-crystal layer 12 to be deposited increases. Furthermore, if the single-crystal layer 12 has corners, stress concentrates at the corners, making them more likely to become the starting point for cracks. When the corners of the single-crystal layer 12 have a vertex and the vertex is in contact with a line perpendicular to the cleavage plane direction of the substrate 11, as shown in FIG. 4, tensile stress is applied in a direction perpendicular to the cleavage plane direction of the substrate 11, resulting in localized tensile stress concentration at the vertex. For example, in region 1d of FIG. 3A, the first corner of the single-crystal layer 12 at the connection between the diaphragm 1a and the beam 1c receives tensile stress in a direction perpendicular to the cleavage plane direction of the substrate 11, passing through the vertex of the first corner, for the length of the single-crystal layer 12 included in the diaphragm 1a. The tensile stress is concentrated at the vertex of the first corner.

[0051] When the single crystal layer 12 can no longer withstand the tensile stress received from the substrate 11 at the apex of the corner, a crack occurs along the cleavage plane direction of the substrate 11 that passes through the apex of the corner. When a crack occurs in the single crystal layer 12, the crack that occurred in the single crystal layer 12 may propagate to the substrate 11, causing a crack to occur in the substrate 11 as well, because the single crystal layer 12 is formed by bonding with the crystal of the substrate 11.

[0052] As described above, when the single crystal layer 12 can no longer withstand the tensile stress generated in a direction perpendicular to the cleavage plane direction of the substrate 11 at the apex of the first or second corner of the region 1d, a crack occurs along the cleavage plane direction of the substrate 11 passing through the apex of the first or second corner.

[0053] Returning to the explanation of bar graph (1) in Fig. 6, with reference to Fig. 5A and Fig. 5D, the cleavage plane direction is a direction that is line-symmetrical with respect to the first line 2 as the axis of symmetry, and cracks can occur in either of the two first corners or the two second corners on the positive and negative sides of the first line 2, resulting in an increase in the number of defects.

[0054] In the bar graph of FIG. 6, the number of defects in case (2) is 0.63 times that of case (1), making it the second most common after case (1). In the bar graph of case (2) in FIG. 6, cracks occur at angles of ±30° or 90° relative to the direction parallel to the first line 2. Referring to FIGS. 5B and 5E, the angle at which cracks occur coincides with the angle at which a line parallel to the first line 2 intersects with the direction of the first cleavage plane (-110), the direction of the second cleavage plane (-101), or the direction of the third cleavage plane (0-11). In other words, all of the defects in case (2) in FIG. 6 are caused by cracks occurring from the vertex of the first or second corner toward the cleavage plane. The directions of the cleavage planes are symmetrical with respect to the first line 2, and cracks can occur in either the two first corners or the two second corners, resulting in an increased number of defects.

[0055] On the other hand, in the bar graph of FIG. 6, the number of defects in case (3) is 0.29 times that of case (1), which is the smallest number of defects. In the bar graph of FIG. 6(3), cracks occur at angles of 15°, 45°, or 75° relative to the direction parallel to the first line 2. Referring to FIG. 5C, the angle at which cracks occur coincides with the angle at which a line parallel to the first line 2 intersects with the direction of the first cleavage plane (-110), the direction of the second cleavage plane (-101), or the direction of the third cleavage plane (0-11). In other words, all of the defects in FIG. 6(3) are caused by cracks occurring from the vertex of the first or second corner toward the cleavage plane. Because the direction of the cleavage plane is not symmetrical with respect to the first line 2 as the axis of symmetry, cracks often occur in either the first or second corner, resulting in a small number of defects.

[0056] From the above comparative study conducted by the inventors of the present disclosure, it has been found that a semiconductor device 1 having a structure that is less likely to crack in the laminated film of the substrate 11 and the single crystal layer 12 can be provided as follows: By positioning the semiconductor device 1 so that the first straight line 2 of the semiconductor device 1 and the perpendicular line 3 to the first straight line 2 intersect with the representative cleavage plane direction 4, which is the direction of one of the cleavage planes, at an angle that is not an integer multiple of 30°, the number of defects in the laminated film of the substrate 11 and the single crystal layer 12 can be kept low.

[0057] Next, the reason why the semiconductor device 1 is disposed so that the first straight line 2 forms an angle of 15° with respect to the representative cleavage plane direction 4, which is one of the directions of the three cleavage planes, will be explained.

[0058] FIG. 7 shows the case where first line 2 is rotated 15° to the left with respect to representative cleavage plane direction 4. In FIG. 7, a line parallel to first line 2 passing through the vertex of the first corner of the connection between diaphragm 1a and beam 1c intersects with either the direction of the first cleavage plane (-110) plane, the direction of the second cleavage plane (-101), or the direction of the third cleavage plane (0-11) plane at an angle of 15°, -45°, or 75°. In FIG. 7, a direction that has an angle that is an integer multiple of 30° with respect to a line parallel to first line 2 has an angle 15° away from any of the cleavage plane directions.

[0059] 5A, 7, 5B, 5C, and 5D are compared with each other to determine the angle between a line parallel to the first line 2 passing through the vertex of the first corner portion on the positive side of the first line 2 and the direction of one of the cleavage planes.

[0060] In FIG. 5A, where the first straight line 2 is parallel to the direction of the representative cleavage plane 4, a line parallel to the first straight line 2 intersects with the second cleavage plane (-101) at an angle of -60°.

[0061] In FIG. 7, where the first line 2 is rotated 15° to the left with respect to the representative cleavage plane direction 4, a line parallel to the first line 2 intersects with the second cleavage plane (−101) at an angle of −45°.

[0062] In FIG. 5B, in which the first line 2 is rotated 30° to the left with respect to the representative cleavage plane direction 4, a line parallel to the first line 2 intersects with the second cleavage plane (-101) at an angle of -30° and with the third cleavage plane (0-11) at an angle of -90°.

[0063] In FIG. 5C , in which the first line 2 is rotated 45° to the left with respect to the representative cleavage plane direction 4, a line parallel to the first line 2 intersects with the second cleavage plane (−101) at an angle of −15° and with the third cleavage plane (0-11) at an angle of −75°.

[0064] In FIG. 5D , in which the first line 2 is rotated 60° to the left with respect to the representative cleavage plane direction 4, a line parallel to the first line 2 is parallel to the second cleavage plane (−101) and intersects with the third cleavage plane (0-11) at an angle of −60°.

[0065] Similarly, the angles formed between a line parallel to the first line 2 passing through the vertex of the first corner on the negative side of the first line 2 and the direction of one of the cleavage planes are compared with FIGS. 5A, 7, 5B, 5C, and 5D. In FIG. 7, the line parallel to the first line 2 intersects the first cleavage plane (-110) at an angle of 15° and the third cleavage plane (0-11) at an angle of 75°. In FIG. 5C, the line parallel to the first line 2 intersects the first cleavage plane (-110) at an angle of 45°. Apart from the above, the angles formed between a line parallel to the first line 2 passing through the vertex of the first corner on the negative side of the first line 2 and the direction of one of the cleavage planes are angles whose sign is inverted with respect to the positive side of the first line 2, and therefore will not be described here.

[0066] 7 and 5C, the direction having an angle that is an integer multiple of 30° with respect to a line parallel to first line 2 that passes through the vertex of the first corner portion on the positive side of first line 2 is at an angle that is +15° or −15° away from the direction of any of the cleavage planes. On the other hand, in FIGS. 5A, 5B, and 5D, the direction having an angle that is an integer multiple of 30° with respect to a line parallel to first line 2 matches the direction of any of the cleavage planes.

[0067] That is, the minimum value of the angle between a direction having an angle that is an integer multiple of 30° with respect to a line parallel to the first line 2 and any of the three cleavage plane directions is 15° when the angle between the first line 2 and the representative cleavage plane direction 4 is 15° or 45° in the range of 0° to 60°.

[0068] Referring again to FIG. 4, the cleavage planes of a single-crystal silicon (111) wafer are represented by three straight lines that pass through the center of the single-crystal silicon (111) wafer and are rotated 60° relative to each other. When the semiconductor device 1 is rotated 60°, the angles between the first straight line 2 of the semiconductor device 1 and the different cleavage planes become the same. Assuming that the likelihood of cracks occurring along the three cleavage planes is equal, the semiconductor device 1 rotated 60° is equivalent to the state before rotation. For example, rotating the first straight line 2 75° left with respect to the representative cleavage plane direction 4 is equivalent to rotating the first straight line 2 15° left with respect to the representative cleavage plane direction 4, as shown in FIG. 7.

[0069] Furthermore, in Figure 4, the directions of the cleavage planes are symmetrical about the Y axis when the three cleavage planes are not distinguished based on the assumption that the likelihood of cracks occurring along the three cleavage planes is equal. Therefore, for example, rotating the first line 2 15° to the right, in other words, rotating the first line 2 -15° to the left, is equivalent to rotating the first line 2 15° to the left inverted about the Y axis. The angle between a direction that is an integer multiple of 30° and the first line 2 and any of the three cleavage plane directions is an angle obtained by inverting the positive and negative signs of the angle before inverting about the Y axis, and there is no difference in whether the angle is the same or is offset by +15° or -15°.

[0070] 5A to 5E and 7, the first corner of the connection between the diaphragm 1a and the beam 1c includes a line parallel to the first line 2 and a line parallel to the perpendicular line 3 to the first line 2. When the angle between the first line 2 and the representative cleavage plane direction 4 is x°, the angle between the perpendicular line 3 to the first line 2 and the representative cleavage plane direction 4 is either (x+90)° (x<0), (x-90)° (x>0), 90°, or -90° (x=0). There is no difference in the angle between the direction having an angle of an integer multiple of 30° with the perpendicular line 3 to the first line 2 and one of the three cleavage plane directions, in terms of whether the angle is the same or is separated by +15° or -15°.

[0071] As described above, by positioning the semiconductor device 1 so that the directions having angles that are integer multiples of 30° with respect to the first line 2 and the perpendicular line 3 to the first line 2 do not coincide with any of the three cleavage plane directions, a structure that is less likely to crack can be obtained in the laminated film of the substrate 11 and the single-crystal layer 12. For example, the angle between the first line 2 and the representative cleavage plane direction 4 may be 1° to 29° or -29° to -1°. Furthermore, for example, the angle between the perpendicular line 3 to the first line 2 and the representative cleavage plane direction 4 may be 1° to 29° or -29° to -1°.

[0072] Furthermore, by arranging the semiconductor device 1 so that the angle between the first line 2 and the perpendicular line 3 to the first line 2 and the representative cleavage plane direction 4 is (±15° + 60° × N) or (±45° + 60° × N) (N: integer), a semiconductor device 1 having a structure that is less likely to crack in the laminated film can be provided. By using these angles, the minimum angle between the first line 2 and the perpendicular line 3 to the first line 2 and any of the cleavage plane directions, which are angles that are an integer multiple of 30°, becomes a maximum of 15°, and this angle can be the furthest from the angle at which the single crystal layer 12 is likely to crack. In the semiconductor device 1 according to the first embodiment, for example, the first line 2 is arranged so that it forms an angle of 15° with respect to the representative cleavage plane direction 4, but it may also be -15° or ±45°. Furthermore, an angle obtained by adding an integer multiple of 60° to ±15° or ±45° may also be used.

[0073] The first corners of the connection between the diaphragm 1a and the beam 1c are located on both the positive and negative sides of the first line 2. Preferably, the first corners on the positive and negative sides of the first line 2 are symmetrical about the first line 2. This symmetrical shape prevents a specific location in the shape of the semiconductor device 1 when it is a resonator, thereby preventing deterioration of its characteristics. Furthermore, this symmetrical shape allows the direction at which the line parallel to the first line 2 passing through the vertices of the first corners and the line parallel to the perpendicular line 3 to the first line 2 are angled an integer multiple of 30° to be the farthest from the cleavage plane direction at both of the first corners. Similarly, the second corners of the connection between the beam 1c and the peripheral member 1e, on the positive and negative sides of the first line 2, are symmetrical about the first line 2.

[0074] Returning to the description of the semiconductor device 1 according to the first embodiment of FIG. 1, the semiconductor device 1 of FIG. 1 is disposed on the main surface of the substrate 11 with the first line 2 rotated 15° to the left with respect to the representative cleavage plane direction 4. As described above, at the first corner of the connection between the diaphragm 1a and the beam 1c and the second corner of the connection between the beam 1c and the peripheral member 1e, the first line 2, the perpendicular line 3 to the first line 2, and the representative cleavage plane direction 4 are disposed so as to intersect at an angle that is not an integer multiple of 30°. Furthermore, the minimum value of the angle between the first line 2 and the perpendicular line 3 to the first line 2 and all the representative cleavage plane directions 4 is the maximum of 15°, which makes it possible to form a structure in which the laminated film of the substrate 11 and the single crystal layer 12 is less likely to crack.

[0075] In the above explanation, it has been explained that the laminated film of the substrate 11 and the single-crystal layer 12 at the first and second corners of the connection between the diaphragm 1a and the beam 1c can be made into a crack-resistant structure. However, as shown in FIG. 1, the first line 2 also passes through the center of the beam 1b in the width direction, and the shapes of the first and second corners of the connection between the diaphragm 1a and the beam 1b are line-symmetrical or similar to the shapes of the first and second corners of the connection between the diaphragm 1a and the beam 1c, with line II-II as the axis of symmetry. Therefore, at the first and second corners of the connection between the diaphragm 1a and the beam 1b, the laminated film of the substrate 11 and the single-crystal layer 12 can be made into a crack-resistant structure as well.

[0076] (Effects of the first embodiment) According to the semiconductor device 1, the angle between the direction of the cleavage plane and the first straight line 2 and the direction having an angle that is an integer multiple of 30° with respect to the perpendicular line 3 to the first straight line 2 is set to the furthest angle so that the angle does not coincide with the angle, thereby making it possible to create a structure that is less likely to crack in the laminated film of the substrate 11 and the single crystal layer 12.

[0077] [Second embodiment] (Configuration of semiconductor devices) Fig. 8 is a cross-sectional view of the semiconductor device 1 according to the second embodiment. The plan view of the semiconductor device 1 according to the second embodiment is the same as the plan view of the semiconductor device 1 according to the first embodiment shown in Fig. 1, and therefore a description thereof will be omitted. Fig. 8 is a cross-sectional view of the semiconductor device 1 according to the second embodiment taken along the same line as II-II in Fig. 1.

[0078] 8 differs from the cross-sectional view of the semiconductor device 1 according to the first embodiment shown in FIG. 2 in that an opening 15 is provided on the back surface of the substrate 11 included in the diaphragm 1a and the beams 1b and 1c, i.e., on the negative side in the Z direction of the surface facing the main surface of the substrate 11 on which the single-crystal layer 12 is laminated. The opening 15 is formed by removing the back surface of the substrate 11 by etching or the like, thereby making the thickness of the substrate 11 thinner than that of the substrate 11 included in the peripheral member 1e. In FIG. 8, the thickness of the substrate 11 included in the peripheral member 1e is, for example, 400 μm, and the thickness of the substrate 11 included in the diaphragm 1a and the beams 1b and 1c is, for example, 10 μm. By providing the opening 15 on the back surface of the substrate 11 included in the diaphragm 1a and the beams 1b and 1c, the difference in acoustic impedance between the diaphragm 1a, which is the resonator of the semiconductor device 1, and the peripheral member 1e can be increased, thereby improving the characteristics of the resonator.

[0079] (Effects of the second embodiment) According to the semiconductor device 1, the angle between the direction of the cleavage plane and the first straight line 2 and the direction that forms an angle that is an integer multiple of 30° with respect to the perpendicular line 3 to the first straight line 2 is set to the furthest angle possible so that the angle does not coincide with the angle, thereby making it possible to form a structure that is less likely to crack in the laminated film of the substrate 11 and the single-crystal layer 12. Furthermore, according to the semiconductor device 1, the difference in acoustic impedance between the diaphragm 1a, which is a resonating plate, and the peripheral member 1e can be increased, thereby improving the characteristics of the resonator.

[0080] [Third embodiment] (Configuration of semiconductor devices) Fig. 9 is a cross-sectional view of the semiconductor device 1 according to the third embodiment. The plan view of the semiconductor device 1 according to the third embodiment is the same as the plan view of the semiconductor device 1 according to the first embodiment shown in Fig. 1, and therefore a description thereof will be omitted. Fig. 9 is a cross-sectional view of the semiconductor device 1 according to the third embodiment taken along the same line as II-II in Fig. 1.

[0081] 9 differs from the cross-sectional view of the semiconductor device 1 according to the first embodiment shown in Fig. 2 in that a buffer layer 16 is inserted between the substrate 11 and the single crystal layer 12. When the substrate 11 is, for example, a single crystal silicon substrate and the single crystal layer 12 is, for example, a piezoelectric film made of single crystal aluminum nitride AlN, which is a piezoelectric material, the buffer layer 16 is, for example, single crystal aluminum gallium nitride AlGaN.

[0082] The buffer layer 16 is formed on the main surface of the single-crystal substrate 11 by epitaxial growth, inheriting the crystalline information of the substrate 11. Furthermore, the single-crystal layer 12 is formed on the main surface of the buffer layer 16 by epitaxial growth, inheriting the crystalline information of the buffer layer 16. In other words, even with the buffer layer 16 inserted, the single-crystal layer 12 remains an epitaxially grown layer that inherits the crystalline information of the substrate 11. By inserting the buffer layer 16 in the semiconductor device 1, the mismatch in lattice constant between the substrate 11 and the single-crystal layer 12 is alleviated, thereby alleviating tensile and compressive stresses in each layer of the stacked film, thereby suppressing the occurrence of cracks. Furthermore, the crystallinity of the single-crystal layer 12 can be improved, which is suitable for obtaining a high Q value, for example, when the semiconductor device 1 operates at high frequencies. Furthermore, in the laminated film of the substrate 11, buffer layer 16, and single crystal layer 12, the direction in which cracking is likely to occur is the same as the cleavage plane direction of the substrate 11. Therefore, by arranging the semiconductor device 1 so that the first line 2 and the representative cleavage plane direction 4 form an angle of 15°, a structure that is less likely to crack can be obtained.

[0083] (Effects of the third embodiment) In the semiconductor device 1, the angle between the first line 2 and the direction having an angle that is an integer multiple of 30° with respect to the perpendicular line 3 to the first line 2 is set to the furthest angle possible so that the angle between the direction of the cleavage plane does not coincide with the angle between the first line 2 and the direction of the cleavage plane, thereby making it possible to form a structure that is less likely to crack in the laminated film of the substrate 11 and the single-crystal layer 12. Furthermore, in the semiconductor device 1, the buffer layer 16 alleviates the mismatch in lattice constant between the substrate 11 and the single-crystal layer 12, thereby alleviating the tensile stress and compressive stress in each layer, making it possible to form a structure that is less likely to crack in the laminated film.

[0084] [Fourth embodiment] (Configuration of semiconductor devices) Fig. 10 is a cross-sectional view of the semiconductor device 1 according to the fourth embodiment. The plan view of the semiconductor device 1 according to the fourth embodiment is the same as the plan view of the semiconductor device 1 according to the first embodiment shown in Fig. 1, and therefore a description thereof will be omitted. Fig. 10 is a cross-sectional view of the semiconductor device 1 according to the fourth embodiment taken along the same line as II-II in Fig. 1.

[0085] Compared with the cross-sectional view of the semiconductor device 1 according to the first embodiment shown in FIG. 2, FIG. 10 differs in the following respects.

[0086] 8, the thickness of the substrate 11 included in the diaphragm 1a and the beams 1b, 1c is made thinner than the thickness of the substrate 11 included in the peripheral member 1e, and an opening 15 is provided. By providing the opening 15 on the back surface of the substrate 11 included in the diaphragm 1a and the beams 1b, 1c, it is possible to increase the difference in acoustic impedance between the diaphragm 1a, which is the resonating plate of the semiconductor device 1 that is the resonator, and the peripheral member 1e, thereby improving the characteristics of the resonator.

[0087] 9, a buffer layer 16 is inserted between the substrate 11 and the single-crystal layer 12. When the substrate 11 is, for example, a single-crystal silicon substrate and the single-crystal layer 12 is, for example, a piezoelectric film made of single-crystal aluminum nitride AlN, which is a piezoelectric material, for example, single-crystal aluminum gallium nitride AlGaN is inserted as the buffer layer 16. By inserting the buffer layer 16, the mismatch in lattice constant between the substrate 11 and the single-crystal layer 12 is alleviated, thereby alleviating tensile stress and compressive stress in each layer of the laminated film, and making it possible to suppress the occurrence of cracks.

[0088] (Effects of the fourth embodiment) In the semiconductor device 1, the angles between the first line 2 and the direction of the cleavage plane, which are an integer multiple of 30° from the perpendicular line 3 to the first line 2, are set to the furthest angles possible so that they do not coincide with each other, thereby making it possible to form a structure that is less likely to crack in the laminated film of the substrate 11 and the single-crystal layer 12. Furthermore, in the semiconductor device 1, the difference in acoustic impedance between the diaphragm 1a, which is a resonating plate, and the peripheral member 1e can be increased, thereby improving the characteristics of the resonator. Furthermore, in the semiconductor device 1, the buffer layer 16 alleviates the mismatch in lattice constant between the substrate 11 and the single-crystal layer 12, thereby alleviating tensile stress and compressive stress in each layer, making it possible to form a structure that is less likely to crack in the laminated film.

[0089] [Other embodiments] Although several embodiments of the present disclosure have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. One or more elements of one embodiment can be combined with one or more elements of another embodiment. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are intended to be included within the scope and spirit of the invention, as well as within the scope of the invention and its equivalents as defined in the claims.

[0090] For example, in the semiconductor devices 1 according to the first to fourth embodiments of the present disclosure, the representative cleavage plane direction 4 is the direction of the first cleavage plane (-110), but the representative cleavage plane direction 4 may be the direction of the second cleavage plane (-101) or the direction of the third cleavage plane (0-11).

[0091] Further, for example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, an example has been shown in which the first straight line 2 and the representative cleavage plane direction 4, which is the direction of any cleavage plane of the substrate 11, are arranged to form an angle of 15°. However, the angle between the first straight line 2 and the representative cleavage plane direction 4 may be −15° or ±45°. Furthermore, the angle between the first straight line 2 and the representative cleavage plane direction 4 may be an angle obtained by adding an integer multiple of 60° to ±15° and ±45°, such as ±75°.

[0092] Furthermore, for example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, an example has been shown in which the first straight line 2 and the representative cleavage plane direction 4, which is the direction of any cleavage plane of the substrate 11, form an angle of 15°. However, the angle between the perpendicular line 3 to the first straight line 2 and the representative cleavage plane direction 4 may be ±15° or ±45°. Similarly, the angle between the perpendicular line 3 to the first straight line 2 and the representative cleavage plane direction 4 may be an angle obtained by adding an integer multiple of 60° to ±15° or ±45°, such as ±75°.

[0093] Further, for example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure described above, the first corners of the connection portions of the diaphragm 1a and the beams 1b, 1c, and the second corners of the connection portions of the beams 1b, 1c and the peripheral member 1e are configured by a straight line parallel to the first straight line 2 and a straight line parallel to the perpendicular line 3 to the first straight line 2. However, the first corners or the second corners may be configured by a curved line, and the curved line may be connected to a straight line parallel to the first straight line 2 and a straight line parallel to the perpendicular line 3 to the first straight line 2. Furthermore, the vertices of the first corners or the second corners may be chamfered, and the ends of the chamfered shapes may be connected to a straight line parallel to the first straight line 2 and a straight line parallel to the perpendicular line 3 to the first straight line 2.

[0094] Furthermore, for example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, the shape of the first corners of the connection portions between the diaphragm 1a and the beams 1b, 1c and the peripheral member 1e has been shown to be the same. That is, the first corners and the second corners are symmetrical with respect to the perpendicular line 3 to the first line 2 as the axis of symmetry. However, the shape of the first corners of the connection portions between the diaphragm 1a and the beams 1b, 1c and the peripheral member 1e may be different or similar.

[0095] For example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, the diaphragm 1a is connected to the peripheral member 1e by the beams 1b and 1c. However, the semiconductor device 1 may be provided with only one of the beams 1b and 1c, with the other portion being a gap.

[0096] For example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, the shape of the diaphragm 1a serving as a resonance plate has been described as a rectangle with its longitudinal direction in the direction of the first straight line 2. However, the shape of the diaphragm 1a serving as a resonance plate may be a square in which the length of the first straight line 2 is the same as that of the perpendicular line 3 to the first straight line 2, or may be a rectangle with its shorter side in the direction of the first straight line 2. Furthermore, the shape of the diaphragm 1a serving as a resonance plate may be a circle or an ellipse.

[0097] Furthermore, for example, in the semiconductor device 1 according to the first to fourth embodiments of the present disclosure, the substrate 11 is a single-crystal silicon substrate with the (111) plane exposed, but the substrate 11 may also be a single-crystal silicon carbide SiC substrate.

[0098] Furthermore, for example, in the semiconductor devices 1 according to the first to fourth embodiments of the present disclosure, the single crystal layer 12 is a piezoelectric film made of single crystal aluminum nitride AlN, which is a piezoelectric material. However, the single crystal layer 12 may be made of zinc oxide ZnO, lithium niobate LiNbO3, lithium tantalate LiTaO3, or lead zirconate titanate PZT.

[0099] For example, the semiconductor device 1 according to the first to fourth embodiments of the present disclosure is a resonator. However, the semiconductor device 1 may also be a high-frequency switch, a filter, or a resonator for an oscillator. The semiconductor device 1 may also be a MEMS device other than these.

[0100] (Addendum) The technical ideas that can be understood from the present disclosure are described below. Note that, for the purpose of aiding understanding and not intending to be limiting, the components described in the appendices are given the reference numerals of the corresponding components in the embodiments. The reference numerals are shown as examples to aid understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

[0101] (Appendix 1) The semiconductor device 1 includes a diaphragm 1a, a peripheral member 1e disposed around the diaphragm 1a with a gap 14 interposed therebetween, and a beam 1c disposed in part of the gap 14 and connecting the diaphragm 1a to the peripheral member 1e. The diaphragm 1a, the peripheral member 1e, and the beam 1c each have a laminated structure of a substrate 11 and a single crystal layer 12 disposed on the main surface of the substrate 11 and made of a different material from the substrate 11. A first line 2 passing through the center of the beam 1c in the width direction and the center of the diaphragm 1a in the width direction and a perpendicular line 3 to the first line 2 intersect with a representative cleavage plane direction 4 of the substrate 11 at a predetermined angle. At a first corner of the connection between the diaphragm 1a and the beam 1c or a second corner of the connection between the beam 1c and the peripheral member 1e, the direction forming the predetermined angle with the first line 2 and the perpendicular line 3 to the first line 2 does not coincide with any of the cleavage plane directions of the substrate 11. Since the first straight line 2 and the direction having a predetermined angle with respect to the perpendicular line 3 to the first straight line 2 do not coincide with any of the cleavage plane directions of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0102] (Appendix 2) In the semiconductor device 1 described in Appendix 1, the substrate 11 is made of single crystal silicon with the (111) plane exposed on the main surface, and the cleavage plane directions are parallel to the (-101) plane, the (0-11) plane, and the (-110) plane.

[0103] (Appendix 3) In the semiconductor device 1 described in Supplementary Note 2, the first line 2 and the perpendicular line 3 to the first line 2 intersect with the representative cleavage plane direction 4 at an angle that is not an integer multiple of 30°. At the first corner or the second corner of the semiconductor device 1 formed on the main surface of a single crystal silicon (111) wafer, the direction having an angle that is an integer multiple of 30° with respect to the first line 2 and the perpendicular line 3 to the first line 2 does not coincide with any of the cleavage plane directions of the substrate 11. Because the direction having an angle that is an integer multiple of 30° with respect to the first line 2 and the perpendicular line 3 to the first line 2 does not coincide with any of the cleavage plane directions of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0104] (Appendix 4) In the semiconductor device 1 described in Supplementary Note 3, the first straight line 2 intersects with any one of the cleavage plane directions, that is, a direction parallel to the (-101) plane, a direction parallel to the (0-11) plane, and a direction parallel to the (-110) plane, at an angle of 1° to 29°, or -29° to -1°. At the first corner or the second corner of the semiconductor device 1 formed on the main surface of the single crystal silicon (111) wafer, the direction having an angle of an integer multiple of 30° with respect to the first straight line 2 does not coincide with any of the cleavage plane directions of the substrate 11. Since the direction having an angle of an integer multiple of 30° with respect to the first straight line 2 does not coincide with any of the cleavage plane directions of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0105] (Appendix 5) In the semiconductor device 1 described in Appendix 3, the perpendicular line 3 to the first straight line 2 intersects with any one of the cleavage plane directions, that is, a direction parallel to the (-101) plane, a direction parallel to the (0-11) plane, and a direction parallel to the (-110) plane, at an angle of 1° to 29°, or -29° to -1°. At the first corner or the second corner of the semiconductor device 1 formed on the main surface of the single crystal silicon (111) wafer, the direction having an angle of an integer multiple of 30° with respect to the perpendicular line 3 to the first straight line 2 does not coincide with any of the cleavage plane directions of the substrate 11. Since the direction having an angle of an integer multiple of 30° with respect to the perpendicular line 3 to the first straight line 2 does not coincide with any of the cleavage plane directions of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0106] (Appendix 6) In the semiconductor device 1 described in Supplementary Note 4, the first line 2 intersects with either one of the cleavage plane directions at an angle of ±15°. At the first corner or the second corner of the semiconductor device 1 formed on the main surface of the single crystal silicon (111) wafer, the direction having an angle of an integral multiple of 30° with respect to the first line 2 can be set to the angle farthest from the cleavage plane direction of the substrate 11. By setting the direction having an angle of an integral multiple of 30° with respect to the first line 2 to the angle farthest from the cleavage plane direction of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0107] (Appendix 7) In the semiconductor device 1 described in Supplementary Note 5, the perpendicular line 3 to the first line 2 intersects with either one of the cleavage plane directions at an angle of ±15°. At the first corner or the second corner of the semiconductor device 1 formed on the main surface of the single crystal silicon (111) wafer, the direction having an angle of an integral multiple of 30° with respect to the perpendicular line 3 to the first line 2 can be set to the angle farthest from the cleavage plane direction of the substrate 11. By setting the direction having an angle of an integral multiple of 30° with respect to the perpendicular line 3 to the first line 2 to the angle farthest from the cleavage plane direction of the substrate 11, a structure that is less likely to crack can be provided in the laminated film of the substrate 11 and the single crystal layer 12.

[0108] (Appendix 8) In the semiconductor device 1 described in any one of Supplementary Notes 1 to 7, the shape of the first corners of the connection between the beams 1b, 1c and the diaphragm 1a is line-symmetric with respect to the first line 2. Line symmetry prevents the creation of any peculiar points in the shape of the semiconductor device 1, thereby preventing deterioration of characteristics. Line symmetry also makes it possible to simultaneously set the directions having angles that are an integer multiple of 30° with respect to a line parallel to the first line 2 passing through the vertex of the first corners and a line parallel to the perpendicular line 3 to the first line 2 as angles that are the farthest from the direction of the cleavage plane at both of the two first corners.

[0109] (Appendix 9) In the semiconductor device 1 described in any one of Supplementary Notes 1 to 8, the shape of the second corners of the connection portions between the beams 1b, 1c and the peripheral member 1e is line-symmetric with respect to the first line 2. Line symmetry prevents the creation of any peculiar points in the shape of the semiconductor device 1, thereby preventing deterioration of characteristics. Line symmetry also makes it possible to simultaneously set the directions having angles that are an integer multiple of 30° with respect to a line that is parallel to the first line 2 passing through the vertices of the second corners and a line that is parallel to the perpendicular line 3 to the first line 2 as angles that are the farthest from the direction of the cleavage plane at both of the two second corners.

[0110] (Appendix 10) In the semiconductor device 1 described in any one of Supplementary Notes 1 to 9, the first corner portion includes a line parallel to the first line 2 and a line perpendicular to the first line 2, or is connected to a line parallel to the first line 2 and a line perpendicular to the first line 2.

[0111] (Appendix 11) In the semiconductor device 1 described in any one of Supplementary Notes 1 to 10, the second corner portion includes a line parallel to the first line 2 and a line perpendicular to the first line 2, or is connected to a line parallel to the first line 2 and a line perpendicular to the first line 2.

[0112] (Appendix 12) In the semiconductor device 1 according to any one of Supplementary Notes 1 to 11, the single crystal layer 12 is a piezoelectric film. At the corners of the piezoelectric film, the directions that form an angle that is an integer multiple of 30° with respect to the first line 2 and the perpendicular line 3 to the first line 2 do not coincide with any of the cleavage plane directions of the substrate 11, thereby providing a semiconductor device 1 that is less likely to crack.

[0113] (Appendix 13) In the semiconductor device 1 described in Appendix 12, the diaphragm 1a is a resonance plate, and the resonator is formed by connecting electrodes to a piezoelectric film of the resonance plate. At the corners of the piezoelectric film, the directions that form an angle that is an integral multiple of 30° with respect to the first line 2 and the perpendicular line 3 to the first line 2 do not coincide with any of the cleavage plane directions of the substrate 11, thereby providing a resonator that is less likely to break.

[0114] (Appendix 14) In the semiconductor device 1 described in Appendix 13, the thickness of the substrates of the resonator plate and beams 1b, 1c is thinner than the thickness of the substrates of the peripheral members. This increases the difference in acoustic impedance between the diaphragm 1a, which is the resonator plate, and the peripheral members 1e, improving the characteristics of the resonator, while providing a resonator in which the laminated film of the substrate 11 and the single-crystal layer 12 is less likely to crack.

[0115] (Appendix 15) In the semiconductor device 1 described in any one of Supplementary Notes 1 to 14, the single crystal layer 12 is an epitaxially grown layer that inherits the crystal structure of the substrate 11. The single crystal layer 12 has good crystallinity, and can provide a semiconductor device 1 that can obtain a high Q value when operating at high frequencies.

[0116] (Appendix 16) In the semiconductor device 1 described in Appendix 15, a buffer layer 16, which is an epitaxially grown layer that inherits the crystal structure of the substrate 11, is provided on the main surface of the substrate 11, and the single-crystal layer 12 is disposed on the main surface of the buffer layer 16. The buffer layer 16 alleviates the mismatch in lattice constant between the substrate 11 and the single-crystal layer 12, thereby alleviating tensile stress and compressive stress in each layer and suppressing the occurrence of cracks. The laminated film of the substrate 11, buffer layer 16, and single-crystal layer 12 of the semiconductor device 1 can be made into a crack-resistant structure. [Explanation of symbols]

[0117] 1. Semiconductor devices 1a Diaphragm 1b, 1c beam 1d area 1e Peripheral parts 2 1st straight line 3 Perpendicular to the first line 4 Representative cleavage plane direction 12 Single crystal layer 13a, 13b electrode 14 void 15 Opening 16 Buffer layer

Claims

1. A diaphragm and a peripheral member disposed around the diaphragm with a gap therebetween; a beam that is disposed in a portion of the gap and connects the diaphragm and the peripheral member; Equipped with the diaphragm, the peripheral member, and the beam each have a structure in which a substrate and a single-crystal layer made of a material different from that of the substrate are laminated together and disposed on a main surface of the substrate; a first line passing through a center of the beam in a width direction and a center of the vibration plate in a width direction, and a perpendicular line to the first line intersect with a cleavage plane direction of the substrate at a predetermined angle, Semiconductor devices.

2. the substrate is made of single-crystal silicon with a (111) plane exposed on the main surface, the cleavage plane direction is a direction parallel to the (-101) plane, a direction parallel to the (0-11) plane, or a direction parallel to the (-110) plane; The semiconductor device of claim 1 .

3. the first straight line and a perpendicular line to the first straight line intersect with the cleavage plane direction at an angle that is different from an integral multiple of 30°; The semiconductor device of claim 2 .

4. the first straight line intersects with any one of the cleavage plane directions at an angle of 1° or more and 29° or less, or at an angle of −29° or more and −1° or less; The semiconductor device of claim 3 .

5. a perpendicular to the first straight line and one of the cleavage plane directions intersect at an angle of 1° or more and 29° or less, or at an angle of −29° or more and −1° or less; The semiconductor device of claim 3 .

6. the first straight line intersects with any one of the cleavage plane directions at an angle of ±15°; The semiconductor device of claim 4 .

7. a perpendicular line to the first straight line and one of the cleavage plane directions intersect at an angle of ±15°; The semiconductor device of claim 5 .

8. a shape of a first corner of a connection portion between the beam and the diaphragm that is symmetrical with respect to the first straight line; The semiconductor device of claim 1 .

9. a shape of a second corner of a connection portion between the beam and the peripheral member that is symmetrical with respect to the first straight line; The semiconductor device of claim 1 .

10. The first corner portion includes a line parallel to the first straight line and a line perpendicular to the first straight line, or is connected to a line parallel to the first straight line and a line perpendicular to the first straight line. The semiconductor device of claim 8.

11. The second corner portion includes a line parallel to the first line and a line perpendicular to the first line, or is connected to a line parallel to the first line and a line perpendicular to the first line.

10. The semiconductor device of claim 9.

12. The semiconductor device of claim 1 , wherein the single crystal layer is a piezoelectric film.

13. the diaphragm is a resonator plate, The resonator has an electrode connected to a piezoelectric film of the resonance plate. The semiconductor device of claim 12.

14. The thickness of the substrate of the resonance plate and the beam is thinner than the thickness of the substrate of the peripheral member. The semiconductor device of claim 13.

15. the single crystal layer is an epitaxially grown layer that inherits the crystal structure of the substrate; The semiconductor device of claim 1 .

16. a buffer layer on a main surface of the substrate, the buffer layer being an epitaxially grown layer that inherits the crystal structure of the substrate; the single-crystal layer is disposed on a major surface of the buffer layer; 16. The semiconductor device of claim 15.

Citation Information

Patent Citations

  • Piezoelectric element and manufacturing method of the same, as well as surface acoustic wave element and piezoelectric thin-film resonance element

    JP2022051000A