Method for manufacturing a composite substrate, composite substrate, and elastic wave element

Abstract

To improve the bonding strength between the silicon substrate and the piezoelectric substrate. [Solution] A method for manufacturing a composite substrate comprises the steps of: preparing a piezoelectric substrate; preparing a silicon substrate; preparing a silicon substrate whose main surface has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} surface; bonding the silicon substrate and the piezoelectric substrate together; and thinning the piezoelectric substrate.

Description

[Technical Field]

[0001] This invention relates to a method for manufacturing a composite substrate, a composite substrate, and an elastic wave element. [Background technology]

[0002] In recent years, piezoelectric materials such as lithium niobate (hereinafter also referred to as "LN") and lithium tantalate (hereinafter also referred to as "LT") have been used as materials for elastic wave elements (hereinafter also referred to as "elastic wave devices") such as SAW (Surface Acoustic Wave) filters and thin-film resonators. Furthermore, piezoelectric substrates made from these piezoelectric materials are bonded to support substrates such as silicon, quartz glass, crystal, and borosilicate glass, which have a smaller coefficient of thermal expansion than the piezoelectric substrate, to form composite substrates which are then used as substrates for elastic wave devices such as SAW filters and thin-film resonators. By bonding the piezoelectric substrate to a support substrate with a smaller coefficient of thermal expansion than the piezoelectric substrate in this way, changes in the size of the composite substrate when the temperature changes are suppressed, thereby suppressing changes in the frequency characteristics of the elastic wave device.

[0003] Patent Document 1 discloses a method for manufacturing a composite substrate in which a silicon substrate with an interstitial oxygen concentration of 2 to 10 ppm is used as a support substrate, this silicon substrate is bonded to a piezoelectric substrate, and then the piezoelectric substrate is thinned. It is stated that this method allows high resistance to be maintained even after a heat treatment process at 300°C.

[0004] Patent Document 2 discloses a composite substrate in which the piezoelectric substrate is 5 to 100 μm thick, the support substrate is made of silicon with a resistivity of 2000 Ω·cm or more, and both surface layers are oxidized to a thickness of 0.1 to 20 μm. It is stated that this allows for a composite substrate with less warping when subjected to temperature changes and excellent heat resistance.

[0005] In Patent Document 3, the bonding layer provided between the support substrate and the piezoelectric substrate is made of Si (1-x) O xA composite substrate having a composition of (0.008 ≤ x ≤ 0.408) is disclosed. It is stated that this allows for increased bonding strength while improving the insulating properties of the bonding layer. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2018-117030 [Patent Document 2] Japanese Patent Publication No. 2005-347295 [Patent Document 3] Patent No. 6375471 [Overview of the project] [Problems that the invention aims to solve]

[0007] Furthermore, the disclosures in the above-mentioned prior art documents are incorporated into this book by reference. The following analysis was conducted by the inventors.

[0008] Incidentally, in composite substrates of piezoelectric substrates and silicon substrates, the difference in thermal expansion coefficients is very large. Therefore, if heat treatment is performed during device formation after bonding the substrates together, the bonding surfaces of the silicon substrate and piezoelectric substrate may peel off.

[0009] In view of the above-mentioned problems, the object of the present invention is to provide a method for manufacturing a composite substrate, a composite substrate, and an elastic wave element that contribute to improving the bonding strength between a silicon substrate and a piezoelectric substrate. [Means for solving the problem]

[0010] To solve the above problems, the present invention provides a method for manufacturing a composite substrate, comprising the steps of: preparing a piezoelectric substrate; preparing a silicon substrate; preparing a silicon substrate whose main surface has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} surface; bonding the silicon substrate and the piezoelectric substrate; and thinning the piezoelectric substrate.

[0011] In the method for manufacturing a composite substrate of the present invention, by using a silicon substrate in which the main surface has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} surface, a step-terrace structure can be formed on the surface of the silicon substrate, and by setting the terrace width to an appropriate length, the bonding strength with the piezoelectric substrate can be improved.

[0012] It is preferable to further include a bonding layer formation step in which a bonding layer is formed on the surface of the silicon substrate before the bonding step. Furthermore, it is preferable that the bonding layer includes one or more layers selected from a silicon oxide film layer, a silicon nitride film layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive film layer, a titanium layer, and a titanium oxide film layer.

[0013] Preferably, the process further includes a pulling step of pulling up a silicon single crystal whose main plane is the {100}, {110}, or {111} plane, and a slicing step of slicing the silicon single crystal so that it has a predetermined inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane to obtain the silicon substrate. This is because a silicon substrate can be obtained in which the main plane has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane.

[0014] Preferably, the process further includes a pulling step in which the main surface is tilted such that the angle of inclination with respect to the {100}, {110}, or {111} plane is 0.2° or more and 1.0° or less, and the silicon single crystal is pulled up. This is because a silicon substrate can be obtained in which the main surface has an angle of inclination with respect to the {100}, {110}, or {111} plane of 0.2° or more and 1.0° or less.

[0015] Preferably, the back surface of the silicon substrate is supported by a susceptor, and the silicon substrate is further subjected to a heat treatment step in which it is heated at a predetermined heating rate, held at a maximum temperature of 1100°C to 1400°C for a predetermined time, and cooled at a predetermined cooling rate. Preferably, the heat treatment step is a rapid heating and cooling heat treatment performed in an oxygen atmosphere (hereinafter, rapid heating and cooling heat treatment will also be referred to as "RTP", and in particular, rapid heating and cooling heat treatment in an oxygen atmosphere will also be referred to as "RTO"), the oxygen partial pressure is 1 to 100%, the maximum temperature is 1300°C or higher, and the predetermined period is 1 to 60 s. The heat treatment step may also be a batch heat treatment in which the predetermined heating rate is 1 to 20°C / min, the predetermined cooling rate is 1 to 20°C / min, and the maximum temperature is held at 1100°C to 1250°C for 0.5 to 20 hours. This is because making it easier for oxygen precipitation nuclei and oxygen precipitates to grow makes it more difficult for slips to extend.

[0016] To solve the above problems, the composite substrate of the present invention comprises a silicon substrate and a piezoelectric substrate, wherein the silicon substrate and the piezoelectric substrate are joined directly or via a bonding layer, and the main surface of the silicon substrate is characterized in that it has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane. By using a silicon substrate in which the main surface has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane, a step-terrace structure can be formed on the surface of the silicon substrate, and by setting the terrace width to an appropriate length, the bonding strength with the piezoelectric substrate can be improved.

[0017] The silicon substrate and the piezoelectric substrate are joined via a bonding layer, and the bonding layer preferably includes one or more layers selected from a silicon oxide layer, a silicon nitride layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive layer, a titanium layer, and a titanium oxide layer. Furthermore, the silicon substrate is pore-rich, and the interstitial oxygen concentration of the bulk layer is 2.0E17 to 1.3E18 atoms / cm³. 3and the bulk layer may have 1.0E2 or more oxygen precipitates with a size of 20 nm or less per cm 3 or more.

[0018] In order to solve the above problems, the elastic wave element of the present invention is characterized by having the composite substrate described above and an electrode provided on the piezoelectric substrate.

Advantages of the Invention

[0019] According to each aspect of the present invention, it is possible to provide a method for manufacturing a composite substrate, a composite substrate, and an elastic wave element that contribute to improving the bonding strength between a silicon substrate and a piezoelectric substrate.

Brief Description of the Drawings

[0020] [Figure 1] FIG. 1 is a schematic cross-sectional view showing an example of a composite substrate according to Embodiment 1 of the present invention. [Figure 2] FIG. 2 is a diagram for explaining the tilt angle of a silicon substrate. [Figure 3] FIG. 3 is a diagram showing a step-terrace structure on the surface of a silicon substrate. [Figure 4] FIG. 4 is a flowchart showing a method for manufacturing the composite substrate of Embodiment 1. [Figure 5] FIG. 5 is a schematic view showing a batch-type heat treatment apparatus used in the heat treatment step of Embodiment 1. [Figure 6] FIG. 6 is a schematic view showing a heat treatment process in the heat treatment step of Embodiment 1. [Figure 7] FIG. 7 is a schematic view showing a rapid heating and cooling heat treatment apparatus used in the heat treatment of Embodiment 1. [Figure 8] FIG. 8 is a flowchart showing a method for manufacturing the composite substrate of Embodiment 2.

Embodiments for Carrying Out the Invention

[0021] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the embodiments described below. In each drawing, the same or corresponding elements are appropriately denoted by the same reference numerals. Furthermore, it should be noted that the drawings are schematic, and the dimensional relationships and ratios of each element may differ from those of reality. Even between drawings, there may be parts where the dimensional relationships and ratios differ from each other.

[0022] (Embodiment 1) Figure 1 is a schematic cross-sectional view showing an example of a composite substrate according to Embodiment 1 of the present invention. As shown in Figure 1, the composite substrate 5 is manufactured by bonding a piezoelectric substrate 1 and a silicon substrate 2, which is a support substrate having a smaller coefficient of thermal expansion, via an insulating bonding layer 3. With this configuration, when stress is generated in the piezoelectric substrate 1 and the silicon substrate 2 in response to temperature changes, the thermal expansion of the piezoelectric substrate 1 can be suppressed, thereby improving the frequency-temperature characteristics compared to a piezoelectric substrate alone.

[0023] The composite substrate 5 can be manufactured, for example, by forming an oxide film on one or both of the piezoelectric substrate 1 and the silicon substrate 2, bonding them together, and applying a load to create a bond. The bonding layer 3 may include one or more layers from among a silicon oxide layer, a silicon nitride layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive layer, a titanium layer, and a titanium oxide layer, and may also be a multilayer structure. The thickness of the bonding layer 3 is preferably 0.05 μm to 50 μm. If it is thinner than 0.05 μm, the effect of reducing the warping of the composite substrate is small, and if it is thicker than 50 μm, cracks may occur in the piezoelectric substrate 1, which is undesirable. In addition, the adhesive strength may be enhanced by hydrophilizing the surface with an ammonia / hydrogen peroxide aqueous solution or by plasma activation treatment. The size of the substrate is not particularly limited; for example, substrates with diameters of 125 mm, 150 mm, or 200 mm may be used, or they may be larger or smaller.

[0024] Here, we will explain the tilt angle (off-angle) of the silicon substrate 2 in this embodiment. Figure 2 is a diagram illustrating the tilt angle of the silicon substrate. For example, saying that the tilt angle of the main surface of the silicon substrate with respect to the {110} plane is 1.0° or less means that the tilt angle of the silicon substrate is described by expressing the crystal planes and crystal orientations of the unit cell of the silicon single crystal using Miller indices, and that the angle α between the normal to the {110} plane and the normal to the main surface of the silicon substrate is 1.0° or less. Here, we have explained using a silicon substrate with its main surface tilted with respect to the {110} plane, but the silicon substrate 2 in this embodiment may also be a silicon substrate with a tilt angle (off-angle) with respect to the {100} or {111} plane.

[0025] In this embodiment, the main surface of the silicon substrate 2 has an inclination angle of 0.2° to 1.0° with respect to the {110} plane. By setting the inclination angle to 0.2° to 1.0° with respect to the {110} plane in this way, as shown in Figure 3, a step-terrace structure can be formed on the surface of the silicon substrate while maintaining an optimal terrace width. That is, by setting the main surface of the silicon substrate to an inclination angle of 0.2° to 1.0° with respect to the {110} plane, the terrace width can be set to an optimal range, thereby increasing the bonding strength with the piezoelectric substrate. Furthermore, when using a silicon oxide film formed by dry oxidation or wet oxidation as the bonding layer, it is desirable because the oxide film is formed while maintaining the optimal terrace width. Note that the silicon substrate in this embodiment may also have an inclination angle of 0.2° to 1.0° with respect to the {100} or {111} plane.

[0026] In this embodiment, the piezoelectric substrate 1 has a thickness of 0.5 to 150 μm. Although it varies depending on the application, the thickness of the piezoelectric substrate 1 is preferably 30 to 120 μm, and more preferably 50 to 100 μm. Furthermore, if it is a composite substrate 5 used in high-frequency acoustic wave devices, the thickness of the piezoelectric substrate 1 is preferably 0.5 to 10 μm, and more preferably 0.5 to 3.0 μm. To make the thickness of the piezoelectric substrate 1 the desired value above, for example, the piezoelectric substrate 1 can be ground and polished after the composite substrate is formed. Note that if the thickness of the piezoelectric substrate 1 is thinner than 0.5 μm, cracks may occur due to processing distortion caused by polishing, which is undesirable. Also, if it is thicker than 150 μm, the piezoelectric substrate may crack when the composite substrate 5 is heat-treated during device formation, which is undesirable. Furthermore, the piezoelectric substrate 1 may be thinned using a so-called ion implantation separation method. Ion implantation separation is a method in which light element ions such as hydrogen and helium are implanted at a predetermined depth in an active layer wafer to form an ion-implanted layer, the active layer wafer is then bonded to a support substrate wafer, and subsequently the active layer wafer is peeled off at the ion-implanted layer to reduce its thickness.

[0027] The piezoelectric substrate 1 can be any piezoelectric crystalline material, but lithium tantalate or lithium niobate is preferable because its large electromechanical coupling coefficient allows for the manufacture of elastic wave elements with a wide bandwidth and low insertion loss as frequency-selective filters. The substrate orientation can be appropriately selected depending on the type of piezoelectric crystalline material and the application of the elastic wave element, such as 36° rotated Y-cut, 41° rotated Y-cut, or 45° rotated Y-cut.

[0028] The support substrate is a silicon substrate 2 that is heated at a predetermined heating rate, heat-treated at a maximum temperature of 1100°C to 1400°C for a predetermined time, and then cooled at a predetermined cooling rate to form oxygen precipitation nuclei and oxygen precipitates 4. In this specification, elements smaller than 1 nm in size are referred to as oxygen precipitation nuclei, and elements larger than 1 nm in size are referred to as oxygen precipitates.

[0029] The thickness of the silicon substrate 2 is preferably 50 to 500 μm. The silicon substrate 2 has a smaller coefficient of thermal expansion than the piezoelectric substrate 1 and is also suitable for mass production. Furthermore, the resistivity of the silicon substrate 2 is preferably high, preferably 1000 Ω·cm or higher, and even more preferably 4000 Ω·cm or higher. In this embodiment, the silicon substrate is preferably manufactured using the Czochralski method (hereinafter also referred to as the "CZ method") to form oxygen precipitation nuclei and oxygen precipitates 4, and is preferably a silicon substrate sliced ​​from a so-called vacancy-rich (V-rich: vacancy-dominant) silicon single crystal. The interstitial oxygen concentration of the silicon substrate 2 before heat treatment is preferably 2.0E17 to 1.3E18 atoms / cm³. 3 This is preferable, with a concentration of 5.0°E17 to 9.0°E17 atoms / cm². 3 It would be even more desirable if that were the case.

[0030] Furthermore, a polysilicon layer may be formed on the silicon substrate 2 as a charge trap layer. In this embodiment, a silicon substrate on which a polysilicon layer is formed will also be simply referred to as a "silicon substrate" and will be included in the category of silicon substrates.

[0031] In this embodiment, the silicon substrate 2 has oxygen precipitates 4 with a size of 20 nm or less, at a concentration of 1.0E2 particles / cm². 3 The above findings are present in bulk layer 7. The size and density of these oxygen precipitates were measured using transmission electron microscopy (TEM).

[0032] In this embodiment, the silicon substrate 2 is configured such that the DZ layer 6 is located on the side that is bonded to the bonding layer 3 (the piezoelectric substrate side), and the bulk layer on the side that is not bonded to the bonding layer 3 (the side opposite to the piezoelectric substrate side) has oxygen precipitation nuclei and oxygen precipitates 4 formed on it. This configuration enhances the bonding strength between the piezoelectric substrate 1 and the silicon substrate 2, while also suppressing the extension of slippage by the oxygen precipitates 4 even if slippage occurs in the silicon substrate 2 during the device formation heat treatment.

[0033] Note that the DZ layer 6 may be positioned on the side that does not join with the joining layer 3 (the side opposite to the piezoelectric substrate side), and the bulk layer 7 with oxygen precipitation nuclei and oxygen precipitates 4 formed on the side that joins with the joining layer 3 (the piezoelectric substrate side) may be positioned. By adopting such a configuration, even when a slip occurs near the joining surface of the silicon substrate 2, it is possible to suppress the slip from extending to the joining surface. In particular, when the slip extends to the joining surface, cracks and peeling of the joining surface will occur, which is not preferable. Therefore, by adopting the above configuration, it is possible to particularly suppress the extension of the slip near the joining surface.

[0034] FIG. 4 is a flowchart showing the manufacturing method of the composite substrate of Embodiment 1. As shown in FIG. 4, the manufacturing method of the composite substrate of Embodiment 1 includes a step of preparing a silicon substrate (S1), a heat treatment step (S2), a joining layer forming step (S3), a step of preparing a piezoelectric substrate (S4), a bonding step (S5), and a thinning step (S6).

[0035] In the step of preparing the silicon substrate 2 (S1), the silicon substrate 2 used as the support substrate of the composite substrate 5 is prepared. The thickness of the silicon substrate 2 is preferably 50 to 500 μm. The silicon substrate 2 can be sliced from a silicon single crystal manufactured by a well-known FZ method or CZ method, but it is desirable that the silicon substrate is sliced from a silicon single crystal manufactured by using the CZ method. Also, in the crystal pulling process, pulling is performed so that the main surface of the silicon single crystal has an inclination angle of 0.2° or more and 1.0° or less with respect to the {110} plane. Note that the silicon single crystal ingot with the pulled {110} as the main surface may be made to have an inclination angle of 0.2° or more and 1.0° or less with respect to the {110} plane by outer peripheral grinding. Further, the inter-lattice oxygen concentration of the silicon substrate 2 before heat treatment is preferably 2.0E17 to 1.3E18 atoms / cm 3 is desirable, and more preferably 5.0E17 to 9.0E17 atoms / cm 3 is even more desirable.

[0036] In the heat treatment step (S2), the silicon substrate 2 is subjected to a heat treatment in which the temperature is raised at a predetermined rate, the maximum temperature reached is between 1100°C and 1400°C and held for a predetermined time, and the temperature is cooled at a predetermined rate. Here, it is preferable to perform a batch heat treatment in which the predetermined rate of raising the temperature is 1 to 20°C / min, the predetermined rate of cooling is 1 to 20°C / min, and the maximum temperature reached is between 1100°C and 1250°C and held for 0.5 to 20 hours. Through this heat treatment step (S2), oxygen precipitation nuclei and oxygen precipitates are formed on the silicon substrate 2.

[0037] In the bonding layer formation step (S3), a bonding layer 3 is formed on the surface of the silicon substrate 2. The bonding layer 3 includes one or more layers from among a silicon oxide layer, a silicon nitride layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive layer, a titanium layer, and a titanium oxide layer, and may also be a multilayer structure including multiple layers. The thickness of the bonding layer is preferably 0.05 μm to 50 μm.

[0038] In the step of preparing the piezoelectric substrate 1 (S4), the piezoelectric substrate 1 to be used in the composite substrate 5 is prepared. As mentioned above, the piezoelectric substrate 1 can be any material made of piezoelectric crystalline material. The thickness of the piezoelectric substrate is preferably 30 to 120 μm, and more preferably 50 to 100 μm. Furthermore, if it is a composite substrate used in a high-frequency elastic wave device, the thickness of the piezoelectric substrate 1 is preferably 0.5 to 10 μm, and more preferably 0.5 to 3.0 μm. The piezoelectric substrate 1 can be prepared after being appropriately processed according to the application of the composite substrate.

[0039] In the bonding process (S5), the piezoelectric substrate 1 and the silicon substrate 2 are bonded together via the bonding layer 3 by applying a load. Heat may be applied during bonding. Alternatively, plasma treatment may be performed before bonding. Subsequently, in the thinning process (S6), both sides of the composite substrate 5 are polished to obtain the desired thickness of the piezoelectric substrate 1 and the silicon substrate 2. After double-sided polishing, single-sided polishing may be performed to obtain the desired thickness of the piezoelectric substrate 1 and the silicon substrate 2.

[0040] Figure 5 is a schematic diagram showing a batch-type heat treatment apparatus used in the heat treatment process of Embodiment 1. As shown in Figure 5, the batch-type heat treatment apparatus 10 has a heat treatment board 11, and multiple silicon substrates are housed in the batch-type heat treatment apparatus 10 with multiple silicon substrates stored on the heat treatment board 11. The batch-type heat treatment apparatus 10 is provided with a heat treatment gas inlet 12, and the heat treatment gas is introduced into the reaction chamber of the batch-type heat treatment apparatus 10 to heat-treat the silicon substrates 2.

[0041] Figure 6 is a schematic diagram showing the heat treatment process in the heat treatment step of Embodiment 1. The heat treatment step of Embodiment 1 is a batch heat treatment under an Ar atmosphere. The heat treatment atmosphere may be a non-oxidizing atmosphere such as Ar or nitrogen, or an oxygen atmosphere.

[0042] In the heat treatment process of Embodiment 1, a silicon substrate 2 sliced ​​from a void-rich silicon single crystal ingot grown by the CZ method is subjected to a heat treatment as shown in Figure 4, in which the temperature is raised from T2 to T1 at a predetermined heating rate, held at the highest temperature T1 from t1 to t2 for a time t3, and then cooled from T1 to T2 at a predetermined heating rate.

[0043] In the case of batch heat treatment, as in Embodiment 1, the heating rate is preferably 1 to 20°C / min, and more preferably 5 to 15°C / min. Similarly, the cooling rate is preferably 1 to 20°C / min, and more preferably 5 to 15°C / min. The maximum temperature T1 is preferably between 1100°C and 1250°C, and more preferably between 1150°C and 1250°C. Furthermore, the holding time t3 at the maximum temperature is preferably 0.5 to 20 hours. However, from the viewpoint of productivity, it is even more desirable to hold it for 0.5 to 10 hours.

[0044] As a result of the batch heat treatment described above, a DZ layer 6 and a bulk layer 7 are formed on the silicon substrate 2, and the bulk layer contains oxygen precipitates of 20 nm or less in size at a rate of 1.0E4 to 1.0E11 particles / cm². 3Furthermore, by using a non-oxidizing Ar atmosphere, oxygen precipitation nuclei 4 are formed in the bulk layer 7, while the interstitial oxygen concentration of the DZ layer 6 is significantly reduced compared to the bulk layer 7, reaching 4.0E14~6.0E17 atoms / cm². 3 This can be achieved. Therefore, with the composite substrate 5 using the silicon substrate 2 of this embodiment, it is possible to suppress the extension of slip while suppressing the decrease in resistivity due to thermal donors.

[0045] The heat treatment process may also be a rapid temperature rise and fall process. In addition to O2 gas, argon gas, nitrogen gas, or a mixture of O2 gas and argon gas with a partial pressure of 1 to less than 100% may be used as the atmospheric gas. The following describes the case where the heat treatment process is a rapid temperature rise and fall process (RTO) using O2 gas.

[0046] Figure 7 is a schematic diagram showing a rapid heating and cooling heat treatment apparatus used for the heat treatment in Embodiment 1. As shown in Figure 7, the rapid heating and cooling heat treatment apparatus 20 includes a chamber (reaction tube) 21 equipped with an atmosphere gas inlet 20a and an atmosphere gas outlet 20b, a plurality of lamps 30 spaced apart at the top of the chamber 21, and a substrate support section 40 that supports the silicon substrate 2 in the reaction space 25 inside the chamber 21. Although not shown, it also includes a rotating means for rotating the silicon substrate 2 around its central axis at a predetermined speed.

[0047] The substrate support section 40 includes a ring 22 that supports the outer periphery of the silicon substrate 2 and a stage 40a that supports the ring 22. The chamber 21 is made of, for example, quartz. The lamp 30 is made of, for example, a halogen lamp. The stage 40a is made of, for example, quartz. This rapid heating and cooling heat treatment apparatus 20 can uniformly heat and treat the entire silicon substrate 2 with a heating and cooling temperature gradient of 10 to 300°C / second.

[0048] Here, the heat treatment process in the heat treatment step will be explained with reference to Figure 6.

[0049] In this heat treatment process, the silicon substrate 2 is placed in a chamber maintained at a desired temperature T2 (for example, 500°C). Then, O2 gas is introduced into the chamber 21 as the atmospheric gas from the atmospheric gas inlet 20a.

[0050] Next, the silicon substrate 2 is heated by the lamp 30 and rapidly heated at a predetermined heating rate until it reaches a maximum temperature T1 between 1100°C and 1400°C. At this point, the silicon substrate 2 is controlled to be held at the maximum temperature T1 for a predetermined time (t3). After holding the silicon substrate 2 at the maximum temperature T1 for the predetermined time, it is cooled down to T2 at a predetermined cooling rate, and the RTO is terminated.

[0051] In this embodiment, O2 gas was used as an example of the atmospheric gas, but argon gas, nitrogen gas, or a gas mixed with argon gas with a partial pressure of 1 to less than 100% may also be used.

[0052] Furthermore, while the maximum temperature T1 of this embodiment may be between 1100°C and 1400°C, it is preferable that it be above 1300°C, and more preferably between 1300°C and 1350°C. The holding time is preferably between 1 and 60 seconds, and more preferably between 5 and 30 seconds. The heating rate is preferably between 5 and 150°C / min, and more preferably between 10 and 80°C / min. Similarly, the cooling rate is preferably between 5 and 150°C / min, and more preferably between 10 and 80°C / min.

[0053] This heat treatment process forms a silicon oxide film on the silicon substrate, and also creates oxygen precipitates with a size of 20 nm or less at a rate of 1.0E2 to 1.0E4 particles / cm² in the bulk layer. 3A layer is formed. At the same time, numerous oxygen precipitation nuclei are also formed. Compared to batch annealing, fewer oxygen precipitates are formed, which is due to the very fast heating and cooling rates and the short holding time at the highest temperature. These oxygen precipitates grow even at the relatively low-temperature heat treatment during device formation and suppress the extension of slips even if slips occur in the silicon substrate. In addition, by using the silicon oxide film formed in an oxygen atmosphere as the bonding layer, the heat treatment process and the bonding layer formation process can be performed simultaneously, and the bonding strength can be improved.

[0054] Furthermore, a two-stage heat treatment process may be used as part of the heat treatment steps. While RTP can be performed after RTP, or batch annealing can be performed after batch annealing, it is desirable to include at least one batch annealing step. This is because including at least one batch annealing step results in larger and denser oxygen precipitates. A two-stage heat treatment, particularly RTP followed by batch annealing, is even more desirable because it allows the oxygen nuclei formed during RTP to grow into oxygen precipitates during the subsequent batch annealing.

[0055] (Embodiment 2) Embodiment 2 is characterized by using a silicon substrate 2 that has been sliced ​​in a slicing process with an inclination angle of 0.2° to 1.0° with respect to the {100}, {110}, or {111} plane, without heat treatment to form oxygen deposition nuclei or oxygen precipitates as in Embodiment 1. Furthermore, the piezoelectric substrate 1 is thinned by ion implantation in an implantation process and peeling from the ion implantation surface. Everything else is substantially the same as Embodiment 1, so those descriptions are omitted.

[0056] Figure 8 is a flowchart showing the manufacturing method of the composite substrate according to this embodiment. As shown in Figure 8, the manufacturing method of the composite substrate according to this embodiment includes a step of preparing the silicon substrate 2 (S7), a slicing step (S8), a double-sided polishing step (S9), a bonding layer formation step (S10), a step of preparing the piezoelectric substrate (S11), an implantation step (S12), a bonding step (S13), and a thinning step (S14).

[0057] The steps of preparing the silicon substrate 2 (S7), forming the bonding layer (S10), and preparing the piezoelectric substrate 1 (S11) are the same as in Embodiment 1, so their explanation will be omitted.

[0058] In the slicing step (S8) of this embodiment, a silicon substrate 2 with the {110} plane as the main surface is prepared, and then slicing is performed, for example, with a wire saw, such that the inclination angle with respect to the {110} plane is 0.2° or more and 1.0° or less. In the double-sided polishing step (S9), the silicon substrate 2 is polished to a preferred thickness for use as a support substrate for the composite substrate 5. For example, the thickness of the silicon substrate 2 is preferably 50 to 500 μm.

[0059] In the implantation process (S12), ions are implanted into the piezoelectric substrate 1 to pre-form an embrittlement layer at a predetermined depth on the piezoelectric substrate 1. In the thinning process (S14), which will be described later, the piezoelectric substrate 1 is thinned after being bonded using this embrittlement layer.

[0060] In the bonding process (S13), the piezoelectric substrate 1 and the silicon substrate 2 are bonded together by applying a load via a bonding layer 3. In the thinning process (S14), the piezoelectric substrate 1 is thinned by peeling off the brittle layer that was previously formed to a predetermined depth in the implantation process (S10) in order to achieve the desired thickness of the piezoelectric substrate 1 and the silicon substrate 2.

[0061] By adopting this configuration, a step-terrace structure is formed on the bonding surface of the silicon substrate 2, and the silicon substrate 2 and the piezoelectric substrate 1 are bonded together after the terrace width is set to an appropriate length, thereby increasing the strength of the bonding surface.

[0062] (Examples) Here, we will describe the verification experiment to demonstrate the effectiveness of the present invention. In this verification experiment, a 36° rotated Y-cut lithium tantalate substrate was used as the piezoelectric substrate 1. A silicon substrate 2 manufactured by the CZ method, with a thickness of 765 μm and a resistivity of approximately 1500 Ω·cm, was used as the bonding layer 3, and an SiO2 film obtained by thermal oxidation of the silicon substrate 2 was used. Both the piezoelectric substrate 1 and the silicon substrate 2 were 150 mm in diameter. Furthermore, the conditions such as the main surface, inclination angle, and heat treatment of the silicon substrate 2 in each example were as shown in Table 1 below, and the composite substrate 5 in each example was manufactured according to the manufacturing flow shown in Figure 4. (Comparative example) As a comparative example, a composite substrate 5 is used, which is formed by bonding a silicon substrate 2 and a piezoelectric substrate 1, similar to those in the above embodiment, via a bonding layer 3. However, the composite substrate 5 used is constructed with a different inclination angle than in the embodiment. The manufacturing method, main surface, and heat treatment conditions for the silicon substrate 2 of each comparative example are as shown in Table 1 below.

[0063] In this verification experiment, bonding strength tests were performed using composite substrates 5 for each example and comparative example shown in Table 1. For the bonding strength test, the composite substrate 5 was heated to 300°C, held at 300°C for 60 seconds, and then cooled to 30°C. This heat treatment was repeated seven times, and the presence or absence of delamination or slippage at the bonding surface was observed (five composite substrates 5 were used for the bonding strength test in each example and comparative example). The evaluation criteria are as follows. Furthermore, batch annealing in this verification experiment was performed under three conditions: oxygen partial pressure of 1%, 5%, and 100% in an oxygen atmosphere, and under four conditions: an Ar atmosphere. It was confirmed that the same results could be obtained regardless of the oxygen partial pressure. The heating rate and cooling rate were both 3°C / min. <Joint Strength Evaluation> ○: No peeling or slipping. △: Peeling or slipping may occur in rare cases. ×: Peeling or slipping may occur.

[0064] [Table 1]

[0065] As described above, when a composite substrate 5 is created using a silicon substrate 2 whose main surface has an inclination angle of 0.2° to 1.0° with respect to the {110} surface (Examples 1 to 10), it was confirmed that the bonding strength was increased and that slipping and peeling did not occur. Similarly, when these composite substrates 5 were subjected to heat treatments such as RTO or batch annealing (Examples 5 to 10), it was confirmed that the bonding strength was increased and that slipping and peeling did not occur. Furthermore, similar results were confirmed in bonding strength tests using silicon substrates 2 whose main surface has an inclination angle of 0.2° to 1.0° with respect to the {100} and {111} surfaces. In other words, it was confirmed that the same results as with the {110} surface were obtained even when the main surface was the {100} or {111} surface.

[0066] On the other hand, when a composite substrate 5 was created using a silicon substrate 2 in which the main surface had an inclination angle of less than 0.2° or 1.1° or more relative to the {110} plane (Comparative Examples 1-7), it was confirmed that the bonding strength was insufficient and slippage and delamination occurred. Furthermore, when batch annealing was performed on a silicon substrate 2 in which the main surface had an inclination angle of less than 0.2° or 1.1° or more relative to the {110} plane (Comparative Examples 5 and 6), although the bonding strength increased and delamination and slippage were somewhat suppressed, it was confirmed that delamination and slippage were not completely prevented and still occurred occasionally.

[0067] Although the present invention has been described above based on embodiments, the present invention is not limited to the above embodiments. For example, the composite substrates of Embodiments 1 and 2 of the present invention can be suitably applied to acoustic wave devices such as surface acoustic wave devices, Lamb wave elements, and thin-film resonators, or to optical devices such as optical switching elements and wavelength conversion elements. [Explanation of symbols]

[0068] 1. Piezoelectric substrate 2. Silicon substrate 2a Polysilicon layer 3 Bonding layer 3a Organic adhesive layer 3b Silicon oxide layer 4. Oxygen precipitation nuclei and oxygen precipitates 10 Batch-type heat treatment equipment 11 Heat treatment boards 12. Inlet for heat treatment gas 20 Rapid heating and cooling heat treatment apparatus 20a Atmospheric gas inlet 20b Atmospheric gas outlet 21 Chambers 22 rings 25 Reaction space 30 lamps 40 Substrate support section 40a Stage

Claims

1. The process of preparing a piezoelectric substrate, The process of preparing the silicon substrate, A step of preparing a silicon substrate in which the main surface has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} surface, A bonding step of bonding the silicon substrate and the piezoelectric substrate, A thinning step for thinning the piezoelectric substrate, A method for manufacturing a composite substrate, characterized by having the following features.

2. The method for manufacturing a composite substrate according to claim 1, further comprising a bonding layer formation step of forming a bonding layer on the surface of the silicon substrate before the bonding step.

3. The method for manufacturing a composite substrate according to claim 2, characterized in that the bonding layer includes one or more layers selected from a silicon oxide film layer, a silicon nitride film layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive film layer, a titanium layer, and a titanium oxide film layer.

4. A method for manufacturing a composite substrate according to claim 1, further comprising: a pulling step of pulling up a silicon single crystal having a {100}, {110}, or {111} plane as its main plane; and a slicing step of slicing the silicon single crystal so that it has a predetermined inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane to obtain the silicon substrate.

5. A method for manufacturing a composite substrate according to claim 1, further comprising: a pulling step of pulling up a silicon single crystal by tilting the main surface such that the inclination angle with respect to the {100}, {110}, or {111} plane is 0.2° or more and 1.0° or less.

6. The back surface of the silicon substrate is supported by a susceptor. The method for manufacturing a composite substrate according to claim 1, further comprising a heat treatment step of heating the silicon substrate at a predetermined heating rate, holding it at a maximum temperature of 1100°C or higher and 1400°C or lower for a predetermined time, and then cooling it at a predetermined cooling rate.

7. The method for manufacturing a composite substrate according to claim 6, characterized in that the heat treatment step is a rapid heating and cooling heat treatment performed in an oxygen atmosphere, the oxygen partial pressure is 1 to 100%, the maximum temperature reached is 1300°C or higher, and the predetermined period is 1 to 60 s.

8. The method for manufacturing a composite substrate according to claim 6, characterized in that the heat treatment step is a batch heat treatment in which the predetermined heating rate is 1 to 20°C / min, the predetermined cooling rate is 1 to 20°C / min, and the maximum temperature reached is 1100°C or higher and 1250°C or lower, and the temperature is held at that temperature for 0.5 to 20 hours.

9. It has a silicon substrate and a piezoelectric substrate, The silicon substrate and the piezoelectric substrate are joined directly or via a bonding layer. A composite substrate characterized in that the main surface of the silicon substrate has an inclination angle of 0.2° or more and 1.0° or less with respect to the {100}, {110}, or {111} plane.

10. The silicon substrate and the piezoelectric substrate are joined together via a bonding layer. The composite substrate according to claim 9, characterized in that the bonding layer includes one or more layers selected from a silicon oxide film layer, a silicon nitride film layer, an amorphous silicon layer, a polysilicon layer, an organic adhesive film layer, a titanium layer, and a titanium oxide film layer.

11. The silicon substrate is pore-rich, and the interstitial oxygen concentration of the bulk layer is 2.0E17 to 1.3E18 atoms / cm³. 3 The bulk layer contains oxygen precipitates with a size of 20 nm or less at a rate of 1.0E2 particles / cm². 3 The composite substrate according to claim 9, characterized by having the above features.

12. An elastic wave element comprising a composite substrate according to any one of claims 9 to 11, and an electrode provided on the piezoelectric substrate.

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