Indication device

Abstract

To improve yield. [Solution] The display device 11 comprises a first substrate 21 having a display area AA on which an image is displayed, a first insulating film 33 disposed on the first substrate 21, a first conductive part 27 made of a part of a first conductive film disposed on the first insulating film 33 and disposed in the display area AA, a second insulating film 34 disposed on the first conductive film, a heating wiring 40 made of a part of a second conductive film disposed on the second insulating film 34 and superimposed on at least a part of the first conductive part 27 in the display area AA, a third insulating film 35 disposed on the second conductive film, and a second conductive part 28 made of a part of a third conductive film disposed on the third insulating film 35 and superimposed on at least a part of the heating wiring 40 in the display area AA, wherein the second insulating film 34 and the third insulating film 35 have a greater film thickness than the first insulating film 33.

Description

[Technical Field]

[0001] The technology disclosed herein relates to a display device that improves yield. [Background technology]

[0002] Conventionally, a liquid crystal display device described in Patent Document 1 below is known as an example of a display device. The liquid crystal display device described in Patent Document 1 comprises a first substrate, a second substrate arranged opposite to the first substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate, and a heating electrode arranged on the side of the first substrate facing the liquid crystal layer. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] U.S. Patent Application Publication No. 2019 / 0353940 Specification [Overview of the Initiative] [Problems that the invention aims to solve]

[0004] In the liquid crystal display device described in Patent Document 1 above, the heating electrode is positioned to intersect with the data wiring located on the upper layer side. Mutual insulation is maintained between the heating electrode and the data wiring by interposing an interlayer insulating layer. However, the thickness of the interlayer insulating layer is equal to the thickness of the gate insulating layer located below the heating electrode, and also equal to the thickness of the base layer located below the gate insulating layer. Therefore, if a defect occurs in the interlayer insulating layer or if conductive foreign matter is mixed into the interlayer insulating layer, there is a risk of a short circuit between the heating electrode and the intersecting data wiring, which may result in a deterioration of the yield.

[0005] The technologies described herein were developed based on the circumstances described above and are intended to improve yield. [Means for solving the problem]

[0006] (1) A display device relating to the technology described herein comprises: a first substrate having a display area on which an image is displayed; a first insulating film disposed on the first substrate; a first conductive portion consisting of a part of a first conductive film disposed on the first insulating film and disposed in the display area; a second insulating film disposed on the first conductive film; a heating wiring consisting of a part of a second conductive film disposed on the second insulating film and superimposed on at least a part of the first conductive portion in the display area; a third insulating film disposed on the second conductive film; and a second conductive portion consisting of a part of a third conductive film disposed on the third insulating film and superimposed on at least a part of the heating wiring in the display area, wherein the second insulating film and the third insulating film have a greater thickness than the first insulating film.

[0007] (2) In addition to (1) above, the display device may also have the first conductive part as a source wiring for transmitting an image signal, and the heating wiring may extend parallel to the source wiring and be arranged superimposed on the source wiring via the second insulating film.

[0008] (3) In addition to (2) above, the display device comprises a fourth insulating film disposed on the third conductive film, a pixel electrode consisting of a part of the fourth conductive film disposed on the fourth insulating film and superimposed on a part of the second conductive part in the display area, a source electrode connected to the source wiring, a drain electrode consisting of a part of the first conductive film different from the source wiring and the source electrode, a semiconductor part consisting of a part of a semiconductor film disposed below the first insulating film and superimposed on the source electrode and the drain electrode, a first connection part consisting of a part of the second conductive film different from the heating wiring and superimposed on the drain electrode, and a part of the third conductive film different from the second conductive part and the first connection part and the pixel electrode The device comprises a second connecting portion arranged superimposed on both, the second conductive portion being a common electrode that generates an electric field between itself and the pixel electrode, the first insulating film being provided with a first contact hole positioned superimposed on both the source electrode and the semiconductor portion, a second contact hole positioned superimposed on both the drain electrode and the semiconductor portion, the second insulating film being provided with a third contact hole positioned superimposed on both the drain electrode and the first connecting portion, the third insulating film being provided with a fourth contact hole positioned superimposed on both the first and second connecting portions, and the fourth insulating film being provided with a fifth contact hole positioned superimposed on both the second connecting portion and the pixel electrode.

[0009] (4) In addition to (2) above, the display device comprises a fourth insulating film disposed on the third conductive film, a common electrode consisting of a part of the fourth conductive film disposed on the fourth insulating film and superimposed on the second conductive part in the display area, a source electrode connected to the source wiring, a drain electrode consisting of a part of the first conductive film different from the source wiring and the source electrode, a semiconductor part consisting of a part of a semiconductor film disposed below the first insulating film and superimposed on the source electrode and the drain electrode, and a part of the second conductive film different from the heating wiring and superimposed on the drain electrode The device comprises a first connecting portion arranged as such, the second conductive portion being a pixel electrode that generates an electric field between itself and the common electrode, the first insulating film being provided with a first contact hole positioned to overlap with both the source electrode and the semiconductor portion, and a second contact hole positioned to overlap with both the drain electrode and the semiconductor portion, the second insulating film being provided with a third contact hole positioned to overlap with both the drain electrode and the first connecting portion, and the third insulating film being provided with a sixth contact hole positioned to overlap with both the first connecting portion and the pixel electrode.

[0010] (5) In addition to any of (1) to (4) above, the display device also includes a power supply unit for supplying power to the heating wiring, the second insulating film and the third insulating film are both made of organic material, and the power supply unit has a power density of 1000 W / mm² for the power supplied to the heating wiring. 3 The following is also acceptable.

[0011] (6) In addition to any of (1) to (5) above, the display device also includes a power supply unit for supplying power to the heating wiring, the second insulating film and the third insulating film are both made of organic material, and the power supply unit has a power density of 100 W / mm² for the power supplied to the heating wiring. 3 The following is also acceptable.

[0012] (7) Further, in addition to any one of the above (1) to (6), the display device may be such that the first insulating film is made of an inorganic material, and the second insulating film and the third insulating film are made of an organic material.

[0013] (8) Further, in addition to any one of the above (1) to (7), the display device may include a second substrate disposed to face the first substrate with a gap therebetween, and a liquid crystal layer sandwiched between the first substrate and the second substrate.

Advantages of the Invention

[0014] According to the technology described in this specification, the yield can be improved.

Brief Description of the Drawings

[0015] [Figure 1] Plan view of a liquid crystal panel, a flexible substrate, a control substrate, etc. constituting the liquid crystal display device according to Embodiment 1 [Figure 2] Cross-sectional view of a liquid crystal panel, a flexible substrate, a control substrate, etc. constituting the liquid crystal display device according to Embodiment 1 [Figure 3] Circuit diagram showing the electrical configuration of the array substrate constituting the liquid crystal panel according to Embodiment 1 [Figure 4] Cross-sectional view showing the configuration near the TFT in the array substrate according to Embodiment 1 [Figure 5] Plan view showing the configuration related to the heater function provided in the array substrate according to Embodiment 1 [Figure 6] Cross-sectional view showing the configuration near the center in the Y-axis direction of the pixel electrode in the array substrate according to Embodiment 1 [Figure 7] Cross-sectional view showing the configuration near the TFT in the array substrate according to Embodiment 2 [Figure 8] Cross-sectional view showing the configuration near the center in the Y-axis direction of the pixel electrode in the array substrate according to Embodiment 2

Modes for Carrying Out the Invention

[0016] <Embodiment 1> Embodiment 1 will be described with reference to FIGS. 1 to 6. In this embodiment, a liquid crystal display device 10 used in an in-vehicle CMS (Camera Monitor System) will be exemplified. The in-vehicle CMS is a system that displays an image captured by a camera on a display (liquid crystal display device 10) as an alternative to a door mirror or a rearview mirror using a mirror surface in an automobile. Note that in some of the drawings, the X-axis, Y-axis, and Z-axis are shown, and the directions of the respective axes are drawn so as to be the directions shown in the respective drawings. Also, the upper side of FIGS. 2, 5, and 6 is defined as the front side, and the lower side of the same figure is defined as the back side.

[0017] As shown in FIG. 1, the liquid crystal display device 10 includes at least a liquid crystal panel (display device, display panel) 11 having a horizontally long rectangular shape and capable of displaying an image, and a backlight device (lighting device) which is an external light source that irradiates the liquid crystal panel 11 with light for display. The backlight device is disposed on the back side (rear side) of the liquid crystal panel 11, and has a light source (for example, an LED or the like) that emits white light (white light) and an optical member that converts the light from the light source into planar light by imparting an optical action to the light. The central side portion of the screen (main surface) of the liquid crystal panel 11 is a display area AA where an image is displayed. On the other hand, the frame-shaped (framed) outer peripheral side portion surrounding the display area AA on the screen of the liquid crystal panel 11 is a non-display area NAA where an image is not displayed.

[0018] As shown in FIG. 1, a circuit portion (peripheral circuit portion, gate circuit portion) 12 is provided in the non-display area NAA of the liquid crystal panel 11. A pair of circuit portions 12 are arranged so as to sandwich the display area AA from both sides in the X-axis direction. The circuit portion 12 is provided in a strip-shaped range extending along the Y-axis direction. The circuit portion 12 is for supplying a scanning signal to a gate wiring 26 described later, and is provided monolithically on an array substrate 21 described later. The circuit portion 12 is a GDM (Gate Driver Monolithic) circuit. The circuit portion 12 includes a shift register circuit that outputs a scanning signal at a predetermined timing, a buffer circuit for amplifying the scanning signal, and the like.

[0019] The liquid crystal panel 11 will be described in detail with reference to Figure 2 in addition to Figure 1. As shown in Figures 1 and 2, the liquid crystal panel 11 is formed by bonding a pair of substrates 20 and 21 together. Of the pair of substrates 20 and 21, the front side is the opposing substrate (second substrate) 20, and the back side is the array substrate (first substrate) 21. Both the opposing substrate 20 and the array substrate 21 are formed by laminating various films on the inner surface of glass substrates (substrate portion) 20GS and 21GS. A liquid crystal layer (medium layer) 22 containing liquid crystal molecules, which are substances whose optical properties change when an electric field is applied, is interposed between the pair of substrates 20 and 21. A sealing portion 23 is provided between the outer peripheral edges of the pair of substrates 20 and 21 to seal the liquid crystal layer 22. The sealing portion 23 is formed in a rectangular frame shape (endless ring) so as to surround the liquid crystal layer 22. Furthermore, polarizing plates 13 are attached to the outer surfaces of both substrates 20 and 21.

[0020] As shown in Figures 1 and 2, the opposing substrate 20 has a shorter short side dimension than the array substrate 21. The opposing substrate 20 is bonded to the array substrate 21 such that one end aligns with the array substrate 21 in the short side direction (Y-axis direction). Therefore, the array substrate 21 has a first end 21A on the other end in the short side direction that protrudes laterally from the opposing substrate 20. This first end 21A is one side of the frame-shaped non-display area NAA that extends along the X-axis direction, and a flexible substrate 14 for supplying various signals is mounted on it. The array substrate 21 also has a second end 21B on one end in the short side direction. This second end 21B is one side of the frame-shaped non-display area NAA that extends along the X-axis direction, and the display area AA is sandwiched between it and the first end 21A in the Y-axis direction.

[0021] The flexible substrate 14 is constructed by forming numerous wiring patterns on a substrate made of a synthetic resin material (e.g., polyimide resin) that has insulating and flexible properties. As shown in Figures 1 and 2, a driver 15 is mounted on the flexible substrate 14 using COF (Chip On Film). The driver 15 consists of an LSI chip having a drive circuit inside. The driver 15 processes various signals transmitted by the flexible substrate 14. The driver 15 supplies various signals (e.g., image signals) to the wiring of the display area AA (e.g., source wiring 27, which will be described later). One end of the flexible substrate 14 is connected to the first end 21A of the array substrate 21, and the other end is connected to the control substrate 16. The flexible substrate 14 is connected to the central part of the first end 21A in the X-axis direction. The control substrate 16 is constructed by mounting multiple circuit components on a rigid substrate made of synthetic resin (e.g., paper phenol or glass epoxy resin). The control board 16 includes several circuit components, such as a power supply IC (Integrated Circuit) (power supply section) 16A, which is a DC power supply for outputting power; a timing controller 16B, which generates various signals to be supplied to the driver 15; and a level shifter IC 16C, which controls (steps down and steps up) the voltage level. The control board 16 has a connector section to which the flexible board 14 and the like are connected. The control board 16 is positioned so as to overlap the back side of the backlight device by bending the flexible board 14 in a folded shape. A temperature sensor 17 is connected to the control board 16. The temperature sensor 17 is positioned close to or in contact with the liquid crystal panel 11, and is capable of detecting the temperature near the liquid crystal panel 11.

[0022] Next, the configuration of the display area AA on the array substrate 21 will be explained using Figure 3. As shown in Figure 3, at least TFTs (switching elements, transistors) 24 and pixel electrodes 25 are provided on the inner surface of the display area AA on the array substrate 21. The TFTs 24 and pixel electrodes 25, together with the color filter described later, constitute the display unit, the pixel PX. Multiple TFTs 24 and pixel electrodes 25 are arranged in a matrix (arrangement) with spacing along the X-axis and Y-axis directions. Around these TFTs 24 and pixel electrodes 25, gate wiring (scanning wiring) 26 and source wiring (first conductive part, image wiring, signal wiring) 27 are arranged orthogonally (intersecting) with each other. Multiple gate wirings 26 extend along the X-axis direction and are arranged with spacing along the Y-axis direction. Multiple source wirings 27 extend along the Y-axis direction (first direction) and are arranged with spacing along the X-axis direction (second direction intersecting the first direction). The TFT 24 includes a gate electrode 24A connected to the gate wiring 26, a source electrode 24B connected to the source wiring 27, a drain electrode 24C connected to the pixel electrode 25, and a semiconductor portion 24D connected to the source electrode 24B and the drain electrode 24C. The TFT 24 is driven based on a scanning signal supplied from the circuit portion 12 to the gate electrode 24A via the gate wiring 26. Then, the potential related to the image signal supplied from the driver 15 to the source electrode 24B via the source wiring 27 is supplied to the drain electrode 24C via the semiconductor portion 24D. As a result, the pixel electrode 25 is charged to the potential related to the image signal. The pixel electrode 25 is located in a region surrounded by the gate wiring 26 and the source wiring 27, and its planar shape is, for example, approximately rectangular.

[0023] Furthermore, the display area AA of the opposing substrate 20 is provided with multiple color filters at positions facing each pixel electrode 25 on the array substrate 21. The color filters consist of three colors, R (red), G (green), and B (blue), arranged repeatedly in a predetermined order, and together with the TFT 24 and the pixel electrodes 25, they constitute pixels PX of each color (red pixels, green pixels, and blue pixels). The three pixels PX of red, green, and blue pixels constitute a display pixel capable of displaying a predetermined gradation of color. In addition, a light-shielding portion (black matrix) is formed between each color filter to prevent color mixing. Moreover, the innermost surfaces of the opposing substrate 20 and the array substrate 21 are provided with alignment films to orient the liquid crystal molecules contained in the liquid crystal layer 22.

[0024] Here, the various films laminated on the inner surface of the array substrate 21 will be explained with reference to Figure 4. Figure 4 shows the cross-sectional configuration of the array substrate 21 near the TFT 24. As shown in Figure 4, the glass substrate (substrate) 21GS of the array substrate 21 has at least the following laminated films formed in order from the bottom layer side (glass substrate 21GS side): a first metal film, a base coat film 31, a semiconductor film, a gate insulating film 32, a second metal film, a first interlayer insulating film (first insulating film) 33, a third metal film (first conductive film), a first planarization film (second insulating film) 34, a fourth metal film (second conductive film), a second planarization film (third insulating film) 35, a first transparent electrode film (third conductive film), a second interlayer insulating film (fourth insulating film) 36, a second transparent electrode film (fourth conductive film), and an alignment film (not shown).

[0025] The first, second, third, and fourth metal films are all conductive by being single-layer films made of one type of metal material or multilayer films or alloys made of different types of metal materials. The first metal film constitutes the light-shielding portion 37, which will be described later. The second metal film constitutes the gate wiring 26, the gate electrode 24A of the TFT 24, etc. The third metal film constitutes the source wiring 27, the source electrode 24B of the TFT 24, the drain electrode 24C, etc. The fourth metal film constitutes the first intermediate electrode 38, etc., which will be described later. The fourth metal film may be a multilayer film, for example, and may include a layer made of Ti (titanium) or Mo (molybdenum) in the uppermost layer. The semiconductor film is made of a crystalline polysilicon semiconductor material (semiconductor material) created by known methods such as laser crystallization. The polysilicon semiconductor material of the semiconductor film has higher electron mobility compared to amorphous silicon semiconductor material or oxide semiconductor material. The semiconductor film constitutes the semiconductor portion 24D of the TFT 24, etc. The first transparent electrode film and the second transparent electrode film are made of a transparent electrode material (for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide)). The first transparent electrode film constitutes a common electrode (second conductive part) 28, etc. The second transparent electrode film constitutes a pixel electrode 25, etc.

[0026] The base coat film 31, gate insulating film 32, first interlayer insulating film 33, and second interlayer insulating film 36 are all types of inorganic materials (inorganic resin materials), such as SiO2 (silicon oxide, silicon oxide) and SiN xThe first planarization film 34 and the second planarization film 35 are made of organic materials such as (silicon nitride). The first planarization film 34 and the second planarization film 35 are made of organic materials such as PMMA (acrylic resin). The thickness of each of the first planarization film 34 and the second planarization film 35 is usually greater than the thickness of each of the base coat film 31, gate insulating film 32, first interlayer insulating film 33, and second interlayer insulating film 36. Specifically, the thickness of the base coat film 31, gate insulating film 32, first interlayer insulating film 33, and second interlayer insulating film 36, which are made of inorganic materials, is for example several tens to several hundred nanometers, while the thickness of the first planarization film 34 and the second planarization film 35, which are made of organic materials, is for example about 1 μm to 3 μm. The inner surface of the array substrate 21 (the surface on the liquid crystal layer 22 side) is planarized by these first planarization films 34 and the second planarization film 35. The base coat film 31 is interposed between the first metal film and the semiconductor film. The gate insulating film 32 is interposed between the semiconductor film and the second metal film. The first interlayer insulating film 33 is interposed between the second metal film and the third metal film. The first planarization film 34 is interposed between the third metal film and the fourth metal film. The second planarization film 35 is interposed between the fourth metal film and the first transparent electrode film. The second interlayer insulating film 36 is interposed between the first transparent electrode film and the second transparent electrode film.

[0027] The cross-sectional configuration of the TFT24 will now be described. As shown in Figure 4, the TFT24 according to this embodiment is a so-called top-gate type, in which a gate electrode 24A, which is part of the second metal film, is superimposed on the upper layer side of the semiconductor portion 24D, which is part of the semiconductor film, via a gate insulating film 32. The semiconductor portion 24D has low-resistance regions at both ends that do not overlap with the gate electrode 24A, while the central portion that overlaps with the gate electrode 24A is a non-low-resistance region that is not subjected to low-resistance treatment. The low-resistance region of the semiconductor portion 24D is created, for example, by applying a low-resistance treatment using the gate electrode 24A as a mask during the manufacturing process of the array substrate 21. The array substrate 21 is provided with a light-shielding portion 37 that overlaps with at least the non-low-resistance region of the semiconductor portion 24D. The light-shielding portion 37 is made up of part of the first metal film. Since the light-shielding portion 37 is positioned below the non-low-resistivity region of the semiconductor portion 24D, it can block light irradiated from the backlight device onto the non-low-resistivity region of the semiconductor portion 24D. This suppresses the variation in the characteristics of the TFT 24 that may occur when light is irradiated onto the non-low-resistivity region of the semiconductor portion 24D.

[0028] As shown in Figure 4, the source electrode 24B of the TFT 24 is made of a part of the third metal film and is superimposed on one low-resistance region (one end portion) of the semiconductor portion 24D via the gate insulating film 32 and the first interlayer insulating film 33. A source contact hole (first contact hole) CHS is provided in communication with the gate insulating film 32 and the first interlayer insulating film 33 at positions where they overlap with both the source electrode 24B and the semiconductor portion 24D. The source electrode 24B and the semiconductor portion 24D are connected to each other through the source contact hole CHS. The drain electrode 24C of the TFT 24 is made of a part of the third metal film and is superimposed on the other low-resistance region (the other end portion) of the semiconductor portion 24D via the gate insulating film 32 and the first interlayer insulating film 33. A drain contact hole (second contact hole) CHD is provided in communication with both the drain electrode 24C and the semiconductor portion 24D at positions where they overlap the gate insulating film 32 and the first interlayer insulating film 33. The drain electrode 24C and the semiconductor portion 24D are connected to each other through the drain contact hole CHD.

[0029] As shown in Figure 4, the TFT24 has a drain electrode 24C made of a part of the third metal film and a pixel electrode 25 made of a part of the second transparent electrode film, and a first intermediate electrode (first connection part) 38 and a second intermediate electrode (second connection part) 39 located between them. The first intermediate electrode 38 consists of a part of the fourth metal film (a part different from the touch wiring 30 and heating wiring 40). The first intermediate electrode 38 is arranged superimposed on a part of the drain electrode 24C (a part that does not overlap with the semiconductor part 24D) via the first planarization film 34 on the upper layer side. The second intermediate electrode 39 consists of a part of the first transparent electrode film (a part different from the common electrode 28). The second intermediate electrode 39 is arranged superimposed on a part of the first intermediate electrode 38 (a part that does not overlap with the drain electrode 24C) via the second planarization film 35 on the upper layer side. The second intermediate electrode 39 is arranged superimposed on a part of the pixel electrode 25 via the second interlayer insulating film 36 on the lower layer side. In the first planarization film 34 interposed between the drain electrode 24C and the first intermediate electrode 38, a first pixel contact hole (third contact hole) CHP1 is provided with an opening at a position that overlaps with both the drain electrode 24C and the first intermediate electrode 38. The drain electrode 24C and the first intermediate electrode 38 are connected to each other through the first pixel contact hole CHP1 of the first planarization film 34. In the second planarization film 35 interposed between the first intermediate electrode 38 and the second intermediate electrode 39, a second pixel contact hole (fourth contact hole) CHP2 is provided at a position that overlaps with both the first intermediate electrode 38 and the second intermediate electrode 39. The first intermediate electrode 38 and the second intermediate electrode 39 are connected to each other through the second pixel contact hole CHP2 of the second planarization film 35. In the second interlayer insulating film 36 interposed between the second intermediate electrode 39 and the pixel electrode 25, a third pixel contact hole (fifth contact hole) CHP3 is provided at a position that overlaps with both the second intermediate electrode 39 and the pixel electrode 25. The second intermediate electrode 39 and the pixel electrode 25 are connected to each other through the third pixel contact hole CHP3 of the second interlayer insulating film 36. Thus, the drain electrode 24C is connected to the pixel electrode 25 via the first intermediate electrode 38 and the second intermediate electrode 39.

[0030] Furthermore, the common electrode 28 provided in the display area AA of the array substrate 21 is arranged to overlap with all the pixel electrodes 25, as shown in Figure 4. The common electrode 28 extends over almost the entire display area AA. The common electrode 28, which is made up of a part of the first transparent electrode film, is positioned on the lower layer side (glass substrate 21GS side) of the pixel electrode 25, which is made up of a part of the second transparent electrode film, with a gap equal to the thickness of the second interlayer insulating film 36. A common potential signal, which is considered a common potential (reference potential), is supplied to the common electrode 28. A slit 25A is provided in the pixel electrode 25 located on the upper layer side of the common electrode 28. When the pixel electrode 25 is charged to a potential based on the image signal transmitted to the source wiring 27 as the TFT 24 is driven, a potential difference is generated between the pixel electrode 25 and the common electrode 28. As a result, a fringe electric field (oblique electric field) is generated between the opening edge of the slit 25A in the pixel electrode 25 and the common electrode 28, which includes a component along the main surface of the array substrate 21 as well as a component normal to the main surface of the array substrate 21. Therefore, by utilizing this fringe electric field, the orientation state of the liquid crystal molecules contained in the liquid crystal layer 22 can be controlled, and a predetermined display is made based on this orientation state of the liquid crystal molecules. In other words, the liquid crystal panel 11 according to this embodiment is set to FFS (Fringe Field Switching) mode.

[0031] Incidentally, since the liquid crystal display device 10 according to this embodiment is used in an in-vehicle CMS, there is a strong concern that the response speed of the liquid crystal panel 11 will decrease due to the viscosity of the liquid crystal layer 22 increasing in low-temperature environments. Therefore, the liquid crystal panel 11 according to this embodiment is equipped with a heater function to improve the response speed at low temperatures, and the configuration for performing the heater function is in-cell. The configuration related to the heater function will be explained with reference to Figure 5, etc.

[0032] As shown in Figure 5, the array substrate 21 is provided with a heating wiring 40, a first main wiring 41 and a second main wiring 42, a first heating terminal section 43 and a second heating terminal section 44, as a configuration for performing a heater function. The heating wiring 40 is located in the display area AA, extends along the Y-axis direction, and runs parallel to the source wiring 27. The heating wiring 40 traverses the display area AA longitudinally and extends in the array substrate 21 in the Y-axis direction from the first end 21A to the second end 21B. Multiple heating wirings 40 are arranged side by side with spacing in the X-axis direction.

[0033] As shown in Figure 5, both the first trunk wiring 41 and the second trunk wiring 42 are located in the non-display area NAA. More specifically, the first trunk wiring 41 is provided to extend across three sides (including the second end 21B) of the frame-shaped non-display area NAA, excluding the first end 21A, and surrounds the display area AA from three sides. The first trunk wiring 41 has a first trunk wiring component 41A located at the second end 21B of the non-display area NAA, and a pair of second trunk wiring components 41B located at the pair of sides at both ends of the non-display area NAA in the X-axis direction. The first trunk wiring component 41A extends along the X-axis direction and is adjacent along its entire length to the side on the second end 21B side (upper side in Figure 5) in the Y-axis direction of the rectangular display area AA. The first trunk wiring component 41A is connected to one end (upper side in Figure 5, second end 21B side) in the Y-axis direction of all heating wiring 40 located in the display area AA. The pair of second trunk wiring components 41B extend along the Y-axis direction and are adjacent to both sides of the rectangular display area AA that extend along the Y-axis direction, along their entire length. The end of the second trunk wiring component 41B on the side of the first end 21A is connected to the first heating terminal 43, which will be described later.

[0034] As shown in Figure 5, the second main wiring 42 is located at the first end 21A of the frame-shaped non-display area NAA. At the first end 21A, the second main wiring 42 extends along the X-axis direction, and multiple second main wirings 42 are arranged in a line with spacing in the X-axis direction. The multiple second main wirings 42 are arranged in a straight line. The second main wiring 42 is connected to the other end (lower side in Figure 5, first end 21A side) of the multiple heating wires 40 located in the display area AA, along the Y-axis direction.

[0035] As shown in Figure 5, the first heating terminal portion 43 and the second heating terminal portion 44 are both provided on the first end portion 21A of the array substrate 21. More specifically, the first heating terminal portion 43 and the second heating terminal portion 44 are positioned on the first end portion 21A in a location that overlaps with the flexible substrate 14, and are connected to a plurality of terminal portions provided on the flexible substrate 14 via an anisotropic conductive film (ACF).

[0036] As shown in Figure 5, two first heating terminals 43 are arranged at the first end 21A at positions spaced apart in the X-axis direction. The two first heating terminals 43 are connected to the ends of the two second trunk wiring components 41B provided on the first trunk wiring 41, on the opposite side in the Y-axis direction from the first trunk wiring component 41A side (the lower side in Figure 4, the first end 21A side). The two first heating terminals 43 are connected to the positive terminals of the power supply IC (DC power supply) 16A, which are connected to the positive terminals of the terminals provided on the flexible substrate 14. Multiple second heating terminals 44 are arranged at positions spaced apart in the X-axis direction on the first end 21A. The number of second heating terminals 44 is the same as the number of second trunk wirings 42. Multiple second heating terminals 44 are individually connected to multiple second trunk wirings 42. The second heating terminal section 44 is connected to the end of the second main wiring 42 in the X-axis direction on the array substrate 21. Each of the multiple second heating terminal sections 44 is connected to the negative terminal section of the flexible substrate 14 that is connected to the negative terminal of the power supply IC 16A.

[0037] As shown in Figure 1, the array substrate 21 of the liquid crystal panel 11, configured as described above, is supplied with various signals for displaying an image (including image signals) and power for performing a heater function from the control board 16 via the flexible substrate 14. Specifically, the circuit section 12 on the array substrate 21 is supplied with gate start pulse signals and clock signals, etc., from the control board 16 via the flexible substrate 14. The circuit section 12 sequentially outputs scanning signals to a plurality of gate wirings 26 based on the supplied gate start pulse signals and clock signals, etc. Image signals are supplied to a plurality of source wirings 27 on the array substrate 21 from the driver 15 via the flexible substrate 14. The TFT 24 is driven at the timing when scanning signals are supplied to the gate wirings 26, so that the pixel electrodes 25 can be charged to a potential based on the image signals supplied to the source wirings 27.

[0038] As shown in Figures 1 and 5, the positive terminal of the power supply IC 16A of the control board 16 is connected to the first heating terminal section 43 of the array substrate 21 via the flexible substrate 14, and the negative terminal of the power supply IC 16A of the control board 16 is connected to the second heating terminal section 44 via the flexible substrate 14. As a result, based on the potential difference between the first main wiring 41 connected to the first heating terminal section 43 and the second main wiring 42 connected to the second heating terminal section 44, current flows through the multiple heating wires 40 from the first main wiring 41 side to the second main wiring 42 side. As the multiple heating wires 40 are energized, heat is generated from each heating wire 40 according to its respective wiring resistance. The heat generated from the multiple heating wires 40 arranged in the display area AA is transferred to the liquid crystal layer 22, thereby heating the liquid crystal layer 22 in the display area AA. Therefore, even in low-temperature environments, the liquid crystal layer 22 is heated by the heat from the multiple heating wires 40, which allows for a favorable reduction in the viscosity of the liquid crystal layer 22 in the display area AA. This improves the response speed of the liquid crystal panel 11 and enhances the display quality of the image. The amount of current flowing from the power supply IC 16A to the multiple heating wires 40 is controlled based on the temperature detected by the temperature sensor 17.

[0039] The heating wiring 40, first main wiring 41, second main wiring 42, first heating terminal section 43, and second heating terminal section 44, which are components related to the heater function, are all made up of a part of the fourth metal film. The heating wiring 40, which is made up of a part of the fourth metal film, is arranged to overlap the source wiring 27, which is made up of a part of the third metal film, when viewed in a planar view, as shown in Figure 6. The heating wiring 40 is arranged to overlap the source wiring 27 while being parallel to it over its entire length, at least in the display area AA. This makes it possible to maintain a high aperture ratio for each pixel PX. The first planarization film 34 interposed between the heating wiring 40 and the source wiring 27 has a thicker film than other insulating films made of inorganic material (including the first interlayer insulating film 33). This increases the certainty that the heating wiring 40 and the source wiring 27 are kept in an insulated state. The heating wiring 40, which is made up of a part of the fourth metal film, is arranged to overlap the common electrode 28, which is made up of a part of the first transparent electrode film, when viewed in a planar view. The second planarization film 35 interposed between the heating wiring 40 and the common electrode 28 has a thicker film than other insulating films made of inorganic material (including the first interlayer insulating film 33). This increases the certainty that the heating wiring 40 and the common electrode 28 are kept in an insulated state. As a result, the situation in which the heating wiring 40 short-circuits with the source wiring 27 or the common electrode 28 is less likely to occur compared to conventional designs, thus improving yield.

[0040] Furthermore, as shown in Figures 4 and 6, the heating wiring 40 and the first intermediate electrode 38 are each made up of a portion of the fourth metal film. Therefore, in the manufacturing of the liquid crystal panel 11, the heating wiring 40 can be provided in the same step as the patterning of the fourth metal film to provide the first intermediate electrode 38. This makes it possible to reduce the number of processes required to manufacture the liquid crystal panel 11.

[0041] Furthermore, as shown in Figure 1, the power supply IC 16A that supplies power to the heating wiring 40 has a power density of 1000 W / mm² for the power supplied to the heating wiring 40. 3The following is the case. In this way, the amount of heat generated from the heating wiring 40 can be suppressed so as not to be excessive. As a result, the first planarization film 34 and the second planarization film 35, both made of organic material, are less likely to be altered due to excessive heating. More preferably, the power supply IC 16A sets the power density of the power supplied to the heating wiring 40 to 100 W / mm². 3 The following is stated. In this way, the amount of heat generated from the heating wiring 40 can be further suppressed to prevent it from becoming excessive. As a result, the first planarization film 34 and the second planarization film 35, both made of organic material, are less likely to be altered due to excessive heating.

[0042] As described above, the liquid crystal panel (display device) 11 of this embodiment comprises an array substrate (first substrate) 21 having a display area AA on which an image is displayed, a first interlayer insulating film (first insulating film) 33 disposed on the array substrate 21, a source wiring 27 which is a first conductive part disposed in the display area AA and is a part of a third metal film (first conductive film) disposed on the first interlayer insulating film 33, a first planarization film (second insulating film) 34 disposed on the third metal film, and a fourth metal film (second The device comprises a heating wire 40 made of a part of the conductive film (2) and superimposed on at least a part of the source wiring 27 which is the first conductive part in the display area AA, a second planarization film (third insulating film) 35 disposed on the fourth metal film, and a common electrode 28 which is the second conductive part made of a part of the first transparent electrode film (third conductive film) disposed on the second planarization film 35 and superimposed on at least a part of the heating wire 40 in the display area AA, wherein the first planarization film 34 and the second planarization film 35 have a greater thickness than the first interlayer insulating film 33.

[0043] As the heating wiring 40 is energized, it generates heat, which heats the display area AA on the array substrate 21. This improves the responsiveness of the liquid crystal panel 11 even when the ambient temperature is low. The heating wiring 40 is superimposed on at least a portion of the source wiring 27, which is the first conductive part, via the first planarization film 34, and on at least a portion of the common electrode 28, which is the second conductive part, via the second planarization film 35. The first planarization film 34 has a greater thickness than the first interlayer insulating film 33, which increases the certainty that the heating wiring 40 and the source wiring 27, which is the first conductive part, are kept in an insulated state. The second planarization film 35 has a greater thickness than the first interlayer insulating film 33, which increases the certainty that the heating wiring 40 and the common electrode 28, which is the second conductive part, are kept in an insulated state. As a result, the likelihood of the heating wiring 40 short-circuiting with the first conductive part, the source wiring 27, or the second conductive part, the common electrode 28, becomes less likely compared to conventional designs, thus improving yield.

[0044] Furthermore, the first conductive portion is a source wiring 27 that transmits image signals, and the heating wiring 40 extends parallel to the source wiring 27 and is arranged superimposed on the source wiring 27 via the first planarization film 34. Since the heating wiring 40 and the source wiring 27 are in a parallel and superimposed relationship with each other, the aperture ratio can be improved. A first planarization film 34, which has a greater thickness than the first interlayer insulating film 33, is interposed between the heating wiring 40 and the source wiring 27, so it is less likely that the heating wiring 40 and the source wiring 27, which are in a parallel and superimposed relationship with each other, will short-circuit.

[0045] Furthermore, the display includes a second interlayer insulating film (fourth insulating film) 36 arranged on the first transparent electrode film, a pixel electrode 25 which is made up of a part of the second transparent electrode film (fourth conductive film) arranged on the second interlayer insulating film 36 and is arranged superimposed on a part of the common electrode 28 which is the second conductive part in the display area AA, a source electrode 24B connected to the source wiring 27, a drain electrode 24C which is made up of a part of the third metal film different from the source wiring 27 and the source electrode 24B, and a semiconductor arranged below the first interlayer insulating film 33. The device comprises a semiconductor portion 24D made of a part of the body film and arranged superimposed on the source electrode 24B and the drain electrode 24C, a first intermediate electrode (first connection portion) 38 made of a portion of the fourth metal film different from the heating wiring 40 and arranged superimposed on the drain electrode 24C, and a second intermediate electrode (second connection portion) 39 made of a portion of the first transparent electrode film different from the common electrode 28 which is the second conductive portion and arranged superimposed on both the first intermediate electrode 38 and the pixel electrode 25, and the second conductive portion The common electrode 28 generates an electric field between itself and the pixel electrode 25. At least the first interlayer insulating film 33 is provided with a source contact hole (first contact hole) CHS positioned to overlap with both the source electrode 24B and the semiconductor portion 24D, and a drain contact hole (second contact hole) CHD positioned to overlap with both the drain electrode 24C and the semiconductor portion 24D. The first planarization film 34 is provided with a first pixel contact hole (third contact hole) CHP1 positioned to overlap with both the drain electrode 24C and the first intermediate electrode 38. The second planarization film 35 is provided with a second pixel contact hole (fourth contact hole) CHP2 positioned to overlap with both the first intermediate electrode 38 and the second intermediate electrode 39. The second interlayer insulating film 36 is provided with a third pixel contact hole (fifth contact hole) CHP3 positioned to overlap with both the second intermediate electrode 39 and the pixel electrode 25. When a channel region is created in the semiconductor section 24D, the image signal supplied from the source wiring 27 to the source electrode 24B is transmitted to the drain electrode 24C through the channel region. Since the pixel electrode 25 is connected to the drain electrode 24C via the first intermediate electrode 38 and the second intermediate electrode 39, the pixel electrode 25 is charged with the potential related to the image signal transmitted to the drain electrode 24C.An electric field based on the potential difference between the pixel electrode 25 and the common electrode 28 is generated. Since the heating wiring 40 and the first intermediate electrode 38 are each part of the fourth metal film, in the manufacture of the liquid crystal panel 11, the heating wiring 40 can be provided in the process of patterning the fourth metal film to provide the first intermediate electrode 38. Thereby, the manufacturing cost can be reduced.

[0046] Also, a power supply IC (power supply unit) 16A for supplying power to the heating wiring 40 is provided. The first planarization film 34 and the second planarization film 35 are both made of an organic material. The power supply IC 16A sets the power density related to the power supplied to the heating wiring 40 to 1000 W / mm 3 as follows. When power is supplied to the heating wiring 40 by the power supply IC 16A, the heating wiring 40 generates heat. When the power density related to the power supplied from the power supply IC 16A to the heating wiring 40 is 1000 W / mm 3 as follows, the amount of heat generated from the heating wiring 40 can be suppressed. Thereby, it is difficult for the first planarization film 34 and the second planarization film 35, both made of an organic material, to deteriorate due to excessive heating.

[0047] Also, a power supply IC 16A for supplying power to the heating wiring 40 is provided. The first planarization film 34 and the second planarization film 35 are both made of an organic material. The power supply IC 16A sets the power density related to the power supplied to the heating wiring 40 to 100 W / mm 3 as follows. When power is supplied to the heating wiring 40 by the power supply IC 16A, the heating wiring 40 generates heat. When the power density related to the power supplied from the power supply IC 16A to the heating wiring 40 is 100 W / mm 3 as follows, the amount of heat generated from the heating wiring 40 can be further suppressed. Thereby, it is even more difficult for the first planarization film 34 and the second planarization film 35, both made of an organic material, to deteriorate due to excessive heating.

[0048] Furthermore, the first interlayer insulating film 33 is made of an inorganic material, while the first planarization film 34 and the second planarization film 35 are made of organic materials. The film thickness of the first planarization film 34 and the second planarization film 35, which are made of organic materials, can be easily made greater than the film thickness of the first interlayer insulating film 33, which is made of inorganic materials.

[0049] The array substrate also includes a counter substrate (second substrate) 20 positioned opposite the array substrate 21 with a gap between them, and a liquid crystal layer 22 sandwiched between the array substrate 21 and the counter substrate 20. The liquid crystal layer 22 sandwiched between the array substrate 21 and the counter substrate 20 is heated by the heating wiring 40, thereby improving the response speed. By improving the response speed of the liquid crystal layer 22, the display quality can be improved.

[0050] <Embodiment 2> Embodiment 2 will be described with reference to Figure 7 or Figure 8. This Embodiment 2 shows a case where the positional relationship between the pixel electrode 125 and the common electrode 128 is reversed. Note that redundant explanations of the structure, operation, and effects, which are the same as those described in Embodiment 1, will be omitted.

[0051] In the array substrate 121 according to this embodiment, as shown in Figures 7 and 8, the pixel electrode (second conductive portion) 125 is made of a part of the first transparent electrode film, and the common electrode 128 is made of a part of the second transparent electrode film. The common electrode 128 has multiple slits 128A opening at positions that overlap with the pixel electrode 125. With this configuration, the TFT 124 has a first intermediate electrode 138 located between the drain electrode 124C, which is made of a part of the third metal film, and the pixel electrode 125, which is made of a part of the first transparent electrode film, but does not have the second intermediate electrode 39 (see Figure 4) described in Embodiment 1. The first intermediate electrode 138, which is made of a part of the fourth metal film, is connected to the drain electrode 124C, which is made of a part of the third metal film, through the first pixel contact hole CHP 101 provided in the first planarization film 134. A portion of the pixel electrode 125 is arranged superimposed on the upper layer of a portion of the first intermediate electrode 138 (the portion that does not overlap with the drain electrode 124C) via the second planarization film 135. The second planarization film 135 has a fourth pixel contact hole (sixth contact hole) CHP4 opening at a position that overlaps with both the first intermediate electrode 138 and the pixel electrode 125. The pixel electrode 125, which is made up of a portion of the first transparent electrode film, is connected to the first intermediate electrode 138, which is made up of a portion of the fourth metal film, through the fourth pixel contact hole CHP4 of the second planarization film 135.

[0052] As described above, according to this embodiment, a second interlayer insulating film 136 is disposed on the first transparent electrode film, a common electrode 128 is made of a part of the second transparent electrode film disposed on the second interlayer insulating film 136 and is arranged superimposed on the second conductive part in display area AA, a source electrode 124B is connected to the source wiring 127, a drain electrode 124C is made of a part of the third metal film different from the source wiring 127 and the source electrode 124B, a semiconductor part 124D is made of a part of the semiconductor film disposed below the first interlayer insulating film 133 and is arranged superimposed on the source electrode 124B and the drain electrode 124C respectively, and a first intermediate electrode 138 is made of a part of the fourth metal film different from the heating wiring 140 and is arranged superimposed on the drain electrode 124C. The second conductive portion is a pixel electrode 125 that generates an electric field between it and the common electrode 128. At least the first interlayer insulating film 133 is provided with a source contact hole CHS positioned to overlap with both the source electrode 124B and the semiconductor portion 124D, and a drain contact hole CHD positioned to overlap with both the drain electrode 124C and the semiconductor portion 124D. The first planarization film 134 is provided with a first pixel contact hole CHP101 positioned to overlap with both the drain electrode 124C and the first intermediate electrode 138. The second planarization film 135 is provided with a fourth pixel contact hole (sixth contact hole) CHP4 positioned to overlap with both the first intermediate electrode 138 and the pixel electrode 125. When a channel region is created in the semiconductor portion 124D, the image signal supplied from the source wiring 127 to the source electrode 124B is transmitted to the drain electrode 124C via the channel region. Since the pixel electrode 125 is connected to the drain electrode 124C via the first intermediate electrode 138, the pixel electrode 125 is charged to the potential related to the image signal transmitted to the drain electrode 124C. An electric field is generated between the pixel electrode 125 and the common electrode 128 based on the potential difference between them. Since the heating wiring 140 and the first intermediate electrode 138 each consist of a part of the fourth metal film, the heating wiring 140 can be provided in the process of patterning the fourth metal film to provide the first intermediate electrode 138 during the manufacturing of the liquid crystal panel 11. This makes it possible to reduce manufacturing costs.

[0053] <Other Embodiments> The technology disclosed herein is not limited to the embodiments described above in the description and drawings, but also includes, for example, the following embodiments.

[0054] (1) The heating wires 40 and 140 may extend along the X-axis. In that case, the heating wires 40 and 140 will intersect with the source wires 27 and 127 and overlap with a portion of the source wires 27 and 127.

[0055] (2) The first conductive part that overlaps with the heating wiring 40, 140 in at least part may be gate wiring 26 or capacitive wiring, in addition to source wiring 27, 127. Since gate wiring 26 and capacitive wiring intersect with the heating wiring 40, 140 and source wiring 27, 127, a part of the gate wiring 26 or capacitive wiring overlaps with a part of the heating wiring 40, 140.

[0056] (3) The power density of the power supplied from power supply IC 16A to heating wiring 40 and 140 is 1000 W / mm². 3 That's fine too.

[0057] (4) The negative terminal of the power supply IC 16A of the control board 16 may be connected to the first heating terminal 43 via the flexible substrate 14, and the positive terminal of the power supply IC 16A of the control board 16 may be connected to the second heating terminal 44 via the flexible substrate 14.

[0058] (5) TFT24,124 may also have a bottom gate structure, that is, a structure in which the gate electrode 24A is superimposed on the lower layer side of the semiconductor portion.

[0059] (6) The light-shielding portion 37 may be omitted. In that case, the first metal film may be removed, resulting in three layers of metal film.

[0060] (7) The driver 15 may be mounted on the first end 21A of the array substrates 21, 121 using COG (Chip On Glass). In this case, the touch terminals 45 and display terminals may be positioned to overlap with the driver 15 and connected to the terminals provided on the driver 15 via an anisotropic conductive film.

[0061] (8) The circuit section 12 can be omitted. In that case, a gate driver having the same function as the circuit section 12 may be attached to the array substrates 21 and 121. Alternatively, the circuit section 12 may be provided only on one side of the array substrates 21 and 121.

[0062] (9) The semiconductor film material constituting the semiconductor parts 24D and 124D may be amorphous silicon, oxide semiconductor material, or the like.

[0063] (10) The planar shape of the liquid crystal panel 11 may be a vertically elongated rectangle, square, circle, semicircle, oval, ellipse, trapezoid, etc.

[0064] (11) The display mode of the LCD panel 11 may be VA mode, IPS mode, etc., in addition to FFS mode.

[0065] (12) The liquid crystal panel 11 may be of a type other than transmissive, such as reflective or semi-transmissive. If the liquid crystal panel 11 is of a reflective type, the backlight device can be omitted.

[0066] (13) A display panel other than the LCD panel 11 (such as an organic EL display panel) may also be used. [Explanation of Symbols]

[0067] 11…Liquid crystal panel (display device), 16A…Power supply IC (power supply section), 20…Opposite substrate (second substrate), 21,121…Array substrate (first substrate), 22…Liquid crystal layer, 24B,124B…Source electrode, 24C,124C…Drain electrode, 24D,124D…Semiconductor section, 25…Pixel electrode, 27,127…Source wiring (first conductive section), 28…Common electrode (second conductive section), 33,133…First interlayer insulating film (first insulating film), 34,134…First planarization film (second insulating film), 35,135…Second planarization film (third insulating film), 36,136…Second interlayer insulating film (fourth insulating film), 38,138…First intermediate Electrode (first connection point), 39...Second intermediate electrode (second connection point), 40, 140...Heating wiring, 125...Pixel electrode (second conductive part), 128...Common electrode, AA...Display area, CHD...Drain contact hole (second contact hole), CHS...Source contact hole (first contact hole), CHP1, CHP101...First pixel contact hole (third contact hole), CHP2...Second pixel contact hole (fourth contact hole), CHP3...Third pixel contact hole (fifth contact hole), CHP4...Fourth pixel contact hole (sixth contact hole)

Claims

1. A first substrate having a display area on which an image is displayed, A first insulating film disposed on the first substrate, A first conductive portion, which consists of a part of the first conductive film disposed on the first insulating film and is disposed in the display area, A second insulating film disposed on the first conductive film, A heating wire consisting of a part of the second conductive film disposed on the second insulating film, which overlaps with at least a part of the first conductive portion in the display area, A third insulating film disposed on the second conductive film, It comprises a second conductive portion which is part of a third conductive film disposed on the third insulating film and overlaps with at least a portion of the heating wiring in the display area, The second insulating film and the third insulating film are thicker than the first insulating film in this display device.

2. The first conductive part is a source wiring that transmits an image signal. The display device according to claim 1, wherein the heating wiring extends parallel to the source wiring and is arranged superimposed on the source wiring via the second insulating film.

3. A fourth insulating film disposed on the third conductive film, A pixel electrode consisting of a part of the fourth conductive film disposed on the fourth insulating film, which is arranged superimposed on a part of the second conductive portion in the display area, A source electrode connected to the aforementioned source wiring, A drain electrode consisting of a portion of the first conductive film that is different from the source wiring and the source electrode, A semiconductor portion consisting of a part of the semiconductor film disposed below the first insulating film, and arranged superimposed on the source electrode and the drain electrode, respectively, The first connection portion consists of a portion of the second conductive film that is different from the heating wiring, and is arranged superimposed on the drain electrode, The third conductive film comprises a portion different from the second conductive portion, and a second connecting portion which is arranged superimposed on both the first connecting portion and the pixel electrode, The second conductive part is a common electrode that generates an electric field between itself and the pixel electrode. The first insulating film is provided with a first contact hole positioned to overlap both the source electrode and the semiconductor portion, and a second contact hole positioned to overlap both the drain electrode and the semiconductor portion. The second insulating film is provided with a third contact hole positioned to overlap both the drain electrode and the first connection portion. The third insulating film is provided with a fourth contact hole positioned to overlap both the first and second connection portions. The display device according to claim 2, wherein the fourth insulating film is provided with a fifth contact hole positioned to overlap both the second connection portion and the pixel electrode.

4. A fourth insulating film disposed on the third conductive film, A common electrode consisting of a part of the fourth conductive film disposed on the fourth insulating film, which is arranged superimposed on the second conductive portion in the display area, A source electrode connected to the source wiring, and a drain electrode consisting of a portion of the first conductive film different from the source wiring and the source electrode, A semiconductor portion consisting of a part of the semiconductor film disposed below the first insulating film, and arranged superimposed on the source electrode and the drain electrode, respectively, It comprises a first connection portion which is made of a portion of the second conductive film different from the heating wiring and is arranged superimposed on the drain electrode, The second conductive part is a pixel electrode that generates an electric field between itself and the common electrode. The first insulating film is provided with a first contact hole positioned to overlap both the source electrode and the semiconductor portion, and a second contact hole positioned to overlap both the drain electrode and the semiconductor portion. The second insulating film is provided with a third contact hole positioned to overlap both the drain electrode and the first connection portion. The display device according to claim 2, wherein the third insulating film is provided with a sixth contact hole positioned to overlap both the first connection portion and the pixel electrode.

5. The system includes a power supply unit that supplies power to the aforementioned heating wiring, The second insulating film and the third insulating film are both made of organic material. The power supply unit has a power density of 1000 W / mm² for the power supplied to the heating wiring. ３ The display device according to any one of claims 1 to 4, as follows:

6. The system includes a power supply unit that supplies power to the aforementioned heating wiring, The second insulating film and the third insulating film are both made of organic material. The power supply unit sets the power density of the power supplied to the heating wiring to 100 W / mm². ３ The display device according to any one of claims 1 to 4, as follows:

7. The first insulating film is made of an inorganic material, The display device according to any one of claims 1 to 4, wherein the second insulating film and the third insulating film are made of an organic material.

8. A second substrate is arranged opposite the first substrate with a gap between them, A display device according to any one of claims 1 to 4, comprising a liquid crystal layer sandwiched between the first substrate and the second substrate.

Images