Display boards and display devices

Abstract

To provide a display board and a display device. [Solution] A display substrate having a plurality of subpixels arranged in an array, comprising a base substrate, a drive circuit layer, a pixel definition layer, a light-emitting device layer, and a black matrix layer, wherein each of the plurality of subpixels comprises a pixel drive circuit and a light-emitting device, the pixel drive circuit is configured to drive the light-emitting device, the black matrix layer has a plurality of first light-transmitting openings 1131 that expose the light-emitting devices of each of the plurality of subpixels in a direction perpendicular to the surface of the base substrate, the pixel definition layer comprises a plurality of subpixel openings 1081, at least some of the subpixel openings correspond one-to-one with the plurality of first light-transmitting openings and at least partially overlap, and at least one of the plurality of first light-transmitting openings has an arc-shaped edge. The display substrate has a better display effect.

Description

Technical Field

[0001] This application claims the priority of International Application No. PCT / CN2021 / 094676 filed on May 19, 2021 and the priority of Chinese Patent Application No. 202110726472.5 filed on June 29, 2021, and the entire content disclosed in the above Chinese patent application is incorporated herein by reference as part of this application.

[0002] Embodiments of the present disclosure relate to a display substrate and a display device.

Background Art

[0003] OLED (Organic Light Emitting Diode) display devices have a series of advantages such as self-emission, high contrast, high resolution, wide viewing angle, low power consumption, high response speed, and low manufacturing cost, and have become one of the main development directions of next-generation display devices, and thus are attracting increasing attention.

Summary of the Invention

Means for Solving the Problems

[0004] At least one embodiment of the present disclosure provides a display substrate having a plurality of subpixels arranged in an array, comprising a base substrate, a drive circuit layer provided on the base substrate, a pixel definition layer provided on the side of the drive circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer provided on the side of the light-emitting device layer away from the base substrate, wherein each of the plurality of subpixels comprises a pixel drive circuit provided in the drive circuit layer and a light-emitting device provided in the light-emitting device layer, the pixel drive circuit is configured to drive the light-emitting device, the pixel definition layer includes a plurality of subpixel apertures, and the light-emitting device is away from the base substrate The black matrix layer includes a first electrode layer, a light-emitting material layer, and a second electrode layer, which are stacked in order in a direction toward the base substrate, the pixel definition layer is provided on the side of the first electrode layer away from the base substrate, and the plurality of subpixel apertures each expose the first electrode layer of the light-emitting device of the plurality of subpixels, the black matrix layer has a plurality of first light-transmitting apertures that each expose the light-emitting device of the plurality of subpixels in a direction perpendicular to the surface of the base substrate, at least one of the plurality of first light-transmitting apertures has an arc-shaped edge, and in a direction perpendicular to the surface of the base substrate, at least some of the plurality of subpixel apertures correspond one-to-one with the plurality of first light-transmitting apertures and at least partially overlap.

[0005] For example, in a display substrate according to at least one embodiment of the present disclosure, in a direction parallel to the surface of the base substrate, the planar shape of at least one of the plurality of first light-transmitting openings is elliptical, semi-elliptical, circular, semi-circular, track-shaped, or semi-track-shaped.

[0006] For example, in a display substrate according to at least one embodiment of the present disclosure, the planar shape of at least one of the plurality of subpixel apertures in a direction parallel to the surface of the base substrate is elliptical, semi-elliptical, circular, semi-circular, track-shaped, or semi-track-shaped.

[0007] For example, in a display substrate according to at least one embodiment of the present disclosure, in a corresponding subpixel aperture and a first light-transmitting aperture, the planar shape of the subpixel aperture and the planar shape of the first light-transmitting aperture are the same in a direction parallel to the surface of the base substrate.

[0008] For example, in a display substrate according to at least one embodiment of the present disclosure, the orthographic projection of the subpixel aperture on the base substrate is located within the orthographic projection of the first light-transmitting aperture on the base substrate.

[0009] For example, in a display substrate according to at least one embodiment of the present disclosure, the minimum distance between the orthographic edge of the subpixel aperture on the base substrate and the orthographic edge of the first light-transmitting aperture on the base substrate is 1 μm to 3 μm.

[0010] For example, in a display substrate according to at least one embodiment of the present disclosure, the first electrode layer includes a main body and a connecting portion, the connecting portion is configured to be electrically connected to the pixel driving circuit, at least a portion of the main body is exposed by the sub-pixel aperture, and in a direction parallel to the surface of the base substrate, the planar shape of the main body and the planar shape of the sub-pixel aperture are at least partially the same.

[0011] For example, in a display substrate according to at least one embodiment of the present disclosure, the orthographic projection of the subpixel aperture on the base substrate is located within the orthographic projection of the main body on the base substrate.

[0012] For example, in a display substrate according to at least one embodiment of the present disclosure, the minimum distance between the orthographic edge of the subpixel aperture on the base substrate and the orthographic edge of the main body on the base substrate is 1 μm to 5 μm.

[0013] For example, in a display substrate according to at least one embodiment of the present disclosure, the orthographic projection of the first light-transmitting aperture, which is provided corresponding to the sub-pixel aperture, on the base substrate is located within the orthographic projection of the main body portion on the base substrate.

[0014] For example, in a display substrate according to at least one embodiment of the present disclosure, the orthographic projection of the main body portion on the base substrate is located within the orthographic projection of the first light-transmitting aperture on the base substrate, which is provided corresponding to the sub-pixel aperture.

[0015] For example, a display substrate according to at least one embodiment of the present disclosure further includes a color film layer, the color film layer includes a plurality of color film patterns, and each of the plurality of color film patterns is provided in the plurality of first light-transmitting openings.

[0016] For example, in a display substrate according to at least one embodiment of the present disclosure, the black matrix layer further has a plurality of second light-transmitting openings, each of the plurality of second light-transmitting openings is provided between the plurality of first light-transmitting openings, and the drive circuit layer includes a plurality of light-transmitting sections, at least some of the plurality of second light-transmitting openings are provided in a one-to-one correspondence with at least some of the plurality of light-transmitting sections, and is configured to transmit light that forms a predetermined angular range with the surface of the base substrate.

[0017] For example, in a display substrate according to at least one embodiment of the present disclosure, in the correspondingly provided second light-transmitting aperture and light-transmitting portion, the planar size of the second light-transmitting aperture is less than the planar size of the light-transmitting portion in a direction parallel to the surface of the base substrate.

[0018] For example, in a display substrate according to at least one embodiment of the present disclosure, in the correspondingly provided second light-transmitting aperture and light-transmitting portion, the orthographic projection of the second light-transmitting aperture on the base substrate and the orthographic projection of the light-transmitting portion on the base substrate overlap at least partially.

[0019] For example, in a display substrate according to at least one embodiment of the present disclosure, the plurality of subpixels include red subpixels, green subpixels and blue subpixels, the first light-transmitting aperture for exposing the light-emitting device of the red subpixel is substantially elliptical, the first light-transmitting aperture for exposing the light-emitting device of the green subpixel is substantially elliptical, the length of the major axis of the second ellipse is less than the length of the major axis of the first ellipse, and the length of the minor axis of the second ellipse is less than the length of the minor axis of the first ellipse, or the first light-transmitting aperture for exposing the light-emitting device of the green subpixel is substantially semi-elliptical, the first light-transmitting aperture for exposing the light-emitting device of the blue subpixel is substantially elliptical, the length of the major axis of the third ellipse is less than the length of the major axis of the first ellipse, and the length of the minor axis of the third ellipse is greater than the length of the minor axis of the first ellipse.

[0020] For example, in a display substrate according to at least one embodiment of the present disclosure, a first light-transmitting aperture for exposing the light-emitting device of the red subpixel includes a first arc-shaped edge and a second arc-shaped edge facing each other, and a first tip and a second tip located at the intersection of the first arc-shaped edge and the second arc-shaped edge, the first tip and the second tip facing each other; a first light-transmitting aperture for exposing the light-emitting device of the blue subpixel includes a third arc-shaped edge and a fourth arc-shaped edge facing each other, and a third tip and a fourth tip located at the intersection of the third arc-shaped edge and the fourth arc-shaped edge, the third tip and the fourth tip facing each other; and a first light-transmitting aperture for exposing the light-emitting device of the green subpixel includes a fifth arc-shaped edge and a fifth tip located at one end of the fifth arc-shaped edge.

[0021] For example, in a display substrate according to at least one embodiment of the present disclosure, the subpixel aperture corresponding to the green subpixel includes a sixth arc-shaped edge and a sixth tip located at one end of the sixth arc-shaped edge, and the main body of the first electrode layer of the light-emitting device of the green subpixel includes a seventh arc-shaped edge, the seventh arc-shaped edge does not include a tip.

[0022] For example, in a display substrate according to at least one embodiment of the present disclosure, the plurality of subpixels include red subpixels, green subpixels and blue subpixels, the first light-transmitting aperture that exposes the light-emitting device of the red subpixel is substantially a first track shape, the first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially a second track shape, the length of the major axis of the second track shape is less than the length of the major axis of the first track shape, and the length of the minor axis of the second track shape is less than the length of the minor axis of the first track shape, or the first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially a half-track shape, the first light-transmitting aperture that exposes the light-emitting device of the blue subpixel is substantially a third track shape, the length of the major axis of the third track shape is less than the length of the major axis of the first track shape, and the length of the minor axis of the third track shape is greater than the length of the minor axis of the first track shape.

[0023] For example, in a display substrate according to at least one embodiment of the present disclosure, one red subpixel, two green subpixels, and one blue subpixel constitute one pixel unit, and the plurality of pixel units composed of the plurality of subpixels are arranged in an array on the base substrate.

[0024] At least one embodiment of the present disclosure provides a display device including a display substrate according to an embodiment of the present disclosure.

[0025] For example, a display device according to at least one embodiment of the present disclosure further includes a patterned touch surface and an image sensor array, the image sensor array being provided on the side of the drive circuit layer away from the light-emitting device layer and including a plurality of image sensors, the plurality of image sensors being configured to receive light emitted from a plurality of light-emitting devices in the light-emitting device layer and reflected by the pattern on the patterned touch surface to reach the plurality of image sensors in order to perform pattern collection.

[0026] To more clearly illustrate the technical concepts of the embodiments of this disclosure, the drawings of the embodiments are briefly described below, and as will be apparent, the drawings described below relate only to some embodiments of this disclosure and do not limit this disclosure.

Brief Description of the Drawings

[0027] [Figure 1] It is a schematic cross-sectional view of a part of a display substrate. [Figure 2] It is a schematic plan view of a sub-pixel opening of a pixel definition layer of a display substrate and a sub-pixel light-emitting opening of a black matrix layer. [Figure 3] It is a schematic partial cross-sectional view of a display substrate according to at least one embodiment of the present disclosure. [Figure 4A] It is a schematic plan view of a sub-pixel opening of a pixel definition layer of a display substrate, a first light-transmitting opening of a black matrix layer, and a first electrode layer of a light-emitting device according to at least one embodiment of the present disclosure. [Figure 4B] It is another schematic plan view of a sub-pixel opening of a pixel definition layer of a display substrate, a first light-transmitting opening of a black matrix layer, and a first electrode layer of a light-emitting device according to at least one embodiment of the present disclosure. [Figure 5] It is a schematic cross-sectional view of another part of a display substrate according to at least one embodiment of the present disclosure. [Figure 6] It is a plan layout diagram of a plurality of sub-pixels of a display substrate according to at least one embodiment of the present disclosure. [Figure 7] It is a plan layout diagram of a plurality of first light-transmitting openings of a black matrix layer corresponding to a plurality of sub-pixels of a display substrate in FIG. 6. [Figure 8A] It is another plan layout diagram of a plurality of sub-pixels of a display substrate according to at least one embodiment of the present disclosure. [Figure 8B] It is a plan layout diagram of a plurality of first light-transmitting openings of a black matrix layer corresponding to a plurality of sub-pixels of a display substrate in FIG. 8A. [Figure 9] It is yet another plan layout diagram of a plurality of sub-pixels of a display substrate according to at least one embodiment of the present disclosure. [Figure 10] It is a plan layout diagram of a plurality of first light-transmitting openings of a black matrix layer corresponding to a plurality of sub-pixels of a display substrate in FIG. 9. [Figure 11A]This is yet another planar arrangement diagram of a plurality of subpixels of a display substrate according to at least one embodiment of the present disclosure. [Figure 11B] Figure 11A is a plan view of the multiple first light-transmitting apertures in the black matrix layer corresponding to multiple subpixels of the display substrate. [Figure 12] This is a schematic plan view of a display substrate according to at least one embodiment of the present disclosure. [Figure 13] This is a schematic plan view of the black matrix layer and color film layer of a display substrate according to at least one embodiment of the present disclosure. [Figure 14A] This is a schematic diagram of a pixel driving circuit for a display substrate according to at least one embodiment of the present disclosure. [Figure 14B] This is a schematic diagram of another pixel driving circuit for a display substrate according to at least one embodiment of the present disclosure. [Figure 15] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 16A] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 16B] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 17A] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 17B] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 18A] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 18B]These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 19A] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 19B] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 20] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 21A] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 21B] These are schematic partial plan views of each functional layer of a display substrate according to at least one embodiment of the present disclosure, and schematic partial plan views after the functional layers have been sequentially stacked. [Figure 22] This is a schematic cross-sectional view of a display device according to at least one embodiment of the present disclosure. [Modes for carrying out the invention]

[0028] To further clarify the purpose, technical proposal and advantages of the embodiments of this disclosure, the technical proposal of the embodiments of this disclosure will be described clearly and completely below with reference to the drawings of the embodiments of this disclosure. As is obvious, the embodiments described are some embodiments of this disclosure, not all embodiments. Any other embodiments that a person skilled in the art can obtain without creative work based on the embodiments of this disclosure described are all within the scope of this disclosure.

[0029] Unless otherwise defined, technical or scientific terms used in this disclosure should have the ordinary meaning understood by those skilled in the art. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, number, or importance, but are used simply to distinguish different components. Similar terms such as “includes” or “incorporates” mean that the element or article appearing after the word covers the element or article and its equivalents listed before the word, but do not exclude other elements or parts. Similar terms such as “connected” or “linked” include electrical connections, whether direct or indirect, and are not limited to physical or mechanical connections. Terms such as “up,” “down,” “left,” and “right” are used simply to indicate relative positions, and if the absolute position of the object being described changes, the relative position may change accordingly.

[0030] To prevent light reflection from the screen, conventional OLED display substrates typically have a polarizing plate attached to the substrate to improve usability in ambient light. However, the inventors of this disclosure have found that the transmittance of polarizing plates is usually only about 40%, resulting in a low light extraction rate for the display substrate and high power consumption.

[0031] In some embodiments, COE (Cover film On Encapsulation) technology, that is, a technology that replaces polarizers with color films (CF), is used to improve the light extraction rate of display substrates, and this technology is also advantageous for the development of highly integrated, lightweight, and thin display substrates.

[0032] For example, Figure 1 shows a schematic cross-sectional view of a part of a display substrate using COE technology as an example. As shown in Figure 1, the display substrate has a structure including a pixel definition layer E, a light-emitting device, a black matrix layer C, and an encapsulation layer F. The pixel definition layer E has a sub-pixel aperture E1, which exposes the anode D of the light-emitting device. The light-emitting layer B1 and cathode B2 of the light-emitting device are formed inside the sub-pixel aperture E1 and on the anode D. The light-emitting layer B1 is in contact with the anode D within the range defined by the sub-pixel aperture E1, and the light-emitting layer B1 is driven jointly by the anode D and cathode B2 to emit light. Thus, the region defined by the sub-pixel aperture E1 is the effective light-emitting region of the subpixel. The encapsulation layer F is provided on the light-emitting device, and the black matrix layer C is provided on the encapsulation layer F. The black matrix layer C has a sub-pixel light-emitting aperture C1, which is used to expose the effective light-emitting region of the subpixel so that the light-emitting device of the subpixel emits light. For example, a color film A is formed within the sub-pixel light-emitting aperture C1, and the color of the color film A is the same as the color of the light emitted by the light-emitting layer of the light-emitting device. Furthermore, the purity of the light emitted from the display substrate can be improved, as well as the light extraction rate of the display substrate. Alternatively, the light-emitting layer of the light-emitting device emits white light, and by adding the color film A, monochromatic light can be formed.

[0033] However, the inventors of this disclosure have found that, as shown in Figure 1, ambient light (see arrow in Figure 1) diffracts as it passes through the edge of the sub-pixel light-emitting aperture C1, and that the light reflected by the anode and cathode of the light-emitting device also diffracts as it passes through the edge of the sub-pixel light-emitting aperture C1, thereby causing a color separation phenomenon on the display substrate. In other words, ambient light and the light reflected by the anode and cathode of the light-emitting device cause color to be generated at the edge of the sub-pixel light-emitting aperture C1. Through research, it was found that the range of diffracted light (shape of diffracted light) due to the above diffraction phenomenon is related to the shape and size of the sub-pixel light-emitting aperture C1.

[0034] For example, Figure 2 is a schematic plan view of the subpixel aperture of the pixel definition layer and the subpixel light-emitting aperture of the black matrix layer corresponding to one subpixel of an exemplary display substrate. As shown in Figure 2, the planar shape of the region defined by the subpixel aperture E1 of the pixel definition layer E is hexagonal, and correspondingly, the planar shape of the region defined by the subpixel light-emitting aperture C1 of the black matrix layer C is also hexagonal. In a display substrate using COE technology, the subpixel light-emitting aperture C1 of the black matrix layer C is small, for example, λ*10 2 Because of the order of magnitude, in conventional subpixel arrays, for example, in a subpixel array having red subpixels, green subpixels, and blue subpixels, the hexagonal subpixel light-emitting aperture C1 inevitably causes diffraction effects of monochromatic light (red, green, blue, etc.) on the display substrate under ambient light (e.g., under a point light source). Furthermore, the luminous efficiency of the light-emitting devices of subpixels of different colors differs, and the shape and size of the subpixel aperture E1 of the pixel definition layer E corresponding to subpixels of different colors are usually different. The diffraction phenomenon occurring in subpixels with narrow aperture sizes and subpixels with short aperture sizes is even more severe, and these diffraction phenomena further worsen the degree of color separation.

[0035] However, in the embodiments of this disclosure, the color separation phenomenon is a phenomenon in which, when the display substrate is turned off, color separation (for example, red, green, and blue) occurs in reflected light under ambient light (for example, under a point light source or a line light source).

[0036] At least one embodiment of the present disclosure provides a display substrate and a display device having a plurality of subpixels arranged in an array, and comprising a base substrate, a drive circuit layer provided on the base substrate, a pixel definition layer provided on the side of the drive circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer provided on the side of the light-emitting device layer away from the base substrate, each of the plurality of subpixels comprising a pixel drive circuit provided in the drive circuit layer and a light-emitting device provided in the light-emitting device layer, the pixel drive circuit being configured to drive the light-emitting device, the pixel definition layer comprising a plurality of subpixel apertures, and the light-emitting device being on the base substrate The black matrix layer includes a first electrode layer, a light-emitting material layer, and a second electrode layer, which are stacked in order in the direction away from each other. The pixel definition layer is provided on the side of the first electrode layer away from the base substrate, and each of the multiple subpixel apertures exposes the first electrode layer of the light-emitting device of each of the multiple subpixels. The black matrix layer has a plurality of first light-transmitting apertures that expose each of the light-emitting devices of each of the multiple subpixels in a direction perpendicular to the surface of the base substrate, and at least one of the plurality of first light-transmitting apertures has an arc-shaped edge. In a direction perpendicular to the surface of the base substrate, at least some of the plurality of subpixel apertures and the plurality of first light-transmitting apertures correspond one-to-one and at least partially overlap.

[0037] In the display substrate according to at least one embodiment of the present disclosure, at least one of the plurality of first light-transmitting apertures has an arc-shaped edge, and this arc-shaped edge can reduce and eliminate the phenomenon in which ambient light diffracts at the edge of the first light-transmitting aperture of the black matrix layer, causing color separation of the display substrate, and further improve the display effect of the display substrate.

[0038] The display substrate and display device according to the embodiments of this disclosure will be described in detail below with reference to several specific examples.

[0039] Figure 3 shows a schematic cross-sectional view of a display substrate according to at least one embodiment of the present disclosure, and as shown in Figure 3, the display substrate has a plurality of subpixels arranged in an array, one subpixel is shown as an example in Figure 3, and the display substrate includes a base substrate 101, a drive circuit layer 102 provided on the base substrate 101, a light-emitting device layer provided on the side of the drive circuit layer 102 away from the base substrate 101, and a black matrix layer 113 provided on the side of the light-emitting device layer away from the base substrate 101.

[0040] As shown in Figure 3, each subpixel includes a pixel driving circuit provided in the driving circuit layer 102 and a light-emitting device EM provided in the light-emitting device layer, and the pixel driving circuit is configured to drive the light-emitting device EM. The black matrix layer 113 has a plurality of first light-transmitting apertures 1131 that expose the light-emitting devices EM of the plurality of subpixels in a direction perpendicular to the surface of the base substrate 101 (i.e., the vertical direction in the figure), and transmits the light emitted by the light-emitting devices EM of the plurality of subpixels. For example, Figure 4A shows a schematic plan view of the first light-transmitting apertures 1131, that is, a schematic plan view in a direction parallel to the surface of the base substrate 101, and as shown in Figure 4A, at least one of the first light-transmitting apertures 1131 has an arc-shaped edge, for example, each of the first light-transmitting apertures 1131 has an arc-shaped edge.

[0041] For example, in some embodiments, as shown in Figure 4A, the planar shape of at least one first light-transmitting opening 1131 (e.g., each first light-transmitting opening 1131) in a direction parallel to the board surface of the base substrate 101 is a shape such as a substantially elliptical (also called a mango shape), semi-elliptical, circular, semi-circular, track shape (if shown), or semi-track shape, or a variation thereof.

[0042] However, in the embodiments of this disclosure, the track shape is a shape similar to a track formed by one rectangle and two opposing arcs on both sides of the rectangle, the track shape having two opposing parallel right sides and two opposing arcs. The mango shape may be considered a variation of the ellipse, having two opposing arc-shaped edges, specifically see Figures 6 and 7 which will be described later.

[0043] For example, as shown in Figure 3, the pixel driving circuit for each subpixel includes a structure such as at least one thin-film transistor TFT and a memory capacitor Cst. The thin-film transistor TFT includes an active layer 1021, a gate 1022, a source 1023, and a drain 1024. The source 1023 of the thin-film transistor TFT is electrically connected to the first electrode layer 104 of the light-emitting device EM. For example, the memory capacitor Cst includes a first capacitor electrode C1 and a second capacitor electrode C2. For example, the first capacitor electrode C1 of the memory capacitor Cst is located in the same layer as the gate 1022 of the thin-film transistor TFT.

[0044] For example, the pixel driving circuit may be formed as a 2T1C (two thin-film transistors and one memory capacitor), 6T1C (six thin-film transistors and one memory capacitor), and thus include multiple thin-film transistors, which have a structure similar to or the same as the stacked structure shown in Figure 3. Figure 3 shows only thin-film transistors directly connected to the light-emitting device, and these thin-film transistors may be driving thin-film transistors, light-emitting control thin-film transistors, and so on.

[0045] Furthermore, however, in the embodiments of this disclosure, "provided in the same layer" means that the two functional or structural layers are in the same layer in the hierarchical structure of the display substrate and are formed of the same material; that is, in the manufacturing process, the two functional or structural layers may be formed from the same material layer and the required patterns and structures may be formed by the same patterning process.

[0046] Furthermore, as shown in Figure 3, the display panel may further include structures such as a buffer layer 103 provided on the base substrate 101, a first gate insulating layer 1024 provided on the active layer 1021, a second gate insulating layer 1025 provided on the gate 1022 and the first capacitor electrode C1, an interlayer insulating layer 1026 provided on the second capacitor electrode CE2, a passivation layer 1027 provided on the source 1023 and the drain 1024, and a planarization layer 109 provided on the passivation layer 1027.

[0047] For example, in some embodiments, as shown in Figure 3, the display substrate may further include a pixel definition layer 108 provided on the side of the drive circuit layer 102 away from the base substrate 101, for example, the pixel definition layer 108 is provided on the planarization layer 109 and includes a plurality of sub-pixel apertures 1081, and the light-emitting device EM includes a first electrode layer 104, a light-emitting material layer 105, and a second electrode layer 106 which are stacked in order in the direction away from the base substrate 101, with the pixel definition layer 108 provided on the side of the first electrode layer 104 away from the base substrate 101, and the plurality of sub-pixel apertures 1081 each expose the first electrode layer 104 of the light-emitting device EM of the plurality of sub-pixels. In the direction perpendicular to the surface of the base substrate 101, that is, in the vertical direction in the figure, the plurality of sub-pixel apertures 1081 and the plurality of first light-transmitting apertures 1131 correspond one-to-one and at least partially overlap. As a result, the light emitted by the light-emitting device EM can be emitted from the first light-transmitting aperture 1131, thereby achieving a display effect.

[0048] For example, in some embodiments, as shown in Figure 4A, the planar shape of at least one subpixel aperture 1081 in a direction parallel to the surface of the base substrate 101 is approximately elliptical (also called mango-shaped), semi-elliptical, circular, semi-circular, track-shaped (if shown), or semi-track-shaped, or a variation thereof.

[0049] For example, in some embodiments, as shown in Figure 4A, in the corresponding subpixel aperture 1081 and one first light-transmitting aperture 1131, the planar shape of the subpixel aperture 1081 and the planar shape of the first light-transmitting aperture 1131 are the same in the direction parallel to the surface of the base substrate 101, and as shown, both are track-shaped.

[0050] For example, in some embodiments, as shown in Figure 4A, the orthographic projection of the subpixel aperture 1081 on the base substrate 101 lies within the orthographic projection of the first light-transmitting aperture 1131 on the base substrate 101, i.e., the planar size of the subpixel aperture 1081 is less than the planar size of the first light-transmitting aperture 1131.

[0051] Within the range defined by the subpixel aperture 1081, the light-emitting material layer 105 is in contact with the first electrode layer 104, and the light-emitting material layer 105 is driven jointly by the first electrode layer 104 and the second electrode layer 106 to emit light, thereby the region defined by the subpixel aperture 1081 is the effective light-emitting region of the subpixel. The planar shape of the subpixel aperture 1081 is designed to be substantially the same as the planar shape of the first light-transmitting aperture 1131, and the planar size of the subpixel aperture 1081 is less than the planar size of the first light-transmitting aperture 1131. As a result, the effective light-emitting region of the subpixel is sufficiently exposed by the first light-transmitting aperture 1131, and the light emitted by the light-emitting device of the subpixel can be sufficiently emitted from the first light-transmitting aperture 1131. This allows the display substrate to use the light emitted by the light-emitting device of the subpixel to display information, improving the light output of the display substrate and saving energy consumption.

[0052] For example, in some embodiments, as shown in Figure 4A, the minimum distance D1 between the orthographic edge of the subpixel aperture 1081 on the base substrate 101 and the orthographic edge of the first light-transmitting aperture 1131 on the base substrate 101 is 1 μm-3 μm, for example, 1.5 μm, 2 μm, or 2.5 μm. That is, the subpixel aperture 1081 intrudes 1 μm-3 μm into the first light-transmitting aperture 1131, so that the effective light-emitting region defined by the subpixel aperture 1081 is sufficiently exposed by the first light-transmitting aperture 1131.

[0053] For example, in some embodiments, as shown in Figures 3 and 4A, the first electrode layer 104 includes a main body portion 1041 and a connecting portion 1042, the connecting portion 1042 is configured to be electrically connected to a pixel driving circuit, and at least a portion of the main body portion 1041 is exposed by a sub-pixel aperture 1081. For example, in a direction parallel to the surface of the base substrate 101, the planar shape of the main body portion 1041 and the planar shape of the sub-pixel aperture 1081 are the same.

[0054] For example, in some embodiments, as shown in Figure 4A, the orthographic projection of the subpixel aperture 1081 on the base substrate 101 lies within the orthographic projection of the main body portion 1041 on the base substrate 101. As a result, the shape and size of the main body portion 1041 exposed by the subpixel aperture 1081 are equal to the shape and size of the subpixel aperture 1081. Therefore, in the manufacturing process, the effective light-emitting area of ​​each subpixel can be obtained by designing the size of the subpixel aperture 1081. Furthermore, the larger size of the main body portion 1041 provides a margin to accommodate any positional misalignment that may occur in the subpixel aperture 1081 during the manufacturing process.

[0055] For example, in some embodiments, as shown in Figure 4A, the minimum distance D2 between the orthographic edge of the subpixel aperture 1081 on the base substrate 101 and the orthographic edge of the main body portion 1041 on the base substrate 101 is 1 μm to 5 μm, for example, 2.5 μm, 3 μm, or 3.5 μm, meaning that the subpixel aperture 1081 intrudes 1 μm to 5 μm into the main body portion 1041.

[0056] For example, in some embodiments, as shown in Figure 4A, the orthographic projection of the first light-transmitting aperture 1131, which is provided in correspondence with the sub-pixel aperture 1081, on the base substrate 101 lies within the orthographic projection of the main body portion 1041 on the base substrate 101. That is, in the direction parallel to the surface of the base substrate 101, the planar size of the main body portion 1041, the first light-transmitting aperture 1131, and the sub-pixel aperture 1081 gradually decreases. This design is advantageous in improving the manufacturing yield of the display substrate, improving the light emission rate of the display substrate, and reducing or eliminating the color separation phenomenon of the display substrate.

[0057] For example, in some other embodiments, as shown in Figure 4B, the orthographic projection of the main body 1041 on the base substrate 101 is located within the orthographic projection of the first light-transmitting aperture 1131 on the base substrate 101, which is provided corresponding to the sub-pixel aperture 1081. In this case, the first light-transmitting aperture 1131 is substantially the same shape as the main body 1041, and the first light-transmitting aperture 1131 protrudes from the main body 1041. This means can also improve the light emission rate of the display substrate and reduce or even eliminate the color separation phenomenon of the display substrate.

[0058] For example, in some embodiments, as shown in Figure 3, the display substrate may further include structures such as a spacer 107 provided on the pixel definition layer 108 and an encapsulation layer EN provided on the sub-pixel light-emitting device EM. For example, the encapsulation layer EN may include a plurality of sub-encapsulation layers to improve its encapsulation effect. For example, the encapsulation layer EN may be a composite encapsulation layer, comprising a first inorganic encapsulation layer 110, a second organic encapsulation layer 111, and a third inorganic encapsulation layer 112. For example, the first inorganic encapsulation layer 110 and the second inorganic encapsulation layer 112 may be formed from inorganic materials such as silicon nitride, silicon oxide, or silicon oxynitride, and the first organic encapsulation layer 111 may be formed from an organic material such as polyimide (PI) or epoxy resin. The composite encapsulation layer can provide multiple layers of protection to the functional structure in the display panel and has a better encapsulation effect.

[0059] For example, in some other embodiments, as shown in Figure 5, the display substrate may further include a connecting electrode 1043, and the first electrode layer 104 of the subpixel light-emitting device EM is electrically connected to the source 1023 of the thin-film transistor TFT by the connecting electrode 1043. For example, another planarization layer 1091 may be further formed on the connecting electrode 1043, in which case the pixel definition layer 108 is provided on the planarization layer 1091. For the display substrate shown in Figure 5, other structures can be found in the description of the display substrate shown in Figures 3 and 4A and will not be described in detail here.

[0060] For example, in the embodiments of this disclosure, the base substrate 101 may include a flexible insulating material such as polyimide (PI) or a rigid insulating material such as a glass substrate. For example, in some examples, the base substrate 101 may have a laminated structure in which a plurality of flexible layers and a plurality of barrier layers are alternately provided. In this case, the flexible layers may include polyimide, and the barrier layers may include inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. For example, the buffer layer 103 may include inorganic materials such as silicon nitride, silicon oxide, or silicon oxynitride. The active layer 1021 can be made of materials such as polysilicon and metal oxides, the first gate insulating layer 1024 and the second gate insulating layer 1025 can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, the gate 1022 and the first capacitor electrode C1 can be made of metallic materials such as copper, aluminum, titanium, or cobalt, and can be formed as a single-layer or multilayer structure, for example, a multilayer structure such as titanium / aluminum / titanium or molybdenum / aluminum / molybdenum, the second capacitor electrode C2 can be made of metallic or alloy materials such as copper, aluminum, titanium, or cobalt, the interlayer insulating layer 1026 can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the passivation layer 1027 can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. For example, in some embodiments, the display substrate may not have the passivation layer shown in Figures 3 and 5. Source drains 1023 and 1024 can be made of metallic materials such as copper, aluminum, titanium, and cobalt, and can be formed as a single-layer or multilayer structure, for example, a multilayer structure such as titanium / aluminum / titanium or molybdenum / aluminum / molybdenum. The first electrode layer 104 is, for example, an anode layer and contains a metal oxide such as ITO or IZO, or a metal such as Ag, Al, or Mo or an alloy thereof. The material of the light-emitting material layer 105 may be an organic light-emitting material, for example, the material of the light-emitting material layer 105 can be selected to emit light of a specific color (e.g., red light, blue light, or green light) according to the needs.The second electrode layer 106 is, for example, a cathode layer and includes a metal or alloy thereof such as Mg, Ca, Li, or Al, or a metal oxide such as IZO or ZTO, or a conductive organic material such as PEDOT / PSS (poly-3,4-ethylenedioxythiophene / polystyrene sulfonate). The planarization layer 109 (and planarization layer 1091), pixel definition layer 108, and spacer 107 can use an organic insulating material such as polyimide. The embodiments of this disclosure do not particularly limit the materials of each functional layer.

[0061] For example, in some embodiments, as shown in Figure 3, the display substrate may further include a color film layer 114, the color film layer 114 comprising a plurality of color film patterns 1141, each of which is provided in a plurality of first light-transmitting apertures 1131. This allows light emitted by the sub-pixel light-emitting device EM to pass through the color film patterns 1141 and be emitted, thereby improving the purity of the emitted light.

[0062] For example, as shown in Figure 3, the display substrate may further include a protective cover plate 115 provided on the black matrix layer 113 and the color film layer 114, thereby protecting the structure of the display substrate. For example, the protective cover plate 115 may be a glass cover plate and may be bonded to the display substrate by an optically transparent adhesive (not shown).

[0063] For example, in some embodiments, as shown in Figure 3, the black matrix layer 113 may further have a plurality of second light-transmitting openings 1132, each of which is provided between a plurality of first light-transmitting openings 1131, and the drive circuit layer includes a plurality of light-transmitting sections 1020, with at least some of the second light-transmitting openings 1132 provided in a one-to-one correspondence with at least some of the plurality of light-transmitting sections 1020, and is configured to transmit light that forms a predetermined angular range with the surface of the base substrate 101, for example, to transmit the light ray L shown in the figure. As a result, the light ray L can pass through the display substrate from the display side (upper side in the figure) of the display substrate to the non-display side (lower side in the figure), thereby allowing a photosensitive device (e.g., an image sensor) provided on the non-display side of the display substrate to perform a photosensitive operation.

[0064] For example, multiple light-transmitting portions 1020 include a light-transmitting insulating material, and this light-transmitting insulating material includes the light-transmitting insulating material of insulating layers such as the first gate insulating layer 1024, the second gate insulating layer 1025, the interlayer insulating layer 1026, and the passivation layer 1027.

[0065] For example, in some embodiments, in the correspondingly provided second light-transmitting opening 1132 and light-transmitting portion 1020, the planar size of the second light-transmitting opening 1132 is less than the planar size of the light-transmitting portion 1020 in a direction parallel to the surface of the base substrate 101, which will be described in detail later.

[0066] For example, in some embodiments, in the correspondingly provided second light-transmitting opening 1132 and light-transmitting portion 1020, the orthographic projection of the second light-transmitting opening 1132 on the base substrate 101 and the orthographic projection of the light-transmitting portion 1020 on the base substrate 101 overlap at least partially, as will be explained in detail later.

[0067] For example, in some embodiments, as shown in Figure 6, the display substrate has multiple subpixels including a red subpixel R, a green subpixel G, and a blue subpixel B, the pixel definition layer includes a red subpixel aperture 11, a green subpixel aperture 12, and a blue subpixel aperture 13, and the light-emitting devices EM of the red subpixel R, green subpixel G, and blue subpixel B are formed in the red subpixel aperture 11, green subpixel aperture 12, and blue subpixel aperture 13 of the pixel definition layer, respectively.

[0068] For example, Figure 7 shows multiple first light-transmitting apertures 1131 of the black matrix layer 113 corresponding to multiple subpixels in Figure 6. As shown in Figure 7, the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the red subpixel R is approximately a first ellipse 11-1 (also called a mango shape, formed from two symmetrical arcs), and the first light-transmitting aperture 1131 that exposes the light-emitting device of the green subpixel G is approximately a second ellipse 12-1 (also called a mango shape), and the The length L2 of the major axis of the second ellipse 12-1 is less than the length L1 of the major axis of the first ellipse 11-1, the length W2 of the minor axis of the second ellipse 12-1 is less than the length L1 of the minor axis of the first ellipse 11-1, the first light-transmitting aperture 1131 that exposes the light-emitting device of the blue subpixel B is approximately the third ellipse 13-1, the length L3 of the major axis of the third ellipse 13-1 is less than the length L1 of the major axis of the first ellipse 11-1, and the length W3 of the minor axis of the third ellipse 13-1 is greater than the length L1 of the minor axis of the first ellipse.

[0069] For example, as shown in Figures 6 and 7, the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the red subpixel R has the same shape as the red subpixel aperture 11 of the pixel definition layer corresponding to the red subpixel R, and the planar size of the red subpixel aperture 11 is less than the planar size of the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the red subpixel R; the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the green subpixel G has the same shape as the green subpixel aperture 12 of the pixel definition layer corresponding to the green subpixel G, and the planar size of the green subpixel aperture 12 is less than the planar size of the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the green subpixel G; the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the blue subpixel B has the same shape as the blue subpixel aperture 13 of the pixel definition layer corresponding to the blue subpixel B, and the planar size of the blue subpixel aperture 13 is less than the planar size of the first light-transmitting aperture 1131 that exposes the light-emitting device EM of the blue subpixel B.

[0070] Lab color space detection was performed on a display substrate having the elliptical (or mango-shaped) subpixels described above. For example, when a dark state of the display substrate was detected using a color analyzer, the Lab value was 7.68. In contrast, for a display substrate having hexagonal (see Figure 2) subpixels, the Lab value was 28.3. The lower the Lab value, the less color separation occurs on the display substrate. As can be seen from the above, the display substrate according to the embodiment of this disclosure significantly reduces the degree to which color separation occurs on the display substrate.

[0071] For example, in some other examples, as shown in Figures 8A and 8B, the green subpixel aperture 12 in the pixel definition layer corresponding to the green subpixel G is approximately semi-elliptic, and the first light-transmitting aperture 1311 that exposes the light-emitting device of the green subpixel G is also approximately semi-elliptic 12-2, i.e., half an ellipse. For example, the length L21 of the semi-elliptic 12-2 is less than the length L1 of the major axis of the first elliptic 11-1, and the width W21 of the semi-elliptic 12-2 is less than or equal to the length W1 of the minor axis of the first elliptic 11-1. For example, the first light-transmitting aperture 1311 and subpixel apertures of other subpixels in this example are the same as in Figures 6 and 7 and will not be described in detail here.

[0072] For example, in some examples, as shown in Figures 6-8B, one red subpixel R, two green subpixels G, and one blue subpixel B constitute one pixel unit, and multiple pixel units composed of multiple subpixels are arranged in an array on the base substrate 101. For example, in some other embodiments, one red subpixel R, one green subpixel G, and one blue subpixel B may constitute one pixel unit, and multiple pixel units composed of multiple subpixels may be arranged in an array on the base substrate 101, and the embodiments of this disclosure do not limit the specific form of the pixel unit.

[0073] For example, in some other embodiments, as shown in Figures 9 and 10, the subpixels include a red subpixel R, a green subpixel G, and a blue subpixel B, and the first light-transmitting aperture 1131 that exposes the light-emitting device of the red subpixel R is approximately a first track shape 21-1, and the first light-transmitting aperture 1131 that exposes the light-emitting device of the green subpixel G is approximately a half-track shape 22-1, for example, the length L5 of the half-track shape 22-1 is less than the length L4 of the major axis of the first track shape, and the width W5 of the half-track shape 22-1 is greater than or equal to the length W4 of the minor axis of the first track shape, and the first light-transmitting aperture 1131 that exposes the light-emitting device of the blue subpixel B is approximately a third track shape 23-1, the length L6 of the major axis of the third track shape 23-1 is less than the length L4 of the major axis of the first track shape 21-1, and the length W6 of the minor axis of the third track shape 23-1 is greater than the length W4 of the minor axis of the first track shape 21-1.

[0074] When Lab color space detection was performed on the display board having the above-mentioned track-shaped (or half-track-shaped) subpixels, the Lab value was 5.18, which is far smaller than the Lab value of 28.3 for the display board having hexagonal (see Figure 2) subpixels.

[0075] For example, in some other embodiments, as shown in Figures 11A and 11B, the first light-transmitting aperture 1131 that exposes the light-emitting device of the green subpixel G is approximately a second track shape 22-2, where the length L7 of the major axis of the second track shape 22-2 is less than the length L4 of the major axis of the first track shape 21-1, and the length W7 of the minor axis of the second track shape 22-2 is less than the length W4 of the minor axis of the first track shape 21-1. Correspondingly, the green subpixel aperture 22 of the pixel definition layer corresponding to the green subpixel G is also a second track shape. The first light-transmitting aperture 1311 and subpixel apertures of the other subpixels in this example are the same as in Figures 9 and 10 and will not be described in detail here.

[0076] For example, in some cases, as shown in Figures 9-11B, one red subpixel R, two green subpixels G, and one blue subpixel B constitute one pixel unit, and multiple pixel units composed of multiple subpixels are arranged in an array on the base substrate 101. For example, in some other embodiments, one red subpixel R, one green subpixel G, and one blue subpixel B may constitute one pixel unit, and multiple pixel units composed of multiple subpixels may be arranged in an array on the base substrate 101, and the embodiments of this disclosure do not limit the specific form of the pixel unit.

[0077] For example, Figure 12 shows a schematic plan view of a display substrate according to at least one embodiment of the present disclosure. As shown in Figure 12, in this example, one red subpixel R, two green subpixels G, and one blue subpixel B constitute one pixel unit, and the shapes of the first light-transmitting aperture 1131 of the black matrix layer, the subpixel aperture 1081 of the pixel definition layer, and the main body 1041 of the first electrode layer 104 corresponding to each subpixel are all elliptical (or mango-shaped).

[0078] For example, as shown in Figure 7, the first light-transmitting aperture 1131 that exposes the light-emitting device of the red subpixel includes opposing first arc-shaped edges RL1 and second arc-shaped edge RL2, and first tip RO1 and second tip RO2 located at the intersection of the first arc-shaped edge RL1 and the second arc-shaped edge RL2, with the first tip RO1 and the second tip RO2 facing each other, thereby forming a mango shape.

[0079] For example, the first light-transmitting aperture 1131 that exposes the light-emitting device of the blue subpixel includes opposing third arc-shaped edge BL1 and fourth arc-shaped edge BL2, and third tip BO1 and fourth tip BO2 located at the intersection of the third arc-shaped edge BL1 and the fourth arc-shaped edge BL2, with the third tip BO1 and fourth tip BO2 facing each other.

[0080] For example, the first light-transmitting aperture 1131 that exposes the light-emitting device of the green subpixel includes a fifth arc-shaped edge GL1 and a fifth tip GO1 located at one end of the fifth arc-shaped edge GL1.

[0081] In this configuration, the first light-transmitting aperture that exposes the light-emitting device of the red subpixel and the first light-transmitting aperture that exposes the light-emitting device of the blue subpixel both have two opposing tips, while the first light-transmitting aperture that exposes the light-emitting device of the green subpixel has only one tip. This configuration reduces the degree to which color separation occurs on the display substrate.

[0082] However, in the embodiments of this disclosure, the formed tip may not be pointed due to actual process precision and process errors, but the curvature of the tip will vary with respect to the curvature of the arcuate edge, for example, the curvature will change abruptly at the tip.

[0083] For example, as shown in Figure 6, the green subpixel aperture 12 of the pixel definition layer corresponding to the green subpixel G includes a sixth arc-shaped edge GL3 and a sixth tip GO3 located at one end of the sixth arc-shaped edge GL3, and as shown in Figure 12, the main body of the first electrode layer of the light-emitting device for the green subpixel includes a seventh arc-shaped edge GL4, and the seventh arc-shaped edge GL4 does not include a tip. By providing it in this way, the degree to which color separation occurs in the green subpixel of the display substrate can be reduced.

[0084] For example, as shown in Figure 12, the black matrix layer includes a plurality of second light-transmitting apertures 1132, and the drive circuit layer includes a plurality of light-transmitting sections 1020, where one second light-transmitting aperture 1132 corresponds to one light-transmitting section 1020, and in the corresponding second light-transmitting apertures 1132 and light-transmitting sections 1020, the planar size of the second light-transmitting aperture 1132 is less than the planar size of the light-transmitting section 1020 in a direction parallel to the surface of the base substrate 101. For example, in some examples, in the corresponding second light-transmitting apertures 1132 and light-transmitting sections 1020, the orthographic projection of the second light-transmitting aperture 1132 on the base substrate 101 and the orthographic projection of the light-transmitting section 1020 on the base substrate 101 overlap at least partially, for example, the orthographic projection of the second light-transmitting aperture 1132 on the base substrate 101 lies inside the orthographic projection of the light-transmitting section 1020 on the base substrate 101. As a result, as shown in Figures 3 and 5, the light ray L can pass sequentially from the display side (upper side in the figures) of the display board through the second light-transmitting opening 1132 and the light-transmitting section 1020 to reach the non-display side (lower side in the figures) of the display board, thereby allowing a photosensitive device (e.g., an image sensor) provided on the non-display side of the display board to perform a photosensitive operation.

[0085] For example, in some embodiments, as shown in Figure 12, the drive circuit layer 102 includes first signal lines S1 and second signal lines S2 that are provided parallel to each other and arranged periodically, and the first signal lines S1 and second signal lines S2 are configured to provide different electrical signals to a plurality of subpixels SP. For example, the orthographic projections of a plurality of second light-transmitting apertures 1132 on the base substrate 101 are each located between the orthographic projection of one first signal line S1 on the base substrate 101 and the orthographic projection of one second signal line S2 on the base substrate 101 that is closest to the first signal line S1.

[0086] For example, in some embodiments, the first signal line S1 is the light emission control line EMT, and the second signal line is the reset voltage line VNT, which will be described in detail later.

[0087] Furthermore, considering process errors and structural errors in actual production, the formed signal lines may not be straight lines, for example, they may have uneven parts. In the embodiments of this disclosure, "parallel to each other" means that the angle formed in the extension direction of the first signal line S1 and the second signal line S2 is within a range of 15 degrees, and they do not necessarily have to be strictly parallel.

[0088] For example, as shown in Figure 12, the drive circuit layer may further include third signal lines S3 and fourth signal lines S4 that are provided parallel to each other and arranged periodically, the third signal lines S3 and fourth signal lines S4 intersect, for example, perpendicular to the first signal line S1 and second signal line S2, respectively, and the third signal lines S3 and fourth signal lines S4 are configured to provide different electrical signals to a plurality of subpixels, and the orthographic projections of the plurality of second light-transmitting apertures 1032 on the base substrate 101 are each located between the orthographic projection of one third signal line S3 on the base substrate 101 and the orthographic projection of one fourth signal line S4 adjacent to the third signal line on the base substrate 101.

[0089] For example, in some embodiments, the third signal line S3 is the first power line VDD1, and the fourth signal line S4 is the data line DT, which will be described in detail later.

[0090] For example, as shown in Figure 12, the first signal line S1, the second signal line S2, the third signal line S3, and the fourth signal line S4 define a plurality of first regions RG, i.e., the regions enclosed by the dashed lines in the figure, and the orthographic projections of the plurality of second light-transmitting apertures 1032 on the base substrate 101 are each located within the orthographic projections of the plurality of first regions RG on the base substrate 101.

[0091] For example, Figure 13 shows a schematic plan view of a portion of the black matrix layer and color film layer of a display substrate, and also shows schematic plan views of a plurality of first light-transmitting apertures 1131, a plurality of second light-transmitting apertures 1132, and a plurality of color film patterns 1141. As shown in Figure 13, in a direction perpendicular to the surface of the base substrate 101, the plurality of color film patterns 1141 include a first color film pattern 1141A that at least partially overlaps the light-emitting device of a first subpixel (e.g., a red subpixel), and a second color film pattern 1141B that at least partially overlaps the light-emitting device of a second subpixel (e.g., a green subpixel). In a direction parallel to the surface of the base substrate 101, the planar shape of the first color film pattern 1141A is different from the planar shape of the second color film pattern 1141B, and the area of ​​the first color film pattern 1141A is larger than the area of ​​the second color film pattern 1141B.

[0092] For example, as shown in Figure 13, the planar shape of the first color film pattern 1141A is approximately rectangular, for example, a rectangle with a notch, and the planar shape of the second color film pattern 1141B is approximately semi-elliptical. For example, the areas of the first color film pattern 1141A and the second color film pattern 1141B are each larger than the area of ​​the first light-transmitting opening 1131 that covers them, thereby achieving sufficient filtering.

[0093] For example, in some cases, the ratio of the area of ​​the first color film pattern 1141A to the area of ​​the second color film pattern 1141B is in the range of (1 to 1.5):1, such as 1.2:1 or 1.4:1.

[0094] For example, as shown in Figure 13, in a direction perpendicular to the surface of the base substrate 101, the multiple color film patterns 1141 further include a third color film pattern 1141C that at least partially overlaps with the light-emitting device of the third subpixel (e.g., blue subpixel). In a direction parallel to the surface of the base substrate 101, the planar shape of the third color film pattern 1141C differs from the planar shapes of the first color film pattern 1141A and the second color film pattern 1141B, and the area of ​​the third color film pattern 1141C is larger than the area of ​​the first color film pattern 1141A and the second color film pattern 1141B. For example, the planar shape of the third color film pattern 1141C is irregular, thereby effectively realizing a filtering effect.

[0095] For example, in some embodiments, the ratio of the area of ​​the first color film pattern 1141A, the area of ​​the second color film pattern 1141B, and the area of ​​the third color film pattern 1141C is in the range of (1~1.5):1:(1~1.6), such as 1.2:1:1.1 or 1.4:1:1.3.

[0096] For example, as shown in Figure 13, in a direction perpendicular to the surface of the base substrate 101, the multiple color film patterns 1141 further include a fourth color film pattern 1141D that at least partially overlaps with the light-emitting device of the fourth subpixel (e.g., a green subpixel). In a direction parallel to the surface of the base substrate 101, the planar shape of the fourth color film pattern 1141D is approximately the same as the planar shape of the second color film pattern 1141B, and the area of ​​the fourth color film pattern 1141D is approximately equal to the area of ​​the second color film pattern 1141D.

[0097] For example, the planar shape of the fourth color film pattern 1141D is approximately semi-elliptical, and its area is approximately equal to the area of ​​the second color film pattern 1141D. For example, the difference between the area of ​​the fourth color film pattern 1141D and the area of ​​the second color film pattern 1141D is 10% or less of the area of ​​the second color film pattern 1141D.

[0098] In the embodiments of this disclosure, the black matrix layer 113 absorbs light rays incident on the display substrate, reducing the reflectivity of ambient light by the display substrate and improving the display effect of the display substrate. By covering the black matrix layer 113 with a color film layer 114, the color film layer 114 can perform secondary absorption of light rays incident on the display substrate, thereby further reducing the reflectivity of ambient light by the display substrate and improving the display effect of the display substrate. Tests were conducted on a plurality of color film patterns 1141 shown in Figure 13, and it was found that when the plurality of color film patterns 1141 have the shape and size distribution shown in Figure 13, the plurality of color film patterns 1141 can sufficiently achieve filtering and light reflection effects, improving the display effect of the display substrate.

[0099] For example, in some embodiments, as shown in Figure 13, the fourth color film pattern 1141D and the fourth photon aperture 1132D partially overlap in a direction perpendicular to the surface of the base substrate 101.

[0100] For example, in some cases, as shown in Figure 13, the horizontal size 1141A~1 of the first color film pattern 1141A corresponding to the first subpixel P1 is 27μm~33μm, for example 28μm, 29μm or 30μm, and the vertical size 1141A~2 is 30μm~35μm, for example 32μm, 33μm or 34μm, and the horizontal size 1141B~1 of the second color film pattern 1141B corresponding to the second subpixel P2 is 20μm~25μm, for example 21μm, 22μm or 23μm, and the vertical size 1141B~2 is 23μm~28μm, for example 25μm or 26μm. Or 27 μm, for example, the horizontal size 1141C~1 of the third color film pattern 1141C corresponding to the third subpixel P3 is 32 μm~38 μm, for example 34 μm, 35 μm or 36 μm, and the vertical size 1141C~2 is 35 μm~45 μm, for example 38 μm, 40 μm or 42 μm, for example, the horizontal size 1141D~1 of the fourth color film pattern 1141D corresponding to the fourth subpixel P4 is 20 μm~25 μm, for example 21 μm, 22 μm or 23 μm, and the vertical size 1141D~2 is 23 μm~28 μm, for example 25 μm, 26 μm or 27 μm.

[0101] For example, in some embodiments, the minimum distance between the edges of multiple color film patterns 1141 and the edges of multiple second light-transmitting apertures 1132 is 1 μm to 5 μm. For example, as shown in Figure 13, for at least some adjacent color film patterns 1141 and second light-transmitting apertures 1132, there is a gap between the color film patterns 1141 and the second light-transmitting apertures 1132, and the minimum distance between the edges of the color film patterns 1141 and the edges of the second light-transmitting apertures 1132 is 1 μm to 5 μm, thereby preventing the color film patterns 1141 from filtering the light that has passed through the second light-transmitting apertures 1132.

[0102] For example, as shown in Figures 13 and 8A, for one color film pattern 1141 and one subpixel aperture 1081 corresponding to the same subpixel, the planar shape of the color film pattern 1141 is different from the planar shape of the subpixel aperture 1081. For example, at least some of the edges of a plurality of second light-transmitting apertures 1132 are parallel to at least some of the edges of the adjacent color film pattern 1141. For example, in the area shown by the dashed frame in Figure 13, some of the edges of the second light-transmitting aperture 1132 are parallel to some of the edges of the adjacent color film pattern 1141.

[0103] The structure and circuit arrangement of each functional layer of the display substrate according to an embodiment of this disclosure will be described in detail below with reference to one specific example. In this example, the subpixels drive the light-emitting device EM using a 7T1C pixel driving circuit.

[0104] For example, Figure 14A shows a circuit diagram of a 7T1C pixel circuit. As shown in Figure 14A, the pixel circuit includes a drive circuit 122, a data writing circuit 126, a compensation circuit 128, a memory circuit 127, a first light emission control circuit 123, a second light emission control circuit 124, and a reset circuit 129.

[0105] For example, the drive circuit 122 includes a control terminal 131, a first terminal 132, and a second terminal 133, and is configured to control the drive current flowing through the light-emitting device EM. The control terminal 131 of the drive circuit 122 is connected to the first node N1, the first terminal 132 of the drive circuit 122 is connected to the second node N2, and the second terminal 133 of the drive circuit 122 is connected to the third node N3.

[0106] For example, the data writing circuit 126 includes a control terminal, a first terminal, and a second terminal, the control terminal being configured to receive a first scan signal, the first terminal being configured to receive a data signal, and the second terminal being connected to the first terminal 132 (second node N2) of the drive circuit 122 and configured to write the data signal to the first terminal 132 of the drive circuit 122 in response to the first scan signal Ga1. For example, the first terminal of the data writing circuit 126 is connected to the data line 12 to receive the data signal, and the control terminal is connected to the scan line 11 to receive the first scan signal Ga1.

[0107] For example, during the data writing phase, the data writing circuit 126 can be turned on in response to the first scanning signal Ga1, thereby writing the data signal to the first terminal 132 (second node N2) of the drive circuit 122 and storing the data signal in the storage circuit 127. This allows, for example, during the light emission phase, to generate a drive current that drives the light emission of the light-emitting device EM according to the data signal.

[0108] For example, the compensation circuit 128 includes a control terminal, a first terminal and a second terminal, the control terminal is configured to receive a second scanning signal Ga2, the first terminal and the second terminal are electrically connected to the control terminal 131 and the second terminal 133 of the drive circuit 122, respectively, and the compensation circuit is configured to perform threshold compensation on the drive circuit 120 in response to the second scanning signal.

[0109] For example, the memory circuit 127 is electrically connected to the control terminal 131 and the first voltage terminal VDD of the drive circuit 122 and is configured to store the data signals written by the data writing circuit 126. For example, during the data writing and compensation phase, the compensation circuit 128 may be turned on in response to the second scanning signal Ga2, thereby allowing the data signals written by the data writing circuit 126 to be stored in the memory circuit 127. For example, simultaneously during the data writing and compensation phase, the compensation circuit 128 may be electrically connected to the control terminal 131 and the second terminal 133 of the drive circuit 122, thereby allowing the memory circuit to also store relevant information about the threshold voltage of the drive circuit 122, thereby allowing the drive circuit 122 to be controlled using the stored data signals and threshold voltage during the light emission phase, thereby compensating the output of the drive circuit 122.

[0110] For example, the first light emission control circuit 123 is connected to the first terminal 132 (second node N2) and the first voltage terminal VDD of the drive circuit 122, and is configured to apply the first power supply voltage of the first voltage terminal VDD to the first terminal 132 of the drive circuit 122 in response to the first light emission control signal. For example, as shown in Figure 14A, the first light emission control circuit 123 is connected to the first light emission control terminal EM1, the first voltage terminal VDD, and the second node N2.

[0111] For example, the second light emission control circuit 124 is connected to the second light emission control terminal EM2, the first terminal 510 of the light emission device EM, and the second terminal 132 of the drive circuit 122, and is configured to apply a drive current to the light emission device EM in response to the second light emission control signal.

[0112] For example, during the light emission phase, the second light emission control circuit 123 turns on in response to the second light emission control signal provided by the second light emission control terminal EM2, thereby allowing the drive circuit 122 to apply a drive current to the light-emitting device EM via the second light emission control circuit 123 to cause it to emit light. During the non-light emission phase, the second light emission control circuit 123 turns off in response to the second light emission control signal, thereby preventing current from flowing through the light-emitting device EM and causing it to emit light, and improving the contrast of the corresponding display device.

[0113] For example, during the initialization phase, the second light emission control circuit 124 can be turned on in response to the second light emission control signal, thereby enabling a reset operation on the drive circuit 122 and the light emission device EM in combination with the reset circuit.

[0114] For example, the second light emission control signal EM2 may be the same as or different from the first light emission control signal EM1, and they may be connected to the same or different signal output terminals.

[0115] For example, the reset circuit 129 is connected to the reset voltage terminal Vinit and the first terminal 134 (fourth node N4) of the light-emitting device EM, and is configured to apply a reset voltage to the first terminal 134 of the light-emitting device EM in response to a reset signal. In some other examples, as shown in Figure 14A, the reset signal may also be applied to the control terminal 131 of the drive circuit, i.e., the first node N1. For example, the reset signal may be the second scan signal, and the reset signal may be any other signal synchronized with the second scan signal, and the embodiments of this disclosure are not limited thereto. For example, as shown in Figure 14A, the reset circuit 129 is connected to the first terminal 134, the reset voltage terminal Vinit, and the reset control terminal Rst (reset control line) of the light-emitting device EM, respectively. For example, during the initialization phase, the reset circuit 129 may be turned on in response to a reset signal, thereby applying a reset voltage to the first terminal 134 and the first node N1 of the light-emitting device EM, thereby performing a reset operation on the drive circuit 122, the compensation circuit 128, and the light-emitting device EM, and removing the effects of the previous light-emitting phase.

[0116] For example, the light-emitting device EM includes a first terminal 134 and a second terminal 135, wherein the first terminal 134 of the light-emitting device EM is configured to receive a drive current from the second terminal 133 of the drive circuit 122, and the second terminal 135 of the light-emitting device EM is configured to be connected to a second voltage terminal VSS. For example, in one example, as shown in Figure 14A, the first terminal 134 of the light-emitting device EM may be connected to a third node N3 by a second light-emitting circuit 124. Embodiments of the present disclosure include, but are not limited to, this configuration. For example, the light-emitting device EM may be various types of OLEDs, such as top-emission, bottom-emission, and dual-emission, which can emit red light, green light, blue light, or white light, and the first and second electrode layers of the OLED function as the first terminal 134 and the second terminal 135 of the light-emitting device, respectively. Embodiments of the present disclosure do not limit the specific structure of the light-emitting device.

[0117] However, in the description of the embodiments of this disclosure, the first node N1, the second node N2, the third node N3, and the fourth node N4 do not necessarily represent actual existing components, but rather indicate the junction points where related circuits are connected in the circuit diagram.

[0118] In the description of the embodiments of this disclosure, the symbol Vd can not only indicate a data signal terminal but also the level of a data signal; similarly, the symbols Ga1 and Ga2 can not only indicate the first scan signal and the second scan signal, but also the first scan signal terminal and the second scan signal terminal; Rst can not only indicate a reset control terminal but also the reset signal; Vinit can not only indicate a reset voltage terminal but also the reset voltage; VDD can not only indicate a first voltage terminal but also the first power supply voltage; and VSS can not only indicate a second voltage terminal but also the second power supply voltage. The following embodiments are the same and will not be described in detail.

[0119] Figure 14B is a circuit diagram of a specific implementation example of the pixel circuit shown in Figure 14A. As shown in Figure 14B, the pixel circuit includes first to seventh transistors T1, T2, T3, T4, T5, T6, T7, and a memory capacitor Cst. For example, the first transistor T1 is used as a driving transistor, and the remaining second to seventh transistors are used as switching transistors.

[0120] For example, as shown in Figure 14B, the drive circuit 122 may be implemented as a first transistor T1. The gate of the first transistor T1 is connected to the first node N1 as the control terminal 131 of the drive circuit 122, the first pole of the first transistor T1 is connected to the second node N2 as the first terminal 132 of the drive circuit 122, and the second pole of the first transistor T1 is connected to the third node N3 as the second terminal 133 of the drive circuit 122.

[0121] For example, as shown in Figure 14B, the data writing circuit 126 may be implemented as a second transistor T2. The gate of the second transistor T2 is connected to the first scan line (first scan signal terminal Ga1) to receive the first scan signal, the first pole of the second transistor T2 is connected to the data line (data signal terminal Vd) to receive the data signal, and the second pole of the second transistor T2 is connected to the first terminal 132 (second node N2) of the drive circuit 122. For example, the second transistor T2 is a P-type transistor, and for example, the active layer is a thin-film transistor doped with polysilicon at low temperature.

[0122] For example, as shown in Figure 14B, the compensation circuit 128 may be implemented as a third transistor T3. The gate of the third transistor T3 is connected to the second scan line (second scan signal terminal Ga2) to receive the second scan signal, the first pole of the third transistor T3 is connected to the control terminal 131 (first node N1) of the drive circuit 122, and the second pole of the third transistor T3 is connected to the second terminal 133 (third node N3) of the drive circuit 122.

[0123] For example, as shown in Figure 14B, the memory circuit 127 may be implemented as a memory capacitor Cst, which includes a first capacitor electrode C1 and a second capacitor electrode C2, the first capacitor electrode C1 being connected to a first voltage terminal VDD and the second capacitor electrode C2 being connected to a control terminal 131 of the drive circuit 122.

[0124] For example, as shown in Figure 14B, the first light emission control circuit 123 may be implemented as a fourth transistor T4. The gate of the fourth transistor T4 is connected to the first light emission control line (first light emission control terminal EM1) to receive the first light emission control signal, the first pole of the fourth transistor T4 is connected to the first voltage terminal VDD to receive the first power supply voltage, and the second pole of the fourth transistor T4 is connected to the first terminal 132 (second node N2) of the drive circuit 122.

[0125] For example, the light-emitting device EM may be specifically implemented as a light-emitting diode (OLED), the first electrode layer (in this case, the anode) of which is connected to the fourth node N4 and configured to receive a drive current from the second terminal 133 of the drive circuit 122 by the second light-emitting control circuit 124, and the second electrode layer (in this case, the cathode) of the light-emitting device EM is connected to the second voltage terminal VSS and configured to receive the second power supply voltage. For example, the second voltage terminal may be grounded, i.e., VSS may be 0V.

[0126] For example, the second light emission control circuit 124 may be implemented as a fifth transistor T5. The gate of the fifth transistor T5 is connected to the second light emission control line (second light emission control terminal EM2) to receive the second light emission control signal, the first pole of the fifth transistor T5 is connected to the second terminal 133 (third node N3) of the drive circuit 122, and the second pole of the fifth transistor T5 is connected to the first terminal 134 (fourth node N4) of the light emission device EM.

[0127] For example, the reset circuit 129 may include a first reset circuit and a second reset circuit, the first reset circuit being configured to apply a first reset voltage Vini1 to a first node N1 in response to a first reset signal Rst1, and the second reset circuit being configured to apply a second reset voltage Vini2 to a fourth node N4 in response to a second reset signal Rst2. For example, as shown in Figure 14B, the first reset circuit is implemented as a sixth transistor T6, and the second reset circuit is implemented as a seventh transistor T7. The gate of the sixth transistor T6 is connected to a first reset control terminal Rst1 to receive the first reset signal Rst1, the first pole of the sixth transistor T6 is connected to a first reset voltage terminal Vinit1 to receive the first reset voltage Vinit1, and the second pole of the sixth transistor T6 is connected to a first node N1. The gate of the seventh transistor T7 is connected to the second reset control terminal Rst2 to receive the second reset signal Rst2, the first pole of the seventh transistor T7 is connected to the second reset voltage terminal Vinit2 to receive the second reset voltage Vinit2, and the second pole of the seventh transistor T7 is connected to the fourth node N4.

[0128] The transistors used in the embodiments of this disclosure may be thin-film transistors, field-effect transistors, or other switching devices with the same characteristics, and in the embodiments of this disclosure, thin-film transistors will be used as examples. The source and drain of the transistors used here may have symmetrical structures, and therefore, their source and drain may have the same structure. In the embodiments of this disclosure, in order to distinguish between the two poles of the transistor excluding the gate, one is directly described as the first pole and the other as the second pole.

[0129] For example, as shown in Figure 12, the first signal line S1 is a light emission control line EMT, used to transmit the first light emission control signal EM1 and the second light emission control signal EM2, and the second signal line S2 is a reset voltage line VNT, used to transmit the first reset voltage Vinit1 and the second reset voltage Vini2. For example, on the side of the reset voltage line VNT away from the light emission control line EMT, there is further a reset control line RST, which is used to transmit the first reset signal Rst1 and the second reset signal Rst2.

[0130] The layout design of the above-mentioned pixel driving circuit will be described in detail below.

[0131] For example, Figure 15 shows a schematic diagram of the semiconductor layer of the display substrate, which is used to form the active layer of thin-film transistors T1 to T7 of the pixel driving circuits for multiple subpixels. Figure 12 shows the pixel driving circuits for two rows of subpixels. Hereafter, the explanation will be given using the pixel driving circuits for four directly adjacent subpixels (i.e., the first subpixel 100a, the second subpixel 100b, the third subpixel 100c, and the fourth subpixel 100d) as an example. The dashed lines in the figures indicate the region where the pixel driving circuits for each subpixel are located, and the embodiments of this disclosure are not limited to this layout.

[0132] For example, a first gate insulating layer is further provided on the semiconductor layer, and since it is not shown, the first gate insulating layer 1024 in Figure 3 or Figure 5 can be referenced.

[0133] For example, Figure 16A shows a schematic diagram of the first gate metal layer of a display substrate, which is provided on the first gate insulating layer, and Figure 16B shows a schematic diagram of the first gate metal layer and semiconductor layer of the display substrate stacked together.

[0134] For example, as shown in Figures 16A and 16B, the first gate metal layer includes multiple light emission control lines (EMT), multiple reset control lines (RST), multiple scan lines (GATE), and the first capacitor electrode C1 of multiple memory capacitors (Cst). For example, the portions of the light emission control lines (EMT), reset control lines (RST), scan lines (GATE), and the first capacitor electrode C1 of the memory capacitors (Cst) that overlap with the active layer of the thin-film transistors T1 to T7 constitute the gates of the thin-film transistors T1 to T7. Each of the multiple light emission control lines (EMT), multiple reset control lines (RST), and multiple scan lines (GATE) is electrically connected in a one-to-one correspondence with multiple rows of subpixels to provide the corresponding electrical signals.

[0135] For example, a second gate insulating layer is further provided on the first gate metal layer, and since it is not shown, the second gate insulating layer 1025 in Figures 3 and 5 can be referenced.

[0136] Figure 17A shows a schematic diagram of the second gate metal layer of the display substrate, which is provided on the second gate insulating layer, and Figure 17B shows a schematic diagram of the display substrate with the second gate metal layer, the first gate metal layer and the semiconductor layer stacked on top of each other.

[0137] For example, as shown in Figures 17A and 17B, the second gate metal layer includes a second capacitor electrode C2 of a memory capacitor Cst and a plurality of reset voltage lines VNT. The second capacitor electrode C2 of the memory capacitor Cst overlaps at least partially with the first capacitor electrode C1 to form a capacitor. The plurality of reset voltage lines VNT are electrically connected in a one-to-one correspondence to multiple rows of subpixels to provide the corresponding electrical signals.

[0138] For example, an interlayer insulating layer is further provided on the second gate metal layer, and although not shown, refer to the interlayer insulating layer 1026 in Figures 3 and 5.

[0139] Figure 18A shows a schematic diagram of the first source-drain metal layer of the display substrate, which is provided on an interlayer insulating layer. Figure 18B shows a schematic diagram of the display substrate with the first source-drain metal layer, second gate metal layer, first gate metal layer, and semiconductor layer stacked on top of each other.

[0140] As shown in Figures 18A and 18B, the first source-drain metal layer includes a plurality of first power lines VDD1. For example, each of the plurality of first power lines VDD1 is electrically connected in a one-to-one correspondence to a plurality of rows of subpixels to provide a first power supply voltage. For example, the first source-drain metal layer further includes a plurality of data lines DT. The plurality of data lines DT are electrically connected in a one-to-one correspondence to a plurality of rows of subpixels to provide data signals. For example, the first source-drain metal layer further includes a plurality of connecting electrodes CL, which are used to connect a second capacitor electrode C2 to the first electrode of a third transistor T3, or to connect a first electrode line VNT to a sixth transistor T6, or to connect a second electrode of a fifth transistor T5 to the first electrode layer of a light-emitting device, etc.

[0141] For example, a passivation layer and a planarization layer are further provided on the first source-drain metal layer, and although not shown, refer to the passivation layer 1027 and the planarization layer 1091 in Figures 3 and 5.

[0142] Figure 19A shows a schematic diagram of the second source-drain metal layer of the display substrate, which is provided on the planarization layer 1091. Figure 19B shows a schematic diagram of the display substrate with the second source-drain metal layer, the first source-drain metal layer, the second gate metal layer, the first gate metal layer, and the semiconductor layer stacked.

[0143] As shown in Figures 19A and 19B, the second source-drain metal layer includes a second power line VDD2, which is grid-like. For example, the second power line VDD2 is electrically connected to the first power line VDD1, contributing to a reduction in resistance in the power line, thereby reducing the voltage drop in the power line and contributing to the uniform transmission of the first power supply voltage to each sub-pixel of the display board. For example, the second source-drain metal layer may further include a connecting electrode 1043 used to connect the first electrode layer of the light-emitting device to the first pole of the first transistor T1. For example, in a direction perpendicular to the board surface of the base substrate, the second power line VDD2 at least partially overlaps with the main body 1042 of the first electrode layer 104.

[0144] For example, another planarization layer, namely a planarization layer 109, is provided on the second source-drain metal layer. Figure 20 shows a schematic plan view of the planarization layer, and as shown in conjunction with Figures 3 and 5, there are multiple vias VA within the planarization layer 109. In this case, the first electrode layer 104 is connected to the connecting electrode 1043 by vias VA within the planarization layer 109.

[0145] For example, multiple vias VA in the planarization layer 109 corresponding to multiple subpixels located in the same row do not lie on a single straight line. For example, as shown in Figure 20, one adjacent first subpixel (e.g., a red subpixel), one second subpixel (e.g., a green subpixel), one third subpixel (e.g., a blue subpixel), and one fourth subpixel (e.g., a green subpixel) located in the same row correspond to vias VA1 to VA4, respectively, and vias VA1 to VA4 do not lie on the same straight line.

[0146] By designing the multiple vias VA of the planarization layer 109 so that they are not on a single straight line, it is possible to avoid the wiring of the pixel driving circuit and form one large light-transmitting region, thereby forming a light-transmitting area of ​​sufficient size.

[0147] Figure 21A shows a schematic diagram of the first electrode material layer of the display substrate, which is provided on the passivation layer 109. Figure 21B shows a schematic diagram of the display substrate with the first electrode material layer, second source-drain metal layer, first source-drain metal layer, second gate metal layer, first gate metal layer, and semiconductor layer stacked on top of each other.

[0148] As shown in Figures 21A and 21B, the first electrode material layer includes the first electrode layers of multiple subpixel light-emitting devices EM, and each of the first electrode layers of the multiple subpixel light-emitting devices EM is connected to the connecting electrode 1043 by multiple vias VA in the planarization layer 109. For example, the light-emitting material layer of the light-emitting device EM is provided on the first electrode layer, and the second electrode layer is provided on the light-emitting material layer.

[0149] For example, other functional layers such as an encapsulation layer, a black matrix layer, and a protective cover plate 115 are further formed above the light-emitting device EM, which will not be described in detail here.

[0150] At least one embodiment of the present disclosure further provides a display device, Figure 22 showing a schematic cross-sectional view of the display device, which includes a display substrate according to an embodiment of the present disclosure, Figure 22 showing the display substrate shown in Figure 3 as an example.

[0151] For example, as shown in Figure 22, the display device further includes a patterned touch surface S and an image sensor array 30, where, for example, the surface of a protective cover plate 115 is realized as the patterned touch surface S. The image sensor array is provided on the side of the drive circuit layer 102 away from the light-emitting device layer and includes a plurality of image sensors 31 (one is shown as an example), which are configured to receive light emitted from a plurality of light-emitting devices EM in the light-emitting device layer and reflected by the pattern on the patterned touch surface S (e.g., fingerprint, palm print, etc.) in order to perform pattern acquisition.

[0152] For example, as shown in Figure 12, the black matrix layer includes a plurality of second light-transmitting apertures 1132, and the drive circuit layer includes a plurality of light-transmitting sections 1020, with one second light-transmitting aperture 1132 corresponding to one light-transmitting section 1020. In this configuration, the plurality of image sensors 31 are configured to receive light emitted from a plurality of light-emitting devices EM in the light-emitting device layer, reflected by the pattern on the pattern touch surface S, and passing through the plurality of second light-transmitting apertures 1132 in the black matrix layer and the plurality of light-transmitting sections 1020 in the drive circuit layer to reach the plurality of image sensors 31 in order to collect patterns. As a result, the plurality of image sensors 31 can sufficiently receive light reflected by the pattern through the plurality of second light-transmitting apertures 1132 and the plurality of light-transmitting sections 1020, thereby improving the pattern recognition speed and pattern recognition accuracy.

[0153] The display devices according to the embodiments of this disclosure may further have other structures, which can be specifically described by referring to related technologies and will not be described in detail here.

[0154] Furthermore, the following points need to be explained.

[0155] (1) The drawings of the embodiments of this disclosure relate only to structures relevant to the embodiments of this disclosure, and other structures should be referred to by the usual design.

[0156] (2) For clarity, in the drawings illustrating embodiments of the present disclosure, the thickness of layers or regions is enlarged or reduced, i.e., these drawings are not drawn to actual scale. To make it clear, when it is stated that an element such as a layer, film, region or substrate is located "above" or "below" another element, the element may be located "directly" above or below the other element, or an intermediate element may be present.

[0157] (3) New embodiments can be obtained by combining the embodiments and features of the embodiments herein, as long as they do not contradict each other.

[0158] While specific embodiments of this disclosure have been described above, the scope of protection of this disclosure is not limited thereto, and should be governed by the scope of protection of the claims.

Claims

1. A display substrate having a plurality of subpixels arranged in an array, comprising a base substrate, a drive circuit layer provided on the base substrate, a pixel definition layer provided on the side of the drive circuit layer away from the base substrate, a light-emitting device layer, and a black matrix layer provided on the side of the light-emitting device layer away from the base substrate, Each of the plurality of subpixels includes a pixel driving circuit provided in the driving circuit layer and a light-emitting device provided in the light-emitting device layer, and the pixel driving circuit is configured to drive the light-emitting device. The pixel definition layer includes a plurality of sub-pixel apertures, the light-emitting device includes a first electrode layer, a light-emitting material layer and a second electrode layer, which are stacked in order away from the base substrate, the pixel definition layer is provided on the side of the first electrode layer away from the base substrate, and the plurality of sub-pixel apertures each expose the first electrode layer of the light-emitting device of the plurality of sub-pixels. The black matrix layer has a plurality of first light-transmitting openings that expose the light-emitting devices of the plurality of subpixels in a direction perpendicular to the surface of the base substrate, and in a direction perpendicular to the surface of the base substrate, at least some of the plurality of subpixel openings correspond one-to-one with the plurality of first light-transmitting openings and at least partially overlap. The black matrix layer further has a plurality of second light-transmitting openings, each of which is provided between the plurality of first light-transmitting openings, and the drive circuit layer includes a plurality of light-transmitting sections. A display substrate in which at least some of the plurality of second light-transmitting openings are provided in a one-to-one correspondence with at least some of the plurality of light-transmitting portions, and in the corresponding second light-transmitting openings and light-transmitting portions, the planar size of the second light-transmitting opening is less than the planar size of the light-transmitting portion in a direction parallel to the surface of the base substrate.

2. The display substrate according to claim 1, wherein at least one of the plurality of first light-transmitting openings has an arc-shaped edge.

3. The display substrate according to claim 1, wherein, in a direction parallel to the surface of the base substrate, the planar shape of at least one of the plurality of first light-transmitting openings is elliptical, semi-elliptical, circular, semi-circular, track-shaped, or half-track-shaped.

4. The display substrate according to claim 1, wherein, in a direction parallel to the surface of the base substrate, the planar shape of at least one of the plurality of subpixel apertures is elliptical, semi-elliptical, circular, semi-circular, track-shaped, or half-track-shaped.

5. The display substrate according to any one of claims 1 to 4, wherein in a corresponding subpixel aperture and a first light-transmitting aperture, the planar shape of the subpixel aperture and the planar shape of the first light-transmitting aperture are the same in a direction parallel to the surface of the base substrate.

6. The display substrate according to claim 5, wherein the orthographic projection of the subpixel aperture on the base substrate is located within the orthographic projection of the first light-transmitting aperture on the base substrate.

7. The display substrate according to claim 6, wherein the minimum distance between the orthographic edge of the subpixel aperture on the base substrate and the orthographic edge of the first light-transmitting aperture on the base substrate is 1 μm to 3 μm.

8. The first electrode layer includes a main body and a connecting portion, the connecting portion is configured to be electrically connected to the pixel driving circuit, and at least a part of the main body is exposed by the sub-pixel aperture. The display substrate according to any one of claims 1 to 4, wherein the planar shape of the main body and the planar shape of the sub-pixel aperture are the same and circular in a direction parallel to the surface of the base substrate.

9. The display substrate according to claim 8, wherein the orthographic projection of the subpixel aperture on the base substrate is located within the orthographic projection of the main body on the base substrate.

10. The display substrate according to claim 9, wherein the minimum distance between the orthographic edge of the subpixel aperture on the base substrate and the orthographic edge of the main body on the base substrate is 1 μm to 5 μm.

11. The display substrate according to claim 10, wherein the orthographic projection of the first light-transmitting aperture, which is provided corresponding to the sub-pixel aperture, on the base substrate is located within the orthographic projection of the main body portion on the base substrate.

12. The display substrate according to claim 10, wherein the orthographic projection of the main body on the base substrate is located within the orthographic projection on the base substrate of the first light-transmitting aperture provided corresponding to the sub-pixel aperture.

13. A display substrate according to any one of claims 1 to 4, further comprising a color film layer, wherein the color film layer comprises a plurality of color film patterns, and each of the plurality of color film patterns is provided in the plurality of first light-transmitting openings.

14. The display substrate according to claim 1, wherein in the correspondingly provided second light-transmitting opening and light-transmitting portion, the orthographic projection of the second light-transmitting opening on the base substrate and the orthographic projection of the light-transmitting portion on the base substrate overlap at least partially.

15. The plurality of subpixels include red subpixels and green subpixels and blue subpixels. The first light-transmitting aperture that exposes the light-emitting device of the red subpixel is approximately elliptical in shape. The first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially elliptical, the length of the major axis of the second ellipse is less than the length of the major axis of the first ellipse, the length of the minor axis of the second ellipse is less than the length of the minor axis of the first ellipse, or the first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially semi-elliptical. The display substrate according to any one of claims 1 to 4, wherein the first light-transmitting aperture for exposing the light-emitting device of the blue subpixel is substantially third ellipse, the length of the major axis of the third ellipse is less than the length of the major axis of the first ellipse, and the length of the minor axis of the third ellipse is greater than the length of the minor axis of the first ellipse.

16. The first light-transmitting aperture that exposes the light-emitting device of the red subpixel includes a first arc-shaped edge and a second arc-shaped edge facing each other, and a first tip and a second tip located at the intersection of the first arc-shaped edge and the second arc-shaped edge, the first tip and the second tip facing each other, The first light-transmitting aperture that exposes the light-emitting device of the blue subpixel includes a third arc-shaped edge and a fourth arc-shaped edge facing each other, and a third tip and a fourth tip located at the intersection of the third arc-shaped edge and the fourth arc-shaped edge, the third tip and the fourth tip facing each other, The display substrate according to claim 15, wherein the first light-transmitting aperture for exposing the light-emitting device of the green subpixel includes a fifth arc-shaped edge and a fifth tip located at one end of the fifth arc-shaped edge.

17. The subpixel aperture corresponding to the green subpixel includes a sixth arc-shaped edge and a sixth tip located at one end of the sixth arc-shaped edge. The display substrate according to claim 16, wherein the main body of the first electrode layer of the light-emitting device of the green subpixel includes a seventh arc-shaped edge, and the seventh arc-shaped edge does not include a tip.

18. The plurality of subpixels include red subpixels and green subpixels and blue subpixels. The first light-transmitting aperture that exposes the light-emitting device of the red subpixel is substantially in the shape of a first track. The first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially a second track shape, the length of the major axis of the second track shape is less than the length of the major axis of the first track shape, the length of the minor axis of the second track shape is less than the length of the minor axis of the first track shape, or the first light-transmitting aperture that exposes the light-emitting device of the green subpixel is substantially a half-track shape. The display substrate according to any one of claims 1 to 4, wherein the first light-transmitting aperture for exposing the light-emitting device of the blue subpixel is substantially in the shape of a third track, the length of the major axis of the third track is less than the length of the major axis of the first track, and the length of the minor axis of the third track is greater than the length of the minor axis of the first track.

19. The display substrate according to claim 18, wherein one red subpixel, two green subpixels, and one blue subpixel constitute one pixel unit, and the plurality of pixel units composed of the plurality of subpixels are arranged in an array on the base substrate.

20. A display device comprising a display board according to any one of claims 1-19.

21. The invention further includes a patterned touch surface and an image sensor array, The display device according to claim 20, wherein the image sensor array is provided on the side of the drive circuit layer away from the light-emitting device layer and includes a plurality of image sensors, the plurality of image sensors are configured to receive light emitted from a plurality of light-emitting devices in the light-emitting device layer and reflected by the pattern on the pattern touch surface to reach the plurality of image sensors for pattern acquisition.

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