Method for receiving data 1 and data 0 signals transmitted from LTE and WiMAX base stations via microwave carrier amplitude modulation on a mobile terminal.

Abstract

This enables high-speed transmission of microwave wireless communication. [Solution] A method for synchronizing the clock of a mobile terminal by microwave carrier amplitude modulation sent from a base station, wherein a self-operating synchronous counter, which counts up to m*J with a clock that is J times the carrier frequency and outputs an output clock with the count value Y, is used when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers at the output of a microwave single-stage or double-stage amplifier, and all flipflops of the synchronous counter are cleared after a delay of 1 wavelength + δ, and the clock of the received data is obtained as the output clock.

Description

【Technical Field】 , , , , 【0003】 , , , , , , , , 【0001】 The present invention relates to a method for a mobile terminal to receive data 1 and data 0 signals by micro-carrier amplitude modulation sent from an LTE or WiMAX base station that is resistant to fading and does not use OFDMA. 【0002】 Conventional LTE handovers (Non-Patent Documents 1 and 2) were the same as IEEE 802.11b handovers. After selecting a radio channel, data packets were transmitted. Since access from a mobile node to an LTE base station is transmitted by CSMA / CD, a delay time was generated due to collisions. Therefore, the number of mobile terminals during LTE station switching was limited. After switching, communication was performed in a time slot given by the channel, so there were no collisions such as CSMA / CD, and the channel number limit was determined only by speed. In the OFDMA of Non-Patent Document 1, since the time frame for performing FFT is long, harmonics higher than the fundamental wave do not occur relatively. 【Prior Art Documents】 【Non-Patent Documents】 【0003】 【Non-Patent Document 1】 M. Vijayalakshmi, et al. “A Cross Layer Scheduling Algorithm in IEEE 802.16e WiMAX Standard to Support RTPS Traffic Class”, 2014 fourth International Conference on Communication Systems and Network Technologies, 07-09 April 2014 【Non-Patent Document 2】 RFC52, ‘’Mobile IPv6 Fast handovers over 802.16e networks,’’ 【Summary of the Invention】 [Problems that the invention aims to solve] 【0004】 Non-patent documents 1 and 2 are robust against fading due to the integration effect of the FFT, but they have the drawback of large handover delays when a mobile terminal accesses a new base station because they use CSMA / CD for L2 handover LTE access. OFMDA in Non-patent document 1 has the drawback that when the mobile terminal moves at high speed, the sampling points for the FFT cannot be determined, which can cause errors. Also, when there are many subcarriers, the computational complexity of the FFT increases. Furthermore, since only 2 bits can be transmitted per 20MHz subcarrier, it has the drawback of not being able to transmit high-speed bits. In addition, it has the drawback that the boundaries of the FFT window frame in the mobile terminal are difficult to determine. 【0005】 The object of the present invention is to provide a microwave 10 signal transmission method that is resistant to fading, which involves amplitude modulation of a continuous carrier wave of microwaves, sending it to a mobile terminal, and reconstructing the data at the receiving end without using FFT. [Means for solving the problem] 【0006】 The present invention has been made in view of the problems of the prior art described above, and the means of the present invention are shown from the first aspect to the fifteenth aspect of the present invention. The first aspect of the present invention is a method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, wherein, after a guard time from the output of an oscillator A that generates a microwave sinusoidal carrier, after L (L: natural number) consecutive wavelengths of the carrier wave, a signal obtained by adding a carrier-less signal for (mL) (m: natural number) wavelength intervals of the carrier wave and a continuous carrier wave for m wavelength intervals with the phases of the carrier waves aligned is used as bit 1 of the transmitted data, and a signal of a continuous carrier wave for m wavelength intervals is used as bit 0 of the transmitted data, and after a delimiter in which bits 1 and 0 are repeated after multiple consecutive bits 1 after multiple consecutive bits 1 after multiple consecutive bits 1, the transmitted data is This method for synchronizing the clock of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation is characterized by the following: a synchronous counter that operates autonomously when there is no clear signal input, counting up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y; when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers at the output of a one-stage or two-stage amplifier of microwaves received by the antenna, all flipflops of the synchronous counter are cleared after a delay of 1 wavelength + δ from the peak detection position, thereby obtaining the clock of the received data as the output clock. 【0007】 A second aspect of the present invention relates to a clock synchronization method for a mobile terminal receiving circuit of data 1 and data 0 signals transmitted from an LTE or WiMAX base station via microwave carrier amplitude modulation as described in the first aspect of the present invention, wherein when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers, the bandpass LCR filter output signal of the signal received by the antenna after the guard time is applied as Vin to the positive input terminal of the operational amplifier, the ground voltage is applied to the negative input terminal of the operational amplifier via resistor R1, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier to increase R2 / R1. The output voltage of a single-stage amplifier with a configuration of (Vin-0v)*R2 / R1+Vin is initially simply the first L wavelength signals after the guard time. This is a clock synchronization method for the receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that, when the voltage of the signal delayed by a delay line or delay circuit for a certain period of time changes from a state lower to a state higher than the voltage of the signal before the delay line or delay circuit, which is defined as t1,i (i: current position), the position of t1,i is determined to be the peak point of the L wavelength when the voltage obtained by subtracting the operational amplifier output voltage at t1,i from the operational amplifier output voltage at position t1,i-1 one wavelength earlier is approximately half the operational amplifier output voltage at position t1,i-2 two wavelengths earlier, or approximately half the operational amplifier output voltage at position t1,i-1 one wavelength earlier. 【0008】 A third aspect of the present invention relates to a method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in the first aspect of the present invention. When detecting the positive voltage peak of the amplitude of the Lth wavelength of the L continuous carrier waves, the first stage amplifier of the signal received by the antenna after the guard time, which has a carrier frequency filter, or a low-pass filter, or a high-pass filter, or simply an input signal inversion with a slight bias voltage, has a resistor and capacitor connected in parallel to the emitter and ground, a resistor and capacitor connected in parallel to the collector and the positive power supply, and a resistor and capacitor connected in parallel to the emitter and the positive power supply, and the collector output of an NPN transistor is connected to the biased second stage amplifier, or simply to the base of a PNP transistor with the base and positive power supply connected by a resistor, via a coupling capacitor, and the collector of the PNP transistor This is a clock synchronization method for a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station via microwave carrier amplitude modulation, characterized in that the collector connection point is connected to earth via a collector resistor, and the voltage at the collector connection point changes from a state where the voltage of the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after a guard time is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit, where t1,i (i: current position) is defined as the time when the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at position t1,i-1 one wavelength earlier is about half the voltage at position t1,i-2 two wavelengths earlier, or about half the voltage at position t1,i-1 one wavelength earlier. 【0009】 A fourth aspect of the present invention relates to a method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station via microwave carrier amplitude modulation, as described in the first aspect of the present invention. When detecting the positive voltage peak of the amplitude of the L-th wavelength of the L continuous carrier waves, a resistor and a capacitor are connected in parallel between the emitter of the first-stage amplifier with a 0 bias voltage for the input signal inversion of the signal received by the antenna after the guard time and the ground, and a resistor and a capacitor are connected in parallel between the collector and the positive power supply. The collector output of the npn transistor is directly connected to the base of the pnp transistor of the second-stage amplifier. The collector of the PNP transistor is connected to the ground through a collector resistor. When the voltage at the collector connection point changes from a state where the voltage of the signal that is initially simply the amplitude value signal of the first L wavelength signals after the guard time and is delayed by a fixed-time delay line or a delay circuit is lower than the voltage of the signal before the delay line or the delay circuit to a higher state, let this time be t1,i (i: current position). When the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at the position of t1,i-1 one wavelength before is about 1 / 2 of the collector voltage at the position of t1,i-2 two wavelengths before, or about 1 / 2 of the collector voltage at the position of t1,i-1 one wavelength before, and when the position of t1,i-1 is determined as the peak point of the L-th wavelength, the operation of taking the sampling value Vs of the peak of the L-th wavelength is repeated between multiple consecutive 1s before the delimiter. After multiple consecutive 1s before the delimiter after the 3 wavelength signals after the guard time, which are the same as t1,i of the first 3 wavelength signals after the guard time of the collector voltage of the pnp transistor of the second amplifier, when the voltage value obtained by subtracting the collector voltage at t1,i of the peak of the amplitude value of the 3 wavelengths after the delimiter from the collector voltage at the position of t1,i-1 one wavelength before is greater than ((1-k)*Vs / 2)*p (Vs: the sampling voltage value obtained by AD conversion in the section of multiple consecutive 1s before the delimiter of the peak of the L-th wavelength of the first L wavelengths after the guard time, k: the absolute value of the reflectance of the microwave with respect to the concrete due to the characteristic impedance of the concrete, 0.9 < p < 1), this is a clock synchronization method for the receiving circuit of the mobile terminal for the data 1 and data 0 signals modulated by the amplitude of the microwave carrier wave sent from the LTE and WIMAX base stations, characterized in that the peak of t1,i-1 is regarded as the peak of the L-th wavelength at this time. 【0010】 A fifth aspect of the present invention is a method for synchronizing the clock of a mobile terminal's receiving circuit with data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation. This method involves transmitting a signal obtained by adding a carrier-less signal for (mL) (m: natural number) wavelength intervals and a continuous carrier for m wavelength intervals, with the carrier phases aligned, from the output of an oscillator A that generates a microwave inverse-phase sinusoidal carrier, after a guard time, following L (L: natural number) wavelengths of the carrier wave, and then, as bit 1 of the transmitted data, and as bit 0 of the transmitted data, after a delimiter in which bits 1 and 0 are repeated after a plurality of consecutive bits 1, the transmitted data is transmitted as data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation. A clock synchronization method for a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, wherein a synchronous counter that operates autonomously when there is no clear signal input, counts up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y, and when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers at the output of a single-stage or double-stage amplifier of microwaves received by an antenna, all flipflops of the synchronous counter are cleared after a delay of 1 wavelength + δ from the peak detection position, thereby obtaining the clock of the received data as the output clock, wherein the clock of the received data is obtained as the output clock, When detecting a positively convex voltage peak at the amplitude of the Lth wavelength of the L continuous carrier waves, the bandpass LCR filter output signal Vin of the signal received by the antenna after the guard time is applied to the negative input terminal of the operational amplifier via resistor R1, the ground voltage is applied to the positive input terminal of the operational amplifier, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier. The output voltage of a single-stage amplifier with a configuration in which the resistance values ​​of R1 and R2 are large and R2 / R1 is large is Vin*R2 / R1. After the guard time, initially, the positive voltage of the potential difference between the signal and ground, which is the amplitude value of the first L wavelength signals delayed for a certain period of time by a delay line or delay circuit, is applied. This is a clock synchronization method for the receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that, when t1,i (i: current position) is the time when the op-amp output voltage at t1,i changes from a low state to a high state compared to the positive voltage of the signal before the delay line or delay circuit, the position of t1,i-1 is determined to be the peak point of the L wavelength when the voltage obtained by subtracting the op-amp output voltage at position t1,i-1 one wavelength earlier from the op-amp output voltage at position t1,i-2 two wavelengths earlier, or when the position of t1,i-1 one wavelength earlier is approximately half the op-amp output voltage at position t1,i-2, or approximately half the op-amp output voltage at position t1,i-1 one wavelength earlier. 【0011】 A sixth aspect of the present invention relates to a method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station using microwave carrier amplitude modulation, as described in any of the first or fifth aspects of the present invention. The method for synchronizing the clock of a mobile terminal's receiving circuit for data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation is characterized in that L is 2 or 3. 【0012】 A seventh aspect of the present invention relates to a method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in either the first or fifth aspect of the present invention. A method for synchronizing the clock of a mobile terminal's receiving circuit for data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that L is 2 or 3 and m is 4 or 8. 【0013】 The eighth aspect of the present invention is a method for receiving data 1 and data 0 signals transmitted by microwave carrier amplitude modulation from an LTE / WiMAX base station, wherein, after a guard time from the output of an oscillator A that generates a microwave sinusoidal carrier, after two consecutive wavelengths of the carrier, a signal obtained by adding a carrier-less signal in a carrier (m-2) (m: natural number) wavelength section and a continuous carrier in an m wavelength section is used as transmission data bit 1, and a signal of a continuous carrier in an m wavelength section is used as transmission data bit 0, and the packet data following a delimiter of bits 1010 after a plurality of consecutive bits 1 is... Using a self-operating synchronous counter that counts up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y, the collector output of the npn transistor of the first stage amplifier, which has a bias voltage with a small input signal inversion of the signal received by the antenna after the guard time, is connected via a coupling capacitor to the base of the pnp transistor of the second stage amplifier, with a resistor inserted between it and the power supply voltage, and the collector of the PNP transistor is connected to ground via a collector resistor, and the voltage at the collector connection point is the amplitude value of the first two wavelength signals after the guard time, which is then delayed for a certain period of time by a delay line or delay circuit. This method for receiving data 1 and data 0 transmitted from an LTE or WiMAX base station by microcarrier amplitude modulation is characterized by the following steps: when the voltage of the delayed signal changes from a lower state to a higher state compared to the voltage of the signal before the delay line or delay circuit, t1,i (i: current position) is defined as the time when the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at position t1,i-1 one wavelength earlier is approximately half the collector voltage at position t1,i-1 one wavelength earlier, the position t1,i-1 is determined to be the peak point of the second wavelength, all flip-flops of the synchronization counter are cleared, and the voltage Vs2 at position t1,i-1 is converted using AD conversion. 【0014】 A ninth aspect of the present invention is a sampling circuit applied to a method for receiving data 1 and data 0 transmitted by microcarrier amplitude modulation from an LTE or WiMAX base station described in the ninth aspect of the present invention, comprising: a second capacitor that samples the voltage Vi at the sampling time position of the current peak of the amplitude value peak of the wavelengths after the two wavelength signals after a guard time similar to t1,i of the two wavelength signals after the collector voltage of the pnp tone diaphragm of the second amplifier; and a first capacitor that samples the voltage Vi-1 at the sampling position of the wavelength amplitude value peak one wavelength prior to the sampling time position of the current peak, wherein at t1,i the sampling voltage Vi-1 of the first capacitor is applied to the positive input terminal of the second operational amplifier, and the voltage at the sampling time position of the current peak is sampled into the second capacitor, with the names of the first and second capacitors changed at t1,i, and the ground voltage is applied to the positive input terminal of the second operational amplifier via resistor R1, and the second operational amplifier A voltage equal to 1 / 4 of the output voltage of the second operational amplifier, configured with a resistor R1 inserted between the positive input terminal and output terminal of the amplifier, is applied to the positive input terminal of the first operational amplifier. The current peak voltage value Vi of the wavelength amplitude of the collector voltage of the pnp transistor of the second amplifier is input to the negative input terminal of the first operational amplifier via resistor R1. The output voltage at time t1,i of the first operational amplifier, configured with a resistor R1 of the same resistance value as the resistor, is (((Vi-1 This sampling circuit is characterized in that, when the output of a DA converter is added to the positive input terminal of a comparator ((1-k)*Vdws2 / 2)*0.9 (Vdws2: sampling voltage value of the peak of the second wavelength of the first two wavelengths after the guard time) which is input to the negative input terminal of the comparator, Vi-1 is determined to be the peak voltage of the second wavelength of the two-wavelength signal, and the data of its sampling value is determined to be bit 1 of the received data. 【0015】 A tenth aspect of the present invention is in the sampling circuit described in the ninth aspect of the present invention, when the data of the sampling value is determined to be bit 1 of the received data, it outputs a pre-signal (208) for clearing all flip-flops of the synchronization counter, and is a sampling circuit characterized by this. 【0016】 An eleventh aspect of the present invention is in the method for receiving data 1 and data 0 by microcarrier amplitude modulation sent from the LTE and WIMAX base stations described in the eighth aspect of the present invention, Regarding the two-wavelength signals after the first two-wavelength signals after the guard time, when the voltage obtained by subtracting the collector voltage at the position of t1,i of the signal detection position of the same type as t1,i of the first two wavelengths after the guard time from the collector voltage at the position of t1,i-1 one wavelength before is greater than (1 - k)Vdws2 / 2*p (k: absolute value of the reflectance of the microwave with respect to the concrete due to the characteristic impedance of the concrete, Vdws2: sampling voltage value of the peak of the second wavelength of the first two wavelengths after the guard time, 0.9 < p < 1), the peak at the position of t1,i-1 is determined to be the peak position of the second wavelength and is determined to be bit 1 of the received data. When it is not greater than (1 - k)Vdws2 / 2*p, it is determined to be a provisional bit 0 of the received data, and when it is determined to be bit 1 of the received data, and when the time after a delay of δ from t1,i falls within the specified count value of the synchronization counter, the step of clearing all flip-flops of the synchronization counter is a method for receiving data 1 and data 0 by microcarrier amplitude modulation sent from the LTE and WIMAX base stations to the mobile terminal, characterized by having this. 【0017】 A twelfth aspect of the present invention is in the method for receiving data 1 and data 0 by microcarrier amplitude modulation sent from the LTE and WIMAX base stations described in the eleventh aspect of the present invention, Within the specified count value of the synchronization counter, it is from (m*J - 2 to 0), and it is a receiving method of a mobile terminal for data 1 and data 0 signals by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station. 【0018】 A 13th aspect of the present invention is in the receiving method of a mobile terminal for data 1 and data 0 by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station described in the 8th aspect of the present invention, The counter value Y of the output clock output with the counter value Y is (mJ - 3), and it is a receiving method of a mobile terminal for data 1 and data 0 signals by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station. 【0019】 A 14th aspect of the present invention is in the receiving method of a mobile terminal for data 1 and data 0 by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station described in any one of the 8th aspect, 12th aspect, or 13th aspect of the present invention, The J is 8, and it is a receiving method of a mobile terminal for data 1 and data 0 signals according to the presence or absence of a microwave carrier wave sent from an LTE or WIMAX base station. 【0020】 A 15th aspect of the present invention is in the receiving method of a mobile terminal for data 1 and data 0 by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station described in any one of the 8th aspect, 12th aspect, or 13th aspect of the present invention, The m is 4 or 8, and it is a receiving method of a mobile terminal for data 1 and data 0 signals by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station. 【Advantages of the Invention】 【0021】 As described above, the present invention uses a self-operating synchronous counter that operates when there is no clear signal input. This counter receives the packet data following the delimiter at bits 1010 with an antenna, counts up to m*J with a clock that is J times the carrier frequency clock, and outputs an output clock with the count value Y. The collector output of the npn transistor of the first stage amplifier of the PNP transistor of the second stage amplifier is connected to the base of the PNP transistor of the second stage amplifier, and the PNP transistor is connected to the base of the PNP transistor. This method involves connecting the collector of the synchronous counter to ground via a collector resistor, and assuming that t1,i (i: current position) is the point when the voltage at the collector connection point changes from a state where the voltage of the signal, which is initially simply the amplitude value of the first two wavelength signals, is lower than the voltage of the signal before the delay line or delay circuit after a guard time, to a state where it is higher than the voltage of the signal before the delay line or delay circuit, then the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at the position t1,i-1 one wavelength earlier is approximately half the voltage at the position t1,i-1 one wavelength earlier, at which point t1,i-1 is determined to be the peak point of the second wavelength, all flip-flops of the synchronous counter are cleared, and the peak voltage Vs2 at the position t1,i-1 is AD converted and used for later threshold creation. This method has the advantage of being resistant to fading and also has the advantage of enabling high-speed bit transmission. [Brief explanation of the drawing] 【0022】 [Figure 1] This figure illustrates an example of a bit 1 transmission circuit for transmitting data with different microwave frequencies for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 2] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 3] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 4] This diagram illustrates the operation of the sampling circuit and the pre-clear signal transmission flow of the synchronization counter based on sampling value determination in the receiving circuit of a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 5] This diagram illustrates the operation of the sampling circuit and the pre-clear signal transmission flow of the synchronization counter based on sampling value determination in the receiving circuit of a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station transmitted from an LTE (WiMAX) station according to the first embodiment of the present invention. [Figure 6] This figure illustrates an example of operation for a wavelength amplitude value sampling method that uses a synchronous counter synchronized with a received data clock to receive signals that have passed through different wavelength filters for each microfrequency received by the antenna of the first embodiment of the present invention. [Figure 7] This figure illustrates an example of operational amplifier operation in which the sampling time and the maximum voltage time position of the input wavelength amplitude for detecting the wavelength amplitude value sampling method of the microwave receiving circuit of a mobile terminal in the first embodiment of the present invention are set to the point in time when the output signal changes from a negative voltage to a positive voltage by delaying the input signal of the operational amplifier. [Figure 8] A diagram illustrating an example of the operation of two operational amplifiers to determine the sampling time and the maximum voltage time position of the input wavelength amplitude for detecting the wavelength amplitude value sampling method of a microwave receiving circuit of a mobile terminal in the first embodiment of the present invention, by delaying the input signal of the operational amplifier so that the output signal changes from a negative voltage to a positive voltage. [Figure 9]A diagram illustrating an example of the operation of two comparators to determine the sampling time and the maximum voltage time position of the input wavelength amplitude for detecting the time position of transmission of a synchronization counter clear signal in the wavelength amplitude value sampling method of the microwave receiving circuit of a mobile terminal in the first embodiment of the present invention, by delaying the input signal of the comparator so that it becomes the time when the output signal changes from a negative voltage to a positive voltage. [Figure 10] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with different microwave frequencies for each base station, transmitted from an LTE (WiMAX) station according to a second embodiment of the present invention. [Figure 11] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to a third embodiment of the present invention. [Figure 12] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to a third embodiment of the present invention. [Figure 13] This figure illustrates an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data with a different microwave frequency for each base station, transmitted from an LTE (WiMAX) station according to a third embodiment of the present invention. [Modes for carrying out the invention] 【0023】 A first embodiment of the present invention will be explained with reference to Figures 1, 2, 3, 4, 5, 6, 7, 8, and 9. The microwave transmission circuit of the LTE station in Figure 1 of Example 1 will be described. In Figure 1, 215 is a digital sine carrier oscillator A, 216 is a high-level signal for the time other than the guard time to transmit a continuous carrier wave for the time other than the guard time, 217 is a circuit that outputs a high-level signal only for the 3-wavelength section to transmit bit 1 of the transmission data, which consists of a 3-wavelength signal with amplitude 2 in the first half of an 8-wavelength frame followed by a 5-wavelength continuous carrier section with amplitude 1, 222 is an AND circuit of the high output signal of 217 and the multi-level output of circuit 215, and 223 is 216 The high output signal of circuit 21 is ANDed with the multi-level output of circuit 21. 234 is a multi-level signal adder. 235 is a DA conversion circuit for the sum of the three-wavelength multi-level signal cut off from the output of the digital sine carrier oscillator and the multi-level signal of the continuous carrier. 218 is a high-power emitter-follower NPN bipolar transistor. 227 is a coaxial cable that transmits the signal to the antenna. 224 is a clock that is 8 times the carrier frequency. 225 is a 1 / 8 frequency divider. 226 is the carrier frequency clock. Bit 0 is a signal consisting only of an 8-wavelength continuous carrier. After a guard time, multiple continuous carriers are followed by multiple bits 1, then a delimiter consisting of repeating bits 1 and 0 is transmitted, followed by the transmission data. 【0024】 Next, the operation of Figure 1 will be explained. The digital sine wave generation memory 215 repeatedly generates a 1-wavelength digital sine wave. The AND circuit 222 adds the multi-level signals of the 3 wavelengths of the 5-wavelength section of the carrier (excluding the non-carrier section) and the multi-level signals of the continuous carrier (excluding the guard time) to the multi-level adder circuit 234, which adds the DC component of the bias voltage of transistor 218 to send AC amplitude signals of level 1 and level 2 to the DA converter 235. The output of the DA converter 235 is directly input to the base of the high-power bipolar transistor 218 and supplied as the emitter output to the transmitting antenna via coaxial cable 227. 【0025】 Next, Figure 2 shows a receiving circuit for microwave bit 1 and bit 0 signals transmitted from an LTE or WiMAX base station of a mobile or tablet device. In Figure 2, 20 is the antenna, 426 is an NMOS transistor preceded by an RC low-pass filter, 427 is a PMOS transistor, R29, Rb1, Rb2, R21, R0, R9, R10 are resistors, c21, c29 are capacitors, c22 is a coupling capacitor, 28 is another branch signal line, 102 is the output signal to the operational amplifier circuit for peak detection of the drain voltage of PMOS transistor 427, and 103 is the output signal to the sampling circuit. 【0026】 Next, the operation shown in Figure 2 will be explained. The carrier wave received by antenna 20 passes through a low-pass frequency filter composed of R29 and C29, and the resulting signal is input to the gate of an NMOS transistor 426, which is biased by Rb1 and Rb2 via coupling capacitor c22. Note that if the NMOS426 is a depletion type, biasing may not be necessary. Resistors R21 and C21 connected to the base of the NMOS426 form a high-pass frequency filter. This also provides negative voltage feedback to the gate input voltage. The wavelength signal received by the antenna is applied as the voltage across capacitor C29, and an AC voltage is applied between the gate of the NMOS426 and ground via coupling capacitor c22. At the connection point between the drain of the NMOS426 and the drain resistor R9, an amplified inverted signal of the signal received by the antenna appears, centered around the bias voltage. The bias voltage is cut off by coupling capacitor c22 between the drain of the NMOS426 and the gate of the PMOS427, and only the negative current of the AC signal is applied to the gate at a voltage lower than the power supply voltage due to the voltage drop across resistor R0. Therefore, the current due to the gate voltage vg of the PMOS427 flows only when the AC signal is negative, and the amplified current gm*vg flows through the drain resistor R10, and the voltage at the connection point of the drain resistor R10 of the PMOS427 becomes the waveform 102 in Figure 2. The output signal 102 becomes the output signal 102 to the operational amplifier circuit shown in Figures 7 and 8 and the output signal 103 to the sampling circuit shown in Figures 4 and 5. The drain voltage of the PMOS427 is as shown in waveform 102 in Figure 2. After the guard time, in the 3-wavelength section of data bit 1, only the positive voltage of level 2 of the wavelength signal received by the antenna appears, and in the following 5-wavelength section, only the positive voltage of level 1 of the continuous carrier appears. In the waveform 102 in Figure 2, the continuous carrier with amplitude 1 prior to the first 3 wavelengths of amplitude 2 after the guard time is not shown. Section (8) in the figure is the negative current section of the wavelength signal received by the antenna. The position of the maximum voltage at the peak of each wavelength amplitude is marked as P in the figure, and this is the sampling start point (59) of the voltage sampling circuit. The clear position of all flipflops of the synchronous counter 45 shown in Figure 6 is determined to be a point (δ delay position in the figure) that is delayed by a sampling time from point P, the position of the maximum voltage at the third wavelength amplitude of the 3-wavelength section, to point P of the first continuous carrier section of 5 wavelengths, which is delayed by 1 wavelength as shown in (3) in Figure 2, when it is determined that the difference between the voltage at point P and the voltage of the third wavelength of transmitted data bit 1 is greater than or equal to a certain value. The clear signal at this time is 206 in Figure 4, which is a pre-signal for creating the signal 57 that clears all the flip-flops of the synchronous counter 45 in Figure 6. The peak position of the third wavelength is detected by the operational amplifier circuit in Figures 7 and 8, and is one wavelength earlier than the peak position where the signal 206 in Figure 4 is located. Therefore, δ does not have to be a position delayed by one wavelength or more from the peak of the third wavelength, but rather a position delayed by the operating time of the sampling circuit from the peak point of the third wavelength. However, since there is a continuous carrier wave before the first three wavelengths after the guard time and the following three wavelengths, the time position for clearing the synchronous counter 45 is set to be a position delayed by δ from the peak position of the wavelength following the third wavelength in order to match the time position for clearing the synchronous counter 45 with the first three wavelengths after the guard time and the following three wavelengths. 【0027】 Next, Figure 3 shows a receiving circuit for microwave bit 1 and bit 0 signals transmitted from an LTE or WiMAX base station of a mobile terminal or tablet terminal. In Figure 3, 20 is the antenna, 26 is an NPN transistor preceded by an LCR bandpass filter, 27 is a PNP transistor, R20, R25, Rb1, Rb2, R0, R9, R10 are resistors, c20 is a capacitor, c22 is a coupling capacitor, L20 is an inductor, 28 is another branch signal line, 102 is the output signal to the operational amplifier circuit for peak detection of the collector voltage of the PNP transistor 27, and 103 is the output signal to the sampling circuit. 【0028】 Next, the operation shown in Figure 3 will be explained. The carrier wave received by antenna 20 passes through a bandpass resonant frequency filter composed of coil L20, resistors R20 and C20, and the resulting voltage, terminated by resistor R25, is input to the base of npn transistor 26, which is small-voltage biased by Rb1 and Rb2, via coupling capacitor c22. The wavelength signal received by the antenna flows as an AC current between the base of npn transistor 26 and ground. At the connection point between the collector of npn transistor 26 and collector resistor R9, an amplified inverted signal of the signal received by the antenna appears, centered around the bias voltage. The bias voltage is cut off by coupling capacitor c22 between the collector of npn transistor 26 and the base of pnp transistor 27, and only the negative current of the AC signal is applied at a voltage lower than the power supply voltage due to the voltage drop across resistor R0. Therefore, the current due to the base voltage vg of the PNP transistor 27 flows only when the AC signal is negative, and the amplified current gm*vg flows through the collector resistor R10, and the voltage at the connection point of the collector resistor R10 of the PNP transistor 27 becomes the waveform 102 in Figure 3. The output signal 102 becomes the output signal 102 to the operational amplifier circuit shown in Figures 7 and 8 and the output signal 103 to the sampling circuit shown in Figures 4 and 5. The waveform of 102 in Figure 1 is the same as in Figure 2, so we will omit the explanation. However, while the three wavelengths with amplitude 2 have the same frequency as the continuous carrier wave with amplitude 1, they are amplitude modulated. However, even when detected on the receiving end, no low-frequency components appear, so there are no sideband components. Therefore, the Q of the LCR resonator can be the same as that of a conventional carrier wave with amplitude 1, or even narrower in bandwidth because it is not modulated. There is a slight attenuation in the LCR resonator only for the first of the three wavelengths with amplitude 2. 【0029】 Next, Figure 4 shows the operation of the sampling circuit and the sampling decision flowchart. Figure 4 shows the operation from the first 3-wavelength interval after the guard time to the first wavelength interval of the subsequent 5-wavelength carrier-free interval. In Figure 4, 270, 290, and 291 are operational amplifier circuits, 271, 272, 274, and 289 are switches, 273 and 285 are capacitors, 276, 277, 279, 286, 287, R5, and R6 are resistors, 283 is a comparator, 284 is the output of comparator 283 and the Yes signal in flowchart 253, and 206 is a pre-signal that clears all flip-flops of the synchronous counter 45 in Figure 5. 【0030】 Let's explain the operation shown in Figure 4. The capacitance of capacitor 273 is set to approximately the time constant time determined by the resistance of capacitor 273 and switch 271 during the ON time of switch 271. Switch 271 takes the highest voltage value of the three wavelength peaks after the guard time into capacitor 243. The voltage Vi-1 of capacitor 273 (the peak voltage of the amplitude value of the wavelength one wavelength before the peak of the wavelength amplitude input to the negative terminal of op-amp 290) is connected to the positive terminal of op-amp 270, which has a high input impedance. The ground voltage is input to the negative terminal of op-amp 270 via resistor 280. Since resistor 279 with the same resistance value R1 as resistor 280 is connected between the negative terminal and the output terminal of op-amp 270, (Vi-1-0v)*1+Vi-1 appears at the output of op-amp 270. This voltage 2Vi-1 is divided into Vi-1 / 2 by resistors R3 and R4 with a resistance value of R3 / 3 and input to the positive terminal of op-amp 290. The negative terminal of op-amp 290 receives the peak voltage Vi of the collector output of the pnp transistor 22 shown in Figure 2 via resistor R1 of resistor 277, through switch 274 (the peak voltage of the amplitude value of the wavelength one wavelength after the peak of the wavelength amplitude input to the positive terminal of op-amp 270; the 3 in 3 wavelengths is not shown in the figure). Since resistor 276 with the same resistance value R1 as resistor 277 is connected between the negative terminal and the output terminal of op-amp 290, the output of op-amp 290 is (Vi-1 / 2-Vi)*1+Vi-1 / 2. The output voltage of op-amp 290 (Vi-1-Vi) is input to the positive terminal of comparator 283. Op-amp 291 operates similarly to op-amp 270, and the peak voltage V3i-2 (where 3 represents 3 wavelengths and i-2 represents the peak voltage two wavelengths before the peak voltage of the wavelength input to op-amp 270) is input to the positive input terminal of op-amp 290. The output of op-amp 291 is (V3i-2-0v)*1+V3i-2, and its output voltage 2*Vi-2 is divided by resistors R5 and R6 to 1 / 8 and input to the negative terminal of comparator 283. Comparator 283 compares voltages as shown in flowchart 253, and a high signal appears at output 284 when the conditions in diagram 253 are met.In this case, Vs3i-1 (where V represents voltage, S represents start, 3 represents the third wavelength, and i represents the sampling order) is the third wavelength of the first three wavelengths received by the mobile terminal after the guard time, Vdws3 (where dw represents the mobile terminal receiving waves directly from the LTE base station, S represents start, and 3 represents the third wavelength). When output 284 goes high, a pre-signal (206) is sent to clear all flip-flops of the synchronous counter 45 in Figure 6. 【0031】 Next, Figure 5 shows the operation of the sampling circuit and the sampling decision flowchart. Figure 5 shows the operation when there is a direct microwave wave up to the first wavelength section of a series of 3-wavelength and 5-wavelength continuous carrier sections following the first 3 wavelengths after the guard time. In Figure 5, 103 is the collector voltage of transistor 27 in Figure 3, 200 and 270 are operational amplifier circuits, 260 is a comparator, 201, 202, and 204 are switches, 203 is a capacitor, 205 is the output of operational amplifier 200, R1 and R3, and R4 in 206, 207, 209, and 210 are resistors, 262 is the output of comparator 260, 261 is a DA converter, and 263 is the Yes output signal of flowchart 260 which operates comparator 260, and is also 262. 208 is a pre-signal that clears all flip-flops of the synchronous counter in Figure 5. 【0032】 Next, the operation shown in Figure 5 is illustrated. The operation of op-amp 200 is similar to that of op-amp 290 in Figure 4. When the maximum peak voltage of the previous wavelength, Vi-1 / 2, is input to the positive terminal of op-amp 200, and the maximum peak voltage of the current wavelength or the sampling value Vi of the fading signal is input to the negative terminal via resistor R1, the output 205 will show (Vi-1 / 2-Vi)*1+Vi-1 / 2. This equation becomes ((1-k)Vs3-(1-k)Vs3 / 2=(1-k)Vs3 / 2) when fading is applied in the opposite phase, and ((1+k)Vs3-(1+k)*Vs3 / 2=(1+k)Vs3 / 2) when fading is applied in the correct phase. If fading is applied in the correct phase at bit 0 of the transmitted data, then (Vs3 / 2+Vs3*k-(Vs3 / 2+k*Vs3 / 2))=k*Vs3 / 2. (1+k)Vs3 / 2>(1-k)Vs3 / 2 and k*Vs3 / 2 < Since (1-k)Vs3 / 2, if (Vi-1 / 2-Vi)*1+Vi-1 / 2>((1-k)Vs3 / 2)*0.9, we know that Vi-1 is the third wavelength, so we set ((1-k)Vs3 / 2)*0.9 to the input of the DA conversion circuit 261. When the output of the comparator 260 is high, that is, when the flow chart 260 is Yes, it outputs bit 1 of the received data and also outputs a pre-signal 208 that clears all flip-flops of the synchronization counter 45 in Figure 6. If No, it outputs the temporary bit 0 of the received data. The temporary bit 0 of the received data is determined by the packet data detection circuit 52 to be whether it is real data or not by the data clock 54 in Figure 6. The input value setting for the DA converter is set so that k is the absolute value (0.42) of the reflectivity of microwaves to concrete due to the characteristic impedance of the concrete, and this is done when receiving multiple consecutive bits 1 transmission signals before the delimiter. 【0033】 Next, Figure 6 is a diagram illustrating an example of the operation of a synchronous counter that is clock-synchronized to the wavelength signal of the collector output signal 102 of transistor 27 in Figure 3. In Figure 6, 102 is the input signal, 41 is a clock that is J times the carrier frequency f (J=8), 45 is a synchronous counter with a self-sustaining counter value of 8J if there is no clear signal, 55 is a circuit that samples the maximum voltage value of the input signal wavelength using an operational amplifier built into the ASIC, 48 is the output clock (data clock) of the synchronous counter 45 (counter value 8J-3), 47 are the six bit lines indicating the counter value of the synchronous counter 45, 57 is a signal that clears all flip-flops constituting the synchronous counter, 54 is an 8-bit data clock, 51 is bit 1 or bit 0 of the regenerated data, 52 is a packet data detection circuit, and 59 is the sampling start signal. The sampling circuit 55 determines the guard time by observing that the sampled value is at ground voltage for a certain period of time or longer. The guard time is set to a value such that the wavelength signal immediately following the guard time is not affected by fading of about 1 μsec. After the guard time, the first wavelength must identify the beginning of the transmitted data, so multiple consecutive bits 1 before the delimiter signal containing the wavelength signal are used. The system clock is an example of a 2.4G multiplier clock with a frequency of approximately 4G microcarrier. Figure 6 shows an example where the synchronous counter 45, in Figures 1, 2, and 3, has a 3-wavelength signal followed by a 5-wavelength carrier wave interval. 【0034】 The output signal of the synchronous clock-generating asynchronous counter 45 is synchronized with the clock component of the input signal. If counter 45 is configured with a D-type flip-flop that can be cleared, it will count down from 8J-1 with a clock input, but for the sake of simplicity, it is explained as counting up. The circuit in Figure 6 is cleared each time there is a certain wavelength of the input signal at the 8J counter period, so there is no problem even if the mobile terminal moves at very high speeds. 【0035】 Unlike OFMDA, Figure 6 has the advantage of high-speed bit transmission because it quickly corrects the phase shift of the synchronization clock caused by the movement of the mobile terminal. Figure 5 considers the effect of fading when a direct wave is present. In Rayleigh fading without a direct wave, if we lock onto the fading with the shortest delay, if the wavelength amplitude of the second fading is added to the wavelength amplitude of the first fading in opposite phase, the signal will disappear and an error will occur. Therefore, when added in opposite phase, interpolation is used for audio and video signals. The system identifies an Ethernet frame from the playback data in Figure 6, reads the base station MAC address from the frame header, and if the MAC address is equal to the MAC address of a neighboring base station advertised by the source base station, the mobile terminal sends the base station MAC address to the source base station as the MAC address of the candidate destination base station. 【0036】 Figure 7 is a detailed operational example of the sampling circuit 55 in Figure 6. In Figure 7, 102 is the connection point of the collector resistor of transistor 27 in Figure 3. When a positive signal is input to the bipolar npn transistor 26 with a bias voltage in Figure 3, the potential of the collector resistor R9 drops below the bias point, an inverting signal is applied to the base of the pnp transistor 22, current flows from the emitter to the base, and an amplified current flows through the collector resistor R10, and the value of that resistance voltage is the signal that appears between the ground and the resistor. R1 of 101 is a resistor that sets the amplification value of the op-amp 100 to -1, 70 is a delay line with a constant delay time, and Rh of 71 and 73 is the input voltage V 'in' is a high resistor that applies Vin / 2 to the positive terminal of op-amp 100 via delay line 70. 104 is a comparator whose output changes from HIGH to LOW when the output of op-amp 100 decreases from the maximum peak voltage of the input signal wavelength. 105 is the output signal (t1 signal) of comparator 104. 107 is a differentiating circuit. 108 is a set-reset flip that is set with the counter value 8*8-2 (J=8) (109) of synchronous counter 45 and reset with the counter value 0 (110). Flop 111 is an AND gate between the Q output of set-reset flip-flop 108 and the output of the differential circuit 107, with a delay δ from the output of the delay circuit 118 and the NOT signal of the Q output of set-reset flip-flop 113, which is set at the end of the guard time, and the clear pre-signal 208 of the synchronous counter 45. 57 is the clear signal for all flip-flops of the synchronous counter 45 at t2, which is delayed by δ from t1 as shown in Figure 2. 113 is set at the guard time (continuous sampling value is 0) and the delay (116) signal of the output of the AND gate 114. The set-reset flip-flop that is set, 114 is a signal that clears the synchronous counter 45 at t2 in the first three wavelengths after the guard time by an AND gate between the output of the differentiator circuit 107 and the Q output of the set-reset flip-flop 113, 59 is the sampling start signal of the AND gate between the output of the differentiator circuit 107 and the NOT signal of the Q output of the set-reset flip-flop 113, and 122 is the first sampling start signal after the guard time of the AND gate between the output of the differentiator circuit 107 and the Q output of the set-reset flip-flop 113. 【0037】 Next, let's explain the operation shown in Figure 7. The input voltage 102 is applied to the positive terminal of the operational amplifier 100 with a delay of a certain time via the delay line 70. Therefore, if the voltage at the left input point of R1 before the delay line is lower than the voltage before the delay (the current voltage at the positive terminal), the output of the operational amplifier 100 will be a positive differential voltage. The comparator 104 outputs a signal that changes from HIGH to LOW, which is the inverted signal of the output signal that goes from negative to positive. The set-reset flip-flop 108 is set with the counter value 8J-2 (109) of the synchronous counter 45 and reset with the counter value 0 (110). By ANDing its Q output with the output of the delay circuit 118 of the differential circuit 107 with a delay time δ (δ in Figure 2), an AND circuit 111 is used to limit the time of the signal that clears all the flip-flops of the synchronous counter, preventing them from being cleared by the fading signal. The output signal 208 of the sampling value judgment flow in Figure 5 is also added to the input of the AND circuit 111, so the synchronous counter 45 is not cleared at the peak of the second wavelength of the three wavelengths, but is cleared with a delay of one wavelength after the peak of the third wavelength. The set-reset flip-flop 113 is set at the guard time (when the sampling value is detected as 0 for a certain period of time or longer). The output signal 115 of the AND circuit 114, which performs an AND operation between the Q output of the set-reset flip-flop 113 and the output of the delay circuit 118 (δ in Figure 2) of the differential circuit 107, and the pre-clear signal 206 (206 in Figure 3) of the synchronous counter 45, becomes the first clear signal after the guard time for all flip-flops of the synchronous counter 45 in Figure 6, without being time-limited at the peak of the first three wavelengths after the guard time. The output of the delay circuit 116 of the output of the AND circuit 114 resets the set-reset flip-flop 113, and the Q-bar signal is applied to the AND circuit 111, making it possible to clear the synchronous counter 45 at the peak of the input three wavelengths after the first three wavelengths after the guard time. 【0038】 Figure 8 is a different detailed operation diagram example of the sampling circuit 55 in Figure 6, as shown in Figure 7. In Figure 8, 78 is an operational amplifier, R2 of 76 and R2 / 3 of 75 are resistors that supply Vin / 2 (1 / 4 of the output voltage of operational amplifier 78, which is twice the input voltage Vin) to the positive terminal of operational amplifier 100, and 77 is a resistor that sets the output voltage of operational amplifier 78 to 2Vin. The operation of Figure 8 is the same as in Figure 7 except for operational amplifier 78, so the explanation is omitted. 【0039】 Next, Figure 9 is another detailed operation diagram example of the sampling circuit 55 in Figure 6, different from Figures 7 and 8. Figure 9 is an example in which the time position at which the collector voltage of the PNP transistor 27 in Figure 3 peaks is detected using two comparators and a delay line or delay circuit instead of an operational amplifier. In Figure 8, 301 and 302 are comparators, 300 and 303 are delay circuits, and 304 is an AND gate. The rest are the same as in Figure 7, so the operation explanation of the same parts will be omitted. 【0040】 Next, the operation of Figure 9 will be explained. The input signal 102 of the collector voltage of the PNP transistor 27 in Figure 3 is applied to the negative input terminal of comparator 301 and the positive input terminal of comparator 302. The output of the delay circuit 300 is applied to the positive input terminal of comparator 301 and the negative input terminal of comparator 302. Now, if the voltage of the wavelength amplitude value, which is the input signal 102 of the collector voltage of the PNP transistor 27 in Figure 3, is increasing, the positive input terminal voltage of comparator 302 becomes greater than the negative input terminal voltage, and the output of comparator 302 becomes positive. On the other hand, if the voltage of the wavelength amplitude value, which is the input signal 102 of the collector voltage of the PNP transistor 27 in Figure 3, is increasing, the positive input terminal voltage of comparator 301 becomes less than the negative input terminal voltage, and the output of comparator 302 becomes negative. When the voltage of the wavelength amplitude value, which is the input signal 102 of the collector voltage of the PNP transistor 27 in Figure 3, exceeds its peak and is decreasing, the positive input terminal voltage of comparator 301 becomes greater than the negative input terminal voltage, and the output of comparator 302 becomes positive. Therefore, by delaying the output of comparator 302 and applying the signals of the two comparators to the AND circuit 304, both signals will become high on either side of the peak, so the output of the AND circuit 304 will become high, and the time position of the peak of the signal wavelength amplitude value can be detected. 【0041】 Figure 10 is a diagram of an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data transmitted from an LTE (WiMAX) station with a different microwave frequency for each base station, according to the second embodiment of the present invention. The difference from Figure 2 of the first embodiment is that bit 1 of the transmission data is represented by a signal obtained by adding a continuous carrier wave of 4 wavelengths to a signal that consists of a 2-wavelength carrier wave followed by a 2-wavelength carrier wave interval, and bit 0 of the transmission data is represented by a 4-wavelength carrier wave interval signal. The operation is the same as in the first embodiment, except that the synchronization counter is a 4J counter value. The operation is almost the same as shown in Figures 1 to 9, except for Figure 3 of Embodiment 1, so the explanation is omitted. 【0042】 Figure 11 is a diagram of an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data transmitted from an LTE (WiMAX) station with a different microwave frequency for each base station, according to the third embodiment of the present invention. The difference from Figure 2 of the first embodiment is that bit 1 of the transmission data is represented by a signal obtained by adding an 8-wavelength continuous carrier wave to a signal that consists of a 2-wavelength carrier wave followed by a 6-wavelength carrier wave interval, and bit 0 of the transmission data is represented by an 8-wavelength carrier wave interval signal. The operation is the same as in the first embodiment, and the synchronization counter is an 8J counter value. The operation is almost the same as shown in Figures 1 to 9, except for Figure 3 of Embodiment 1, so the explanation is omitted. 【0043】 Figure 12 is a diagram of an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data transmitted from an LTE (WiMAX) station, each with a different microwave frequency for each base station, according to the third embodiment of the present invention. The difference from Figure 3 of the first embodiment is that bit 1 of the transmission data is represented by a signal obtained by adding an 8-wavelength continuous carrier wave to a signal that consists of a 2-wavelength carrier wave followed by a 6-wavelength carrier wave interval, and bit 0 of the transmission data is represented by an 8-wavelength carrier wave interval signal. Also, in Figure 12, an RC low-pass filter is used instead of the LCR band-pass filter in Figure 3, and a high-pass filter is used between the emitter of the npn transistor 26 and ground. The operation is the same as in the first embodiment, and the synchronization counter is an 8J counter value. The operation is almost the same as shown in Figures 1 to 9, excluding Figure 2 of Embodiment 1, so the explanation is omitted. 【0044】 Figure 13 is a diagram of an example of a receiving circuit for a mobile terminal that receives bit 1 of transmission data transmitted from an LTE (WiMAX) station with a different microwave frequency for each base station, according to the third embodiment of the present invention. The difference from Figure 3 of the first embodiment is that bit 1 of the transmission data is represented by a signal obtained by adding an 8-wavelength continuous carrier wave to a signal that consists of a 2-wavelength carrier wave followed by a 6-wavelength carrier wave interval, and bit 0 of the transmission data is represented by an 8-wavelength carrier wave interval signal. The operation is the same as in the first embodiment, and the synchronization counter is an 8J counter value. The operation is almost the same as shown in Figures 1 to 9, excluding Figure 2 of Embodiment 1, so the explanation is omitted. [Explanation of Symbols] 【0045】 20 antennas 26 NPN bipolar transistors preceded by an LCR bandpass frequency filter 27 pnp bipolar transistors 28 Other branch signal lines 102 Output signal to the operational amplifier of the collector voltage of transistor 22 103 Output signal to sampling circuit 206 Pre-signal to clear all flip-flops of the synchronous counter 45 in Figure 5 200,270 Op-amp circuits Switches 201, 202, 204 203 Capacitor 205 Output of Op-amp 200 206, 207, 209, 210 resistors 208 Pre-signal to clear all flip-flops of the synchronous counter in Figure 5 215 Digital sine carrier oscillator A 216 A high-level signal outside of the guard time to transmit a continuous carrier wave for the time other than the guard time. 217 A circuit that outputs a high-level signal only in the three-wavelength section in order to send bit 1 of the transmission data, which consists of a three-wavelength signal with amplitude 2 in the first half of an eight-wavelength frame, followed by a continuous carrier section with amplitude 1 and five wavelengths. 218 High-power emitter-follower NPN bipolar transistor AND gate between the high output signal of circuit 222 and 217 and the multi-level output of circuit 215. AND circuit between the high output signals of 223 and 216 and the multi-level output of circuit 21. 224 A clock with a frequency 8 times that of the carrier. 225 1 / 8 frequency divider 226 Carrier frequency clock 227 Coaxial cable that transmits signals to an antenna 234 Multi-level signal summer circuit 235 DA conversion circuit for the sum of the three-wavelength multi-level signal cut off from the output of a digital sine carrier oscillator and the multi-level signal of a continuous carrier. 260 Comparators 261 DA Converter Output of comparator 260 263 Flowchart 260 showing the operation of comparator 260, Yes output 270, 290, 291 Op-amp circuits 271, 272, 274, 289 switches 273,285 Capacitors 276, 277, 279, 286, 287 resistors 283 Comparator 284 Output of comparator 283 and the Yes signal in flowchart 253 426 NMOS transistors 427 PMOS transistors

Claims

[Claim 1] A method for synchronizing the clock of a mobile terminal's receiving circuit with data 1 and data 0 signals transmitted from an LTE / WiMAX base station, after a guard time from the output of an oscillator A that generates a microwave sine carrier wave, after L (L: natural number) consecutive wavelengths of the carrier wave, a signal obtained by adding a carrier-less signal for (m-L) (m: natural number) wavelength intervals of the carrier wave and a continuous carrier wave for m wavelength intervals with the carrier wave phases aligned is used as bit 1 of the transmitted data, and a signal of a continuous carrier wave for m wavelength intervals is used as bit 0 of the transmitted data, and after a delimiter in which bits 1 and 0 are repeated after multiple consecutive bits 1 after multiple consecutive bits 1 after multiple consecutive bits 1, the transmitted data is transmitted as data 1 and data 0 signals obtained by microwave carrier amplitude modulation sent from an LTE / WiMAX base station. A clock synchronization method for the receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station, characterized in that a synchronous counter, which operates autonomously when there is no clear signal input, counts up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y, clears all flipflops of the synchronous counter after a delay of 1 wavelength + δ from the peak detection position when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers at the output of a one-stage or two-stage amplifier of microwaves received by the antenna, and obtains the clock of the received data as the output clock. [Claim 2] When detecting a positively convex voltage peak at the amplitude of the Lth wavelength of the L continuous carrier waves, the bandpass LCR filter output signal of the signal received by the antenna after the guard time is applied as Vin to the positive input terminal of the operational amplifier, the ground voltage is applied to the negative input terminal of the operational amplifier via resistor R1, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier. The output voltage of a single-stage amplifier configured to increase R2 / R1 is (Vin-0v) * R2 / R1 + Vin. Initially, the voltage of the signal that is simply the amplitude value of the first L wavelength signals after the guard time is delayed for a certain period of time by a delay line or delay circuit. A method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 1, where t1,i (i: current position) is defined as the time when the voltage changes from a low state to a high state compared to the voltage of the signal, and the voltage obtained by subtracting the operational amplifier output voltage at t1,i from the operational amplifier output voltage at position t1,i-1 one wavelength earlier is approximately half of the operational amplifier output voltage at position t1,i-2 two wavelengths earlier, or approximately half of the operational amplifier output voltage at position t1,i-1 one wavelength earlier. [Claim 3] When detecting the positive voltage peak of the amplitude of the Lth wavelength of the L continuous carrier waves, the first stage amplifier of the signal received by the antenna after the guard time, which has a carrier frequency filter, or a low-pass filter, or a high-pass filter, or simply an input signal inversion with a slight bias voltage, has a resistor and capacitor connected in parallel to the emitter and ground, a resistor and capacitor connected in parallel to the collector and the positive power supply, and a resistor and capacitor connected in parallel to the emitter and the positive power supply, and the collector output of an NPN transistor is connected to the biased second stage amplifier, or simply to the base of a PNP transistor with the base and positive power supply connected by a resistor, via a coupling capacitor, and the collector of the PNP transistor is connected to the base, A clock synchronization method for a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station according to claim 1, characterized in that the circuit is connected to earth via a rectangular resistor, and the voltage at the collector connection point changes from a state where the voltage of the signal obtained by delaying the amplitude values ​​of the first L wavelength signals by a delay line or delay circuit for a certain period of time after a guard time is lower to a state where it is higher than the voltage of the signal before the delay line or delay circuit, where t1,i (i: current position) is defined as the time when the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at position t1,i-1 one wavelength earlier is about half the voltage at position t1,i-2 two wavelengths earlier, or about half the voltage at position t1,i-1 one wavelength earlier is determined to be the peak point of the L wavelength. [Claim 4] When detecting the positive voltage peak of the amplitude of the L-th wavelength of the L continuous carrier waves, a resistor and a capacitor are connected in parallel between the emitter of the first-stage amplifier with a 0-bias voltage for the input signal inversion of the signal received by the antenna after the guard time and the ground, and a resistor and a capacitor are connected in parallel between the collector and the positive power supply. The collector output of the npn transistor is directly connected to the base of the pnp transistor of the second-stage amplifier. The collector of the PNP transistor is connected to the ground via a collector resistor. When the voltage at the collector connection point is such that the voltage of the signal obtained by delaying the signal of the amplitude values of the first L wavelength signals, which is initially simply the signal after the guard time, by a certain time delay line or delay circuit is lower than the voltage of the signal before the delay line or delay circuit and then becomes higher, the time is set as t1,i (i: current position). When the voltage obtained by subtracting the collector voltage at the position of t1,i from the collector voltage at the position of t1,i-1 one wavelength before is about 1 / 2 of the collector voltage at the position of t1,i-2 two wavelengths before, or about 1 / 2 of the collector voltage at the position of t1,i-1 one wavelength before, and when the position of t1,i-1 is determined as the peak point of the L-th wavelength, the operation of setting the sampling value of the peak of the L-th wavelength as Vs is repeated between a plurality of consecutive bits 1 before the delimiter. After a plurality of consecutive bits 1 after the 3 wavelength signals after the guard time similar to the t1,i of the first 3 wavelength signals after the guard time of the collector voltage of the pnp transistor of the second amplifier, when the voltage value obtained by subtracting the collector voltage at the position of t1,i of the peak of the amplitude value of the 3 wavelengths after the delimiter from the collector voltage at the position of t1,i-1 one wavelength before is greater than ((1-k)*Vs / 2)*p (Vs: the sampling voltage value obtained by AD conversion in the section of a plurality of consecutive bits 1 before the delimiter of the peak of the L-th wavelength of the first L wavelengths after the guard time, k: the absolute value of the reflectivity of the microwave with respect to the concrete due to the characteristic impedance of the concrete, 0.9 < p < 1)), it is the time when the peak of t1,i-1 is regarded as the peak of the L-th wavelength. A clock synchronization method for a receiving circuit of a mobile terminal for data 1 and data 0 signals by microwave carrier wave amplitude modulation sent from an LTE or WIMAX base station according to claim 1, characterized in that... 【Claim 5】 A method for synchronizing the clock of a mobile terminal's receiving circuit with data 1 and data 0 signals transmitted from an LTE / WiMAX base station by microwave carrier amplitude modulation, after a guard time from the output of an oscillator A that generates a microwave inverse-phase sinusoidal carrier wave, after L (L: natural number) wavelengths of the carrier wave, a signal obtained by adding a carrier-less signal for (m-L) (m: natural number) wavelength intervals of the carrier wave and a continuous carrier wave for m wavelength intervals with the carrier wave phases aligned is used as bit 1 of the transmitted data, and a signal obtained by simply transmitting a continuous carrier wave for m wavelength intervals is used as bit 0 of the transmitted data, and after a delimiter in which bits 1 and 0 are repeated after a plurality of consecutive bits 1, the transmitted data is... A clock synchronization method for a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, wherein a synchronous counter that counts up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y, operates autonomously when there is no clear signal input, and when a positively convex voltage peak is detected at the amplitude of the Lth wavelength of the L consecutive carriers at the output of a single-stage or double-stage amplifier of microwaves received by an antenna, all flipflops of the synchronous counter are cleared after a delay of 1 wavelength + δ from the peak detection position, thereby obtaining the clock of the received data as the output clock, wherein the clock of the received data is obtained When detecting a positively convex voltage peak at the amplitude of the Lth wavelength of the L continuous carrier waves, the bandpass LCR filter output signal Vin of the signal received by the antenna after the guard time is applied to the negative input terminal of the operational amplifier via resistor R1, the ground voltage is applied to the positive input terminal of the operational amplifier, and a resistor R2 is used between the negative input terminal and the output of the operational amplifier. The output voltage of a single-stage amplifier with a configuration in which the resistance values ​​of R1 and R2 are large and R2 / R1 is large is Vin*R2 / R1. After the guard time, the positive voltage of the potential difference between the signal and ground, which is initially simply the amplitude value of the first L wavelength signals, and the signal delayed for a certain period of time by a delay line or delay circuit, is... A method for synchronizing the clock of a receiving circuit of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that, when t1,i (i: current position) is defined as the time when the voltage obtained by subtracting the operational amplifier output voltage at position t1,i-1 one wavelength earlier from the operational amplifier output voltage at position t1,i-2 two wavelengths earlier is about half the operational amplifier output voltage at position t1,i-2 two wavelengths earlier, or about half the operational amplifier output voltage at position t1,i-1 one wavelength earlier, the position t1,i-1 is determined to be the peak point of the L wavelength. [Claim 6] A method for synchronizing the clock of a receiving circuit of a mobile terminal receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, characterized in that L is 2 or 3, according to any one of claims 1 to 5. [Claim 7] A method for synchronizing the clock of a receiving circuit of data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 1 or claim 5, characterized in that L is 2 or 3 and m is 4 or 8. [Claim 8] A mobile terminal receives data 1 and data 0 signals transmitted from an LTE / WiMAX base station via microwave carrier amplitude modulation. This data is transmitted as data bit 1, after a guard time from the output of an oscillator A that generates a microwave sine carrier, followed by two consecutive wavelengths of the carrier, then a signal obtained by adding a carrier-less signal in a carrier (m-2) (m: natural number) wavelength section and a continuous carrier in an m wavelength section, and then a signal of a continuous carrier in an m wavelength section, followed by data bit 0. The packet data, which follows a delimiter of bits 10 and 10 after multiple consecutive bits 1, is as follows: Using a self-operating synchronous counter that counts up to m*J with a clock that is J times the carrier frequency clock and outputs an output clock with the count value Y, the collector output of the npn transistor of the first-stage amplifier, which has a bias voltage with a small input signal inversion of the signal received by the antenna after the guard time, is connected via a coupling capacitor to the base of the pnp transistor of the second-stage amplifier, with a resistor inserted between it and the power supply voltage, and the collector of the PNP transistor is connected to ground via a collector resistor, and the voltage at the collector connection point is, after the guard time, initially simply the amplitude value of the first two wavelength signals, and is delayed for a certain period of time by a delay line or delay circuit A method for receiving data 1 and data 0 transmitted from an LTE or WiMAX base station by microcarrier amplitude modulation, characterized in that, when the voltage of the delayed signal changes from a lower state to a higher state compared to the voltage of the signal before the delay line or delay circuit, which is defined as t1,i (i: current position), if the voltage obtained by subtracting the collector voltage at t1,i from the collector voltage at position t1,i-1 one wavelength earlier is about half the collector voltage at position t1,i-1 one wavelength earlier, the position t1,i-1 is determined to be the peak point of the second wavelength, all flipflops of the synchronization counter are cleared, and the voltage Vs2 at position t1,i-1 is converted using AD conversion. [Claim 9] A sampling circuit applied to a method for receiving data 1 and data 0 transmitted by microcarrier amplitude modulation from an LTE or WiMAX base station as described in claim 8, comprising: a second capacitor that samples the voltage Vi at the sampling time position of the current peak of the amplitude value peak of the wavelengths after the two wavelengths of the two wavelengths of the signal after a guard time similar to t1,i of the two wavelengths of the signal after a guard time of the collector voltage of the pnp tone diaphragm of the second amplifier; and a first capacitor that samples the voltage Vi-1 at the sampling position of the wavelength amplitude value peak one wavelength prior to the sampling time position of the current peak, wherein at t1,i the sampling voltage Vi-1 of the first capacitor is applied to the positive input terminal of the second operational amplifier, and the voltage at the sampling time position of the current peak is sampled into the second capacitor, the names of the first and second capacitors are changed at t1,i, and an earth voltage is applied to the positive input terminal of the second operational amplifier via resistor R1, and the positive input terminal of the second operational amplifier A voltage equal to 1 / 4 of the output voltage of the second operational amplifier, configured with a resistor R1 inserted between its input and output terminals, is applied to the positive input terminal of the first operational amplifier. The current peak voltage value Vi of the wavelength amplitude of the collector voltage of the pnp transistor of the second amplifier is input to the negative input terminal of the first operational amplifier via resistor R1. The output voltage of the first operational amplifier at time t1,i, configured with a resistor R1 of the same resistance value as the resistor, is (((Vi-1) / A sampling circuit characterized in that, when the output of a DA converter is added to the positive input terminal of a comparator (2-Vi)*1+Vi-1 / 2) and the negative input terminal of the comparator ((1-k)*Vdws2 / 2)*0.9 (Vdws2: sampling voltage value of the peak of the second wavelength of the first two wavelengths after the guard time), Vi-1 is determined to be the peak voltage of the second wavelength of the two-wavelength signal, and the data of its sampling value is determined to be bit 1 of the received data. [Claim 10] The sampling circuit according to claim 9, characterized in that when the data of the sampling value is determined to be bit 1 of the received data, a pre-signal (208) for clearing all flip-flops of the synchronization counter is output. 【Claim 11】 Regarding the two-wavelength signals after the first two-wavelength signals after the guard time, when the voltage obtained by subtracting the collector voltage at the position of t1,i at the signal detection position of the same kind as t1,i of the first two wavelengths after the guard time from the collector voltage at the position of t1,i-1 of the previous wavelength is greater than (1 - k)Vdws2 / 2*p (k: absolute value of the reflectance of the microwave with respect to the concrete due to the characteristic impedance of the concrete, Vdws2: sampling voltage value of the peak of the second wavelength of the first two wavelengths after the guard time, 0.9 < p < 1), the peak at the position of t1,i-1 is determined to be the peak position of the second wavelength and is determined to be bit 1 of the received data. When it is not greater than (1 - k)Vdws2 / 2*p, it is determined to be the temporary bit 0 of the received data and is determined to be bit 1 of the received data. And when the time after a delay of δ from t1,i falls within the specified count value of the synchronization counter, the step of clearing all flip-flops of the synchronization counter The receiving method of the mobile terminal for data 1 and data 0 by microwave carrier amplitude modulation sent from the LTE and WIMAX base stations according to claim 8, characterized by having the above. 【Claim 12】 The receiving method of the mobile terminal for data 1 and data 0 signals by microwave carrier amplitude modulation sent from the LTE and WIMAX base stations according to claim 11, characterized in that within the specified count value of the synchronization counter is (from m*J - 2 to 0). 【Claim 13】 The receiving method of the mobile terminal for data 1 and data 0 signals by microwave carrier amplitude modulation sent from the LTE and WIMAX base stations according to claim 8, characterized in that the counter value Y of the output clock output with the counter value Y is (mJ - 3). 【Claim 14】 The receiving method of the mobile terminal for data 1 and data 0 signals by the presence or absence of the microwave carrier sent from the LTE and WIMAX base stations according to any one of claim 8, claim 12 or claim 13, characterized in that J is 8. 【Claim 15】 A method for receiving data 1 and data 0 signals transmitted from an LTE or WiMAX base station by microwave carrier amplitude modulation, as described in claim 8, claim 12, or claim 13, characterized in that m is 4 or 8.

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