Tactile presentation device

The tactile presentation device addresses high voltage requirements by using a circuit design with subcircuits and capacitors to control voltage, reducing costs and maintaining feedback quality.

JP2026097554APending Publication Date: 2026-06-16SHARP DISPLAY TECHNOLOGY CORP

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SHARP DISPLAY TECHNOLOGY CORP
Filing Date
2024-12-04
Publication Date
2026-06-16

AI Technical Summary

Technical Problem

Tactile presentation devices using piezoelectric elements require high voltages, leading to increased manufacturing costs due to the need for specialized driver ICs capable of handling these voltages.

Method used

A tactile presentation device with multiple unit regions, each equipped with a tactile presentation unit connected to a unit circuit comprising subcircuits with internal nodes, transistors, and capacitors, allowing control of voltage and current to reduce the required voltage levels.

Benefits of technology

Reduces manufacturing costs by enabling the use of general-purpose driver ICs and minimizing transistor damage, while maintaining effective tactile feedback control.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a tactile feedback device that can reduce manufacturing costs even when the tactile feedback unit requires a relatively high applied voltage. [Solution] The tactile presentation device has a plurality of unit regions in which the presentation of tactile sensations can be controlled independently of each other. The tactile presentation device comprises a tactile presentation unit provided in each unit region for presenting tactile sensations, and a unit circuit electrically connected to the tactile presentation unit for driving the tactile presentation unit. The unit circuit includes a plurality of subcircuits electrically connected in parallel to each other. Each subcircuit includes a first internal node and a first capacitor whose first end is electrically connected to the first internal node and whose second end is electrically connected to the tactile presentation unit. The tactile presentation device controls the voltage applied to the tactile presentation unit or the current flowing through the tactile presentation unit by controlling the potential of the first internal node of each subcircuit.
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Description

Technical Field

[0001] The present invention relates to a tactile presentation device.

Background Art

[0002] In recent years, tactile presentation devices (sometimes called "haptic devices") that can present a tactile sensation to a user have attracted attention and are being increasingly used in many applications such as medical, educational, entertainment, and remote operation. Several methods are known as tactile presentation devices.

[0003] A method of presenting a tactile sensation by applying vibration to a user, that is, a vibration stimulation method (hereinafter referred to as the "vibration method"), is one of the most promising techniques because of the small individual differences in the ease of feeling the tactile sensation and its excellent safety. A tactile presentation device using the vibration method is disclosed in, for example, Patent Document 1.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In a tactile presentation device using the vibration method, a tactile sensation is presented by generating vibration by an actuator while a specific part of the human body (for example, a finger) is in contact with the tactile presentation device. In this specification, a part that actually presents a tactile sensation in a tactile presentation device, such as an actuator in the vibration method, may be referred to as a "tactile presentation part". As the actuator, for example, a piezoelectric element (also called a piezo element) is used.

[0006] However, generally speaking, generating sufficiently strong vibrations using a piezoelectric element requires applying a high voltage of several tens of volts or more to the piezoelectric element. Providing multi-level tactile feedback requires a special driver IC capable of handling high voltages, thus increasing manufacturing costs.

[0007] Embodiments of the present invention have been made in view of the above-mentioned problems, and their object is to provide a tactile presentation device that can reduce manufacturing costs even when the tactile presentation unit requires a relatively high applied voltage. [Means for solving the problem]

[0008] This specification discloses haptic presentation devices as described in the following sections.

[0009] [Item 1] A tactile presentation device having multiple unit regions in which the presentation of tactile sensations can be controlled independently of each other, Each of the aforementioned plurality of unit regions is provided with a tactile presentation unit that presents tactile sensations, A unit circuit electrically connected to the tactile presentation unit and driving the tactile presentation unit, Equipped with, The unit circuit includes a plurality of subcircuits electrically connected in parallel to one another. Each of the aforementioned subcircuits is The first internal node and, A first capacitor having its first end electrically connected to the first internal node and its second end electrically connected to the tactile presentation unit, Includes, A tactile presentation device that controls the voltage applied to the tactile presentation unit or the current flowing through the tactile presentation unit by controlling the potential of the first internal node of each of the plurality of subcircuits.

[0010] [Item 2] Each of the aforementioned subcircuits is The second internal node, A first transistor having a data voltage with a predetermined amplitude applied to one of its source and drain, with the other source and drain electrically connected to the second internal node, A second transistor having a gate electrically connected to the second internal node, a drive voltage having an amplitude greater than the amplitude of the data voltage applied to one of the source and drain, and the other of the source and drain electrically connected to the first internal node, The tactile presentation device described in item 1, further including the following.

[0011] [Item 3] The tactile presentation device according to item 2, wherein each of the plurality of subcircuits further includes a second capacitor, the first end of which is electrically connected to the second internal node and the second end of which is electrically connected to the first internal node.

[0012] [Item 4] Each of the aforementioned subcircuits is The tactile presentation device according to item 2 or 3, further comprising a third transistor, one of which is electrically connected to the first internal node, and the other of which is electrically connected to a reference voltage source.

[0013] [Item 5] Each of the aforementioned subcircuits is A tactile presentation device according to item 2 or 3, which does not include a transistor for resetting the first internal node.

[0014] [Item 6] The aforementioned unit circuit is The tactile presentation device according to any one of items 2 to 5, further comprising a fourth transistor, one of which is electrically connected to the second terminal of the first capacitor of each of the plurality of subcircuits, and the other of which is electrically connected to a reference voltage source.

[0015] [Item 7] The first transistor of the plurality of sub - circuits is supplied with the data voltage from a common data voltage line, and the tactile presentation device according to any one of items 2 to 6.

[0016] [Item 8] The first transistor of the plurality of sub - circuits is supplied with the data voltage from mutually different data voltage lines, and the tactile presentation device according to any one of items 2 to 6.

[0017] [Item 9] The drive voltage supplied to the second transistor is a pulse voltage, The tactile presentation device according to any one of items 2 to 8, configured such that the frequency of the pulse voltage is variable.

[0018] [Item 10] Having a tactile presentation area including the plurality of unit areas, The tactile presentation area includes a plurality of areas in which the drive voltages supplied to the second transistor can be mutually different, and the tactile presentation device according to any one of items 2 to 9.

[0019] [Item 11] Each of the first transistor and the second transistor is an oxide semiconductor TFT including an oxide semiconductor layer, and the tactile presentation device according to any one of items 2 to 10.

[0020] [Item 12] The capacitance values of the first capacitors of the plurality of sub - circuits are the same as each other, and the tactile presentation device according to any one of items 1 to 11.

[0021] [Item 13] The capacitance values of the first capacitors of the plurality of sub - circuits are different from each other, and the tactile presentation device according to any one of items 1 to 11.

[0022] [Item 14] The plurality of sub - circuits included in the unit circuit are three or more sub - circuits, and the tactile presentation device according to any one of items 1 to 13.

[0023] [Item 15] The tactile presentation unit is, Vibrating layer and A first electrode and a second electrode are arranged to face each other via the vibrating layer, A tactile presentation device, including any of the items 1 through 14.

[0024] [Item 16] The tactile presentation device according to item 15, wherein the vibrating layer is a piezoelectric layer formed from a piezoelectric material.

[0025] [Item 17] The tactile presentation unit is a tactile presentation device according to any one of items 1 to 14, capable of presenting tactile sensations by electrical stimulation. [Effects of the Invention]

[0026] According to embodiments of the present invention, a tactile presentation device can be provided that can reduce manufacturing costs even when the tactile presentation unit requires a relatively high applied voltage. [Brief explanation of the drawing]

[0027] [Figure 1] This is a schematic block diagram showing a tactile presentation device 100 according to an embodiment of the present invention. [Figure 2] This is a diagram to explain the fingertip pad (fp). [Figure 3] This is a schematic plan view showing the tactile presentation element 1 of the tactile presentation device 100. [Figure 4] This figure shows the equivalent circuit of the unit region UR of the tactile presentation element 1. [Figure 5] This figure shows an example of the arrangement of data voltage lines DL and gate signal lines GL. [Figure 6] This graph shows the relationship between the presentation gradation and the applied voltage Vpz to the tactile presentation unit 10, for the case where Vp=62[V], Cpz=15[pF], and Cst=60[pF]. [Figure 7]This is a timing chart showing an example of the drive voltage Vp, gate signals S1, S2, S3, and initialization signal Sini. [Figure 8A] This is a diagram illustrating the operation of the tactile presentation device 100 (tactile presentation element 1). [Figure 8B] This is a diagram illustrating the operation of the tactile presentation device 100 (tactile presentation element 1). [Figure 8C] This is a diagram illustrating the operation of the tactile presentation device 100 (tactile presentation element 1). [Figure 9] This figure shows the relationship between the voltage Vpz applied to the tactile presentation unit 10 and the data writing period. [Figure 10] This figure shows the equivalent circuit of a unit region UR of the tactile presentation element 1A. [Figure 11] This figure shows an example of the arrangement of data voltage line DL and gate signal line GL in the tactile presentation element 1A. [Figure 12] This is a timing chart showing an example of the drive voltage Vp, gate signal S, and initialization signal Sini in the haptic feedback element 1A. [Figure 13] This figure shows the equivalent circuit of a unit region UR of the tactile presentation element 1B. [Figure 14] This graph shows the relationship between the presentation gradation and the applied voltage Vpz to the haptic presentation unit 10, for the case where Vp=62[V], Cpz=15[pF], and Cs'=60[pF] in the haptic presentation element 1B. [Figure 15] This figure shows the equivalent circuit of a unit region UR of the tactile presentation element 1C. [Figure 16] This is a timing chart showing an example of the drive voltage Vp, gate signal S, initialization signal Sini, and data voltage Vd in the haptic feedback element 1C. [Figure 17] This figure shows an example where the frequency of the pulsed voltage, which is the driving voltage Vp, changes. [Figure 18] This figure shows an example of an active region AR that includes multiple regions where the drive voltage Vp can be different from each other. [Figure 19]This figure shows another example of the active region AR, which includes multiple regions where the drive voltage Vp can differ from one another. [Figure 20] This figure shows an electrical stimulation type tactile presentation device 200. [Modes for carrying out the invention]

[0028] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following embodiments.

[0029] The haptic presentation device 100 according to an embodiment of the present invention will be described with reference to Figure 1. Figure 1 is a schematic block diagram showing the haptic presentation device 100. In addition to the haptic presentation device 100, Figure 1 also shows a personal computer (PC) 210 and a head-mounted display (HMD) 220.

[0030] As shown in Figure 1, the tactile presentation device 100 comprises at least one tactile presentation element 1 and a control device 2 that controls the tactile presentation element 1. In the illustrated example, the tactile presentation device 100 comprises multiple tactile presentation elements 1, more specifically, five tactile presentation elements 1. However, the number of tactile presentation elements 1 is not limited to five.

[0031] When the haptic presentation device 100 is used, the five haptic presentation elements 1 are positioned to touch the fingertips of the five fingers F of the user's hand H (shown by dotted lines in Figure 1). Each haptic presentation element 1 presents tactile sensation to the fingertip pad of one finger F by vibration stimulation. Here, "fingertip pad" refers to the area fp located beyond the first joint j1 of the finger F, and which is located on the palm side of the center when the finger F is viewed from the side, as shown in Figure 2.

[0032] The control device 2 controls the haptic feedback element 1. The control device 2 controls the haptic feedback element 1 based on control signals transmitted from the PC 210. Data communication between the control device 2 and the PC 210 may be performed by wireless communication or by wired communication. Wireless and wired communication may be performed in accordance with various known communication standards. The control device 2 is implemented, for example, by a microcomputer.

[0033] The tactile feedback element 1 is wired using a flexible substrate and wiring, so as not to interfere with the movement of the hand H. The control device 2 may be positioned, for example, in a part corresponding to the user's arm. The tactile feedback element 1 and the control device 2 may be integrated into a glove.

[0034] The PC210 outputs a video signal to the HMD220, and the HMD220 displays the video signal based on the received signal. The HMD220 also outputs position tracking data, which is information about the HMD220's position, to the PC210. ​​Data communication between the PC210 and the HMD220 may be performed wirelessly or via wired communication.

[0035] In this example, the haptic presentation device 100 presents tactile information in conjunction with the display on the HMD220, but the uses of the haptic presentation device 100 are not limited to this.

[0036] The specific configuration of the tactile feedback element 1 will be explained with reference to Figures 3 and 4. Figure 3 is a schematic plan view of the tactile feedback element 1. Figure 4 is a diagram showing the equivalent circuit of the unit region UR of the tactile feedback element 1.

[0037] As shown in Figure 3, the tactile presentation element 1 has multiple unit regions UR, the tactile presentation of which can be controlled independently of each other. In the illustrated example, the multiple unit regions UR are arranged in a matrix with multiple rows and multiple columns. Although Figure 3 shows an example with 16 unit regions UR, the number of unit regions UR is not limited to this. Furthermore, the arrangement of the multiple unit regions UR is not limited to the example shown in Figure 3. The multiple unit regions UR may be arranged in one row and multiple columns or multiple rows and one column. In addition, although the shape of the unit regions UR is approximately rectangular in the illustrated example, the shape of the unit regions UR is not limited to this.

[0038] The tactile presentation area (hereinafter also referred to as the "active area") AR is defined by multiple unit areas UR. In other words, the tactile presentation element 1 has an active area AR that includes multiple unit areas UR. Although not shown in the illustration, the tactile presentation element 1 may also have a peripheral area (frame area) arranged around the active area AR. Furthermore, although the active area AR is roughly rectangular in the illustrated example, the shape of the active area AR is not limited to being roughly rectangular.

[0039] As shown in Figure 4, the tactile presentation element 1 has a tactile presentation unit 10 provided in each of the multiple unit regions UR, and a unit circuit 20 electrically connected to the tactile presentation unit 10.

[0040] The tactile presentation section 10 is the part of the tactile presentation element 1 that presents tactile sensations. Here, the tactile presentation section 10 includes a vibrating body layer 11 and a first electrode 12 and a second electrode 13 arranged to face each other via the vibrating body layer 11.

[0041] The vibrating layer 11 is a layer that undergoes physical deformation in response to an applied voltage or current, thereby generating vibration. Here, the vibrating layer 11 is a piezoelectric layer formed from a piezoelectric material. Various known piezoelectric materials can be used as the piezoelectric material; for example, piezoelectric ceramics such as zinc zirconate titanate (PZT) and barium titanate (BaTiO3) can be suitably used. The piezoelectric material may also be a material in which piezoelectric ceramic particles are dispersed in a resin material. Furthermore, piezoelectric materials other than piezoelectric ceramics (for example, piezoelectric single crystals such as quartz) may also be used. There are no particular restrictions on the thickness of the piezoelectric layer 11.

[0042] The vibrating layer is not limited to those exemplified. Organic actuators using PVDF (polyvinylidene fluoride) or ion-conductive polymers, or layers containing minute induction coils, may also be used as the vibrating layer. Since PVDF is a type of piezoelectric material, an organic actuator using PVDF can also be called a piezoelectric layer.

[0043] The first electrode 12 and the second electrode 13 can each be formed from various known conductive materials, and are preferably formed from metals such as copper (Cu), nickel (Ni), silver (Ag), and gold (Au), alloys such as Al-Nd alloy (aluminum-neodymium alloy), or metal oxides such as indium tin oxide (ITO). There are no particular restrictions on the thickness of the first electrode 12 and the second electrode 13.

[0044] The first electrode 12 is electrically connected to the unit circuit 20. The second electrode 13 is electrically connected to the reference voltage source GND. When a voltage is applied between the first electrode 12 and the second electrode 13, deformation occurs in the piezoelectric layer 11. More specifically, the piezoelectric layer 11 expands and contracts in the thickness direction, thereby generating vibration.

[0045] The unit circuit 20 drives the tactile presentation unit 10. The configuration of the unit circuit 20 is described below. The unit circuit 20 includes multiple transistors as switching elements, as will be described later. The transistors included in the unit circuit 20 are typically TFTs. In the following description, the case in which the switching elements included in the unit circuit 20 are n-type TFTs will be used as an example. Note that the electrical connections of the source and drain of a p-type TFT are the reverse of the electrical connections of the source and drain of an n-type TFT.

[0046] The unit circuit 20 includes a plurality of subcircuits 21 that are electrically connected in parallel to one another. In the illustrated example, the unit circuit 20 includes three subcircuits 21, specifically, a first subcircuit 21A, a second subcircuit 21B, and a third subcircuit 21C.

[0047] Each of the multiple subcircuits 21 includes a first internal node N1, a second internal node N2, a first transistor Ts, a second transistor Tp, a third transistor Tr, a first capacitor Cs, and a second capacitor Cbst. In the following description, the components of the first subcircuit 21A may be denoted by adding a sub-number "_1" after their reference numeral (for example, the first transistor Ts of the first subcircuit 21A may be denoted as first transistor Ts_1). Similarly, the components of the second subcircuit 21B may be denoted by adding a sub-number "_2" after their reference numeral, and the components of the third subcircuit 21C may be denoted by adding a sub-number "_3" after their reference numeral.

[0048] The gate of the first transistor Ts is supplied with a gate signal. Here, different gate signals S1, S2, and S3 are supplied to the first transistor Ts_1 of the first subcircuit 21A, the first transistor Ts_2 of the second subcircuit 21B, and the first transistor Ts_3 of the third subcircuit 21C. The source of the first transistor Ts is electrically connected to the data voltage line DL and supplied with a data voltage Vd having a predetermined amplitude. Here, the first transistors Ts of the multiple subcircuits 21 are supplied with the data voltage Vd from a common data voltage line DL. The drain of the first transistor Ts is electrically connected to the second internal node N2. Hereafter, the first transistor Ts will also be referred to as the "set transistor".

[0049] The gate of the second transistor Tp is electrically connected to the second internal node N2. The source of the second transistor Tp is electrically connected to the drive voltage line PL, which is supplied with a drive voltage Vp having an amplitude greater than that of the data voltage Vd. Here, the drive voltage Vp supplied to the second transistor Tp is a pulse voltage (square wave). The drain of the second transistor Tp is electrically connected to the first internal node N1. Hereafter, the second transistor Tp will also be referred to as the "drive transistor".

[0050] The gate of the third transistor Tr is supplied with the initialization signal Sini. The source of the third transistor Tr is electrically connected to the reference voltage source GND. The drain of the third transistor Tr is electrically connected to the first internal node N1. Hereafter, the third transistor Tr will also be referred to as the "reset transistor".

[0051] The first end of the second capacitor Cbst is electrically connected to the second internal node N2. The second end of the second capacitor Cbst is electrically connected to the first internal node N1. Therefore, the second capacitor Cbst is located between the first internal node N1 and the second internal node N2. Hereafter, the second capacitor Cbst will also be referred to as the "bootstrap capacitor".

[0052] The first end of the first capacitor Cs is electrically connected to the first internal node N1. The second end of the first capacitor Cs is electrically connected to the tactile presentation unit 10. Therefore, it can be said that the first capacitor Cs is located between the first internal node N1 and the tactile presentation unit 10. Here, the capacitance values ​​of the first capacitor Cs_1 of the first sub-circuit 21A, the first capacitor Cs_2 of the second sub-circuit 21B, and the first capacitor Cs_3 of the third sub-circuit 21C are the same. That is, if the capacitance values ​​of the first capacitors Cs_1, Cs_2, and Cs_3 are represented by the same reference sign, and their sum is represented as "Cst", then Cs_1 = Cs_2 = Cs_3 = (1 / 3)·Cst. Hereafter, the first capacitor Cs will also be called the "storage capacitor".

[0053] The unit circuit 20 further includes a fourth transistor Tr' in addition to the multiple sub-circuits 21 described above. The gate of the fourth transistor Tr' is supplied with the initialization signal Sini. The source of the fourth transistor Tr' is electrically connected to the reference voltage source GND. The drain of the fourth transistor Tr' is electrically connected to the second terminal of the first capacitor Cs of each sub-circuit 21. Hereafter, the fourth transistor Tr' will also be referred to as the "further reset transistor".

[0054] Figure 5 shows an example of the arrangement of data voltage lines DL that supply data voltage Vd to each unit circuit 20 and gate signal lines GL that supply gate signals S1, S2, and S3 to each unit circuit 20. In the example shown in Figure 5, multiple unit regions UR are arranged in an n-row, m-column configuration. As shown in Figure 5, multiple data voltage lines DL extend in the column direction, with one data voltage line DL located for each unit area column. In Figure 5, the data voltages Vd supplied to the 1st, 2nd, 3rd, ..., mth columns are denoted as Vd(1), Vd(2), Vd(3), ..., Vd(m), respectively. Also, as shown in Figure 5, multiple gate signal lines GL extend in the row direction, with three gate signal lines GL located for each unit area row. In Figure 5, the gate signals S1 supplied to the 1st, 2nd, 3rd, ..., nth rows are denoted as S1(1), S1(2), S1(3), ..., S1(n), respectively. Similarly, the gate signals S2 supplied to the first, second, third, ... nth rows are denoted as S2(1), S2(2), S2(3), ... S2(n), respectively, and the gate signals S3 supplied to the first, second, third, ... nth rows are denoted as S3(1), S3(2), S3(3), ... S3(n), respectively.

[0055] In the haptic presentation device 100 according to an embodiment of the present invention, the effective capacitance value of the capacitance (storage capacitor Cs of the multiple sub-circuits 21) connected to the haptic presentation unit 10 can be changed by controlling the on / off state of the drive transistor Tp of the multiple sub-circuits 21 (in other words, by appropriately selecting a combination of drive transistors Tp_1, Tp_2, and Tp_3 to be in the on state), thereby controlling the amplitude of the voltage Vpz applied to the haptic presentation unit 10. Therefore, multiple gradation levels of haptic presentation can be suitably performed.

[0056] In the configuration illustrated in Figure 4, tactile presentation of 4 levels from 0 to 3 can be performed. In the following, the Y level in tactile presentation of X levels may be expressed as "Y / X levels". For example, the 2 levels in tactile presentation of 4 levels may be expressed as "2 / 4 levels".

[0057] In the unit circuit 20, when all three drive transistors Tp are off, it is "0 levels of tone"; when one drive transistor Tp is on and two drive transistors Tp are off, it is "1 level of tone"; when two drive transistors Tp are on and one drive transistor Tp is off, it is "2 levels of tone"; and when all drive transistors Tp are on, it is "3 levels of tone".

[0058] If k is the presentation level (0 to 3), the voltage Vpz applied to the tactile presentation unit 10 is expressed by the following formula, where Cst is the sum of the capacitance values ​​of the storage capacitors Cs_1, Cs_2, and Cs_3, Cpz is the capacitance value (piezo capacitance) of the tactile presentation unit 10, and Vp is the drive voltage. Vpz=[{(k / 3)·Cst} / {(k / 3)·Cst+Cpz}]·Vp

[0059] Figure 6 is a graph showing the relationship between the presentation level and the applied voltage Vpz to the tactile presentation unit 10 for the case where Vp=62[V], Cpz=15[pF], and Cst=60[pF]. In the example shown in Figure 6, the applied voltage Vpz to the tactile presentation unit 10 is 0V when there is 0 levels, approximately 35V when there is 1 level, approximately 45V when there are 2 levels, and approximately 50V when there are 3 levels.

[0060] Figure 7 is a timing chart showing an example of the drive voltage Vp, gate signals S1, S2, S3, and initialization signal Sini.

[0061] As shown in Figure 7, the drive voltage Vp is a pulse voltage. Data is written to the active region AR during the period when the drive voltage Vp is low. During the data writing period, each unit region row is scanned sequentially as the 1st row, ... the nth row. In the illustrated example, during the period in which each unit region row is scanned (1 horizontal scan period), the gate signals S1, S2, and S3 become sequentially high, so that the set transistors Ts_1, Ts_2, and Ts_3 are sequentially turned on during 1 horizontal scan period. Although not shown here, the data voltage Vd may be a binary signal for selecting the on / off state of the drive transistors Tp_1, Tp_2, and Tp_3. The initialization signal Sini is a signal that is high during the data writing period and low during other periods.

[0062] Here, an example of the operation of the tactile presentation device 100 (tactile presentation element 1) will be explained with reference to Figures 8A, 8B, and 8C. Here, the explanation will be given as an example of tactile presentation with 2 / 4 grayscale levels using the voltage and capacitance values ​​shown in Table 1. In Figures 8A, 8B, and 8C, the circle (○) on a transistor indicates that the transistor is in the ON state, and the cross (×) on a transistor indicates that the transistor is in the OFF state. In addition, the cross (×) on some of the storage capacitors Cs indicates that the storage capacitor Cs does not effectively function as a capacitance connected to the tactile presentation unit 10. Furthermore, Figures 8A, 8B, and 8C show the potential at several points in the circuit.

[0063] [Table 1]

[0064] [Step 1: Reset and write data (Figure 8A)] First, as shown in Figure 8A, during the data writing period (when the drive voltage Vp is at a low level (=0V)), the set transistors Ts_1, Ts_2, and Ts_3 of the first subcircuit 21A, the second subcircuit 21B, and the third subcircuit 21C are sequentially turned on, and data is written to the second internal node N2. In this example, the data voltage Vp (specifically 5V) to turn on the drive transistor Tp is written to the second internal node N2 of the first subcircuit 21A and the third subcircuit 21C, and the data voltage Vp (specifically -5V) to turn off the drive transistor Tp is written to the second internal node N2 of the second subcircuit 21B.

[0065] At this time, the reset transistors Tr_1, Tr_2, and Tr_3 of the first sub-circuit 21A, the second sub-circuit 21B, and the third sub-circuit 21C, as well as the additional reset transistor Tr', all turn on, and all nodes except the second internal node N2 are reset to 0V.

[0066] [Step 2: Applying a high-level drive voltage Vp (Figure 8B)] After the data writing period ends, the drive voltage Vp becomes high (i.e., 62V), and as shown in Figure 8B, the reset transistors Tr_1, Tr_2, and Tr_3, and the further reset transistor Tr' all turn off. At this time, the set transistors Ts_1, Ts_2, and Ts_3 are also all off, so the second internal nodes N2_1, N2_2, and N2_3 are all floating. Therefore, the charge stored in the bootstrap capacitor Cbst maintains the voltage across the bootstrap capacitor Cbst, that is, the potential difference between the first internal node N1 and the second internal node N2. Since the drive transistor Tp_1 of the first subcircuit 21A and the drive transistor Tp_3 of the third subcircuit 21C are on, as their source potentials rise, the potentials of the second internal nodes N2_1 and N2_3 also rise accordingly. Specifically, the source potentials of the drive transistors Tp_1 and Tp_3 rise to 62V, so the potentials of the second internal nodes N2_1 and N2_3 rise to 67V. This bootstrap maintains the ON state of drive transistor Tp_1 and drive transistor Tp_3 of the third subcircuit 21C, so that the drive voltage Vp is transmitted to the haptic presentation unit 10 at 2 / 3 of its original magnitude (i.e., approximately 45V).

[0067] [Step 3: Apply low-level drive voltage Vp (Figure 8C)] Next, as the drive voltage Vp becomes low level (i.e., 0V), each node returns to the state of the first step, as shown in Figure 8C. The haptic feedback unit 10 receives a low level drive voltage Vp (i.e., 0V).

[0068] Thus, in the haptic presentation device 100 according to the embodiment of the present invention, the effective capacitance value of the capacitor connected to the haptic presentation unit 10 can be changed by on / off control of the drive transistor Tp of the multiple sub-circuits 21, thereby controlling the amplitude of the voltage Vpz applied to the haptic presentation unit 10. This can also be rephrased as the haptic presentation device 100 controlling the voltage applied to the haptic presentation unit 10 by controlling the potential of the first internal node N1 of each of the multiple sub-circuits 21 (note also the potential of the first internal node N1 shown in Figures 8A, 8B, and 8C).

[0069] In the tactile presentation device 100 according to the embodiment of the present invention, as can be seen from the operation example described above, the only signal driven with a relatively high voltage is the drive voltage Vp, while other signals can be driven with relatively low voltages. Therefore, a general-purpose driver IC for display devices can be used in the drive circuit for driving the data voltage line DL, thereby reducing manufacturing costs. Furthermore, the drive circuit for driving the data voltage line DL can be a binary driver for on / off control of a transistor, which can further reduce manufacturing costs.

[0070] Furthermore, in the tactile presentation device 100 according to the embodiment of the present invention, the on-voltage (gate-source voltage Vgs) applied to each transistor of the unit circuit 20 can be kept low (in the example described above, the gate-source voltage Vgs of the off-state transistor is -5V, and the gate-source voltage Vgs of the on-state transistor is 5V). Therefore, it is possible to suppress large shifts in the threshold voltage of the transistors of the unit circuit 20, and prevent the transistors of the unit circuit 20 from being destroyed.

[0071] Figure 9 shows the relationship between the applied voltage Vpz to the tactile presentation unit 10 and the data writing period. As can be seen from Figure 9, data writing is performed during the period when the drive voltage Vp is at a low level, immediately before the amplitude of the applied voltage Vpz is changed. During other periods (hereinafter referred to as the "pause period"), the gate scan (scanning of the unit region sequence) can be paused, and the driver that drives the data signal line DL can be set to high impedance (Hi-Z). In other words, during the pause period, only the drive voltage line PL that supplies the drive voltage Vp needs to be driven, and other signals can be put into a pause state, thus enabling low power consumption.

[0072] During the aforementioned pause period, from the viewpoint of suppressing charge leakage from the second internal node N2 of the unit circuit 20 and maintaining a constant potential, it is preferable that each transistor in the unit circuit 20 is an oxide semiconductor TFT containing an oxide semiconductor layer as the active layer.

[0073] Although Figure 4 illustrates a unit circuit 20 containing three sub-circuits 21, the number of sub-circuits 21 is not limited to three. The number of sub-circuits 21 may be two or four or more.

[0074] Furthermore, Figure 4 shows an example in which each sub-circuit 21 includes a bootstrap capacitor (second capacitor) Cbst, but the configuration of the sub-circuit 21 is not limited to this example. If the drive transistor Tp has a sufficiently large capacitance (for example, if the size of the drive transistor Tp is large), that capacitance can be used instead of the bootstrap capacitor Cbst, so the bootstrap capacitor Cbst may be omitted.

[0075] Next, we will explain some examples of modifications to the tactile presentation device 100.

[0076] The tactile presentation device 100 may be equipped with the tactile presentation element 1A shown in Figure 10 instead of the tactile presentation element 1 shown in Figure 4.

[0077] In the tactile feedback element 1 shown in Figure 4, the first transistors Ts_1, Ts_2, and Ts_3 of the first subcircuit 21A, second subcircuit 21B, and third subcircuit 21C are supplied with different gate signals S1, S2, and S3. In addition, the first transistors Ts_1, Ts_2, and Ts_3 are supplied with a data voltage Vd from a common data voltage line DL.

[0078] In contrast, in the tactile presentation element 1A shown in Figure 10, the first transistors Ts_1, Ts_2, and Ts_3 of the first sub-circuit 21A, second sub-circuit 21B, and third sub-circuit 21C are supplied with a common gate signal S. Furthermore, the first transistors Ts_1, Ts_2, and Ts_3 are supplied with data voltages Vd1, Vd2, and Vd3, respectively, from different data voltage lines DL.

[0079] Figure 11 shows an example of the arrangement of data voltage lines DL, which supply data voltages Vd1, Vd2, and Vd3 to each unit circuit 20 of the tactile presentation element 1A, and gate signal lines GL, which supply gate signals S to each unit circuit 20.

[0080] In the haptic presentation element 1A, as shown in Figure 11, three data voltage lines DL are arranged for each unit region row. In Figure 11, the data voltage Vd1 supplied to the 1st, 2nd, 3rd, ... mth column is denoted as Vd1(1), Vd1(2), Vd1(3), ... Vd1(m), respectively. Similarly, the data voltage Vd2 supplied to the 1st, 2nd, 3rd, ... mth column is denoted as Vd2(1), Vd2(2), Vd2(3), ... Vd2(m), respectively, and the data voltage Vd3 supplied to the 1st, 2nd, 3rd, ... mth column is denoted as Vd3(1), Vd3(2), Vd3(3), ... Vd3(m), respectively. In addition, one gate signal line GL is arranged for each unit region row in the haptic presentation element 1A. In Figure 11, the gate signals S supplied to the first row, second row, third row, ... nth row are denoted as S(1), S(2), S(3), ... S(n), respectively.

[0081] Figure 12 is a timing chart showing an example of the drive voltage Vp, gate signal S, and initialization signal Sini in the haptic feedback element 1A.

[0082] As shown in Figure 12, data is written to the active region AR during the period when the drive voltage Vp is at a low level. During the data writing period, each unit region row is scanned sequentially as the 1st row, the 2nd row, ... the nth row. In the example shown in Figure 12, during the period in which each unit region row is scanned (1 horizontal scan period), the set transistors Ts_1, Ts_2, and Ts_3 are simultaneously turned on by a common gate signal S, and the on / off state of the drive transistors Tp_1, Tp_2, and Tp_3 is selected according to the potentials of the data voltages Vd1, Vd2, and Vd3.

[0083] Thus, in the tactile presentation element 1A shown in Figure 10, the set transistors Ts_1, Ts_2, and Ts_3 are driven to be turned on simultaneously, allowing for faster data writing than the tactile presentation element 1 shown in Figure 4. Therefore, it is more advantageous in terms of supporting high-frequency driving and high-resolution active region (AR).

[0084] The tactile presentation device 100 may include a tactile presentation element 1B as shown in Figure 13. In the tactile presentation element 1B shown in Figure 13, the capacitance values ​​of the storage capacitor CsA of the first subcircuit 21A, the storage capacitor CsB of the second subcircuit 21B, and the storage capacitor CsC of the third subcircuit 21C are different from each other. If the capacitance values ​​of storage capacitors CsA, CsB, and CsC are represented by the same reference numeral, then the capacitance values ​​of storage capacitors CsA, CsB, and CsC are set to satisfy, for example, the relationship CsA = 2·CsB = 4·CsC. If twice the capacitance value CsA is represented as "Csv", then this relationship can be rephrased as CsA = (1 / 2)·Csv, CsB = (1 / 4)·Csv, and CsC = (1 / 8)·Csv.

[0085] Because the capacitance values ​​of the storage capacitors CsA, CsB, and CsC of the multiple subcircuits 21 are different from each other, it is possible to achieve more gradations of haptic presentation with the same or smaller circuit size as a configuration where the capacitance values ​​of the storage capacitors Cs_1, Cs_2, and Cs_3 are the same, as in the haptic presentation element 1 shown in Figure 4. Specifically, if the number of subcircuits 21 is X, then 2 X This number of gradations can be achieved. In the example shown in Figure 13, the number of sub-circuits 21 is 3, so 8 (=2 3 It can provide tactile feedback with gradations of tones.

[0086] If the capacitance values ​​of the storage capacitors CsA, CsB, and CsC are set to satisfy the example relationship (i.e., CsA = (1 / 2)·Csv, CsB = (1 / 4)·Csv, CsC = (1 / 8)·Csv), then the voltage Vpz applied to the tactile presentation unit 10 can be expressed by the following formula, where k is the presentation level (0 to 7). Vpz=[{(k / 8)·Csv} / {(k / 8)·Csv+Cpz}]·Vp

[0087] Figure 14 is a graph showing the relationship between the presentation level and the applied voltage Vpz to the tactile presentation unit 10 for the case where Vp=62[V], Cpz=15[pF], and Csv=60[pF]. In the example shown in Figure 14, the applied voltage Vpz to the tactile presentation unit 10 is 0V for level 0, approximately 21V for level 1, approximately 31V for level 2, and approximately 37V for level 3. Also, the applied voltage Vpz is approximately 41V for level 4, approximately 44V for level 5, approximately 47V for level 6, and approximately 48V for level 7.

[0088] The tactile presentation device 100 may include a tactile presentation element 1C as shown in Figure 15. The tactile presentation element 1C shown in Figure 15 differs from the tactile presentation element 1B shown in Figure 13 in that each subcircuit 21 does not include a reset transistor Tr. In other words, each subcircuit 21 of the tactile presentation element 1C does not include a transistor for resetting the first internal node N1.

[0089] In the tactile feedback element 1C, a reset operation can be performed by providing a reset period before data writing. During the reset period, by setting the gate signals S1, S2, and S3 to a high level and the data voltage Vd to a high level, the drive transistors Tp_1, Tp_2, and Tp_3 are turned on, so a low-level drive voltage Vp (i.e., 0V) can be written. Therefore, in the tactile feedback element 1C, the reset of the first internal node N1, which was handled by reset transistors Tr_1, Tr_2, and Tr_3 in the tactile feedback element 1B shown in Figure 13, can be performed without reset transistors Tr_1, Tr_2, and Tr_3. As a result, the circuit size can be reduced, and the tactile feedback element 1C is advantageous in terms of high resolution and yield improvement.

[0090] Figure 16 is a timing chart showing an example of the drive voltage Vp, gate signal S, initialization signal Sini, and data voltage Vd in the haptic feedback element 1C.

[0091] In the example shown in Figure 16, a reset period common to all unit area rows is provided before data writing during the data writing period (the period when the drive voltage Vp is at a low level), and the reset operation described above is performed during this reset period.

[0092] Figure 16 shows an example where a common reset period is provided for all unit area rows, but it is not limited to this. A reset operation may be performed before writing data to each unit area row, or before writing data to each sub-circuit 21.

[0093] The tactile presentation device 100 may be configured such that the frequency of the driving voltage Vp, which is a pulse voltage, is variable. Figure 17 shows an example in which the frequency of the driving voltage Vp changes. As shown in Figure 17, by changing the frequency of the driving voltage Vp, the frequency of the voltage Vpz applied to the tactile presentation unit 10 can also be changed in synchronization with it.

[0094] When the frequency of the drive voltage Vp is changed, the length of the period during which the drive voltage Vp is at a low level (the period during which the data writing period can be set) naturally changes. Therefore, when the frequency of the drive voltage Vp is variable, the tactile presentation device 100 is configured so that data writing is completed within the aforementioned period even when the frequency of the drive voltage Vp is at its highest.

[0095] The supply of the drive voltage Vp may or may not be uniform throughout the active region (tactile feedback region) AR. In other words, the active region AR may include multiple regions where the drive voltage Vp supplied to the drive transistor Tp may differ from one another. Figures 18 and 19 show examples of such configurations.

[0096] In the example shown in Figure 18, the active region AR includes the first region R1, the second region R2, and the third region R3. The first region R1, the second region R2, and the third region R3 are arranged in rows (more specifically, in a 1x3 grid).

[0097] The first region R1 is supplied with a drive voltage Vp1 via the drive voltage line PL1. The second region R2 is supplied with a drive voltage Vp2 via the drive voltage line PL2, and the third region R3 is supplied with a drive voltage Vp3 via the drive voltage line PL3. The drive voltages Vp1, Vp2, and Vp3 can be different from each other.

[0098] In the example shown in Figure 19, the active region AR includes the first region R1, the second region R2, the third region R3, the fourth region R4, the fifth region R5, and the sixth region R6. The first region R1, the second region R2, the third region R3, the fourth region R4, the fifth region R5, and the sixth region R6 are arranged in the row and column directions (more specifically, in a 2x3 grid).

[0099] In the first region R1, the drive voltage Vp1 is supplied via the drive voltage line PL1, and in the second region R2, the drive voltage Vp2 is supplied via the drive voltage line PL2. Furthermore, in the third region R3, the drive voltage Vp3 is supplied via the drive voltage line PL3, and in the fourth region R4, the drive voltage Vp4 is supplied via the drive voltage line PL4. Additionally, in the fifth region R5, the drive voltage Vp5 is supplied via the drive voltage line PL5, and in the sixth region R6, the drive voltage Vp6 is supplied via the drive voltage line PL6. The drive voltages Vp1, Vp2, Vp3, Vp4, Vp5, and Vp6 may differ from each other.

[0100] As shown in the examples in Figures 18 and 19, by dividing the active region AR into multiple regions where the drive voltage Vp can differ from each other, vibrations of different frequencies can be mixed within the active region AR, making it possible to provide more detailed tactile feedback.

[0101] Figures 18 and 19 show examples of multiple regions with different drive voltages Vp arranged in rows and columns, respectively. However, these multiple regions may also be arranged in columns. Furthermore, the number of these multiple regions is not limited to the examples shown in Figures 18 and 19.

[0102] In the description so far, a vibration-type tactile presentation device 100 has been used as an example, but the tactile presentation device according to the embodiment of the present invention is not limited to the vibration type, and may, for example, be a type that presents tactile sensation by electrical stimulation (hereinafter referred to as the "electrical stimulation type").

[0103] Figure 20 shows an electrically stimulated tactile presentation device 100A. The tactile presentation element 1D of the tactile presentation device 100A differs from the tactile presentation element 1B shown in Figure 13 in that it includes a tactile presentation unit 10A that can present tactile sensations by electrical stimulation. Here, the tactile presentation unit 10A includes an electrode 14 in contact with a resistor Re. The resistor Re is, for example, the user's finger. Furthermore, the tactile presentation element 1D differs from the tactile presentation element 1B shown in Figure 13 in the following respects.

[0104] The unit circuit 20 of the haptic presentation element 1D includes two fourth transistors (further reset transistors) Tr'. The unit circuit 20 of the haptic presentation element 1D further includes a fifth transistor TD.

[0105] The gate of the fifth transistor TD is electrically connected to the second terminals of the first capacitors CsA, CsB, and CsC of each subcircuit 21. The source of the fifth transistor TD is electrically connected to the negative power supply VSS. The drain of the fifth transistor TD is electrically connected to the tactile feedback unit 10A. Hereafter, the fifth transistor TD will also be referred to as the "further drive transistor".

[0106] One of the two further reset transistors Tr', Tr'1, has its drain electrically connected to the second terminals of the second capacitors CsA, CsB, and CsC of each subcircuit 21, similar to the further reset transistors Tr' of the tactile presentation element 1B shown in Figure 13. However, the source of the further reset transistor Tr'1 is electrically connected to the negative power supply VSS, rather than the reference voltage source GND. The other of the two further reset transistors Tr', Tr'2, has its source electrically connected to the reference voltage source GND, and its drain is electrically connected to the drain of the further drive transistor TD. During reset operation, these further reset transistors Tr'1 and Tr'2 initialize the gate voltage of the further drive transistor TD to the potential of the negative power supply VSS, and the drain voltage of the further drive transistor TD is initialized to the potential of the reference voltage source GND.

[0107] The tactile presentation element 1D of the tactile presentation device 100A operates in much the same manner as the tactile presentation element 1B shown in Figure 13. However, in the tactile presentation element 1D, a voltage of a magnitude corresponding to the presentation gradation is applied to the gate of a further drive transistor TD, and a current corresponding to the difference between the gate voltage of the further drive transistor TD and the source voltage (potential of the negative power supply VSS) flows through the path of the reference voltage source GND, resistor Re (e.g., finger), further drive transistor TD, and negative power supply VSS. It can also be said that the exemplified tactile presentation device 100A controls the current flowing to the tactile presentation unit 10A by controlling the potential of the first internal node N1 of each of the multiple subcircuits 21.

[0108] The same effect can be obtained with the electrical stimulation type tactile presentation device 100A as with the vibration type tactile presentation device 100. [Industrial applicability]

[0109] According to embodiments of the present invention, it is possible to provide a tactile presentation device that can reduce manufacturing costs even when the tactile presentation unit requires a relatively high applied voltage. Embodiments of the present invention can be suitably used, for example, in vibration-type tactile presentation devices. [Explanation of Symbols]

[0110] 1, 1A, 1B, 1C, 1D Tactile feedback elements 2 Control device 10, 10A Tactile presentation section 11. Vibrating layer (piezoelectric layer) 12 1st electrode 13 Second electrode 14 electrodes 20 Unit Circuits 21 Sub-circuits 21A First Sub-circuit 21B Second Sub-circuit 21C Third Sub-circuit 100, 100A Tactile Presentation Device 210 Personal Computers (PCs) 220 Head-Mounted Displays (HMDs) N1 First internal node N2 Second Internal Node Ts First transistor (set transistor) Tp: Second transistor (driver transistor) Tr Third transistor (reset transistor) Tr' 4th transistor (further reset transistor) TD 5th transistor (further drive transistor) Cs First capacitor (storage capacitor) Cbst (Centralized Batteries) - Second Capacitor (Bootstrap Capacitor) Life Unit Domain AR Active Area GL gate signal line DL Data Voltage Line PL drive voltage line

Claims

1. A tactile presentation device having multiple unit regions in which the presentation of tactile sensations can be controlled independently of each other, Each of the aforementioned plurality of unit regions is provided with a tactile presentation unit that presents tactile sensations, A unit circuit electrically connected to the tactile presentation unit and driving the tactile presentation unit, Equipped with, The unit circuit includes a plurality of subcircuits electrically connected in parallel to one another. Each of the aforementioned subcircuits is, The first internal node and A first capacitor having its first end electrically connected to the first internal node and its second end electrically connected to the tactile presentation unit, Includes, A tactile presentation device that controls the voltage applied to the tactile presentation unit or the current flowing through the tactile presentation unit by controlling the potential of the first internal node of each of the plurality of subcircuits.

2. Each of the aforementioned subcircuits is, The second internal node, A first transistor having a data voltage with a predetermined amplitude applied to one of its source and drain, with the other source and drain electrically connected to the second internal node, A second transistor having a gate electrically connected to the second internal node, a drive voltage having an amplitude greater than the amplitude of the data voltage applied to one of the source and drain, and the other of the source and drain electrically connected to the first internal node, The tactile presentation device according to claim 1, further comprising:

3. The tactile presentation device according to claim 2, wherein each of the plurality of subcircuits further includes a second capacitor having a first end electrically connected to the second internal node and a second end electrically connected to the first internal node.

4. Each of the aforementioned subcircuits is, The tactile presentation device according to claim 2, further comprising a third transistor, one of which is electrically connected to the first internal node as a source and the other of which is electrically connected to a reference voltage source as a source and drain.

5. Each of the aforementioned subcircuits is, The haptic presentation device according to claim 2, wherein it does not include a transistor for resetting the first internal node.

6. The aforementioned unit circuit is The tactile presentation device according to claim 2, further comprising a fourth transistor, one of which is electrically connected to the second terminal of the first capacitor of each of the plurality of subcircuits, and the other of which is electrically connected to a reference voltage source.

7. The tactile presentation device according to claim 2, wherein the first transistor of the plurality of subcircuits is supplied with the data voltage from a common data voltage line.

8. The tactile presentation device according to claim 2, wherein the first transistors of the plurality of subcircuits are supplied with the data voltage from different data voltage lines.

9. The drive voltage supplied to the second transistor is a pulse voltage. The tactile presentation device according to claim 2, wherein the frequency of the pulse voltage is variable.

10. Having a tactile presentation area that includes the aforementioned plurality of unit regions, The tactile presentation device according to claim 2, wherein the tactile presentation region includes a plurality of regions in which the drive voltage supplied to the second transistor may be different from each other.

11. The tactile presentation device according to claim 2, wherein each of the first transistor and the second transistor is an oxide semiconductor TFT including an oxide semiconductor layer.

12. The tactile presentation device according to claim 1, wherein the capacitance values ​​of the first capacitors of the plurality of subcircuits are the same as those of each other.

13. The tactile presentation device according to claim 1, wherein the capacitance values ​​of the first capacitors of the plurality of subcircuits are different from each other.

14. The tactile presentation device according to claim 1, wherein the plurality of subcircuits included in the unit circuit are three or more subcircuits.

15. The tactile presentation unit is, Vibrating layer and A first electrode and a second electrode are arranged to face each other via the vibrating layer, A tactile presentation device according to any one of claims 1 to 14, including the above.

16. The tactile presentation device according to claim 15, wherein the vibrating layer is a piezoelectric layer formed from a piezoelectric material.

17. The tactile presentation device according to any one of claims 1 to 14, wherein the tactile presentation unit can present tactile sensations by electrical stimulation.