Medical imaging systems and circuits

Abstract

To improve the accuracy of signal processing. [Solution] The medical imaging system includes a detector which includes a crystal array and a photosensor array which generates an electrical signal in response to receiving scintillation light emitted from the crystal array in response to a gamma-ray interaction occurring in the crystal array; a window generator which generates a plurality of time windows and a single analog-to-digital conversion start signal; a charge integrator which performs charge integration to generate a set of integral signals based on the plurality of generated time windows and the acquired electrical signal; and an analog-to-digital converter which performs analog-to-digital conversion on the set of generated integral signals in a synchronized manner based on the single ADC start signal which generates a set of digital signals which indicate information related to the gamma-ray interaction.

Description

Technical Field

[0001] The embodiments disclosed in this specification and the drawings relate to medical imaging systems and circuits.

Background Art

[0002] In a medical imaging system based on gamma-ray detection, the combination of a charge integrator and an analog-to-digital converter can measure the energy and position information of hits. Usually, the charge integrator requires an integration window to define when the integration process of the input signal starts and stops.

[0003] An improved approach for providing an integration window for signal processing in such a system is needed.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] One of the problems to be solved by the embodiments disclosed in this specification and the drawings is to improve the accuracy of signal processing. However, the problems to be solved by the embodiments disclosed in this specification and the drawings are not limited to the above problems. The problems corresponding to the effects of each configuration shown in the embodiments described later can also be regarded as other problems.

Means for Solving the Problems

[0006] A medical imaging system according to an embodiment comprises a detector and a set of digital readout channels. The detector includes a crystal array and a photosensor array that generates an electrical signal in response to receiving scintillation light emitted from the crystal array in response to gamma-ray interactions occurring within the crystal array. The set of digital readout channels comprises a window generator that generates a plurality of time windows and a single analog-to-digital conversion (ADC) start signal; a charge integrator that performs charge integration on the plurality of generated time windows and the acquired electrical signal to generate a set of integral signals; and an analog-to-digital converter that performs analog-to-digital conversion on the generated set of integral signals in a synchronized manner based on the single ADC start signal to generate a set of digital signals indicating information related to the gamma-ray interaction. [Brief explanation of the drawing]

[0007] [Figure 1] This diagram illustrates a scenario in a positron emission tomography (PET) detector using Anger logic, where multiple integrators and a set of analog-to-digital converters are used to measure the combined signal related to the total energy and the X and Y coordinates. [Figure 2] This figure shows an exemplary approach according to embodiments of the present disclosure, which provides multiple integration windows and a common analog-to-digital (ADC) start signal. [Figure 3] This figure shows an exemplary approach according to embodiments of the present disclosure for generating multiple integration windows and a common ADC start signal. [Figure 4] This figure shows an exemplary approach according to embodiments of the present disclosure for generating multiple integration windows and a common ADC start signal. [Figure 5]This figure shows an exemplary approach according to embodiments of the present disclosure for generating multiple integration windows and a common ADC start signal. [Figure 6] This figure shows an exemplary approach according to embodiments of the present disclosure, which provides multiple integration windows and a common ADC start signal. [Figure 7] This figure shows an exemplary scenario in which glitches are suppressed by overlapping adjacent subwindows according to embodiments of the present disclosure. [Figure 8] This figure shows an exemplary approach according to embodiments of the present disclosure, which provides multiple integration windows and a common ADC start signal. [Figure 9] This figure shows an exemplary scenario in which glitches are mitigated by filtering applied to an assembled window, according to embodiments of the present disclosure. [Figure 10A] This figure shows a perspective view of a PET scanner that can be used with the technology described herein. [Figure 10B] This figure shows a schematic diagram of a PET scanner that can be used with the technology described herein. [Modes for carrying out the invention]

[0008] The embodiments of the medical imaging system and circuit will be described in detail below with reference to the drawings.

[0009] The following disclosure provides embodiments or examples for carrying out different features of the subject matter provided. Specific examples of components and arrangements are described below for the sake of simplicity in this disclosure. Of course, these are merely examples and are not intended to be limiting.

[0010] For example, the order in which the different steps described herein are presented is for clarity. In general, these steps can be performed in any suitable order. Furthermore, although each of the different features, techniques, and configurations described herein may be discussed in different places within this disclosure, each of the concepts is intended to be practiced independently of or in combination with one another. Thus, the present invention can be embodied and considered in many different ways.

[0011] Positron emission tomography (PET) detectors using Anger logic or a weighted sum approach typically employ multiple sets of integrators and analog-to-digital converters to measure the combined signal associated with total energy and X and Y coordinates. Figure 1 illustrates a scenario in which a combination of integrators and analog-to-digital converters is used to measure the combined signal in a PET detector using Anger logic. These integrators typically share a common integration window to achieve synchronization.

[0012] In more advanced PET designs, useful information can be extracted not only from how the charge is geographically distributed, but also from certain important information that may be encoded in the time domain. For example, timing information from a hybrid Cherenkov / scintillator detector is mostly contained within a short window at the start of the signal, while interaction depth information can alter the pulse shape if a slow-decaying phosphor is coated on one side of the crystal.

[0013] In such cases, the performance of the detector can be improved by applying different integration windows to multiple integrators. It is also possible to assign a dedicated integration window generator to each integrator, but this approach has several challenges.

[0014] First, not all integrators require their own integration window. Usually, only two or three different window periods are actually needed. Implementing an individual window generator for each integrator would require additional electronic components.

[0015] Second, in order to ensure the proper assembly of all integrations related to the same event, it is necessary to synchronize the start of analog-to-digital conversion. When using individual window generators, a central unit is required to collect all the integration windows and generate a common analog-to-digital conversion (ADC) start signal to ensure that all integrations are completed before the conversion starts.

[0016] Third, using individual window generators may increase the jitter between individual integration windows, which may affect the performance of the detector. For example, when the interpretation of data depends on the comparison between integrations with different interpretations, such as using the ratio of the Y signal and the E signal to determine the Y position, the mismatch of the integration windows may make the ratio unstable, and as a result, the spatial resolution of the reconstructed image may decrease.

[0017] The present disclosure provides a method and apparatus for solving the above problems by providing a plurality of integration windows and a common analog-to-digital start signal. For each event, a set of shared integration windows and a single ADC start signal can be generated. This ensures that individual integrators can use the integration windows from the shared set while maintaining the proper synchronization of the ADC conversion using the common start signal.

[0018] Figure 2 illustrates an exemplary approach according to an embodiment of the present disclosure that provides multiple integration windows and a common ADC start signal. As shown in Figure 2, a detector 210 detects the gamma-ray interaction occurring therein and generates an electrical signal in response. The detector 210 includes a crystal array and a photosensor array that generates an electrical signal in response to receiving scintillation light emitted from the crystal array in response to the gamma-ray interaction occurring within the crystal array. These signals are read out by a set of digital readout channels 230, which convert these electrical signals into a set of digital output signals describing information related to the gamma-ray interaction. Each digital readout channel includes a charge integrator 232 and an analog-to-digital converter 234. The integration windows required for the charge integral and the common ADC start signal are provided by a single circuit block, namely the window generator 220 in Figure 2.

[0019] For example, upon receiving a trigger signal indicating that an event has been detected by the detector, the window generator 220 generates a set of candidate integral windows (e.g., window 1 and window 2) and a single ADC start signal. That is, the window generator 220 generates multiple time windows and a single analog-to-digital conversion (ADC) start signal. The candidate integral windows and ADC start signals are then sent to the digital readout channel 230. The generation of these windows and start signals can be achieved by digital circuitry by counting clock cycles under the control of register 225. Alternatively, the candidate integral windows and ADC start signals can be generated using analog circuitry, such as a charging process. Waveform parameters such as the start / stop times of the candidate integral windows and the timing of the activation edge of the ADC start signal can be pre-programmed and stored in register 225. Figure 2 shows these registers 225 as part of the window generator 220, but they can also be located outside of the window generator 220 and accessed from the window generator 220.

[0020] A set of candidate integral windows is supplied to the charge integrator 232 of the digital readout channel 230, and the ADC start signal is supplied to the analog-to-digital converter 234 of the digital readout channel 230. That is, the set of digital readout channels (digital readout channel 230) includes a charge integrator 232 that performs charge integration to generate a set of integral signals based on multiple generated time windows and acquired electrical signals, and an analog-to-digital converter 234 that performs its respective analog-to-digital conversion in a synchronous manner on the generated set of integral signals based on a single generated ADC start signal to generate a set of digital signals that indicate information related to gamma-ray interaction. The set of digital readout channels generates a set of digital signals that represent energy, position, interaction depth, and / or timing information related to gamma-ray interaction as a set of digital signals that describe information related to gamma-ray interaction. Each integrator can select one of the candidate integral windows for charge integration via a switch 236, under the control of a register 235 (either inside or outside the corresponding digital readout channel 230 but accessible to the digital readout channel 230). Since a single ADC start signal is used across all 234 analog-to-digital converters, synchronized conversion can be achieved.

[0021] Figure 2 shows an example in which candidate integral windows and an ADC start signal are generated in parallel in response to a trigger signal. That is, the window generator 220 generates multiple candidate integral windows as multiple time windows, and the charge integrator 232 selects a specific integral window from the multiple candidate integral windows generated and performs charge integration during the selected specific integral window. The embodiment includes a first register 225 located in or accessible by the window generator 220, which stores a plurality of predetermined time window waveforms, and a second register 235 located in or accessible by the charge integrator 232, which stores the selection of each integral window of the charge integrator 232. The window generator 220 generates a plurality of candidate integral windows using a digital clock counter or analog gate generator based on a plurality of predetermined time window waveforms stored in the first register 225, and each charge integrator 232 selects a specific integral window from the plurality of generated candidate integral windows based on the selection of the respective integral windows stored in the second register 235. For example, the first register 225 further stores a predetermined signal waveform for a single ADC start signal such that there is a predetermined delay between the end of the last completed window among the plurality of candidate integral windows and the activation edge of the single ADC start signal, and the window generator 220 generates the plurality of candidate integral windows and the single ADC start signal in parallel when it receives a trigger signal from the detector 210 indicating that the photosensor array has received the scintillation light.

[0022] Figure 3 shows a modified example in which candidate integral windows are generated in parallel, and the ADC start signal is generated as a signal triggered by the logical operations of the candidate integral windows (for example, triggered by the termination of the OR signal of the window obtained from the OR gate 227). That is, when the window generator 220 receives a trigger signal from the detector 210 indicating that the photosensor array has received scintillation light, it generates multiple candidate integral windows in parallel and generates a single ADC start signal that is triggered based on the logical operation results of the multiple candidate integral windows.

[0023] Figure 4 shows another example of generating candidate integral windows and an ADC start signal. In this example, upon receiving a trigger signal from the detector, a set of candidate integral windows and an ADC start signal are generated sequentially in a series chain. Regardless of whether the ADC start signal is generated in series or parallel with the candidate integral windows, a certain delay is provided between the activation edge of the ADC start signal and the end of the last completed window so that analog-to-digital conversion does not occur before the end of any integral window. That is, the first register 225 further stores a predetermined signal waveform for a single ADC start signal so that a predetermined delay is provided between the end of the last completed window among multiple candidate integral windows and the activation edge of the single ADC start signal, and the window generator 220 generates multiple candidate integral windows and a single ADC start signal in a series chain upon receiving a trigger signal from the detector 210 indicating that the photosensor array has received scintillation light.

[0024] Figure 5 shows another example in which candidate integral windows are generated in two stages. In the first stage, subwindows (e.g., window A, window B, and window C) are created under the control of register 225. In the second stage, the subwindows can be assembled under the control of an additional register (not shown in Figure 5), and the assembled windows can be supplied to the charge integrator 232 as a set of candidate integral windows. Each assembled window can contain one or more subwindows. For example, window 1, which is one candidate integral window, may contain window A, and window 2, which is another candidate integral window, may be obtained as a result of assembling windows A and B using an OR gate (not shown in Figure 5). That is, the first register 225 stores a plurality of predetermined subwindow waveforms and combinations of a plurality of predetermined subwindows, and the first register 225 further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last completed window among the plurality of subwindows and the activation edge of the single ADC start signal. The window generator 220 generates multiple subwindows based on a plurality of predetermined subwindow waveforms, and generates a plurality of candidate integral windows using the generated subwindows based on a combination of the plurality of predetermined subwindows. For example, when the window generator 220 receives a trigger signal from the detector 210 indicating that the photosensor array has received scintillation light, it generates multiple subwindows and a single ADC start signal in parallel. As another example, when the window generator 220 receives a trigger signal from the detector 210 indicating that the photosensor array has received scintillation light, it generates multiple subwindows in parallel and generates a signal triggered based on the logical operation results of the multiple subwindows as a single ADC start signal. As yet another example, when the window generator 220 receives a trigger signal from the detector 210 indicating that the photosensor array has received scintillation light, it generates multiple subwindows and a single ADC start signal in a series chain.

[0025] The assembly of subwindows can be performed in the integrator rather than in the window generator. Figure 6 shows an exemplary approach according to an embodiment of the present disclosure that provides multiple integration windows and a common ADC start signal. In this embodiment, subwindows such as window A, window B, and window C are generated along with a single ADC start signal under the control of register 625 located within (or externally but accessible) the subwindow generator 620. The waveforms of the subwindows and the ADC start signal are pre-programmed by register 625, including parameters such as the window start / stop times and the timing of the start edge of the ADC start signal. These subwindows are sent to the digital readout channel 630. Under the control of an additional register 635, a set of assembled windows is generated and functions as integration windows for each charge integrator 632. As an example, the window generator 220 is further configured to generate multiple subwindows as multiple time windows, and the charge integrator 632 corresponds to a specific combination of the multiple subwindows and performs each charge integral during the integration window formed by the corresponding specific combination of the multiple subwindows. The embodiment further comprises a first register 625 located within or accessible by the window generator 620, which stores a plurality of predetermined sub-window waveforms; and a second register 635 located within or accessible by the charge integrator 632, which stores each combination of sub-windows of the charge integrator 632, wherein the window generator 620 generates a plurality of sub-windows based on the plurality of predetermined sub-window waveforms stored in the first register 625 using a digital clock counter or an analog gate generator, and the charge integrator 632 performs each charge integral in the integral window formed by combining the plurality of sub-windows based on the respective combinations of those sub-windows stored in the second register 635.

[0026] Figure 7 shows an exemplary scenario in which glitches are suppressed by overlap between adjacent subwindows according to an embodiment of the present disclosure. In this example, three subwindows A, B, and C are generated by the subwindow generator 620. By applying the illustrated switching logic of subwindows A, B, and C, six assembled windows can be generated while discontinuous combinations of subwindows are excluded. As shown in Figure 7, a certain overlap is placed between adjacent subwindows to ensure the continuity of the assembled windows. Such overlap effectively prevents glitches in the assembled windows. That is, a plurality of predetermined subwindow waveforms are arranged such that there is an overlap between two adjacent subwindows among the plurality of subwindows.

[0027] Furthermore, or alternatively, filtering can be applied to the assembled window to remove potential glitches. Figure 8 shows an exemplary approach according to an embodiment of the present disclosure, providing multiple integration windows and a common ADC start signal. Figure 9 shows an exemplary scenario according to an embodiment of the present disclosure, where glitches are suppressed by filtering. If there is no overlap between adjacent subwindows, or if the overlap is not sufficiently large, glitches in the assembled window can be mitigated by the filter 838. Although not explicitly shown in Figure 5, overlap or filtering can also be applied to suppress potential glitches in the assembled window. That is, the charge integrator 632 combines multiple subwindows based on the combination of their respective subwindows to form a combined window, and performs the charge integral of each of them in the integration window generated by filtering the combined window to suppress glitches contained in the combined window.

[0028] In the examples shown in Figures 6 and 8, subwindows can be generated in parallel according to the same trigger signal, or they can be generated sequentially in a series chain. Similar to the examples shown in Figures 2 to 5, a common ADC start signal can be generated to synchronize the analog-to-digital conversion of all integral signals. The ADC start signal can also be configured to function for other purposes, such as a master integral window or a latch signal indicating that integration is in progress. That is, the window generator 620 outputs the single ADC start signal it generates as a signal representing the master integral window, or as a latch signal indicating that signal integration is in progress.

[0029] In the examples shown in Figures 6 and 8, the ADC start signal can be generated in parallel with or sequentially with the subwindows based on predetermined parameters stored in register 625 (or 825). For example, the ADC start signal can be automatically generated based on the numerical values ​​of the subwindow set, ensuring that the activation edge of the ADC start signal does not occur earlier than the time of the last integration stop plus a certain delay. The ADC start signal can also be generated in a series chain with the subwindows based on a preset delay from the trigger signal, ensuring that the delay is sufficiently large so that analog-to-digital conversion does not start before any integration window has finished. Alternatively, the ADC start signal can be generated using digital logic applied to the subwindows. For example, the ADC start signal can be triggered by an OR logic operation in the subwindows.

[0030] The above approach provides greater flexibility in selecting the integration window used by individual integrators. To minimize jitter due to variations in individual window generators, a common set of windows (or subwindows) is shared among the integrators. The devices that generate these integration windows may include a common circuit block for generating a set of candidate integration windows (or subwindows). Each integrator chooses to use one of the candidate integration windows. A common ADC start signal is generated by the circuit block to synchronize the analog-to-digital conversion of all integration signals. Alternatively, each integrator can select multiple commonly supplied subwindows and assemble them into a new integration window. In such cases, a certain overlap or filtering process between adjacent subwindows can be designed to ensure the continuity of the assembled integration window.

[0031] While this disclosure is described and illustrated for providing multiple integration windows and a common ADC start signal in a medical imaging system, those skilled in the art will recognize that the approach provided herein is applicable to other applications requiring multiple time windows or gate signals. For example, a set of candidate integration windows (or subwindows) can be generated in response to a pre-defined signal in such an application. The windows (or subwindows) can be automatically generated based on parameters stored in one or more registers, predetermined according to the windows or gates required by the application. This method enables the generation of a common ADC start signal that guarantees the integrity of all integrations and the synchronization of the analog-to-digital conversion.

[0032] Figures 10A and 10B illustrate embodiments of a medical imaging system including a PET scanner capable of carrying out the method described herein. The PET scanner includes a plurality of gamma-ray detectors (GRDs) (e.g., GRD1, GRD2 to GRDN) each configured as a rectangular detector module.

[0033] Each GRD may include a two-dimensional array of individual detector crystals that absorb gamma rays and emit scintillation photons. These scintillation photons can be detected by a two-dimensional array of photodetectors or photosensors, such as photomultiplier tubes (PMTs) or silicon photomultiplier tubes (SiPMs). Optical waveguides can be positioned either between the array of detector crystals and the photodetectors, or at the end of the crystal array opposite the photodetectors.

[0034] Each photodetector (e.g., SiPM or PMT) can generate an analog signal indicating when a scintillation event occurs, as well as the energy of the gamma rays that generate the detection event. Furthermore, photons emitted from one detector crystal can be detected by two or more photodetectors, and based on the analog signals generated by each photodetector, the detector crystal corresponding to the detection event can be determined using a variety of methods, including but not limited to the multiplexing and analysis schemes, Anger logic, and crystal decoding described above.

[0035] Figure 10B shows an example of a PET scanner configuration, where the subject OBJ to be imaged is placed on a stage 1016, and the GRD modules GRD1 through GRDN are arranged circumferentially around the subject OBJ and stage 1016. The GRDs can be fixedly connected to annular components 1020 which are fixedly connected to a gantry 1040. The gantry 1040 houses many of the components of the PET scanner. The gantry 1040 of the PET scanner also includes an opening through which the subject OBJ and stage 1016 can pass, allowing the GRDs to detect gamma rays emitted in the opposite direction from the subject OBJ due to annihilation events, and timing and energy information can be used to determine the coincidence of gamma ray pairs.

[0036] Figure 10B also shows the circuitry and hardware for acquiring, storing, processing, and distributing gamma-ray detection data. This circuitry and hardware includes a processor 1070, a network controller 1074, a memory 1078, and a Data Acquisition System (DAS) 1076. The PET scanner also includes data channels that route detection measurement results from the GRD to the DAS 1076, processor 1070, memory 1078, and network controller 1074. The DAS 1076 can control the acquisition, digitization, and routing of detection data from the detector. In one embodiment, the DAS 1076 controls the movement of the stage 1016. The processor 1070 performs functions including image reconstruction from detection data, pre-reconstruction processing of detection data, and post-reconstruction processing of image data, as described herein.

[0037] The processor 1070 can be configured to perform various steps and variations of the methods described herein. The processor 1070 may include a CPU that can be implemented as individual logic gates, such as an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), or other Complex Programmable Logic Device (CPLD). The FPGA or CPLD implementation may be coded in VHDL, Verilog®, or other hardware description language, and the code may be stored directly in the electronic memory within the FPGA or CPLD, or in a separate electronic memory. Furthermore, the memory may be non-volatile, such as ROM, EPROM®, EEPROM®, or flash memory®. The memory may also be volatile, such as static RAM or dynamic RAM, and a processor, such as a microcontroller or microprocessor, may be provided to manage the electronic memory and manage the interaction between the FPGA or CPLD and the memory.

[0038] Alternatively, the CPU within processor 1070 may execute a computer program containing a set of computer-readable instructions that perform various steps of the described method, the program being stored in one of the non-transient electronic memory and / or hard disk drives, CDs, DVDs, flash drives, or other known storage media described above. Furthermore, the computer-readable instructions may be provided in utility applications, background daemons, or components of an operating system, or a combination thereof, and may be executed in cooperation with processors such as Intel® Xeon® or AMD® Opteron® processors, and Microsoft® Vista®, UNIX®, Solaris®, Linux®, Apple®, MAC-OS®, and other operating systems known to those skilled in the art. Furthermore, the CPU may be implemented as multiple processors that work concurrently and cooperatively to execute instructions.

[0039] The memory 1078 may be a hard disk drive, CD-ROM drive, DVD drive, flash drive, RAM, ROM, or other electronic storage device known in the art.

[0040] Network controllers 1074, such as Intel Ethernet® PRO network interface cards manufactured by Intel® Corporation in the United States, can interface between various parts of the PET scanner. Furthermore, network controller 1074 can also interface with an external network. As can be understood, the external network can be a public network such as the Internet, a private network such as a LAN or WAN network, or any combination thereof, and may include a PSTN or ISDN subnetwork. The external network can be wired, such as an Ethernet® network, or wireless, such as a cellular network including EDGE, 3G, and 4G wireless cellular systems. The wireless network may be WiFi®, Bluetooth®, or other known wireless communication formats.

[0041] While the above explanation is provided in the context of PET scanners, those skilled in the art will recognize that the disclosed concepts are also applicable to other gamma-ray detection-based medical imaging systems, such as single-photon emission computed tomography (SPECT) scanners.

[0042] To aid in understanding the various embodiments, various techniques have been described as multiple separate operations. The order of the description should not be interpreted as meaning that these operations are necessarily order-dependent. In fact, these operations do not need to be performed in the order presented. The described operations may be performed in a different order than in the embodiments described. In additional embodiments, various additional operations may be performed, and / or the described operations may be omitted.

[0043] Furthermore, embodiments of this disclosure may be described in the following appendix.

[0044] (1) A medical imaging system that uses multiple time windows in signal integration, comprising: a gamma-ray detector, which includes a crystal array and a photosensor array configured to generate an electrical signal in response to receiving incident scintillation light emitted from the crystal array in response to a gamma-ray interaction occurring in the crystal array; and a set of digital readout channels configured to acquire the electrical signal and generate a set of digital signals indicating information related to the gamma-ray interaction, each channel of the set of digital readout channels including a charge integrator and an analog-to-digital converter; and a window generator configured to generate multiple time windows and a single analog-to-digital conversion (ADC) start signal, wherein the charge integrator is configured to perform its respective charge integral to generate a set of integral signals based on the generated multiple time windows and the acquired electrical signal, and the analog-to-digital converter is configured to perform its respective analog-to-digital conversion in a synchronized manner with respect to the generated set of integral signals to generate a set of digital signals.

[0045] (2) The system as in (1), wherein the window generator is further configured to generate multiple candidate integral windows as multiple time windows, and each charge integrator is configured to select a specific integral window from the multiple candidate integral windows generated and perform the respective charge integral within the selected specific integral window.

[0046] (3) The system according to (2), wherein the apparatus further comprises a first register located in or accessible by a window generator and a second register located in or accessible by a charge integrator, the first register storing a plurality of predetermined time window waveforms, the second register storing the selection of each integral window of the charge integrator, the window generator further configured to generate a plurality of candidate integral windows using a digital clock counter or an analog gate generator based on the plurality of predetermined time window waveforms stored in the first register, and each charge integrator configured to select a particular integral window from the generated candidate integral windows based on the selection of each integral window stored in the second register.

[0047] (4) The system as in (3), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last completed window among a plurality of candidate integral windows and the activation edge of the single ADC start signal, and the window generator is further configured to generate a plurality of candidate integral windows and a single ADC start signal in parallel when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0048] (5) The system as in (3), further configured, to generate a window generator in parallel with respect to a trigger signal from the detector indicating that the photosensor array has received scintillation light, and to generate a single ADC start signal that is triggered based on the logical results of the multiple candidate integral windows.

[0049] (6) The system as in (3), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last completed window among a plurality of candidate integral windows and the activation edge of the single ADC start signal, and a window generator is further configured to generate a plurality of candidate integral windows and a single ADC start signal in a series chain when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0050] (7) The system according to (3), wherein a first register is further configured to store a plurality of predetermined subwindow waveforms and a plurality of predetermined subwindow combinations, and a window generator is further configured to generate a plurality of subwindows based on a plurality of predetermined subwindow waveforms, and to generate a plurality of candidate integral windows using the generated plurality of subwindows based on a plurality of predetermined subwindow combinations.

[0051] (8) The system according to (7), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last window among a plurality of subwindows and the activation edge of the single ADC start signal, and the window generator is further configured to generate a plurality of subwindows and a single ADC start signal in parallel when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0052] (9) The system as in (7), further configured, to generate a number of subwindows in parallel when the detector receives a trigger signal indicating that the photosensor array has received scintillation light, and to generate a single ADC start signal triggered based on the logical operation results of the number of subwindows.

[0053] (10) The system according to (7), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last window among a plurality of subwindows and the activation edge of the single ADC start signal, and a window generator is further configured to generate a plurality of subwindows and a single ADC start signal in a series chain when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0054] (11) The system as in (1), wherein the window generator is further configured to generate multiple subwindows as multiple time windows, each charge integrator corresponds to a specific combination of the multiple subwindows and performs its respective charge integral during the integral window formed by the corresponding specific combination of the multiple subwindows.

[0055] (12) The apparatus further comprises a first register located in or accessible by a window generator and a second register located in or accessible by a charge integrator, wherein the first register stores a plurality of predetermined subwindow waveforms, the second register stores a combination of each subwindow of the charge integrator, the window generator is further configured to generate a plurality of subwindows based on a plurality of predetermined subwindow waveforms stored in the first register using a digital clock counter or an analog gate generator, and the charge integrator performs each charge integral in an integral window formed by combining the plurality of subwindows based on the combination of each of those subwindows stored in the second register, the system as in (11).

[0056] (13) The system according to (12), wherein a plurality of predetermined subwindow waveforms are arranged such that there is an overlap between two adjacent subwindows of the plurality of subwindows.

[0057] (14) The system described in (12), wherein the charge integrator combines multiple subwindows based on the combination of each subwindow to form a combined window, and performs each of those charge integrals in the integral window generated by filtering the combined window to suppress glitches contained in the combined window.

[0058] (15) The system according to (12), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last window among a plurality of subwindows and the activation edge of the single ADC start signal, and the window generator is further configured to generate a plurality of subwindows and a single ADC start signal in parallel when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0059] (16) The system according to (12), further configured, to generate a number of subwindows in parallel when the detector receives a trigger signal indicating that the photosensor array has received scintillation light, and to generate a single ADC start signal that is triggered based on the logical results of the number of subwindows.

[0060] (17) The system according to (12), wherein a first register further stores a predetermined signal waveform for a single ADC start signal such that a predetermined delay is provided between the end of the last window among a plurality of subwindows and the activation edge of the single ADC start signal, and the window generator is further configured to generate a plurality of subwindows and a single ADC start signal in a series chain when it receives a trigger signal from the detector indicating that the photosensor array has received scintillation light.

[0061] (18) The system as described in (1), wherein the window generator is further configured to output a single ADC start signal that is generated as a signal representing the master integral window, or as a latch signal indicating that signal integration is in progress.

[0062] (19) The system as described in (1), wherein a set of digital readout channels is further configured to produce a set of digital signals representing energy, position, depth of interaction, and / or timing information related to the gamma-ray interaction, as a set of digital signals describing information related to the gamma-ray interaction.

[0063] (20) A circuit for providing multiple time windows used for signal integration in a medical imaging system, the medical imaging system comprising a gamma-ray detector and a set of digital readout channels, the gamma-ray detector comprising a crystal array and a photosensor array, the photosensor array generating an electrical signal in response to receiving incident scintillation light emitted from the crystal array in response to a gamma-ray interaction occurring in the crystal array, the set of digital readout channels acquiring the electrical signal and generating a set of digital signals indicating information related to the gamma-ray interaction, each channel of the set of digital readout channels comprising a charge integrator and an analog-to-digital converter, the circuit comprising a window generator configured to generate multiple time windows and a single analog-to-digital conversion (ADC) start signal, the charge integrator included in the set of digital readout channels performing charge integration to generate a set of integrated signals based on the generated multiple time windows and the acquired electrical signal, the analog-to-digital converter included in the set of digital readout channels performing analog-to-digital conversion in a synchronous manner with respect to the generated set of integrated signals to generate a set of digital signals.

[0064] According to at least one embodiment described above, the accuracy of signal processing can be improved.

[0065] While several embodiments have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These embodiments can be implemented in a variety of other forms, and various omissions, substitutions, modifications, and combinations of embodiments are possible without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. [Explanation of symbols]

[0066] 1070 processor 1074 Network Controller 1076 Data Acquisition System 1078 memory

Claims

1. A detector including a crystal array and a photosensor array that generates an electrical signal in response to receiving scintillation light emitted from the crystal array in response to gamma-ray interactions occurring within the crystal array, A window generator that generates multiple time windows and a single analog-to-digital conversion (ADC) start signal, A medical imaging system comprising: a charge integrator that performs charge integration to generate a set of integrated signals based on a plurality of generated time windows and the acquired electrical signals; and a set of digital readout channels, each of which performs analog-to-digital conversions in a synchronized manner on the generated set of integrated signals based on a single generated ADC start signal to generate a set of digital signals indicating information related to the gamma-ray interaction.

2. The window generator generates a plurality of candidate integral windows as the plurality of generated time windows, The charge integrator selects a specific integration window from the multiple candidate integration windows generated and performs the charge integration within the selected specific integration window. The medical imaging system according to claim 1.

3. The system further comprises a first register located within or accessible by the window generator, which stores a plurality of predetermined time window waveforms, and a second register located within or accessible by the charge integrator, which stores the selection of each integration window of the charge integrator. The window generator generates the plurality of candidate integral windows using a digital clock counter or an analog gate generator based on the plurality of predetermined time window waveforms stored in the first register. The medical imaging system according to claim 2, wherein each charge integrator selects a specific integration window from a plurality of generated candidate integration windows based on the selection of the respective integration windows stored in the second register.

4. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last completed window among the plurality of candidate integral windows and the activation edge of the single ADC start signal. When the window generator receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light, it generates the plurality of candidate integral windows and the single ADC start signal in parallel. The medical imaging system according to claim 3.

5. The aforementioned window generator, When the detector receives a trigger signal indicating that the photosensor array has received the scintillation light, the plurality of candidate integration windows are generated in parallel. The medical imaging system according to claim 3, wherein a signal triggered based on the logical operation results of the plurality of candidate integral windows is generated as the single ADC start signal.

6. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last completed window among the plurality of candidate integral windows and the activation edge of the single ADC start signal. The medical imaging system according to claim 3, wherein the window generator generates the plurality of candidate integral windows and the single ADC start signal in a series chain when it receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light.

7. The first register stores a plurality of predetermined subwindow waveforms and a plurality of predetermined subwindow combinations, The aforementioned window generator, Based on the aforementioned plurality of predetermined sub-window waveforms, a plurality of sub-windows are generated. Based on the combination of the aforementioned multiple predetermined subwindows, the generated multiple subwindows are used to generate the multiple candidate integral windows. The medical imaging system according to claim 3.

8. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last window among the plurality of subwindows and the activation edge of the single ADC start signal. When the window generator receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light, it generates the plurality of subwindows and the single ADC start signal in parallel. The medical imaging system according to claim 7.

9. The aforementioned window generator, When the detector receives a trigger signal indicating that the photosensor array has received the scintillation light, the plurality of subwindows are generated in parallel. The medical imaging system according to claim 7, wherein a signal triggered based on the logical operation results of the plurality of subwindows is generated as the single ADC start signal.

10. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last window among the plurality of subwindows and the activation edge of the single ADC start signal. When the window generator receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light, it generates the plurality of sub-windows and the single ADC start signal in a series chain. The medical imaging system according to claim 7.

11. The window generator is further configured to generate a plurality of subwindows as the plurality of time windows that have been generated, The charge integrator corresponds to a specific combination of the plurality of subwindows and performs each of the charge integrals in the integral window formed by the corresponding specific combination of the plurality of subwindows. The medical imaging system according to claim 1.

12. The system further comprises a first register located within or accessible by the window generator, which stores a plurality of predetermined sub-window waveforms, and a second register located within or accessible by the charge integrator, which stores a combination of each sub-window of the charge integrator. The window generator uses a digital clock counter or an analog gate generator to generate the plurality of subwindows based on the plurality of predetermined subwindow waveforms stored in the first register. The charge integrator performs each of the charge integrals within an integral window formed by combining the plurality of subwindows, based on the combination of each subwindow stored in the second register. The medical imaging system according to claim 11.

13. The medical imaging system according to claim 12, wherein the plurality of predetermined subwindow waveforms are arranged such that there is an overlap between two adjacent subwindows among the plurality of subwindows.

14. The medical imaging system according to claim 12, wherein the charge integrator combines the plurality of subwindows based on the combination of each of the subwindows to form a combined window, and performs the respective charge integrals in the integral window generated by filtering the combined window to suppress glitches contained in the combined window.

15. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last window among the plurality of subwindows and the activation edge of the single ADC start signal. When the window generator receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light, it generates the plurality of subwindows and the single ADC start signal in parallel. The medical imaging system according to claim 12.

16. The aforementioned window generator, When the detector receives a trigger signal indicating that the photosensor array has received the scintillation light, the plurality of subwindows are generated in parallel. The medical imaging system according to claim 12, wherein a signal triggered based on the logical operation results of the plurality of subwindows is generated as the single ADC start signal.

17. The first register further stores a predetermined signal waveform for the single ADC start signal such that a predetermined delay is provided between the end of the last window among the plurality of subwindows and the activation edge of the single ADC start signal. The medical imaging system according to claim 12, wherein the window generator generates the plurality of sub-windows and the single ADC start signal in a series chain when it receives a trigger signal from the detector indicating that the photosensor array has received the scintillation light.

18. The medical imaging system according to claim 1, wherein the window generator outputs the generated single ADC start signal as a signal representing a master integration window, or as a latch signal indicating that signal integration is in progress.

19. The medical imaging system according to claim 1, wherein the set of digital readout channels generates a set of digital signals representing energy, position, depth of interaction, and / or timing information related to the gamma-ray interaction, as the set of digital signals describing information related to the gamma-ray interaction.

20. A circuit comprising a window generator that generates multiple time windows and a single analog-to-digital conversion (ADC) start signal, A circuit comprising: a plurality of time windows generated by the circuit and, in response to receiving scintillation light emitted from the crystal array in response to gamma-ray interactions occurring within the crystal array, an electrical signal generated by the photosensor array of a gamma-ray detector, on which a charge integrator performs charge integration to generate a set of integrated signals; and an analog-to-digital converter, on which a single generated ADC start signal, performs analog-to-digital conversions in a synchronized manner on the generated set of integrated signals to generate a set of digital signals indicating information related to the gamma-ray interactions.

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