Low-pass filter and diplexer equipped therewith

Abstract

In low-pass filters, the attenuation characteristics are improved without increasing the size of the equipment. [Solution] The low-pass filter 100 comprises a laminate 130 in which a plurality of dielectric layers are stacked in the stacking direction, an antenna terminal TA, a terminal T1, and a ground terminal GND arranged on the laminate, resonators RC1 and RC3, a capacitor C21, and an adjustment circuit AC1. Resonators RC1 are connected to the input terminal. Resonator RC3 is connected between resonator RC1 and the output terminal. Capacitor C21 is connected between the connection node N1 between resonators RC1 and RC3 and the ground terminal. The adjustment circuit AC1 adjusts the coupling between the resonators. Each resonator is an LC parallel resonant circuit including a capacitor and an inductor having vias extending in the stacking direction. The adjustment circuit includes a via VL60 with one end connected to the ground terminal. When viewed from the stacking direction in plan view, via VL60 is arranged along vias VL11 and VL30 in the region between via VL11 of resonator RC1 and via VL30 of resonator RC3.

Description

Technical Field

[0001] The present disclosure relates to a low-pass filter and a diplexer including the same, and more particularly to a technique for improving attenuation characteristics in a low-pass filter.

Background Art

[0002] International Publication No. 2018 / 066339 (Patent Document 1) discloses a configuration in which a magnetic coupling inductor is connected in parallel to an inductor in each of the first-stage resonator on the input terminal side and the fifth-stage resonator on the output terminal side in a five-stage LC filter (band-pass filter) including five resonators.

[0003] In the LC filter disclosed in International Publication No. 2018 / 066339 (Patent Document 1), desired frequency characteristics are realized by adjusting the coupling with adjacent resonators using the magnetic coupling inductor.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Generally, in order to improve the Q value and frequency characteristics in a low-pass filter, a configuration using vias as inductors of resonators constituting a filter device is known. However, in such a configuration, since the resonators are coupled by a magnetic field and / or an electric field by the vias, sufficient isolation between the resonators cannot be ensured, and there may be cases where an attenuation amount of a predetermined level or more cannot be obtained.

[0006] One way to solve these problems is to increase the distance between vias of resonators. However, this would require increasing the size of the filter device, making it unsuitable for filter devices with a large number of resonators to obtain a relatively large attenuation, or when miniaturization is required.

[0007] This disclosure was made to solve these problems, and its purpose is to improve the attenuation characteristics of a low-pass filter without increasing the size of the device. [Means for solving the problem]

[0008] The low-pass filter according to this disclosure comprises a laminate in which a plurality of dielectric layers are stacked in the stacking direction, an input terminal, an output terminal and a ground terminal arranged on the laminate, a first resonator, a second resonator, a first capacitor and a first adjustment circuit. The first resonator is connected to the input terminal. The second resonator is connected between the first resonator and the output terminal. The first capacitor is connected between the connection node between the first and second resonators and the ground terminal. The first adjustment circuit adjusts the coupling between the first and second resonators. Each of the first and second resonators is an LC parallel resonant circuit including a capacitor and an inductor having vias extending in the stacking direction. The first adjustment circuit includes a via with one end connected to the ground terminal. When viewed from the stacking direction in plan view, the via of the first adjustment circuit is arranged along the vias of the first and second resonators in the region between the vias of the first and second resonators. [Effects of the Invention]

[0009] In the low-pass filter according to this disclosure, a first adjustment circuit is provided in the region between the vias of the first resonator and the vias of the second resonator, which are arranged in series in the signal transmission path, and the first adjustment circuit has vias arranged along these vias. One end of the via of the first adjustment circuit is connected to a ground terminal, and the coupling between the first resonator and the second resonator can be adjusted (reduced) by the first adjustment circuit. As a result, isolation between the resonators can be ensured, and the attenuation characteristics of the low-pass filter can be improved without increasing the size of the equipment. [Brief explanation of the drawing]

[0010] [Figure 1] This is a block diagram of a communication device including a diplexer to which the low-pass filter of the embodiment is applied. [Figure 2] This is an equivalent circuit diagram of a low-pass filter according to an embodiment. [Figure 3] This diagram illustrates the principle by which the coupling adjustment circuit improves damping characteristics. [Figure 4] Figure 3 shows the transmission characteristics after adjusting for reflection loss in the example shown. [Figure 5] This is an outline view of a low-pass filter according to an embodiment. [Figure 6] This is an exploded perspective view showing an example of the detailed structure of a low-pass filter according to an embodiment. [Figure 7] This is a plan view illustrating the arrangement of the coupling adjustment circuit in the low-pass filter of Modification Example 1. [Figure 8] This diagram illustrates how the configuration of the coupling adjustment circuit changes the pass-through characteristics. [Figure 9] This diagram illustrates the configuration and pass characteristics of the low-pass filter in Modification Example 2. [Figure 10] This is an equivalent circuit diagram of the low-pass filter according to Modification Example 3. [Modes for carrying out the invention]

[0011] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and their descriptions will not be repeated.

[0012] (Basic configuration of communication equipment) Figure 1 is a block diagram of a high-frequency front-end circuit 20 including a diplexer 40 to which a low-pass filter 100 according to the embodiment is applied, and a communication device 10 equipped with the high-frequency front-end circuit 20. The high-frequency front-end circuit 20 splits the high-frequency signal received by the antenna device ANT into a predetermined number of frequency bands and transmits it to the subsequent processing circuit. The high-frequency front-end circuit 20 is used, for example, in mobile terminals such as mobile phones, smartphones or tablets, and communication devices such as personal computers equipped with communication functions.

[0013] Referring to Figure 1, the communication device 10 includes a high-frequency front-end circuit 20 including a diplexer 40 and an RF signal processing circuit (hereinafter also referred to as "RFIC") 30. The high-frequency front-end circuit 20 shown in Figure 1 is a receiving system front-end circuit. The high-frequency front-end circuit 20 includes a diplexer 40 and amplification circuits LNA1 and LNA2.

[0014] The diplexer 40 includes filters 100 (FLT1) and 200 (FLT2), which have passbands of different frequency ranges.

[0015] Filter 100 is connected between the common antenna terminal TA and terminal T1. Filter 100 is a low-pass filter that uses the low-band (LB) frequency range as the passband and the high-band (HB) frequency range as the non-passband. Filter 200 is connected between the antenna terminal TA and terminal T2. Filter 200 is a high-pass filter that uses the high-band frequency range as the passband and the low-band frequency range as the non-passband. In the following explanation, filter 100 may be referred to as "low-pass filter 100" and filter 200 as "high-pass filter 200".

[0016] Each of the filters 100 and 200 passes a high-frequency signal corresponding to the passband of each filter among the high-frequency signals received by the antenna device ANT. Thereby, the received signal from the antenna device ANT is demultiplexed into signals of a plurality of predetermined frequency bands.

[0017] Each of the amplifier circuits LNA1 and LNA2 is a so-called low-noise amplifier. The amplifier circuits LNA1 and LNA2 amplify the high-frequency signal that has passed through the corresponding filter with low noise and transmit it to the RFIC 30.

[0018] The RFIC 30 is an RF signal processing circuit that processes the high-frequency signals transmitted and received by the antenna device ANT. Specifically, the RFIC 30 processes the high-frequency signal input via the reception-side signal path of the high-frequency front-end circuit 20 from the antenna device ANT, such as by down-converting, and outputs the received signal generated by the signal processing to a baseband signal processing circuit (not shown).

[0019] [[ID=1st]] When the high-frequency front-end circuit 20 is used as a reception circuit as shown in FIG. 1, in the diplexer 40, the antenna terminal TA becomes the input terminal IN, and the terminals T1 and T2 become the first output terminal OUT1 and the second output terminal OUT2, respectively. On the other hand, the high-frequency front-end circuit can also be used as a transmission circuit. In this case, each of the terminals T1 and T2 of the diplexer 40 becomes an input terminal, and the antenna terminal TA becomes a common output terminal. In that case, a power amplifier is used as the amplifier included in the amplifier circuit instead of the low-noise amplifier.

[0020] (Configuration of Diplexer) FIG. 2 is a diagram showing an example of an equivalent circuit of the diplexer 40 in FIG. 1. As described in FIG. 1, the low-pass filter 100 is connected between the antenna terminal TA and the terminal T1. Also, the high-pass filter 200 is connected between the antenna terminal TA and the terminal T2.

[0021] As will be described later, this disclosure aims to improve the pass characteristics of the low-pass filter 100 in the diplexer 40. Therefore, in Figure 2, only the equivalent circuit of the low-pass filter 100 is shown, and the equivalent circuit of the high-pass filter 200 is omitted.

[0022] Referring to Figure 2, the low-pass filter 100 includes a filter circuit 110 and a coupling adjustment circuit 120.

[0023] The filter circuit 110 is the signal transmission path through which the high-frequency signal input from the antenna terminal TA actually passes. The filter circuit 110 includes three resonators RC1, RC3, and RC5 arranged in series between the antenna terminal TA and terminal T1, and two resonators RC2 and RC4 arranged between the connection nodes of each resonator and the ground terminal GND. In other words, the filter circuit 110 is a so-called fifth-order low-pass filter.

[0024] Each of the resonators RC1, RC3, and RC5 is an LC parallel resonator in which an inductor and a capacitor are connected in parallel. Resonator RC1 includes an inductor L11 and a capacitor C11. Resonator RC3 includes an inductor L31 and a capacitor C31. Resonator RC5 includes an inductor L51 and a capacitor C51.

[0025] One end of inductor L11 is connected to antenna terminal TA. One end of inductor L51 is connected to terminal T1. Inductor L31 is connected between the other end of inductor L11 and the other end of inductor L51. In other words, inductors L11, L31, and L51 are connected in series between antenna terminal TA and terminal T1 in this order.

[0026] Capacitor C11 is connected in parallel with inductor L11. Capacitor C31 is connected in parallel with inductor L31. Capacitor C51 is connected in series with inductor L51.

[0027] Each of the resonators RC2 and RC4 is an LC series resonator, in which an inductor and a capacitor are connected in series. Resonator RC2 includes capacitor C21 and inductor L24. Resonator RC4 includes capacitor C41 and inductor L24. Note that inductor L24 is shared by both resonators RC2 and RC4.

[0028] One end of capacitor C21 of resonator RC2 is connected to node N1, which connects resonators RC1 and RC3. The other end of capacitor C21 is connected to the ground terminal GND via inductor L24.

[0029] One end of capacitor C41 of resonator RC4 is connected to node N2, which connects resonators RC3 and RC5. The other end of capacitor C41 is connected to the ground terminal GND via inductor L24.

[0030] In the filter circuit 110, signals in a frequency band lower than the cutoff frequency determined by the resonant frequencies of resonators RC1, RC3, and RC5 pass from antenna terminal TA to terminal T1. On the other hand, signals in a frequency band higher than the cutoff frequency are transmitted to ground through resonator RC2 and / or resonator RC4.

[0031] The coupling adjustment circuit 120 is a circuit for adjusting the coupling state between resonators RC1 and RC3, and between resonators RC3 and RC5. The coupling adjustment circuit 120 includes an adjustment circuit AC1 for adjusting the coupling state between resonators RC1 and RC3, and an adjustment circuit AC2 for adjusting the coupling state between resonators RC3 and RC5.

[0032] Adjustment circuit AC1 includes inductors L61 and L67 and capacitors C61 and C62. Adjustment circuit AC2 includes inductors L71 and L77 and capacitors C71 and C72. Note that inductor L67 is shared by both adjustment circuits AC1 and AC2.

[0033] In the adjustment circuit AC1, capacitors C61 and C62 are connected in series between the antenna terminal TA and connection node N2. One end of inductor L61 is connected to connection node N3 between capacitors C61 and C62. The other end of inductor L61 is connected to the ground terminal GND via inductor L67.

[0034] In the adjustment circuit AC2, capacitors C71 and C72 are connected in series between terminal T1 and connection node N1. One end of inductor L71 is connected to connection node N4 between capacitors C71 and C72. The other end of inductor L71 is connected to the ground terminal GND via inductor L67.

[0035] In the actual configuration, capacitors C61 and C62 in the adjustment circuit AC1 are stray capacitances that occur between the vias that constitute inductors L11 and L31 in the resonators RC1 and RC3, respectively, and the via that constitutes inductor L61 in the adjustment circuit AC1.

[0036] Similarly, capacitors C71 and C72 in the actual configuration of the adjustment circuit AC2 are stray capacitances that occur between the vias that constitute inductors L31 and L51, respectively, in the resonators RC3 and RC5, and the via that constitutes inductor L71 in the adjustment circuit AC2.

[0037] (Effect of coupling adjustment circuit) The principle by which such a coupling adjustment circuit can improve the attenuation characteristics of a low-pass filter will be explained using Figure 3. For the sake of simplicity, Figure 3 will use a third-order low-pass filter as an example. In the filter circuit 110 in Figure 2, the configurations of resonators RC1, RC2, RC3 and two sets of resonators RC3, RC4, RC5 correspond to the third-order low-pass filter.

[0038] In Figure 3, the configuration of an ideal third-order low-pass filter is shown in the left figure (A), the configuration of an actual low-pass filter is shown in the middle figure (B), and the configuration of the low-pass filter in the embodiment is shown in the right figure (C). The upper section shows a schematic circuit, and the lower section shows a simulation graph of the pass characteristics of the said circuit.

[0039] In each graph, the solid lines (LN11, LN13, LN15) represent insertion loss, and the dashed lines (LN12, LN14, LN16) represent reflection loss. In addition, in the middle figure (B) and the right figure (C), the graph in the left figure (A) is shown as a thin line for comparison.

[0040] The low-pass filter in the left figure (A) is an ideal (theoretical) low-pass filter with almost the same configuration as the filter circuit 110 shown in Figure 2. This low-pass filter includes a resonator RCA connected to the input terminal Tin, a resonator RCB connected to the output terminal Tout, and a capacitor CA3 connected between the connection node NA between resonators RCA and RCB and the ground terminal GND. Resonator RCA includes an inductor LA1 and a capacitor CA1 connected in parallel between the input terminal Tin and the connection node NA. Resonator RCB includes an inductor LA2 and a capacitor CA2 connected in parallel between the connection node NA and the output terminal Tout.

[0041] In this low-pass filter, as shown by line LN11 in the graph below, an attenuation pole is generated around 5.2 GHz in the non-passband, and the desired attenuation amount can be obtained by obtaining a relatively steep attenuation characteristic.

[0042] However, when a circuit is implemented within a dielectric laminate, sufficient distance between resonators cannot be secured due to constraints on the size of the device. As a result, capacitive coupling due to stray capacitance SC occurs to a considerable extent between adjacent resonators, as shown in Figure (B). In addition, inductive coupling M may occur between inductor LA1 and inductor LA3.

[0043] In the case of Figure (B), in the signal transmission path from the input terminal Tin to the output terminal Tout, in addition to the path passing through the series-connected resonators RCA and RCB, a path is created that passes through the stray capacitance SC and the inductive coupling M. Due to this additional path, the relatively higher frequency side of the input high-frequency signal is transmitted to the output terminal Tout, and as shown by the solid line LN13, the attenuation at the attenuation pole decreases, and the attenuation characteristics in the non-passband may deteriorate.

[0044] In the low-pass filter shown in Figure (C) corresponding to the embodiment, by arranging a shunt-connected inductor LG (corresponding to inductors L61, L71, and L67 in Figure 2), the stray capacitance SC generated between the resonators is generated as stray capacitances SC1 and SC2 between the inductor LG and the stray capacitances SC1 and SC2, and these stray capacitances SC1 and SC2 are connected to the ground terminal GND. In other words, a shunt-connected high-pass filter is substantially formed by the stray capacitances SC1 and SC2 and the inductor LG.

[0045] With this configuration, high-frequency signals flowing into the path formed by stray capacitances SC1 and SC2 are transmitted to ground through inductor LG and are not transmitted to terminal T1. At this time, a portion of inductor LG is positioned between inductors LA1 and LA3, so the inductive coupling M that occurred between inductors LA1 and LA3 now also includes the inductive coupling between inductor LA1 and inductor LG, and between inductor LA3 and inductor LG. As a result, the amount of inductive coupling that occurs between inductors LA1 and LA3 is smaller than in the circuit in Figure (B), which also reduces the degradation of isolation between the resonators. As a result, as shown by the solid line LN15, even if stray capacitance and inductive coupling occur between the resonators, the attenuation characteristics in the non-passband can be improved to the same level as in Figure (A).

[0046] Note that in the low-pass filter shown in Figure (C) on the right, the reflection loss is worse than in Figure (A) on the left, but this can be improved by adjusting the capacitance of capacitor CA2. In Figure 4, the insertion loss after adjusting capacitor CA2 is shown by the solid line KN17, and the reflection loss is shown by the dashed line LN18. As shown in Figure 4, by adjusting the capacitance of capacitor CA2, the reflection loss in the passband from 0 to 4 GHz can be improved to the same level as in Figure (A) on the left of Figure 3.

[0047] As described above, in the filter circuit 110 shown in Figure 2, a third-order low-pass filter is formed as shown in Figure 3, with the configuration of resonators RC1, RC2, RC3 and resonators RC3, RC4, RC5. Therefore, even in the filter circuit 110, it is possible to suppress the stray capacitance between resonators and the decrease in damping characteristics due to inductive coupling that inevitably arise from the size constraints of the equipment.

[0048] (Detailed configuration of the low-pass filter) Next, the detailed configuration of the low-pass filter 100 according to the embodiment will be described using Figures 5 and 6. In Figures 5 and 6, for ease of understanding, the case in which the low-pass filter 100 is a discrete element arranged alone within the dielectric laminate is described as an example, but the low-pass filter 100 may also be arranged together with the high-pass filter 200 within the same laminate as part of the diplexer 40.

[0049] Referring to Figures 5 and 6, the low-pass filter 100 comprises a rectangular or substantially rectangular parallelepiped laminate 130 formed by stacking multiple dielectric layers LY1 to LY16 along a predetermined direction. In the laminate 130, the direction in which the multiple dielectric layers LY1 to LY16 are stacked is defined as the stacking direction. Each dielectric layer of the laminate 130 is formed of a ceramic such as low-temperature co-fired ceramics (LTCC) or a resin.

[0050] Within the laminate 130, inductors and capacitors for the low-pass filter 100 are formed by multiple electrodes provided in each dielectric layer and multiple vias provided between the dielectric layers. In the following explanation, for the sake of simplicity, the laminate 130 will be described as having the multilayer structure described above, but the laminate 130 may also have a single-layer structure.

[0051] In this specification, "via" refers to a conductor formed in a dielectric layer to connect electrodes provided in different dielectric layers. Vias are formed, for example, by conductive paste, plating, and / or metal pins. In the following description, the stacking direction of dielectric layers LY1 to LY16 in the laminate 130 is defined as the "Z-axis direction," the direction perpendicular to the Z-axis direction and along the long side of the laminate 130 is defined as the "X-axis direction," and the direction along the short side of the laminate 130 is defined as the "Y-axis direction." In the following, the positive Z-axis direction in each figure may be referred to as the upper side, and the negative Z-axis direction as the lower side.

[0052] The laminate 130 includes an upper surface 131 (first main surface) and a lower surface 132 (second main surface). Directional mark DM for specifying the direction of the low-pass filter 100 is placed on the upper surface 131 (dielectric layer LY1) of the laminate 130. As shown in Figure 5, the lower surface 132 (dielectric layer LY16) of the laminate 130 has an antenna terminal TA, a terminal T1, and a ground terminal GND as external terminals for connecting the low-pass filter 100 to external equipment. Each external terminal is a flat electrode and is an LGA (Land Grid Array) terminal regularly arranged on the lower surface 132 of the laminate 130.

[0053] The antenna terminal TA located in the dielectric layer LY16 on the lower surface 132 is connected to the flat electrode PL10 located in the dielectric layer LY15 via via V1. The flat electrode PL10 is a strip-shaped electrode with an L-shape, to which via VL11 is connected in the positive direction of the Y-axis, and via VL14 is connected in the negative direction of the Y-axis.

[0054] Via VL11 is connected to a planar electrode PL11 located in the dielectric layer LY3. Planar electrode PL11 is a linear electrode extending along the Y-axis, with via VL11 connected to its positive Y-axis end. Planar electrode PL11 is connected to one end of a strip-shaped planar electrode PL12 located in the dielectric layer LY11 by via VL12 located at its negative Y-axis end.

[0055] Via VL14, connected to the flat electrode PL10, is connected to the capacitor electrode PC10 located in the dielectric layer LY8. Capacitor electrode PC10 is also connected by via VL13 to capacitor electrode PC11 located in the dielectric layer LY6, and capacitor electrode PC12 located in the dielectric layer LY4.

[0056] The capacitor electrodes PC10, PC11, and PC12 are all flat electrodes with a roughly rectangular shape. When viewed from the stacking direction in a plan view, each of the capacitor electrodes PC10 and PC11 overlaps at least partially with the capacitor electrode PC13 located in the dielectric layer LY7. Also, when viewed from the stacking direction in a plan view, each of the capacitor electrodes PC11 and PC12 overlaps at least partially with the capacitor electrode PC14 located in the dielectric layer LY5.

[0057] The capacitor electrodes PC13 and PC14 have a shape in which a portion of the rectangular flat electrode protrudes in the X-axis direction, and via VL15 is connected to this protruding portion. Via VL15 is connected to the middle portion of the flat electrode PL12 in the dielectric layer LY11. Via VL15 is also connected to the capacitor electrode PC30 located in the dielectric layer LY6, and the capacitor electrode PC31 located in the dielectric layer LY8.

[0058] Capacitor electrodes PC10 to PC14 constitute capacitor C11 in Figure 2. In addition, plate electrodes PL10 and PL11 and vias VL11 to VL14 constitute inductor L11 in Figure 2. That is, capacitor electrodes PC10 to PC14, plate electrodes PL10 and PL11, and vias VL11 to VL14 constitute resonator RC1.

[0059] A via VL30 is connected to the other end of the dielectric layer LY11 flat electrode PL12. Via VL30 is connected to the capacitor electrode PC20 located in the dielectric layer LY13, and also to the flat electrode PL31 located in the dielectric layer LY3.

[0060] The flat electrode PL31, like the flat electrode PL11, is a linear electrode extending along the Y-axis, with a via VL30 connected to its positive Y-axis end. The negative Y-axis end of the flat electrode PL31 is connected via VL31 to one end of a strip-shaped flat electrode PL32 located in the dielectric layer LY10.

[0061] A via VL32 is connected to the other end of the flat electrode PL32. Via VL32 is connected to the flat electrode PL33 located in the dielectric layer LY3. The flat electrode PL33 is a linear electrode located parallel to the flat electrode PL31, and via VL32 is connected to its positive Y-axis end. The negative Y-axis end of the flat electrode PL31 is connected via VL33 to one end of a strip-shaped flat electrode PL34 located in the dielectric layer LY11, and also to a capacitor electrode PC40 located in the dielectric layer LY13.

[0062] In Figure 6, via VL33 obscures the view, but via VL34 is connected to the middle portion of the flat electrode PL34. The flat electrode PL34 is connected by via VL34 to the capacitor electrode PC32 located in the dielectric layer LY7, and to the capacitor electrode PC33 located in the dielectric layer LY5.

[0063] The capacitor electrodes PC30 to PC33 are all flat plates with a roughly rectangular shape, and when viewed from the stacking direction, at least a portion of them overlap each other. Capacitor electrodes PC30 to PC33 constitute capacitor C31 in Figure 2. Inductor L31 in Figure 2 is formed by flat plates PL31 to PL33 and vias VL30 to VL33. That is, resonator RC3 is formed by capacitor electrodes PC30 to PC33, flat plates PL31 to PL33, and vias VL15, VL30 to VL34.

[0064] In Figure 6, via VL70 obscures the view, but via VL50 is connected to the other end of the flat electrode PL34. Via VL50 is connected to the flat electrode PL50 located in the dielectric layer LY3.

[0065] The flat electrode PL50 is a linear electrode extending along the Y-axis, with a via VL50 connected to its positive Y-axis end. The flat electrode PL50 is connected to one end of the flat electrode PL51 located in the dielectric layer LY15 by a via VL51 located at its negative Y-axis end.

[0066] The flat electrode PL51 is a strip-shaped electrode with a roughly L-shape. Via VL51 is connected to the negative end of the Y-axis, and via VL52 is connected to the positive end of the Y-axis. In addition, the flat electrode PL51 is connected to terminal T1 located in the dielectric layer LY16 via via V2.

[0067] Via VL52 is connected to capacitor electrode PC52 located in dielectric layer LY8. Capacitor electrode PC52 is also connected by via VL53 to capacitor electrode PC51 located in dielectric layer LY6 and capacitor electrode PC50 located in dielectric layer LY4.

[0068] The capacitor electrodes PC50, PC51, and PC52 are all flat electrodes with a roughly rectangular shape. When viewed from the stacking direction in a plan view, each of the capacitor electrodes PC50 and PC51 overlaps at least partially with the capacitor electrode PC33 located in the dielectric layer LY5. Also, when viewed from the stacking direction in a plan view, each of the capacitor electrodes PC51 and PC52 overlaps at least partially with the capacitor electrode PC32 located in the dielectric layer LY5.

[0069] Capacitor electrodes PC50 to PC52 constitute capacitor C51 in Figure 2. In addition, plate electrodes PL50 and PL51 and vias VL50 to VL53 constitute inductor L51 in Figure 2. That is, capacitor electrodes PC50 to PC52, plate electrodes PL50 and PL51, and vias VL50 to VL53 constitute the resonator RC5.

[0070] Each of the capacitor electrodes PC20 and PC40, located in the dielectric layer LY13, is a substantially rectangular flat electrode extending in the X-axis direction. When viewed from the stacking direction in a plan view, the capacitor electrodes PC20 and PC40 overlap with the capacitor electrode PG1 located in the dielectric layer LY14. Also, when viewed from the stacking direction in a plan view, at least a portion of each of the capacitor electrodes PC20 and PC40 overlaps with the capacitor electrode PC80 located in the dielectric layer LY12.

[0071] Capacitor electrode PC80 is connected to capacitor electrode PG1 in dielectric layer LY14 by via VG3. Capacitor electrode PG1 is connected to ground terminal GND located in dielectric layer LY16 by via VG1, a flat electrode PL1 located in dielectric layer LY15, and via VG2.

[0072] Capacitor C21 in Figure 2 is formed by capacitor electrode PC20 and capacitor electrodes PG1 and PC80. Capacitor C41 in Figure 2 is formed by capacitor electrode PC40 and capacitor electrodes PG1 and PC80. Furthermore, inductor L24 in Figure 2 is formed by vias VG1 and VG2 and the plate electrode PL1.

[0073] Specifically, the resonator RC2 in Figure 2 is constructed from capacitor electrodes PC20, PG1, PC80, vias VG1, VG2, and plate electrode PL1. Similarly, the resonator RC4 in Figure 2 is constructed from capacitor electrodes PC40, PG1, PC80, vias VG1, VG2, and plate electrode PL1.

[0074] Vias VL60 and VL70 are further connected to the capacitor electrode PG1. Via VL60 is connected to a flat electrode PL60 located in the dielectric layer LY2. The flat electrode PL60 is a linear electrode extending along the Y-axis, with via VL60 connected to its positive Y-axis end. Via VL61 is connected to the negative Y-axis end of the flat electrode PL60. The other end of via VL61 extends to the dielectric layer LY9, and its end is an open end.

[0075] The inductor L61 in Figure 2 is formed by the flat electrode PL60 and via VL60. Furthermore, the vias VG1 and VG2 and the flat electrode PL1 that constitute the aforementioned inductor L24 also function as inductor L67 in Figure 2.

[0076] When viewed from the stacking direction in a plan view, via VL60 is positioned along vias VL11 and VL30 in the region between via VL11 in resonator RC1 and via VL30 in resonator RC3. As a result, via VL60 and via VL11 are capacitively coupled by stray capacitance, and via VL60 and via VL30 are capacitively coupled by stray capacitance.

[0077] Therefore, the capacitive coupling between via VL60 and via VL11 forms capacitor C61 in Figure 2. Similarly, the capacitive coupling between via VL60 and via VL30 forms capacitor C62 in Figure 2. In other words, vias VL60, VG1, VG2 and the plate electrodes PL1, PL60 form the adjustment circuit AC1 in Figure 2.

[0078] Via VL61 functions as a stub (open stub) for adjusting the frequency of the attenuation pole generated by the coupling of resonators RC1 and RC3. Therefore, depending on the frequency of the generated attenuation pole, via VL61 may not be provided. Alternatively, the other end of via VL61 may be connected to the ground terminal GND to create a short stub.

[0079] Via VL70 is connected to a flat electrode PL62 located in the dielectric layer LY3. Flat electrode PL62 is a linear electrode extending along the Y-axis, with via VL70 connected to its negative Y-axis end. Via VL71 is connected to the positive Y-axis end of flat electrode PL62. The other end of via VL71 extends to the dielectric layer LY9, and its end is an open end. In the dielectric layer LY2, flat electrode PL62 is connected to flat electrode PL60 by flat electrode PL61. Via VL71, like via VL61, functions as a stub for adjusting the frequency of the damping pole produced by the coupling of resonators RC3 and RC5.

[0080] The inductor L71 in Figure 2 is formed by the plate electrode PL62 and via VL70. Furthermore, as mentioned above, vias VG1 and VG2 and the plate electrode PL1 also function as inductor L67 in Figure 2.

[0081] When viewed from the stacking direction in a plan view, via VL70 is positioned along vias VL30 and VL50 in the region between via VL30 in resonator RC3 and via VL50 in resonator RC5. As a result, via VL70 and via VL30 are capacitively coupled by stray capacitance, and via VL70 and via VL50 are capacitively coupled by stray capacitance.

[0082] Therefore, the capacitive coupling between via VL70 and via VL30 forms capacitor C71 in Figure 2. Similarly, the capacitive coupling between via VL70 and via VL50 forms capacitor C72 in Figure 2. In other words, vias VL62, VG1, VG2 and the plate electrodes PL1, PL70 form the adjustment circuit AC2 in Figure 2.

[0083] As described above, by arranging electrodes and vias in the laminate 130, the low-pass filter 100 shown in Figure 2 is realized.

[0084] (Variation 1) In the above explanation, in the dielectric layer LY2, the flat electrode PL60 included in the adjustment circuit AC1 and the flat electrode PL62 included in the adjustment circuit AC2 were connected by the flat electrode PL61. However, the flat electrode PL61 is not necessarily an essential component.

[0085] Figure 7 is a plan view of the dielectric layers LY2 and LY3 in the low-pass filter 100A of Modification 1, viewed from the stacking direction. As shown in Figure 7, in the low-pass filter 100A of Modification 1, the flat electrode PL62 in the dielectric layer LY2 is not present.

[0086] Even with a configuration like that of Modified Example 1, the attenuation characteristics in the non-passband can be improved because adjustment circuits AC1 including a flat plate electrode PL60 and AC2 including a flat plate electrode PL62 are provided. As in the embodiment, by directly connecting adjustment circuits AC1 and AC2 with a flat plate electrode PL61 and strengthening the magnetic coupling between adjustment circuits AC1 and AC2, the magnetic field coupling between inductor L11 and inductor L51 can be adjusted, thereby adjusting the amount of attenuation near the passband of the low-pass filter 100. As a result, the attenuation characteristics can be further improved compared to Modified Example 1.

[0087] Figure 8 is a diagram illustrating the pass characteristics of the low-pass filter 100 in the embodiment, the low-pass filter 100A in the modified example 1, and the low-pass filter 100X in the comparative example where the coupling adjustment circuit 120 is not provided. The upper part of Figure 8 shows the schematic configuration of the coupling adjustment circuit in the low-pass filter for each case, and the lower part shows graphs of the pass characteristics (reflection loss, insertion loss) for each case.

[0088] In the comparative example, the low-pass filter 100X does not have adjustment circuits AC1 and AC2 between resonators RC1 and RC3, nor between resonators RC3 and RC5.

[0089] In the lower graph of Figure 8, the solid lines LN20, LN30, and LN40 represent insertion loss, and the dashed lines LN25, LN35, and LN45 represent reflection loss. Lines LN20 and LN25 represent the low-pass filter 100 of the embodiment, lines LN30 and LN35 represent the low-pass filter 100A of Modification 1, and lines LN40 and LN45 represent the low-pass filter 100X of the comparative example.

[0090] As shown in the graph in Figure 8, in Modification 1, the attenuation characteristics in the non-passband are improved compared to the comparative example, but the attenuation at the attenuation pole near the passband is only about 40 dB. On the other hand, in the case of the low-pass filter 100 of the embodiment, an attenuation of about 65 dB is obtained at the attenuation pole near the passband, and even in the 5 GHz to 9 GHz region of the non-passband, a greater amount of attenuation is secured compared to the comparative example and Modification 1.

[0091] As described above, even in the low-pass filter 100A of Modification 1, which does not have a flat electrode PL62 connecting adjustment circuits AC1 and AC2, the attenuation characteristics of the non-passband can be improved compared to the case where the coupling adjustment circuit 120 is not provided. Furthermore, the attenuation characteristics can be further improved by connecting adjustment circuits AC1 and AC2 with a flat electrode PL62, as in the low-pass filter 100 of the embodiment.

[0092] In the embodiment, "resonator RC1," "resonator RC3," and "resonator RC5" correspond to "first resonator," "second resonator," and "third resonator" in this disclosure, respectively. In the embodiment, "capacitor C21" and "capacitor C41" correspond to "first capacitor" and "second capacitor" in this disclosure, respectively. In the embodiment, "adjustment circuit AC1" and "adjustment circuit AC2" correspond to "first adjustment circuit" and "second adjustment circuit" in this disclosure, respectively. In the embodiment, "plate electrode PL62" corresponds to "connection electrode" in this disclosure. In the embodiment, "inductor L24" corresponds to "ground inductor" in this disclosure. In the embodiment, "antenna terminal TA" corresponds to "input terminal" in this disclosure.

[0093] (Modification 2) Modification 2 describes a case where the features of this disclosure are applied to a third-order low-pass filter. Furthermore, in Modification 2, the first and third resonators connected in series between the input terminal and the output terminal are configured differently.

[0094] Figure 9 is a diagram illustrating the configuration and pass characteristics of the low-pass filter in Modification 2. The upper part of Figure 9 shows the equivalent circuits of the third-order low-pass filter 150 corresponding to the embodiment and the low-pass filter 150A of Modification 2. The lower part of Figure 9 shows the pass characteristics (reflection loss, insertion loss) of the low-pass filter 150 and the low-pass filter 150A.

[0095] Note that in the equivalent circuit, only the filter circuit portion is shown, and the coupling adjustment circuit is omitted. The coupling adjustment circuit is configured as shown in the adjustment circuit AC1 in Figure 2.

[0096] In the low-pass filter 150, resonators RC1 and RC3 are connected in series between the antenna terminal TA and terminal T1. Resonator RC1 includes an inductor L1 and a capacitor C1 connected in parallel between terminals T10 and T11. Resonator RC3 includes an inductor L3 and a capacitor C3 connected in parallel between terminals T12 and T13. A capacitor C2 is connected between the connection node between resonators RC1 and RC3 and the ground terminal GND.

[0097] On the other hand, in the low-pass filter 150A, resonators RC1A and RC3A are arranged in place of resonators RC1 and RC3 in the low-pass filter 150. Resonator RC1A includes inductors L1A and L2A and capacitor C1. Resonator RC3A includes inductors L3A and L4A and capacitor C3.

[0098] In resonator RC1A, inductor L1A and resonator RC11, which consists of inductor L2A and capacitor C1 connected in series, are connected in parallel between terminals T10 and T11. Similarly, in resonator RC2A, inductor L3A and resonator RC11, which consists of inductor L4A and capacitor C3 connected in series, are connected in parallel between terminals T12 and T13.

[0099] The combined inductance of inductors L1A and L2A is the same as the inductance of inductor L1, and the combined inductance of inductors L3A and L4A is the same as the inductance of inductor L3. Therefore, the resonant frequency of resonator RC1A is the same as the resonant frequency of resonator RC1, and the resonant frequency of resonator RC2A is the same as the resonant frequency of resonator RC2. Therefore, the frequency of the attenuation pole generated in low-pass filter 150A is the same as the frequency of the attenuation pole generated in low-pass filter 150.

[0100] However, the inductance value in the signal transmission path from antenna terminal TA to terminal T1 is smaller in the low-pass filter 150A of Modified Example 2 (L1 + L3 > L1A + L3A). Therefore, the loss occurring in the signal transmission path in the low-pass filter 150A is reduced compared to the low-pass filter 150. Consequently, the pass-through characteristics can be improved by using a resonator configuration like that in Modified Example 2.

[0101] In the lower graph of Figure 9, the solid lines LN50 and LN51 represent the insertion loss and reflection loss of the low-pass filter 150A of the modified example 2, respectively. The dashed lines LN55 and LN56 represent the insertion loss and reflection loss of the low-pass filter 150 corresponding to the embodiment, respectively.

[0102] As shown in the graph in Figure 9, the low-pass filter 150A exhibits a steeper attenuation characteristic in the non-passband near the passband compared to the low-pass filter 150. Although the attenuation at the attenuation pole is slightly lower than that of the low-pass filter 150, an attenuation of approximately 60 dB is still achievable.

[0103] As described above, by dividing the inductor in each resonator connected in series in the signal transmission path from the input terminal to the output terminal, and connecting in parallel a first circuit consisting of some of the inductors and a second circuit consisting of a series resonant circuit of the remaining inductors and capacitors, the steepness of the attenuation characteristics can be increased.

[0104] In Modification 2, "Inductor L1" and "Inductor L3" each correspond to "First Circuit" and "First Coil" in this disclosure. In Modification 2, "Resonator RC11" and "Resonator RC12" each correspond to "Second Circuit" in this disclosure. In Modification 2, "Terminal T10" and "Terminal T12" each correspond to "First Terminal" in this disclosure. In Modification 2, "Terminal T11" and "Terminal T13" each correspond to "Second Terminal" in this disclosure.

[0105] (Variation 3) Modification 3 describes another example of a resonator configuration in which the input terminal and output terminal are connected in series.

[0106] Figure 10 shows an example of the equivalent circuit of a diplexer 40A to which the low-pass filter 100B according to Modification 3 is applied. In Figure 10, as in Figure 2, only the equivalent circuit of the low-pass filter 100B is shown, and the equivalent circuit of the high-pass filter 200 is omitted.

[0107] Referring to Figure 10, the low-pass filter 100B includes a filter circuit 110B and a coupling adjustment circuit 120. In the filter circuit 110B, the configuration of the resonators RC1, RC3, and RC5 differs from that of the low-pass filter 100 in Figure 2, but the other configurations are the same as those of the low-pass filter 100. The coupling adjustment circuit 120 is the same as that of the low-pass filter 100 in Figure 2.

[0108] In the filter circuit 110B, the resonators RC1, RC3, and RC5 are generally configured in parallel with one inductor and an LC series resonator, similar to the configuration in Modification 2.

[0109] Resonator RC1 includes inductor L11B and resonator RC15. Resonator RC15 includes inductors L12B, L13B and capacitor C11. In resonator RC15, capacitor C11 is connected between one end of inductor L12B and one end of inductor L13B. The other end of inductor L12B is connected to one end of inductor L11B and the antenna terminal TA. The other end of inductor L13B is connected to the other end of inductor L11B and resonator RC3.

[0110] Resonator RC3 includes inductor L31B and resonator RC35. Resonator RC35 includes inductors L32B, L33B and capacitor C31. In resonator RC35, capacitor C31 is connected between one end of inductor L32B and one end of inductor L33B. The other end of inductor L32B is connected to one end of inductor L31B and resonator RC1. The other end of inductor L33B is connected to the other end of inductor L31B and resonator RC5.

[0111] Resonator RC5 includes inductor L51B and resonator RC55. Resonator RC55 includes inductors L52B, L53B and capacitor C51. In resonator RC55, capacitor C51 is connected between one end of inductor L52B and one end of inductor L53B. The other end of inductor L52B is connected to one end of inductor L51B and resonator RC3. The other end of inductor L53B is connected to the other end of inductor L51B and terminal T1.

[0112] Even with this configuration, the attenuation characteristics of the non-passband can be improved by providing the coupling adjustment circuit 120. Furthermore, by dividing the inductor in each resonator connected in series in the signal transmission path from the input terminal to the output terminal, and connecting in parallel a first circuit consisting of some of the inductors and a second circuit consisting of a series resonant circuit of the remaining inductors and capacitors, the steepness of the attenuation characteristics can be increased.

[0113] In Modification 3, "Inductor L11B," "Inductor L31B," and "Inductor L51B" each correspond to the "First Circuit" and "First Coil" in this disclosure. In Modification 3, "Resonator RC21," "Resonator RC31," and "Resonator RC41" each correspond to the "Second Circuit" in this disclosure.

[0114] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of the present invention is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope equivalent to the claims are intended to be included. [Explanation of symbols]

[0115] 10 Communication device, 20 High-frequency front-end circuit, 30 RFIC, 40, 40A diplexer, 100, 100A, 100B, 100X, 150, 150A low-pass filter, 110, 110B filter circuit, 120 Coupling adjustment circuit, 130 Laminate, 131 Top surface, 132 Bottom surface, 200 High-pass filter, AC1, AC2 adjustment circuit, ANT Antenna device, C1~C3, C11, C21, C31, C41, C51, C61, C62, C71, C72, CA1~CA3 Capacitors, DM Directional mark, GND Ground terminal, IN, Tin Input terminals: L1, L3, L1A~L4A, L11, L11B~L13B, L24, L31, L31B~L33, BL51, L51B~L53B, L61, L67, L71, LA1, LA2, LG Inductors: LNA1, LNA2 Amplifier circuits: LY1~LY16 Multiple dielectric layers: N1~N4, NA Connection nodes: PC10~PC14, PC20, PC30~PC33, PC40, PC50~PC52, PC80, PG1 Capacitor electrodes: PL1, PL10~PL12, PL31~PL34, PL50, PL51, PL60~PL62, PL70 Plain electrodes: RC1~RC5, RC1A, RC2A, RC3A, RC11, RC12, RC15, RC21, RC31, RC35, RC41, RC51, RC55, RCA, RCB Resonators: SC1, SC2 Stray capacitances: T1, T2, T10~T13 Terminals: TA Antenna terminal: Tout Output terminals: V1, V2, VG1~VG3, VL11~VL15, VL30~VL34, VL50~VL53, VL60~VL62, VL70, VL71 Vias.

Claims

1. A laminate in which multiple dielectric layers are stacked in the stacking direction, The laminate includes an input terminal, an output terminal, and a ground terminal, A first resonator connected to the input terminal, A second resonator connected between the first resonator and the output terminal, A first capacitor connected between the connection node between the first resonator and the second resonator and the ground terminal, The system includes a first adjustment circuit for adjusting the coupling between the first resonator and the second resonator, Each of the first and second resonators is an LC parallel resonant circuit including a capacitor and an inductor having vias extending in the stacking direction, The first adjustment circuit includes a via whose one end is connected to the ground terminal. When viewed in plan from the stacking direction, the vias of the first adjustment circuit are arranged along the vias of the first resonator and the vias of the second resonator in the region between the vias of the first resonator and the vias of the second resonator, forming a low-pass filter.

2. The low-pass filter according to claim 1, wherein the via of the first adjustment circuit is capacitively coupled to the via of the first resonator and the via of the second resonator.

3. A third resonator connected between the second resonator and the output terminal, A second capacitor connected between the connection node between the second resonator and the third resonator and the ground terminal, The system includes a second adjustment circuit for adjusting the coupling between the second resonator and the third resonator, The third resonator is an LC parallel resonant circuit including a capacitor and an inductor having vias extending in the stacking direction, The second adjustment circuit includes a via whose one end is connected to the ground terminal. The low-pass filter according to claim 1 or 2, wherein, when viewed in plan from the stacking direction, the vias of the second adjustment circuit are arranged along the vias of the second resonator and the vias of the third resonator in the region between the vias of the second resonator and the vias of the third resonator.

4. The low-pass filter according to claim 3, wherein the via of the second adjustment circuit is capacitively coupled to the via of the second resonator and the via of the third resonator.

5. The low-pass filter according to claim 3 or claim 4, further comprising a connecting electrode that connects a via of the first adjustment circuit to a via of the second adjustment circuit.

6. The laminate has a first main surface and a second main surface perpendicular to the lamination direction, The input terminal, the output terminal, and the ground terminal are arranged on the second main surface. The low-pass filter according to claim 5, wherein the connecting electrodes are arranged in the dielectric layer on the first main surface side of the vias of each resonator.

7. The low-pass filter according to any one of claims 3 to 6, further comprising a ground inductor having one end connected to the first capacitor and the second capacitor and the other end connected to the ground terminal.

8. The low-pass filter according to any one of claims 1 to 7, further comprising a stub connected to the other end of each adjustment circuit via.

9. Each resonator is, First terminal and second terminal, The first terminal and the second terminal include a first circuit and a second circuit connected in parallel to each other, In each resonator, The inductor includes a first coil and a second coil, The first circuit includes the first coil, The low-pass filter according to any one of claims 1 to 8, wherein the second circuit includes a capacitor and the second coil connected in series.

10. A low-pass filter according to any one of claims 1 to 9, A diplexer comprising a high-pass filter connected to the aforementioned input terminal.

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