Image fixation detection circuit

Abstract

This system detects image fixation caused by frame memory while keeping the size of the device under control. [Solution] A video processing device having a frame memory that stores and outputs video data consisting of a plurality of consecutive data fragments for each frame, is provided with a video fixation detection circuit that detects video fixation of video data output from the frame memory, and includes a bit replacement circuit that receives video data as input and, before storing it in the frame memory, alternately replaces the data values ​​of specific bits of the plurality of data fragments with "0" and "1" for each frame to which the data fragment belongs and supplies it to the frame memory, a data holding unit that holds the data of the specific bits of the video data output from the frame memory, and a comparison unit that compares the data value of a specific bit in the video data for one frame output from the frame memory with the data value of a specific bit held in the data holding unit and outputs the result.

Description

Technical Field

[0001] The present disclosure relates to a video sticking detection circuit that detects video sticking caused by a frame memory of a video processing device.

Background Art

[0002] In in-vehicle display devices such as electronic mirrors and CID (Center Information Display), when displaying the video of a camera on a display, a frame memory for storing a video signal for one frame is used. If an abnormality occurs in this frame memory, there is a risk that the video of the same frame will be repeatedly displayed and become a still image state, that is, so-called video sticking will occur.

[0003] Therefore, a video processing device having a configuration for determining whether or not video sticking has occurred due to a malfunction of the video processing device has been proposed (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

[0005] [Summary] In the conventional method for detecting video sticking, it is necessary to separately mount a circuit for detecting video sticking in the video processing device, which has a problem that the device scale increases and the cost rises.

[0006] An image processing device according to one aspect of the present disclosure includes an image processing device having a frame memory for storing and outputting image data consisting of a plurality of consecutive data fragments, one frame at a time, and an image fixation detection circuit for detecting image fixation of the image data output from the frame memory, the circuit comprising: a bit replacement circuit that receives the image data as input and, before storing it in the frame memory, alternately replaces the data values ​​of specific bits in the plurality of data fragments with "0" and "1" for each frame to which the data fragment belongs, and supplies it to the frame memory; a data holding unit that holds the data of the specific bits of the image data output from the frame memory; and a comparison unit that compares the data value of the specific bits in the image data for one frame output from the frame memory with the data value of the specific bits held in the data holding unit and outputs the result. [Brief explanation of the drawing]

[0007] [Figure 1] This is a block diagram showing the configuration of the video fixation detection circuit according to Embodiment 1 of the present disclosure. [Figure 2] This figure shows an example of replacing and comparing the least significant bit. [Figure 3] This is a block diagram showing the configuration of a video fixation detection circuit when a frame memory is provided for each of the RGB channels. [Figure 4A] This diagram schematically shows what happens when the least significant bit of all data in a frame is inverted. [Figure 4B] This diagram schematically shows the case where only the least significant bit of the last data in a frame is inverted. [Figure 4C] This diagram schematically shows the case where only the least significant bit of the first data in a frame is inverted. [Figure 5] This is a block diagram showing a video fixation detection circuit configured to replace the least significant bit after image processing. [Figure 6] This is a block diagram showing the configuration of the video fixation detection circuit according to Embodiment 2 of the present disclosure. [Figure 7]This figure shows an example of the substitution and comparison of the least significant bit in Example 2. [Detailed Description] Preferred embodiments of the present disclosure are described in detail below. In the following descriptions and accompanying drawings, substantially identical or equivalent parts are denoted by the same reference numerals. [Example 1]

[0008] Figure 1 is a block diagram showing the configuration of an image fixation detection circuit 100 according to an embodiment of the present disclosure. The image fixation detection circuit 100 is provided in an image processing device having a frame memory FM and an image processing unit PU, and is a circuit that detects image fixation of image data output from the frame memory FM.

[0009] The video fixation detection circuit 100 includes a least significant bit replacement circuit 11, a previous frame data holding unit 12, and a comparison unit 13. The video fixation detection circuit 100 receives input video data VIN, which consists of multiple consecutive data fragments.

[0010] The least significant bit replacement circuit 11 performs a process of alternately replacing the data value of the least significant bit (LSB) of multiple data fragments that make up the input video data VIN with "0" and "1" for each frame of the input video data VIN. The least significant bit replacement circuit 11 supplies the replaced video data RV, in which the data value of the least significant bit has been replaced, to the frame memory FM.

[0011] The frame memory FM is composed of volatile semiconductor memory devices such as DRAM (Dynamic Random Access Memory). The frame memory FM receives the replaced video data RV from the least significant bit replacement circuit 11, stores it, and outputs it sequentially for each frame. In the following description, to distinguish it from the replaced video data RV input to the frame memory FM, the replaced video data output from the frame memory FM will be referred to as replaced video data RV1. The replaced video data RV1 output from the frame memory FM is supplied to the previous frame data holding unit 12, the image processing unit PU, and the comparison unit 13, respectively.

[0012] The previous frame data holding unit 12 holds the replaced video data RV1 output from the frame memory FM for the duration of one frame in the frame memory FM (i.e., the update cycle of the frame memory FM), and then supplies it to the comparison unit 13 as replaced video data RV2.

[0013] The image processing unit (PU) performs image processing on the replaced video data RV1 output from the frame memory (FM) and outputs it as the video output (VOUT).

[0014] The comparison unit 13 receives the replaced video data RV1 output from the frame memory FM and the replaced video data RV2 output from the previous frame data holding unit 12, and compares the data values ​​of the least significant bits of these data. The comparison unit 13 outputs a video fixation determination signal JS indicating logic level 0 if the two do not match, and logic level 1 if they match.

[0015] Figure 2 illustrates, as an example, the replacement of the least significant bit data value by the least significant bit replacement circuit 11 and the comparison of the least significant bit data value by the comparison unit 13.

[0016] If the bit sequence of the first frame of the input video data VIN is "01010101", the bit sequence of the second frame is "10101010", and the bit sequence of the third frame is "00110011", the least significant bit replacement circuit 11 will alternately replace the data values ​​of these least significant bits with "0" and "1" for each frame, so that the bit sequence of the first frame of the replaced video data RV will be "01010100", the bit sequence of the second frame will be "10101011", and the bit sequence of the third frame will be "00110010".

[0017] The comparison unit 13 compares the data value of the least significant bit of each of the replaced video data RV1 and replaced video data RV2, that is, the data value of the least significant bit in the bit sequence of the replaced video data RV for frame 1 with the data value of the least significant bit in the replaced video data RV for the previous frame.

[0018] As described above, since the data value of the least significant bit is alternately replaced with "0" and "1" for each frame by the least significant bit replacement circuit 11, when there is no video sticking in the frame memory FM, the values will be different in the preceding and succeeding frames. Therefore, when the frame memory FM is normal, a video sticking determination signal JS with a logic level of 0 is output from the comparison unit 13.

[0019] On the other hand, when video sticking occurs in the frame memory FM, the data value of the least significant bit will be different in the preceding and succeeding frames. Therefore, when video sticking occurs due to an abnormality in the frame memory FM, a video sticking determination signal JS with a logic level of 1 is output from the comparison unit 13.

[0020] As described above, the video sticking detection circuit 100 of this embodiment alternately replaces the data value of the least significant bit of the data sequence of the input video data VIN with "0" and "1" for each frame before storing it in the frame memory FM. Then, the replaced video data RV, which is the video data after replacement, is stored in the frame memory FM, and after being output from the frame memory FM, the data values of the least significant bits of the data sequences in the preceding and succeeding frames are compared. When the frame memory FM is operating normally, the data values of the least significant bits will be different in the preceding and succeeding frames. Therefore, by determining whether the two data values match, the occurrence of video sticking can be detected.

[0021] According to the video sticking detection circuit 100 of this embodiment, since the occurrence of video sticking can be detected with a simple configuration, unlike the case of providing a special circuit for detecting display abnormalities, it is possible to detect the occurrence of video sticking while suppressing an increase in the device scale.

[0022] Note that when frame memories FM are provided corresponding to each pixel of RGB, the previous frame data holding unit 12 and the comparison unit 13 are also provided corresponding to each of RGB, so that it is possible to detect video sticking in the same manner as described above.

[0023] Figure 3 is a block diagram showing the image fixation detection circuit 100A having the above configuration. The image processing device equipped with the image fixation detection circuit 100A is provided with a frame memory FM1 corresponding to pixel R, a frame memory FM2 corresponding to pixel G, and a frame memory FM3 corresponding to pixel B.

[0024] The least significant bit replacement circuit 11 alternately replaces the data value of the least significant bit (LSB) of each of the multiple data pieces constituting R, G, and B of the input video data VIN with "0" and "1" each frame. The least significant bit replacement circuit 11 supplies the R data with the replaced least significant bit data value to frame memory FM1, the G data to frame memory FM2, and the B data to frame memory FM3, respectively.

[0025] The image fixation detection circuit 100A includes a determination circuit 14A corresponding to frame memory FM1, a determination circuit 14B corresponding to frame memory FM2, and a determination circuit 14C corresponding to frame memory FM3. The determination circuit 14A includes a previous frame data holding unit 12A and a comparison unit 13A. The determination circuits 14B and 14C have the same configuration as the determination circuit 14A.

[0026] With this configuration of the image fixation detection circuit 100A, image fixation can be detected even when frame memories FM1, FM2, and FM3 are provided corresponding to each of the RGB channels.

[0027] Note that the data subject to replacement of the least significant bit may be all the data within one frame of the input video data VIN, or it may be only the data at a specific location.

[0028] For example, as shown by the diagonal lines in Figure 4A, if the least significant bit is replaced for all data in one frame, it is possible to detect where in the data of one frame image fixation is occurring. This allows for the identification of which memory cell in the frame memory (FM) has failed, and can therefore be used as a simple memory failure detection function.

[0029] Furthermore, if it is not necessary to pinpoint the location of such memory cell failures, in order to detect image fixation, only the last data of a frame may be targeted for replacement of the least significant bit, as shown by the diagonal lines in Figure 4B, or only the first data of a frame may be targeted for replacement of the least significant bit, as shown by the diagonal lines in Figure 4C.

[0030] Furthermore, the replacement is not limited to the least significant bit; by alternately replacing the data value of any specific bit in the data for one frame with "0" and "1" for each frame, the same functionality as in the above embodiment can be achieved.

[0031] Furthermore, in the above embodiment, a configuration was described for detecting image fixation in an image processing device in which a frame memory FM is provided before the image processing unit PU, before image processing is performed by the image processing unit PU. However, in an image processing device in which a frame memory FM is provided after the image processing unit PU, it is also possible to detect image fixation in the same manner as in the above embodiment.

[0032] Figure 5 is a block diagram showing the configuration of the video fixation detection circuit 100B provided in correspondence with the video processing device having the above configuration. The image processing unit PU performs image processing on the input video data VIN to generate processed video data PV. The least significant bit replacement circuit 11 alternately replaces the data values ​​of the least significant bits (LSB) of multiple data pieces constituting the processed video data PV with "0" and "1" one frame at a time.

[0033] The configuration and operation of the frame memory FM, the previous frame data holding unit 12, and the comparison unit 13 are the same as those described in the above embodiment. With this configuration, even when the frame memory FM is provided downstream of the image processing unit PU, it is possible to detect image fixation caused by the frame memory FM. [Example 2]

[0034] Next, Embodiment 2 of this disclosure will be described. Figure 6 is a block diagram showing the configuration of the image fixation detection circuit 100C according to Embodiment 2.

[0035] The video fixation detection circuit 100C includes, in addition to the least significant bit replacement circuit 11, the previous frame data holding unit 12, and the comparison unit 13, a least significant bit storage unit 21 and a least significant bit re-replacement circuit 22.

[0036] The least significant bit storage unit 21 stores the data value of the least significant bit (LSB) of the multiple data fragments that make up the input video data VIN, that is, the data value of the least significant bit before replacement by the least significant bit replacement circuit 11. The least significant bit storage unit 21 supplies the stored data value SDV to the least significant bit re-replacement circuit 22.

[0037] The least significant bit replacement circuit 22 replaces the data value of the least significant bit of the replaced video data RV1 output from the frame memory FM with the data value SDV supplied from the least significant bit storage unit 21, that is, the data value of the least significant bit before replacement by the least significant bit replacement circuit 11. The least significant bit replacement circuit 22 supplies the replaced video data as replaced video data RRV to the image processing unit PU.

[0038] Figure 7 illustrates, as an example, the replacement of the least significant bit data value by the least significant bit replacement circuit 11, the comparison of the least significant bit data value by the comparison unit 13, and the re-replacement of the least significant bit data value by the least significant bit re-replacement circuit 22.

[0039] If the bit sequence of the first frame of the input video data VIN is "01010101", the bit sequence of the second frame is "10101010", and the bit sequence of the third frame is "00110011", then after the least significant bit data value is replaced by the least significant bit replacement circuit 11, the bit sequence of the first frame of the replaced video data RV will be "01010100", the bit sequence of the second frame will be "10101011", and the bit sequence of the third frame will be "00110010". The comparison unit 13 compares the least significant bit data values ​​between frames.

[0040] The least significant bit replacement circuit 22 replaces the data value of the least significant bit. As a result, the bit sequence of the first frame of the replaced video data RRV, which is the replaced data, becomes "01010101", the bit sequence of the second frame becomes "10101010", and the bit sequence of the third frame becomes "00110011".

[0041] Thus, in the video fixation detection circuit 100A of this embodiment, after replacing the data value of the least significant bit of the input video data VIN, a re-replacement is performed to return it to the original data value, and then it is supplied to the image processing unit PU. With this configuration, image processing can be performed using the re-replaced video data RRV, which has the data value of the original input video data VIN. [Note] This specification discloses the following configuration:

[0042] (Composition 1) A video fixation detection circuit provided in a video processing device having a frame memory that stores and outputs video data consisting of a plurality of consecutive data fragments, one frame at a time, for detecting video fixation of the video data output from the frame memory, comprising: a bit replacement circuit that receives the video data as input and, before storing it in the frame memory, alternately replaces the data values ​​of specific bits in the plurality of data fragments with "0" and "1" for each frame to which the data fragment belongs, and supplies it to the frame memory; a data holding unit that holds the data of the specific bits of the video data output from the frame memory; and a comparison unit that compares the data value of the specific bit in the video data for one frame output from the frame memory with the data value of the specific bit held in the data holding unit and outputs the result.

[0043] (Configuration 2) The image lock detection circuit according to configuration 1, wherein the aforementioned specific bit is the least significant bit.

[0044] (Composition 3) The bit replacement circuit replaces the least significant bit in all the video data for one frame with "0" and "1" alternately for each frame, as described in configuration 2 of the video fixation detection circuit.

[0045] (Composition 4) The video fixation detection circuit according to Configuration 1, wherein the specific bit is any bit in the data of some of the pixels in the video data for one frame.

[0046] (Composition 5) A video fixation detection circuit according to any one of configurations 1 to 4, further comprising: a storage unit for storing the data value of the specific bit before replacement; and a re-replacement unit for restoring the data value replaced by the bit replacement circuit to the original data value based on the data value stored in the storage unit.

[0047] (Composition 6) The video fixation detection circuit according to any one of configurations 1 to 5, wherein the bit replacement circuit replaces the data value of a specific bit for each of the RGB data of the video data, and the comparison unit compares the data value of the specific bit for each of the RGB data of the video data. [Explanation of Symbols]

[0048] 100 Image Fixation Detection Circuit 11. Least Significant Bit Replacement Circuit 12 Previous frame data retention unit 13. Comparison Section FM frame memory PU Image Processing Unit 14A, 14B, 14C determination circuit 21. Lesser-than-most bit storage section 22. Circuit for replacing the least significant bit

Claims

1. A video processing device having a frame memory that stores and outputs video data consisting of multiple consecutive data fragments, one frame at a time, is provided with a video fixation detection circuit that detects video fixation of the video data output from the frame memory, A bit substitution circuit that receives the video data input and, before storing it in the frame memory, alternately replaces the data values ​​of specific bits in the plurality of data fragments with "0" and "1" for each frame to which the data fragment belongs, and supplies it to the frame memory. A data holding unit that holds the data of a specific bit of the video data output from the frame memory, A comparison unit that compares the data value of a specific bit in the video data for one frame output from the frame memory with the data value of the specific bit held in the data holding unit and outputs the result, A video fixation detection circuit having the following features.

2. The image fixation detection circuit according to claim 1, wherein the specified bit is the least significant bit.

3. The video fixation detection circuit according to claim 2, wherein the bit replacement circuit alternately replaces the least significant bit in all the video data for one frame with "0" and "1" for each frame.

4. The video fixation detection circuit according to claim 1, wherein the specific bit is any bit in the data of some of the pixels in the video data for one frame.

5. A storage unit that stores the data value of the specific bit before replacement, A re-replacement unit that restores the data value replaced by the bit replacement circuit back to the original data value based on the data value stored in the storage unit, The image fixation detection circuit according to claim 1, further comprising:

6. The bit replacement circuit replaces the data value of a specific bit for each RGB data of the video data. The video fixation detection circuit according to claim 1, wherein the comparison unit compares the data value of a specific bit for each RGB data of the video data.

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