Method for forming a silicon substrate with reduced glow-in nuclei that become epitaxial defects, and method for forming an epitaxial wafer.
Boron-doped silicon substrates with controlled v/G ratio and limited dwell time effectively mitigate epitaxial defects, improving the quality of epitaxial wafers for microelectronics and photovoltaic applications.
Patent Information
- Application Number
- JP2026092618
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2020-11-11
- Filing Date
- 2026-06-02
- Publication Date
- 2026-09-08
AI Technical Summary
Existing epitaxial wafers suffer from grow-in defects, such as epitaxial stacking faults and hillocks, due to defect propagation during silicon epitaxial growth, which are not effectively mitigated by current methods.
A method involving boron doping of silicon substrates to a concentration of at least 2.8×10^18 atoms/cm^3, controlling the growth rate (v) to axial temperature gradient (G) ratio (v/G) to less than 0.25 mm^2/(min·K), and limiting the dwell time in the 1150°C to 950°C range to 160 minutes or less, to reduce epitaxial defects.
The method significantly reduces the formation of epitaxial defects by controlling boron-doped silicon substrates, enhancing the quality of epitaxial wafers for microelectronics and photovoltaic applications.